rewrite of cmd_cpu/do_cpu_freq

[z180-stamp.git] / z180 / cpuinfo.180

diff --git a/z180/cpuinfo.180 b/z180/cpuinfo.180
index 7d25dc276f7ec437a06cc365db843c3223c5ea4a..0ea3e8e17b8dfc41af7567b1722716a2b6c97868 100644 (file)
--- a/z180/cpuinfo.180
+++ b/z180/cpuinfo.180
@@ -30,52 +30,20 @@ base                equ     0
 done:  db      0\r
 result:        db      0\r
 \r
-;-------------------------------------------------------------------------------\r
-; Read internal register at address in L and IOBASE in H.\r
-;\r
-\r
-reg_in:\r
-       ld      a,h\r
-       add     a,l\r
-       ld      c,a\r
-       ld      b,0\r
-       in      a,(c)\r
-       ret\r
-\r
-;-------------------------------------------------------------------------------\r
-; Write internal register at address in L and IOBASE in H.\r
-;\r
-\r
-reg_out:\r
-       ld      b,a\r
-       ld      a,h\r
-       add     a,l\r
-       ld      c,a\r
-       ld      a,b\r
-       ld      b,0\r
-       out     (c),a\r
-       ret\r
-\r
 ;-------------------------------------------------------------------------------\r
 ; Check if register C exists. D holds mask of bit to test.\r
-;      return nz, if register exists\r
+;      return z, if register exists\r
 \r
 chk_reg:\r
-       call    reg_in\r
-       cp      0ffh\r
-       ret     nz              ;\r
-\r
+       in      a,(c)\r
+       ld      l,a\r
        ; check, if register is changeable\r
-\r
-       xor     d               ; set bit(s) in register to 0\r
-       call    reg_out\r
-       call    reg_in          ; get it back\r
-       ex      af,af'\r
-       ld      a,0ffh          ; set to register original state\r
-       call    reg_out\r
-       ex      af,af'\r
-       cpl\r
-       and     d\r
+       xor     d               ;\r
+       out     (c),a\r
+       in      a,(c)           ; get it back\r
+       xor     d\r
+       out     (c),l           ; set register to original state\r
+       cp      l\r
        ret\r
 \r
 ;-------------------------------------------------------------------------------\r
@@ -142,56 +110,47 @@ chk_z80:
        ; At least Hitachi HD64180\r
        ; Test differences in certain internal registers\r
        ; to determine the 180 variant.\r
-       ; First, search the internal register bank.\r
-\r
-       ld      h,00H           ; I/O Base\r
-find_base_loop:\r
-       ld      l,icr\r
-       call    reg_in\r
-       and     11011111b       ; mask I/O Stop bit\r
-       xor     h\r
+\r
+       ld      b,0\r
+       ld      c,icr\r
+       in      a,(c)\r
        cp      01FH\r
-       jr      nz,nxt_base\r
+       jr      z,icr_ok\r
 \r
        ;TODO: additional plausibility checks\r
 \r
-       jr      z,base_found\r
-nxt_base:\r
-       ld      a,h\r
-       add     a,040H\r
-       ld      h,a\r
-       jr      nc,find_base_loop\r
-       ret                     ;I/O registers not found\r
+       ret                     ; I/O registers not found\r
 \r
        ; Register (base) found.\r
 \r
-base_found:\r
+icr_ok:\r
        inc     e               ; HD64180\r
-       ld      l,RCR           ; Disable Refresh Controller\r
-       xor     a               ;\r
-       call    reg_out         ;\r
-       ld      l,omcr          ; Check, if CPU has OMCR register\r
+       out0    (RCR),b         ;\r
+       ld      c,omcr          ; Check, if CPU has OMCR register\r
        ld      d,M_IOC         ;\r
        call    chk_reg         ;\r
-       ret     z               ; Register does not exist. It's a HD64180\r
+       ret     nz              ; Register does not exist. It's a HD64180\r
 \r
        inc     e               ; Z80180\r
-       ld      l,cmr           ; Check, if CPU has CMR register\r
+       ld      c,cmr           ; Check, if CPU has CMR register\r
        ld      d,M_LNC         ;\r
        call    chk_reg         ;\r
-       ret     z               ; register does not exist. It's a Z80180\r
+       ret     nz              ; register does not exist. It's a Z80180\r
 \r
        inc     e               ; S180/L180 (class) detected.\r
-\r
        ret\r
 \r
 ;-------------------------------------------------------------------------------\r
 \r
 start:\r
        ld      sp,stack\r
+       ld      hl,done\r
+       ld      (hl),0\r
+       inc     hl\r
+       ld      (hl),0\r
+       push    hl\r
        call    check\r
-\r
-       ld      hl,result\r
+       pop     hl\r
        ld      (hl),e\r
        dec     hl\r
        ld      (hl),0ffH\r