New command: cfboot - boot from cf card.

[z180-stamp.git] / z180 / config.inc

diff --git a/z180/config.inc b/z180/config.inc
index ffab6e6c94040daebc742ae4d87832f1fa2d54d2..bea6e05cd302ac06d0121ae98c256d77570e4109 100644 (file)
--- a/z180/config.inc
+++ b/z180/config.inc
@@ -3,8 +3,6 @@ FALSE   equ     0
 TRUE   equ     NOT FALSE\r
 \r
 \r
-DEBUG  equ     true\r
-\r
 banked equ     true\r
 \r
 ;-----------------------------------------------------\r
@@ -46,24 +44,36 @@ PRT_PRE             equ     20              ;PRT prescaler
 ;-----------------------------------------------------\r
 ; MMU\r
 \r
-COMMON_SIZE    equ     16*1024         ;Common Area size in bytes\r
+COMMON_SIZE    equ     4*1024          ;Common Area size in bytes\r
                                        ;must be multiple of 4K\r
-\r
 if (COMMON_SIZE mod 1000h)\r
        .printx COMMON_SIZE not multiple of 4K!\r
        end     ;stop assembly\r
 endif\r
+CMN_SIZE       equ     COMMON_SIZE/1000h               ;4K units\r
+BNK_SIZE       equ     64/4 - CMN_SIZE                 ;bank size (4K units)\r
+BANKS          equ     (512/4 - CMN_SIZE)/BNK_SIZE     ;max nr. of banks\r
+\r
+; Logical address space, CBAR values\r
 \r
-CSK    equ     COMMON_SIZE/1000h       ;\r
-CA     equ     10h - CSK               ;common area start\r
-BA     equ     0                       ;banked area start\r
+CA             equ     10h - CMN_SIZE          ;common area start (64K - common size)\r
+BA             equ     0                       ;banked area start\r
+\r
+   if 0\r
 \r
 SYS$CBR                equ     0\r
 SYS$CBAR       equ     CA*16 + CA      ;CBAR in system mode\r
 USR$CBAR       equ     CA*16 + BA      ;CBAR in user mode (CP/M)\r
 \r
+   endif\r
+   if 1\r
+\r
+SYS$CBR                equ     BNK_SIZE\r
+SYS$CBAR       equ     CA*16 + CA      ;CBAR in system mode\r
+USR$CBAR       equ     CA*16 + BA      ;CBAR in user mode (CP/M)\r
+\r
+   endif\r
 \r
-BANKS          equ     18              ;max nr. of banks\r
 \r
 ;-----------------------------------------------------\r
 \r
@@ -128,20 +138,27 @@ mtx.fifo_id       equ     0               ;    This *must* have #0
 mrx.fifo_len   equ     64\r
 mrx.fifo_id    equ     1\r
 \r
-ci.fifo_len    equ     32              ;AVRCON Character I/O via AVR\r
+ci.fifo_len    equ     32              ;AVRCON (USB0) Character I/O via AVR\r
 ci.fifo_id     equ     2\r
 co.fifo_len    equ     32\r
 co.fifo_id     equ     3\r
 \r
+s0.rx_len      equ     128             ;Serial 0 (ASCI0) buffers\r
+s0.rx_id       equ     4               ;\r
+s0.tx_len      equ     128             ;\r
+s0.tx_id       equ     5               ;\r
+\r
 s1.rx_len      equ     128             ;Serial 1 (ASCI1) buffers\r
-s1.rx_id       equ     4               ;\r
+s1.rx_id       equ     6               ;\r
 s1.tx_len      equ     128             ;\r
-s1.tx_id       equ     5               ;\r
+s1.tx_id       equ     7               ;\r
 \r
 AVRINT5                equ     4Fh\r
 AVRINT6                equ     5Fh\r
 ;PMSG          equ     80h\r
 \r
+IDEBASE                equ     60h\r
+\r
 ;-----------------------------------------------------\r
 ; Definition of (logical) top 2 memory pages\r
 \r