\r
base_found:\r
inc e ; HD64180\r
+ ld l,RCR ; Disable Refresh Controller\r
+ xor a ;\r
+ call reg_out ;\r
ld l,omcr ; Check, if CPU has OMCR register\r
ld d,M_IOC ;\r
call chk_reg ;\r
ld (hl),e\r
dec hl\r
ld (hl),0ffH\r
- halt\r
- jp $-1\r
+ out (040H),a\r
+\r
+; ld a,(wstates)\r
+; out0 (DCNTL),a\r
+ ;Z80 Z180(0W) Z180(MaxW)\r
+loop: ;--------------------------\r
+ in a,(050h) ;11 10 +3*3 19\r
+ jp loop ;10 9 +3*3 18\r
+ ;--------------------------\r
+ ;21 19 37\r
+\r
+; jr loop ;12 8 +2*3 14\r
\r
rept 8\r
dw 0\r