0 PG5 OC0B PWM (2**8)*1024 262144 70.31
1 PG4
2 CLK2 PB4 OC2A Toggle (2**8)*1024*2 524288 35.16
-3 CLOCK PB5 OC1A PWM (2**16)*1024 67108864 0.2746
+3 ZCLK PB5 OC1A PWM (2**16)*1024 67108864 0.2746
4 PB6 OC1B PWM (2**16)*1024 67108864 0.2746
5 PB7 OC0A Toggle (2**8)*1024*2 524288 35.16
6 PG3
switch (mode) {
case INPUT:
pin_timer_off(pinlist[pin].timer);
- ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+ ATOMIC_BLOCK(ATOMIC_FORCEON) {
p->ddr &= ~bit;
p->pout &= ~bit;
}
break;
case INPUT_PULLUP:
pin_timer_off(pinlist[pin].timer);
- ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+ ATOMIC_BLOCK(ATOMIC_FORCEON) {
p->ddr &= ~bit;
p->pout |= bit;
}
case OUTPUT:
pin_timer_off(pinlist[pin].timer);
case OUTPUT_TIMER:
- ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+ ATOMIC_BLOCK(ATOMIC_FORCEON) {
p->ddr |= bit;
}
break;
port_t *p = pinlist[pin].adr;
uint8_t bit = pinlist[pin].mask;
- ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+ ATOMIC_BLOCK(ATOMIC_FORCEON) {
if (val)
p->pout |= bit;
else