merge/unify chkcpu and freq. wip

[z180-stamp.git] / z180 / cpuinfo.180

diff --git a/z180/cpuinfo.180 b/z180/cpuinfo.180
index 0ea3e8e17b8dfc41af7567b1722716a2b6c97868..372f00393851de4b8570dcb5989763a6a44bcb2a 100644 (file)
--- a/z180/cpuinfo.180
+++ b/z180/cpuinfo.180
@@ -29,6 +29,19 @@ base         equ     0
 \r
 done:  db      0\r
 result:        db      0\r
+cycls: db      0\r
+wstates:db     0\r
+\r
+;-------------------------------------------------------------------------------\r
+cyctab:\r
+       db       0      ;Unknown CPU\r
+       db      20      ;8080\r
+       db      20      ;8085\r
+       db      21      ;Z80\r
+       db      19      ;HD64180 or higher\r
+       db      19      ;HD64180\r
+       db      19      ;Z80180\r
+       db      19      ;Z8S180, Z8L180\r
 \r
 ;-------------------------------------------------------------------------------\r
 ; Check if register C exists. D holds mask of bit to test.\r
@@ -111,9 +124,10 @@ chk_z80:
        ; Test differences in certain internal registers\r
        ; to determine the 180 variant.\r
 \r
-       ld      b,0\r
-       ld      c,icr\r
-       in      a,(c)\r
+       ld      a,(wstates)\r
+       out0    (DCNTL),a\r
+       out0    (RCR),b         ;\r
+       in0     a,(icr)\r
        cp      01FH\r
        jr      z,icr_ok\r
 \r
@@ -125,7 +139,6 @@ chk_z80:
 \r
 icr_ok:\r
        inc     e               ; HD64180\r
-       out0    (RCR),b         ;\r
        ld      c,omcr          ; Check, if CPU has OMCR register\r
        ld      d,M_IOC         ;\r
        call    chk_reg         ;\r
@@ -145,29 +158,32 @@ icr_ok:
 start:\r
        ld      sp,stack\r
        ld      hl,done\r
-       ld      (hl),0\r
+       ld      b,h\r
+       ld      (hl),b\r
        inc     hl\r
-       ld      (hl),0\r
-       push    hl\r
+       ld      (hl),b\r
        call    check\r
-       pop     hl\r
+       ld      hl,cyctab\r
+       ld      d,h\r
+       add     hl,de\r
+       ld      a,(hl)\r
+       ld      hl,cycls\r
+       ld      (hl),a\r
+       dec     hl\r
        ld      (hl),e\r
        dec     hl\r
        ld      (hl),0ffH\r
        out     (040H),a\r
+                               ;808x   Z80    Z180(0W) Z180(MaxW)\r
+loop:                          ;---------------------------------\r
+       in      a,(050h)        ;10     11       10     +3*3  19\r
+       jp      loop            ;10     10        9     +3*3  18\r
+                               ;---------------------------------\r
+                               ;20     21       19           37\r
 \r
-;      ld      a,(wstates)\r
-;      out0    (DCNTL),a\r
-                               ;Z80    Z180(0W) Z180(MaxW)\r
-loop:                          ;--------------------------\r
-       in      a,(050h)        ;11       10     +3*3  19\r
-       jp      loop            ;10        9     +3*3  18\r
-                               ;--------------------------\r
-                               ;21       19           37\r
-\r
-;      jr      loop            ;12        8     +2*3  14\r
+;      jr      loop            ;--     12        8     +2*3  14\r
 \r
-       rept    8\r
+       rept    4\r
          dw    0\r
        endm\r
 stack:\r