/*
+ * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include "common.h"
-//#include <avr/power.h>
-//#include <avr/pgmspace.h>
-//#include <util/atomic.h>
-//#include <avr/sleep.h>
-//#include <string.h>
+#include <util/atomic.h>
-
-#include "debug.h"
+#include "background.h"
#include "serial.h"
#include "z80-if.h"
-
-
+#include "debug.h"
+#include "z180-serv.h"
/*--------------------------------------------------------------------------*/
-uint32_t z80_sram_cmp(uint32_t addr, uint32_t length, uint8_t wval, int inc)
-{
- uint8_t rval;
- int_fast8_t errors = 0;
-
- DBG_P(1, "SRAM: Check 0x%.5lx byte... ", length);
- while (length--) {
- if ((rval = z80_read(addr)) != wval) {
- if (errors == 0) {
- DBG_P(1, "\nSRAM: Address W R\n" \
- " ------------------\n");
- }
- errors++;
- if (errors > 20) {
- DBG_P(1, " ...\n");
- break;
- }
- DBG_P(1, " 0x%.5lx 0x%.2x 0x%.2x\n", addr, wval, rval);
- }
- addr++;
- wval += inc;
- }
- DBG_P(1, "Done.\n");
-
- return addr;
-}
-
-void z80_sram_fill(uint32_t addr, uint32_t length, uint8_t startval, int inc)
-{
- printf("SRAM: Write 0x%.5lx byte... ", length);
- while (length--) {
- z80_write(addr, startval);
- ++addr;
- startval += inc;
- }
- printf("Done.\n");
-}
-
-
-#if 0
-void z80_sram_fill_string(uint32_t addr, int length, const char *text)
-{
- char c;
- const char *p = text;
-
- while (length--) {
- z80_write(addr++, c = *p++);
- if (c == 0)
- p = text;
- }
-}
-
-
-uint32_t z80_sram_cmp_string(uint32_t addr, int length, const char *text)
-{
- char c;
- const char *p = text;
-
- while (length--) {
- c = *p++;
- if (z80_read(addr) != c)
- break;
- ++addr;
- if (c == 0)
- p = text;
- }
- return addr;
-}
-
-const char * const qbfox = "Zhe quick brown fox jumps over the lazy dog!";
-const char * const qbcat = "Zhe quick brown fox jumps over the lazy cat!";
-
-#endif
uint8_t z80_get_byte(uint32_t adr)
{
uint8_t data;
-
- z80_request_bus();
- data = z80_read(adr),
- z80_release_bus();
-
+
+ z80_bus_cmd(Request);
+ data = z80_read(adr);
+ z80_bus_cmd(Release);
+
return data;
}
return addr.as32;
}
-void do_msg_ini_msgfifo(uint8_t subf, int len, uint8_t * msg)
-{
- (void)subf; (void)len;
-
- z80_init_msg_fifo(msg_to_addr(msg));
-}
-
void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
{
(void)len;
- z80_memfifo_init(subf - 1, msg_to_addr(msg));
+ z80_memfifo_init(subf, msg_to_addr(msg));
}
const FLASH struct msg_item z80_messages[] =
{
{ 0, /* fct nr. */
- 0, 0, /* sub fct nr. from, to */
- do_msg_ini_msgfifo},
- { 0,
- 1, 2,
+ 1, 3, /* sub fct nr. from, to */
do_msg_ini_memfifo},
{ 1,
1, 1,
sub_fct = *msg++;
len -= 2;
- while (fct != z80_messages[i].fct)
- ++i;
+ while (fct != z80_messages[i].fct) {
+ if (z80_messages[i].fct == 0xff) {
+ DBG_P(1, "do_message: Unknown function: %i, %i\n",
+ fct, sub_fct);
+ return; /* TODO: unknown message # */
+ }
- if (z80_messages[i].fct == 0xff) {
- DBG_P(1, "do_message: Unknown function: %i, %i\n",
- fct, sub_fct);
- return; /* TODO: unknown message # */
+ ++i;
}
while (fct == z80_messages[i].fct) {
- if (sub_fct >= z80_messages[i].sub_min && sub_fct <= z80_messages[i].sub_max )
+ if (sub_fct >= z80_messages[i].sub_min &&
+ sub_fct <= z80_messages[i].sub_max )
break;
++i;
}
static int msglen,idx;
static uint8_t buffer[CTRBUF_LEN];
- while (state != 3 && (ch = z80_msg_fifo_getc()) >= 0) {
+ while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) {
switch (state) {
case 0: /* wait for start of message */
- if (ch == 0x81) {
+ if (ch == 0xAE) { /* TODO: magic number */
msglen = 0;
idx = 0;
state = 1;
break;
case 2: /* get message */
buffer[idx++] = ch;
- if (idx == msglen)
- state = 3;
+ if (idx == msglen) {
+ do_message(msglen, buffer);
+ state = 0;
+ }
break;
}
}
+}
+
+
+int msg_handling(int state)
+{
+ uint8_t pending;
+
+ ATOMIC_BLOCK(ATOMIC_FORCEON) {
+ pending = (Stat & S_MSG_PENDING) != 0;
+ Stat &= ~S_MSG_PENDING;
+ }
- if (state == 3) {
- do_message(msglen, buffer);
- state = 0;
+ if (pending) {
+ switch (state) {
+ case 0:
+ z80_bus_cmd(Request);
+ uint32_t addr = z80_read(0x40) +
+ ((uint16_t) z80_read(0x41) << 8) +
+ ((uint32_t) z80_read(0x42) << 16);
+ z80_bus_cmd(Release);
+ if (addr != 0) {
+ z80_memfifo_init(fifo_msgin, addr);
+ state = 1;
+ }
+ break;
+ case 1:
+ check_msg_fifo();
+ break;
+ }
}
+
+ return state;
}
-/*--------------------------------------------------------------------------*/
+static int handle_msg_handling;
-void dump_mem(const FLASH uint8_t *addr, uint32_t len)
+void setup_z180_serv(void)
{
- DBG_P(1, "hdrom dump:");
- while (len) {
- DBG_P(1, "\n %.5x:", addr);
- for (unsigned i = 0; i<16; i++)
- DBG_P(1, " %.2x", *addr++);
- len -= len > 16 ? 16 : len;
- }
- DBG_P(1, "\n");
+
+ handle_msg_handling = bg_register(msg_handling, 0);
}
-/*--------------------------------------------------------------------------*/
+void restart_z180_serv(void)
+{
+ z80_bus_cmd(Request);
+ z80_write(0x40, 0);
+ z80_write(0x41, 0);
+ z80_write(0x42, 0);
+ z80_bus_cmd(Release);
+
+ for (int i = 0; i < NUM_FIFOS; i++)
+ z80_memfifo_init(i, 0);
+ bg_setstat(handle_msg_handling, 0);
+}
+/*--------------------------------------------------------------------------*/
const FLASH uint8_t iniprog[] = {
0xAF, // xor a
0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers
0x06, 0x08, // ld b,dmct_e-dmclrt
0x0E, 0x20, // ld c,sar0l
- 0xED, 0x93, // otimr
+ 0xED, 0x93, // otimr
0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst
0xED, 0x39, 0x31, // out0 (dmode),a ;
- 0x3E, 0x62, // ld a,062h ;enable dma0,
+ 0x3E, 0x62, // ld a,062h ;enable dma0,
0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k
0x18, 0xFB, // jr cl_1 ;
- 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
+ 0x00, 0x00, //dmclrt: dw 0 ;src (inc)
0x00, // db 0 ;src
0x00, 0x00, // dw 0 ;dst (inc),
0x00, // db 0 ;dst
0x00, 0x00, // dw 0 ;count (64k)
};
-
-
-
-// check_msg_fifo();
-
projects / z180-stamp.git / blobdiff