+#endif
+
+ISR(INT5_vect)
+{
+ Stat |= S_MSG_PENDING;
+}
+
+ISR(INT6_vect)
+{
+ Stat |= S_CON_PENDING;
+}
+
+static
+void setup_avr(void)
+{
+ /* CPU */
+
+ /* Disable JTAG Interface regardless of the JTAGEN fuse setting. */
+ MCUCR = _BV(JTD);
+ MCUCR = _BV(JTD);
+
+ /* Disable peripherals. Enable individually in respective init function. */
+ PRR0 = _BV(PRTWI) |
+ _BV(PRTIM2) | _BV(PRTIM0) | _BV(PRTIM1) |
+ _BV(PRSPI) | _BV(PRUSART0) | _BV(PRADC);
+
+ PRR1 = _BV(PRTIM5) | _BV(PRTIM4) | _BV(PRTIM3) |
+ _BV(PRUSART3) | _BV(PRUSART2) | _BV(PRUSART1);
+
+
+ /* disable analog comparator */
+ ACSR = _BV(ACD);
+ /* Ports */
+
+ /* Clock */
+ CLKPR = _BV(CLKPCE);
+ CLKPR = 0;
+
+ /* Timer */
+ PRR1 &= ~_BV(PRTIM3);
+ OCR3A = F_CPU / 1000 - 1; /* Timer3: 1000Hz interval (OC3A) */
+ TCCR3B = (0b01<<WGM32)|(0b001<<CS30); /* CTC Mode, Prescaler 1 */
+ TIMSK3 = _BV(OCIE3A); /* Enable TC2.oca interrupt */
+
+ /* INT5, INT6: falling edge */
+ EICRB = (EICRB & ~((0b11 << ISC50) | (0b11 << ISC60))) |
+ (0b10 << ISC50) | (0b10 << ISC60);
+ /* Reset pending ints */
+ EIFR |= _BV(INTF5) | _BV(INTF6);
+ /* Enable INT5, and INT6 */
+ EIMSK |= _BV(INT5) | _BV(INT6);
+}
+
+static
+int reset_reason_is_power_on(void)
+{
+ return (mcusr & _BV(PORF)) != 0;
+}
+
+static
+void setup_system_time(void)
+{
+ struct tm rtc_time;
+
+ rtc_get(&rtc_time);
+ rtc_time.tm_isdst = 0;
+ set_system_time(mk_gmtime(&rtc_time) );
+}
+
+