]> cloudbase.mooo.com Git - z180-stamp.git/blobdiff - stm32/z180-stamp-stm32.c
Update libopencm3
[z180-stamp.git] / stm32 / z180-stamp-stm32.c
index 96d724c9c707d9f8625865733373e9269350376c..888494d16a3e588db6b3d736a72a8f077ce072f0 100644 (file)
@@ -1,6 +1,10 @@
 /*
+ * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
+#include <stdio.h>
 
 #include <libopencmsis/core_cm3.h>
 #include <libopencm3/cm3/nvic.h>
@@ -10,8 +14,6 @@
 #include <libopencm3/stm32/gpio.h>
 #include <libopencm3/stm32/timer.h>
 
-#include <stdio.h>
-
 #define ODR    0x0c
 #define IDR    0x08
 
@@ -87,26 +89,26 @@ static void clock_setup(void)
 
        /* Enable clocks for:
                GPIO port A (for GPIO_USART1_TX and Button)
-               GPIO port C (LEDs) 
+               GPIO port C (LEDs)
                USART1
-               TIM16 (RST-Pin) 
+               TIM16 (RST-Pin)
                TIM1  (IOCS1)
        */
-       rcc_peripheral_enable_clock(&RCC_APB2ENR, 
-                         RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN 
-                       | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN 
+       rcc_peripheral_enable_clock(&RCC_APB2ENR,
+                         RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN
+                       | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN
                        | RCC_APB2ENR_USART1EN | RCC_APB2ENR_AFIOEN
                        | RCC_APB2ENR_TIM1EN | RCC_APB2ENR_TIM16EN);
        /* Enable clocks for:
                TIM3
        */
-       rcc_peripheral_enable_clock(&RCC_APB1ENR, 
+       rcc_peripheral_enable_clock(&RCC_APB1ENR,
                        RCC_APB1ENR_TIM3EN);
 
        /* Enable clocks for:
                DMA1
        */
-       rcc_peripheral_enable_clock(&RCC_AHBENR, 
+       rcc_peripheral_enable_clock(&RCC_AHBENR,
                        RCC_AHBENR_DMA1EN);
 }
 
@@ -130,19 +132,19 @@ static void nvic_setup(void)
 static void tim3_setup(void)
 {
        TIM3_CR1 = TIM_CR1_CMS_EDGE | TIM_CR1_DIR_UP;
-               
+
        TIM3_CCMR2 = 0
-               | TIM_CCMR2_OC4M_FORCE_LOW      
+               | TIM_CCMR2_OC4M_FORCE_LOW
        /*      | TIM_CCMR2_OC4M_FORCE_HIGH     */
        /*      | TIM_CCMR2_OC4M_PWM2           */
-               
+
        /*      | TIM_CCMR2_OC4PE               */
        /*      | TIM_CCMR2_OC4FE               */
                | TIM_CCMR2_CC4S_OUT;
-               
+
        TIM3_CCER = TIM_CCER_CC4E
                | TIM_CCER_CC4P;
-       
+
        TIM3_ARR = 48;  /* default */
        TIM3_CCR4 = 1;  /*  */
 }
@@ -155,7 +157,7 @@ static void gpio_setup(void)
           Remap TIM3 (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9)
           Port D0/Port D1 mapping on OSC_IN/OSC_OUT
        */
-       gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON, 
+       gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON,
                        AFIO_MAPR_SPI1_REMAP
                        | AFIO_MAPR_TIM3_REMAP_FULL_REMAP
                        | AFIO_MAPR_PD01_REMAP);
@@ -175,7 +177,7 @@ static void gpio_setup(void)
 void delay_systicks(int ticks)
 {
        int start, stop, now;
-       
+
        start = STK_CVR;
        stop = start - ticks;
        if (stop < 0) {
@@ -299,13 +301,13 @@ static void key_timerproc() {
 //     key_state = key_state  & key_in      | (key_state  | key_in)      & key_in_last;
 
        key_state = c | ((key_in_last | key_in) & key_state);
-               
+
 //     key_state = (key_state&key_in_last) | (key_state&key_in) | (key_in_last&key_in);
 
        key_press |= c;
-       
+
        key_in_last = key_in;
-       
+
 
        if ((key_state & REPEAT_MASK) == 0) // check repeat function
                rpt = REPEAT_START;
@@ -331,7 +333,7 @@ void sys_tick_handler(void)
                Stat |= S_10MS_TO;
 
                tick_10ms = 0;
-               
+
                i = led_timer[0];
                if (i)
                        led_timer[0] = i - 1;
@@ -340,11 +342,11 @@ void sys_tick_handler(void)
                        led_timer[1] = i - 1;
 
                key_timerproc();
-               
+
                /* Drive timer procedure of low level disk I/O module */
                //disk_timerproc();
        }
-       
+
        count_ms++;
        if (count_ms == 1000) {
                count_ms = 0;
@@ -367,7 +369,7 @@ void rtc_isr(void)
 void tim3_set(int mode)
 {
        uint16_t cc_mode;
-       
+
        cc_mode = TIM_CCMR2_CC4S_OUT;
 
        TIM3_CR1 = TIM_CR1_CMS_EDGE | TIM_CR1_DIR_UP /*| TIM_CR1_OPM */ ;
@@ -381,9 +383,9 @@ void tim3_set(int mode)
                TIM3_CCR4 = mode/2;
                cc_mode |= TIM_CCMR2_OC4M_PWM2;
        }
-                       
+
        TIM3_CCMR2 = cc_mode;
-               
+
        if (mode > 0)
                TIM3_CR1 |= TIM_CR1_CEN;
 }
@@ -394,17 +396,17 @@ static uint32_t z80_sram_cmp(uint32_t addr, uint32_t length, uint8_t wval, int i
 {
        uint8_t rval;
        int_fast8_t errors = 0;
-       
-       DBG_P(1, "SRAM: Check 0x%.5lX byte... ", length);
+
+       DBG_P(1, "SRAM: Check %#.5x byte... ", length);
        while (length--) {
                if ((rval = z80_read(addr)) != wval) {
-                       if (errors == 0) { 
+                       if (errors == 0) {
                                printf("\nSRAM: Address  W  R\n" \
                                       "      -------------\n");
 //                                            12345  00 11
                        }
                        printf("       %.5lx  %.2x %.2x\n", addr, wval, rval);
-                       
+
                        if (++errors > 16 )
                                break;
                }
@@ -422,7 +424,7 @@ static void z80_sram_fill(uint32_t addr, int length, uint8_t startval, int inc)
        printf("SRAM: Write %#.5x byte... ", length); //fflush(stdout);
        while (length--) {
                z80_write(addr, startval);
-               ++addr; 
+               ++addr;
                startval += inc;
        }
        printf("Done.\n");
@@ -463,23 +465,21 @@ const char * const qbcat = "Zhe quick brown fox jumps over the lazy cat!";
 
 #endif
 
-/*--------------------------------------------------------------------------*/
-
 uint8_t z80_get_byte(uint32_t adr)
 {
        uint8_t data;
-       
+
        z80_request_bus();
        data = z80_read(adr),
        z80_release_bus();
-       
+
        return data;
 }
 
 
 /*--------------------------------------------------------------------------*/
 
-static void do_10ms(void) 
+static void do_10ms(void)
 {
        for (uint_fast8_t i = 0; i < 2; i++) {
                switch (led_stat[i].mode) {
@@ -511,7 +511,6 @@ struct msg_item {
        void (*func)(uint8_t, int, uint8_t *);
 };
 
-static
 uint32_t msg_to_addr(uint8_t *msg)
 {
        uint32_t addr = msg[0] | (msg[1] << 8) | ((uint32_t)msg[2] << 16);
@@ -520,7 +519,6 @@ uint32_t msg_to_addr(uint8_t *msg)
 
 }
 
-static
 void do_msg_ini_msgfifo(uint8_t subf, int len, uint8_t * msg)
 {
        (void)subf; (void)len;
@@ -529,7 +527,6 @@ void do_msg_ini_msgfifo(uint8_t subf, int len, uint8_t * msg)
 }
 
 
-static
 void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
 {
        (void)len;
@@ -538,7 +535,6 @@ void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg)
 }
 
 
-static
 void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
 {
        (void)subf;
@@ -548,7 +544,6 @@ void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
 }
 
 
-static
 const struct msg_item z80_messages[] =
 {
        { 0,                    /* fct nr. */
@@ -569,7 +564,6 @@ const struct msg_item z80_messages[] =
 
 
 
-static
 void do_message(int len, uint8_t *msg)
 {
        uint8_t fct, sub_fct;
@@ -614,7 +608,6 @@ void do_message(int len, uint8_t *msg)
 
 #define CTRBUF_LEN 256
 
-static
 void check_msg_fifo(void)
 {
        int ch;
@@ -697,7 +690,7 @@ int main(void)
         * Otherwise enable it with the LSE as clock source and 0x7fff as
         * prescale value.
         */
-       rtc_auto_awake(LSE, 0x7fff);
+       rtc_auto_awake(RCC_LSE, 0x7fff);
 
        systick_setup();
 
@@ -706,19 +699,19 @@ int main(void)
        z80_reset(HIGH);
        z80_request_bus();
        DBG_P(1, "got it!\n");
-       
+
        z80_memset(0, 0x76, 0x80000);
        //z80_sram_fill(0, 512 * 1024, 0x76, 0);
        z80_sram_cmp(0, (uint32_t)512 * 1024, 0x76, 0);
-       
+
        z80_load_mem();
        z80_reset(LOW);
        DBG_P(1, "Bus released!\n");
        z80_release_bus();
        z80_reset(HIGH);
        DBG_P(1, "Reset released!\n");
-       
-       
+
+
        ledset(0, BLINK1, 50);
 
        while (1) {