working connect command, new sleep command

[z180-stamp.git] / avr / z80-if.c

diff --git a/avr/z80-if.c b/avr/z80-if.c
index 3a2c18450cfaf2c7cf64526453c7b5bffddab891..9492c28d6fd14a1eab7c697656e54dd3b23ab3d0 100644 (file)
--- a/avr/z80-if.c
+++ b/avr/z80-if.c
@@ -54,7 +54,6 @@
  */
 
 #include <avr/io.h>
-#include <util/delay.h>
 #include <util/atomic.h>
 #include <stdio.h>
 #include "debug.h"
@@ -241,7 +240,7 @@ static void z80_busreq_hpulse(void)
        z80_dbus_set_in();
        z80_addrbus_set_tristate();
 
-       ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
+       ATOMIC_BLOCK(ATOMIC_FORCEON) {
                Z80_O_BUSREQ = 1;
                Z80_O_BUSREQ = 1;       /* 2 AVR clock cycles */
                Z80_O_BUSREQ = 0;       /* 2 AVR clock cycles */
@@ -497,20 +496,20 @@ static struct {
        } fifo_dsc[NUM_FIFOS];
 
 
-void z80_memfifo_init(const fifo_t f, uint32_t adr)
+void z80_memfifo_init(const fifo_t f, uint32_t addr)
 {
+       fifo_dsc[f].base = addr;
 
-DBG_P(2, "z80_memfifo_init: %i, %lx\n", f, adr);
+       if (addr != 0) {
 
-       fifo_dsc[f].base = adr;
+DBG_P(2, "z80_memfifo_init: %i, %lx\n", f, addr);
 
-       z80_bus_cmd(Request);
-
-       fifo_dsc[f].mask = z80_read(adr + FIFO_BUFSIZE_MASK);
-       fifo_dsc[f].idx_in = z80_read(adr + FIFO_INDEX_IN);
-       fifo_dsc[f].idx_out = z80_read(adr + FIFO_INDEX_OUT);
-
-       z80_bus_cmd(Release);
+               z80_bus_cmd(Request);
+               fifo_dsc[f].mask = z80_read(addr + FIFO_BUFSIZE_MASK);
+               fifo_dsc[f].idx_in = z80_read(addr + FIFO_INDEX_IN);
+               fifo_dsc[f].idx_out = z80_read(addr + FIFO_INDEX_OUT);
+               z80_bus_cmd(Release);
+       }
 }
 
 
@@ -545,7 +544,8 @@ int z80_memfifo_is_full(const fifo_t f)
        return rc;
 }
 
-uint8_t z80_memfifo_getc(const fifo_t f)
+
+uint8_t z80_memfifo_getc_wait(const fifo_t f)
 {
        uint8_t rc, idx;
 
@@ -562,6 +562,24 @@ uint8_t z80_memfifo_getc(const fifo_t f)
        return rc;
 }
 
+int z80_memfifo_getc(const fifo_t f)
+{
+       int rc = -1;
+
+       if (fifo_dsc[f].base != 0) {
+               uint8_t idx = fifo_dsc[f].idx_out;
+               z80_bus_cmd(Request);
+               if (idx != z80_read(fifo_dsc[f].base + FIFO_INDEX_IN)) {
+                       rc = z80_read(fifo_dsc[f].base+idx);
+                       fifo_dsc[f].idx_out = ++idx & fifo_dsc[f].mask;
+                       z80_write(fifo_dsc[f].base+FIFO_INDEX_OUT, fifo_dsc[f].idx_out);
+               }
+               z80_bus_cmd(Release);
+       }
+
+       return rc;
+}
+
 
 void z80_memfifo_putc(fifo_t f, uint8_t val)
 {
@@ -577,96 +595,3 @@ void z80_memfifo_putc(fifo_t f, uint8_t val)
        z80_write(fifo_dsc[f].base+FIFO_INDEX_IN, fifo_dsc[f].idx_in);
        z80_bus_cmd(Release);
 }
-
-/*--------------------------------------------------------------------------*/
-/*
-       TODO: Rewrite msg_fifo routines for AVR
-*/
-
-static struct {
-       uint32_t base;
-       //uint8_t  idx_out, idx_in;
-       uint16_t count;
-       uint8_t  buf[256];
-       } msg_fifo;
-
-/*--------------------------------------------------------------------------*/
-
-#if 0
-
-static void tim1_setup(void)
-{
-       RCC_APB2RSTR |= RCC_APB2RSTR_TIM1RST;
-       RCC_APB2RSTR &= ~RCC_APB2RSTR_TIM1RST;
-
-       TIM1_CR1 = 0;
-
-       TIM1_SMCR = 0
-       /*      | TIM_SMCR_ETP                  */
-       /*      | TIM_SMCR_ETF_CK_INT_N_2       */
-               | TIM_SMCR_TS_ETRF
-               | TIM_SMCR_SMS_OFF
-               ;
-
-       TIM1_DIER = TIM_DIER_TDE;
-
-
-       TIM1_CCMR1 = 0
-               | TIM_CCMR1_OC1M_FORCE_LOW
-               | TIM_CCMR1_CC1S_OUT;
-
-       TIM1_SMCR |= TIM_SMCR_SMS_TM;
-}
-
-#endif
-
-/*--------------------------------------------------------------------------*/
-
-void z80_setup_msg_fifo(void)
-{
-
-
-//     gpio_set_mode(P_BUSACK, GPIO_MODE_INPUT,
-//             GPIO_CNF_INPUT_FLOAT, GPIO_BUSACK | GPIO_IOCS1);
-
-//...
-
-//     msg_fifo.count = NELEMS(msg_fifo.buf);
-       msg_fifo.count = 0;
-       msg_fifo.base = 0;
-
-}
-
-
-void z80_init_msg_fifo(uint32_t addr)
-{
-
-DBG_P(1, "z80_init_msg_fifo: %lx\n", addr);
-
-       z80_bus_cmd(Request);
-       z80_write(addr+FIFO_INDEX_OUT, z80_read(addr+FIFO_INDEX_IN));
-       z80_bus_cmd(Release);
-       msg_fifo.base = addr;
-}
-
-
-int z80_msg_fifo_getc(void)
-{
-       int c = -1;
-
-#if 0
-       if (msg_fifo.count != (NELEMS(msg_fifo.buf) /*- DMA1_CNDTR4 */ )) {
-               c = msg_fifo.buf[msg_fifo.count];
-               if (++msg_fifo.count == NELEMS(msg_fifo.buf))
-                       msg_fifo.count = 0;
-
-               if (msg_fifo.base != 0) {
-                       z80_bus_cmd(Request);
-                       z80_write(msg_fifo.base+FIFO_INDEX_OUT, msg_fifo.count);
-                       z80_bus_cmd(Release);
-               }
-       }
-#endif
-
-       return c;
-}