+++ /dev/null
- page 255\r
- .z80\r
-\r
- extrn ddtz,bpent\r
- extrn $stack\r
- extrn $coninit,$cists,$ci\r
-\r
- extrn romend\r
-\r
-\r
- global isv_sw\r
-\r
- include config.inc\r
- include z180reg.inc\r
- include z180.lib\r
- \r
-CR equ 0dh\r
-\r
-\r
-\r
-;----------------------------------------------------------------------\r
-\r
- cseg\r
-\r
- jp start \r
-\r
-; restart vectors\r
-\r
-rsti defl 1\r
- rept 7\r
- db 0, 0, 0, 0, 0\r
- jp bpent\r
-rsti defl rsti+1\r
- endm\r
-\r
-;----------------------------------------------------------------------\r
-\r
- if ROMSYS\r
-$crom: defb c$rom ;\r
- else\r
- db 0 ;\r
- endif\r
-\r
-dmclrt: ;clear ram per dma\r
- db dmct_e-dmclrt-2 ;\r
- db sar0l ;first port\r
- dw nullbyte ;src (fixed) \r
-nullbyte:\r
- db 000h ;src\r
- dw romend ;dst (inc), start after "rom" code\r
- db 00h ;dst\r
- dw 0-romend ;count (64k)\r
-dmct_e:\r
-\r
-\r
-INIWAITS defl CWAITIO\r
- if ROMSYS\r
-INIWAITS defl INIWAITS+CWAITROM\r
- endif\r
-\r
-hwini0:\r
- db 3 ;count\r
- db rcr,CREFSH ;configure DRAM refresh\r
- db dcntl,INIWAITS ;wait states\r
- db cbar,SYS$CBAR\r
-\r
-;----------------------------------------------------------------------\r
-\r
-start:\r
- push af ;003c\r
- in0 a,(itc) ;003d Illegal opcode trap?\r
- jp p,??st01 ;0040\r
- pop af ;0043\r
- jp bpent ;0044 yes, handle\r
-\r
-??st01:\r
- ld a,i ;0047 I register == 0 ? \r
- jr z,??st02 ;004b yes, harware reset\r
- pop af ;004d \r
- jp bpent ;004e no, allready set up\r
-\r
-??st02:\r
- di ;0058\r
- ld a,CREFSH\r
- out0 (rcr),a ; configure DRAM refresh\r
- ld a,CWAITIO\r
- out0 (dcntl),a ; wait states\r
-\r
-; search warm start mark\r
-\r
- ld ix,mark_55AA ;00b8 ; top of common area\r
- ld a,SYS$CBAR ;\r
- out0 (cbar),a ;\r
- ld a,071h ;00bc\r
- ex af,af' ;00be ;for cbr = 0x70 downto 0x40\r
-swsm_l:\r
- ex af,af' ;00bf \r
- dec a ;00c0\r
- cp 03fh ;00c1\r
- jr z,kstart ;00c3 ; break (mark not found)\r
- out0 (cbr),a ;00c5\r
- ex af,af' ;00c8\r
- ld a,0aah ;00c9\r
- cp (ix+000h) ;00cb\r
- jr nz,swsm_l ;00ce\r
- cp (ix+002h) ;00d0\r
- jr nz,swsm_l ;00d3\r
- cpl ;00d5\r
- cp (ix+001h) ;00d6\r
- jr nz,swsm_l ;00d9\r
- cp (ix+003h) ;00db\r
- jr nz,swsm_l ;00de\r
- ld sp,$stack ;00e0 mark found, check\r
- call checkcrc_alv ;00e3\r
- jp z,wstart ;00e6 check ok,\r
-\r
-;\r
-; ram not ok, initialize -- kstart --\r
-\r
-kstart:\r
-\r
- ld a,088h ;00e9 0000-7fff: common 0\r
- out0 (cbar),a ;00eb 8000-ffff: common 1\r
- ld ix,08000h ;00f3\r
- ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
-??f_0:\r
- out0 (cbr),a ;00f9\r
-\r
- ld (ix+0),a ;0103 \r
- cpl\r
- ld (ix+1),a ;0103 \r
- cpl\r
- add a,8 ;010a next 'bank'\r
- cp 078h ;010c stop at 078000\r
- jr nz,??f_0 ;010e\r
-\r
- ld de,8000h ;0114 first block not tested, but mark as ok\r
- ld a,0 ;00f1 start at 008000 (2. phys. 32k block)\r
-??cp_0:\r
- out0 (cbr),a ;011c\r
- ld c,a\r
- xor (ix+0)\r
- ld b,a\r
- ld a,c\r
- cpl\r
- xor (ix+1)\r
- or b\r
- jr nz,??cp_1\r
- scf\r
-??cp_1:\r
- rr d\r
- rr e\r
- ld a,c\r
- add a,8\r
- cp 078h ; stop at 078000\r
- jr nz,??cp_0\r
- \r
-;\r
-; ram test found 1 or more error free blocks (32k)\r
-;\r
-\r
-ramok:\r
- ld a,SYS$CBAR ;01c8\r
- out0 (cbar),a ;01ca\r
- ld h,d\r
- ld l,e\r
- ld c,070h ;01ce highest block\r
- ld b,15 ;01d0\r
-??sr_1:\r
- add hl,hl\r
- jr c,alloc ;01d4 highest "error free" block\r
- ld a,c ;01d6\r
- sub 008h ;01d7\r
- ld c,a ;01d9\r
- djnz ??sr_1 ;01da\r
-\r
- slp ;01dc should never be reached\r
-\r
-alloc:\r
- out0 (cbr),c ;01de\r
- ld sp,$stack ;01e1\r
- \r
-; Clear RAM using DMA0\r
-\r
- ld hl,dmclrt ;load DMA registers\r
- call io.ini.m\r
- ld a,0cbh ;01ef dst +1, src fixed, burst\r
- out0 (dmode),a ;01f1\r
-\r
- ld b,512/64\r
- ld a,062h ;01f4 enable dma0, \r
-??cl_1:\r
- out0 (dstat),a ;01f9 clear (up to) 64k\r
- djnz ??cl_1 ; end of RAM?\r
- \r
-; Init bank manager\r
- \r
- ld hl,banktabsys ;020f\r
- ld (hl),c ; Common area\r
- inc hl ;0213\r
- ld (hl),c ; System work area\r
- inc hl ;0215 Point to bank 0 entry\r
- ld b,BANKS ;0216\r
-l0218h:\r
- ld (hl),0ffh ;0218 Mark all banks as unassigned\r
- inc hl ;021a\r
- djnz l0218h ;021b\r
-\r
- ld hl,memalv ;\r
- ld b,8 ; 8*4k ie. first 32k\r
-??a_0:\r
- ld (hl),0e0h ; mark as sys ("rom"/monitor)\r
- inc hl\r
- djnz ??a_0\r
- \r
- rr d ; shift out bit for block 0\r
- rr e ;\r
- ld c,15 ;022c 15*32k remaining blocks\r
-l022eh:\r
- ld a,0feh ; 0xfe == block with error(s)\r
- rr d ;\r
- rr e\r
- adc a,0 ; ==> 0xff : block ok\r
- ld b,32/4 ; 32k == 8 * 4k \r
-l0236h:\r
- ld (hl),a ;\r
- inc hl ;\r
- djnz l0236h ;\r
- dec c ;\r
- jr nz,l022eh ;next 32k block\r
- \r
- ld hl,memalv+0ch ;memalv+0ch\r
- ld a,(banktabsys) ;\r
- call add_hl_a\r
- ld b,3 ;\r
-l024ah:\r
- ld (hl),0ech ;alloc system ram\r
- inc hl ;\r
- djnz l024ah ;\r
- ld (hl),0efh ;alloc common\r
- call gencrc_alv\r
-\r
- ld hl,0000h ;bank # \r
- ld bc,0f0fh ; size (?) (4k blocks)\r
- xor a ;\r
- call sub_0420h ;alloc mem for bank 0\r
- ld c,l ;\r
- or a ;\r
- call z,sub_04b5h ;\r
-\r
- ld hl,0101h ;\r
- ld bc,0f0fh ;\r
- xor a ;\r
- call sub_0420h ;\r
- ld c,l ;\r
- or a ;\r
- call z,sub_04b5h ;\r
-\r
- ld hl,055AAh ;set warm start mark\r
- ld (mark_55AA),hl ;\r
- ld (mark_55AA+2),hl;\r
-\r
-;\r
-; crc ok -- wstart --\r
-;\r
-wstart:\r
- call sysram_init ;027f\r
- call ivtab_init\r
-\r
- call prt0_init\r
-\r
-\r
- call bufferinit\r
-\r
-\r
- call $coninit\r
-\r
-\r
-\r
-\r
- im 2 ;?030e\r
- ei ;0282\r
-\r
- call $cists ;0284\r
- call $cists ;0287\r
- or a ;028a\r
- call nz,$ci ;028d\r
- \r
- ld a,(banktab) ; \r
- ld e,a ; \r
- jp ddtz ;0290\r
- \r
-\r
-;\r
-;----------------------------------------------------------------------\r
-;\r
-\r
- extrn msginit,msg.sout,msg_fifo\r
- extrn tx.buf,rx.buf\r
-\r
-\r
-;TODO: Make a ringbuffer module.\r
-\r
- global buf.init\r
- \r
-buf.init:\r
- ld (ix+o.in_idx),0\r
- ld (ix+o.out_idx),0\r
- ld (ix+o.mask),a\r
- ret\r
-\r
-;----------------------------------------------------------------------\r
-\r
-bufferinit:\r
- call msginit\r
- \r
- ld hl,buffers\r
- ld bc,0300h\r
-bfi_1:\r
- ld e,(hl)\r
- inc hl\r
- ld d,(hl)\r
- inc hl\r
- push hl\r
- in0 a,cbr\r
- call log2phys\r
- ld (bufdat+1),hl\r
- ld (bufdat+3),a\r
- ld a,c\r
- ld (bufdat+0),a\r
- ld hl,inimsg\r
- call msg.sout\r
- pop hl\r
- inc c\r
- djnz bfi_1\r
- ret\r
-\r
- rept 20\r
- db 0\r
- endm\r
- \r
-buffers:\r
- dw msg_fifo\r
- dw tx.buf\r
- dw rx.buf\r
- \r
-inimsg: \r
- db inimsg_e - $ -2\r
- db PMSG\r
- db 81h\r
- db inimsg_e - $ -1\r
- db 0\r
-bufdat:\r
- db 0\r
- dw 0\r
- db 0\r
-inimsg_e\r
-\r
-;\r
-;----------------------------------------------------------------------\r
-;\r
-\r
-sysram_init:\r
- ld hl,sysramw\r
- ld de,topcodsys\r
- ld bc,sysrame-sysramw\r
- ldir\r
-\r
- ret\r
-\r
-;----------------------------------------------------------------------\r
-\r
-ivtab_init:\r
- ld hl,ivtab ;\r
- ld a,h ;\r
- ld i,a ;\r
- out0 (il),l ;\r
-\r
-; Let all vectors point to spurious int routines.\r
-\r
- ld d,high sp.int0\r
- ld a,low sp.int0\r
- ld b,9\r
-ivt_i1: \r
- ld (hl),a\r
- inc l\r
- ld (hl),d\r
- inc l\r
- add a,sp.int.len\r
- djnz ivt_i1\r
- ret\r
-\r
-\r
-prt0_init:\r
- ld a,i\r
- ld h,a\r
- in0 a,(il)\r
- and 0E0h\r
- or IV$PRT0\r
- ld l,a\r
- ld (hl),low iprt0\r
- inc hl\r
- ld (hl),high iprt0\r
- ld hl,prt0itab\r
- call io.ini.m\r
- ret\r
- \r
-prt0itab:\r
- db prt0it_e-prt0itab-2\r
- db tmdr0l\r
- dw PRT_TC10MS\r
- dw PRT_TC10MS\r
- db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.\r
-prt0it_e:\r
-\r
-;\r
-;----------------------------------------------------------------------\r
-;\r
-\r
-io.ini:\r
- push bc\r
- ld b,0 ;high byte port adress\r
- ld a,(hl) ;count\r
- inc hl\r
-ioi_1:\r
- ld c,(hl) ;port address\r
- inc hl\r
- outi\r
- inc b ;outi decrements b\r
- dec a\r
- jr nz,ioi_1\r
- pop bc\r
- ret\r
-\r
-io.ini.m:\r
- push bc\r
- ld b,(hl)\r
- inc hl\r
- ld c,(hl)\r
- inc hl\r
- otimr \r
- pop bc \r
- ret\r
- \r
-io.ini.l:\r
-;\r
-\r
-;----------------------------------------------------------------------\r
-;\r
-\r
-; compute crc\r
-; hl: start adr\r
-; bc: len\r
-; bc returns crc val\r
-\r
-do_crc16:\r
- ld de,0FFFFh\r
-crc1:\r
- ld a,(hl)\r
- xor e\r
- ld e,a\r
- rrca\r
- rrca\r
- rrca\r
- rrca\r
- and 0Fh\r
- xor e\r
- ld e,a\r
- rrca\r
- rrca\r
- rrca\r
- push af\r
- and 1Fh\r
- xor d\r
- ld d,a\r
- pop af\r
- push af\r
- rrca\r
- and 0F0h\r
- xor d\r
- ld d,a\r
- pop af\r
- and 0E0h\r
- xor e\r
- ld e,d\r
- ld d,a\r
- cpi\r
- jp pe,crc1\r
- or e ;z-flag\r
- ret\r
-\r
-\r
-gencrc_alv:\r
- push hl ;03f6\r
- push de ;03f7\r
- push bc\r
- push af ;03f8\r
- ld hl,banktabsys ;03f9\r
- ld bc,crc_len ;03fc\r
- call do_crc16 ;03ff\r
- ld (hl),e\r
- inc hl\r
- ld (hl),d\r
- pop af ;0406\r
- pop bc\r
- pop de ;0407\r
- pop hl ;0408\r
- ret ;0409\r
-\r
-checkcrc_alv:\r
- push hl ;040a\r
- push de\r
- push bc ;040b\r
- ld hl,banktabsys ;040d\r
- ld bc,crc_len+2 ;0410\r
- call do_crc16 ;0413\r
- pop bc ;041d\r
- pop de\r
- pop hl ;041e\r
- ret ;041f\r
-\r
-;\r
-; alloc\r
-;\r
-; h: max bank #\r
-; l: min bank #\r
-; b: max size\r
-; c: min size\r
-;\r
-; ret:\r
-; a: 0 == ok\r
-; 1 == \r
-; 2 == no bank # in requested range\r
-; ff == crc error\r
-;\r
-\r
-sub_0420h:\r
- call checkcrc_alv ;0420\r
- jr nz,l049ch ;0424 crc error, tables corrupt\r
- \r
- call sub_049dh ;0427 bank # in req. range available?\r
- jr c,l0499h ;042a\r
- push ix ;042c\r
- push iy ;042e\r
- push de ;0430\r
- push hl ;0431\r
- push bc ;0432\r
- ld c,b ;0433\r
- ld b,alv_len+1 ;0434\r
- ld d,0 ;0436\r
- ld hl,memalv-1 ;0438\r
- jr l0441h ;043b\r
-\r
-; find free blocks\r
-\r
-l043dh:\r
- ld a,(hl) ;043d\r
- inc a ;043e free blocks are marked 0ffh\r
- jr z,l0446h ;043f\r
-l0441h:\r
- inc hl ;0441\r
- djnz l043dh ;0442\r
- jr l0464h ;0444\r
-l0446h:\r
- push hl ;0446 \r
- pop ix ;0447 free blocks start here\r
- ld e,000h ;0449\r
- jr l0451h ;044b\r
-l044dh: ; count free blocks\r
- ld a,(hl) ;044d\r
- inc a ;044e\r
- jr nz,l0457h ;044f\r
-l0451h:\r
- inc e ;0451\r
- inc hl ;0452\r
- djnz l044dh ;0453\r
- jr l0464h ;0455\r
-\r
-; end of free blocks run. \r
-\r
-l0457h:\r
- ld a,d ;0457\r
- cp e ;0458 nr of blocks >= requested ?\r
- jr nc,l0441h ;0459 \r
-\r
- ld d,e ;045b\r
- push ix ;045c\r
- pop iy ;045e\r
- ld a,d ;0460\r
- cp c ;0461\r
- jr c,l0441h ;0462\r
-l0464h:\r
- pop bc ;0464\r
- ld a,d ;0465\r
- cp b ;0466\r
- jr c,l046ch ;0467\r
- ld d,b ;0469\r
- jr l0471h ;046a\r
-l046ch:\r
- cp c ;046c\r
- jr nc,l0471h ;046d\r
- ld d,000h ;046f\r
-l0471h:\r
- ld a,d ;0471\r
- push iy ;0472\r
- pop hl ;0474\r
- ld de,memalv ;0475\r
- or a ;0478\r
- sbc hl,de ;0479\r
- ld b,l ;047b\r
- ld c,a ;047c\r
- pop hl ;047d\r
-l047eh:\r
- or a ;047e\r
- jr z,l0489h ;047f\r
- ld (iy+0),l ;0481\r
- inc iy ;0484\r
- dec a ;0486\r
- jr l047eh ;0487\r
-l0489h:\r
- pop de ;0489\r
- pop iy ;048a\r
- pop ix ;048c\r
- call gencrc_alv ;048e\r
- ld a,c ;0491\r
- or a ;0492\r
- ld a,000h ;0493\r
- ret nz ;0495\r
- or 001h ;0496\r
- ret ;0498\r
-\r
-l0499h:\r
- ld a,2 ;0499\r
-l049ch:\r
- or a\r
- ret ;049c\r
-\r
-\r
-; search a free bank number in range\r
-; h: max #\r
-; l: min #\r
-; ret:\r
-; l: bank number available\r
-; nc, if found, bank nr. in l\r
-; cy, if none found\r
-\r
-sub_049dh:\r
- push de ;049d\r
- push bc ;049e\r
- ex de,hl ;049f\r
- dec e ;04a0\r
-l04a1h:\r
- inc e ;04a1 test next #\r
- ld a,d ;04a2\r
- cp e ;04a3\r
- jr c,l04b1h ;04a4 \r
- ld a,e ;04a6\r
- ld hl,memalv ;04a7\r
- ld bc,alv_len ;04aa\r
- cpir ;04ad bank# allready allocated?\r
- jr z,l04a1h ;04af if yes, search for next\r
-l04b1h:\r
- ex de,hl ;04b1\r
- pop bc ;04b2\r
- pop de ;04b3\r
- ret ;04b4\r
-\r
-\r
-sub_04b5h:\r
- ld a,l ;04b5\r
- cp 012h ;04b6\r
- ccf ;04b8\r
- ret c ;04b9\r
- push hl ;04ba\r
- ld hl,banktab ;04bb\r
- call add_hl_a\r
- ld (hl),b ;04c3\r
- call gencrc_alv ;04c4\r
- pop hl ;04c7\r
- or a ;04c8 clear carry\r
- ret ;04c9\r
-\r
-\r
-;--------------------------------------------------------------\r
-;\r
-; de: Log. Address\r
-; a: Bank number\r
-;\r
-;out ahl: Phys. (linear) Address\r
-\r
-\r
-bnk2phys:\r
- push hl\r
- ld hl,banktab\r
- call add_hl_a\r
- ld a,(hl)\r
- pop hl\r
-\r
- ; fall thru\r
-;--------------------------------------------------------------\r
-;\r
-; de: Log. Address\r
-; a: Bank (bbr)\r
-;\r
-; OP: ahl = (a<<12) + (d<<8) + e\r
-;\r
-;out ehl: Phys. (linear) Address\r
-\r
-\r
-log2phys:\r
- push bc ;\r
- ld c,a ;\r
- ld b,16 ;\r
- mlt bc ;bc = a<<4\r
- ld l,d ;\r
- ld h,0 ;\r
- add hl,bc ;bc + d == a<<4 + d \r
- ld a,h ;\r
- ld h,l ;\r
- ld l,e ;\r
- pop bc ;\r
- ret ;\r
-\r
-\r
-;--------------------------------------------------------------\r
-;\r
-;return:\r
-; hl = hl + a\r
-; Flags undefined\r
-;\r
-\r
-add_hl_a:\r
- add a,l \r
- ld l,a \r
- ret nc \r
- inc h \r
- ret \r
-\r
-; ---------------------------------------------------------\r
-\r
-sysramw:\r
-\r
- .phase isvsw_loc\r
-topcodsys:\r
-\r
-; Trampoline for interrupt routines in banked ram.\r
-; Switch stack pointer to "system" stack in top ram\r
-; Save cbar\r
- \r
-isv_sw: ;\r
- ex (sp),hl ; save hl, return adr in hl\r
- push de ;\r
- push af ;\r
- ex de,hl ;\r
- ld hl,0 ;\r
- add hl,sp ;\r
- ld a,h ;\r
- cp 0f8h ;\r
- jr nc,isw_1 ;\r
- ld sp,$stack ;\r
-isw_1:\r
- push hl ;\r
- in0 h,(cbar) ;\r
- push hl ;\r
- ld a,SYS$CBAR ;\r
- out0 (cbar),a ;\r
- ex de,hl ;\r
- ld e,(hl) ;\r
- inc hl ;\r
- ld d,(hl) ;\r
- ex de,hl ;\r
- push bc ;\r
- call jphl ;\r
-\r
- pop bc ;\r
- pop hl ;\r
- out0 (cbar),h ;\r
- pop hl ;\r
- ld sp,hl ;\r
- pop af ;\r
- pop de ;\r
- pop hl ;\r
- ei ;\r
- ret ;\r
-jphl:\r
- jp (hl) ;\r
-\r
-; ---------------------------------------------------------\r
-\r
-iprt0:\r
- push af\r
- push hl\r
- in0 a,(tcr)\r
- in0 a,(tmdr0l)\r
- in0 a,(tmdr0h)\r
- ld a,(tim_ms)\r
- inc a\r
- cp 100\r
- jr nz,iprt_1\r
- xor a\r
- ld hl,(tim_s)\r
- inc hl\r
- ld (tim_s),hl\r
-iprt_1:\r
- ld (tim_ms),a\r
- pop hl\r
- pop af\r
- ei\r
- ret\r
-\r
-; ---------------------------------------------------------\r
-\r
-sp.int0:\r
- ld a,0d0h\r
- jr sp.i.1\r
-sp.int.len equ $-sp.int0\r
- ld a,0d1h\r
- jr sp.i.1\r
- ld a,0d2h\r
- jr sp.i.1\r
- ld a,0d3h\r
- jr sp.i.1\r
- ld a,0d4h\r
- jr sp.i.1\r
- ld a,0d5h\r
- jr sp.i.1\r
- ld a,0d6h\r
- jr sp.i.1\r
- ld a,0d7h\r
- jr sp.i.1\r
- ld a,0d8h\r
-sp.i.1:\r
-; out (80h),a\r
- halt\r
-\r
-curph defl $\r
- .dephase\r
-sysrame:\r
- .phase curph\r
-tim_ms: db 0\r
-tim_s: dw 0\r
- .dephase\r
- \r
-;-----------------------------------------------------\r
-\r
- dseg\r
-\r
- ds 1\r
-banktabsys:\r
- ds 1 ;0c001h\r
- ds 1 ;0c002h\r
-banktab:\r
- ds BANKS ;0c003h\r
-memalv:\r
- ds 512/4 ;Number of 4k blocks\r
-alv_len equ $-memalv\r
-crc_len equ $-banktabsys\r
-\r
-crc_memalv: \r
- ds 2 ;\r
-\r
- cseg\r
-\r
- ;.phase 0ffc0h\r
-;ivtab equ 0ffc0h ; 0ffc0h ;int vector table\r
- ;.dephase\r
-\r
- ;.phase 0fffch\r
-mark_55AA equ 0fffch\r
- ;ds 4 ; 0fffch\r
- ;.dephase\r
-\r
-\r
- end\r
-\r
projects / z180-stamp.git / blobdiff