]> cloudbase.mooo.com Git - z180-stamp.git/blobdiff - avr/timer.c
move sys timer setup from main to timer.c
[z180-stamp.git] / avr / timer.c
index 6fb19a81b9fa308b18796a001e50c4d8875b7c9d..03c86c82235053196418980ff6fb818a7206dada 100644 (file)
@@ -1,83 +1,67 @@
 /*
+ * (C) Copyright 2014 Leo C. <erbl259-lmu@yahoo.de>
+ *
+ * SPDX-License-Identifier:    GPL-2.0
  */
 
-
-#include "common.h"
-
+#include "timer.h"
 #include <avr/interrupt.h>
 #include <util/atomic.h>
-
-//#include <stdio.h>
-
-
-#include "timer.h"
+#include "time.h"
 
 /* timer interrupt/overflow counter */
-volatile uint32_t timestamp;
+/* counts up every ms. */
+static volatile
+uint32_t timestamp;
 
-
-/*---------------------------------------------------------*/
-/* 1000Hz timer interrupt generated by OC3A                */
-/*---------------------------------------------------------*/
-
-ISR(TIMER3_COMPA_vect)
+/*
+ * 1000Hz timer interrupt generated by OC4A
+ */
+ISR(TIMER4_COMPA_vect)
 {
        static int_fast8_t tick_10ms;
-       int_fast8_t i;
+       static int_fast8_t tick_1s;
+       int_fast8_t i, j;
 
        extern void disk_timerproc(void);
 
+       OCR4A += F_CPU / 1000;  /* 1000Hz interval */
+
        timestamp++;
 
        i = tick_10ms + 1;
        if (i == 10) {
-               i = 0;
                Stat |= S_10MS_TO;
 
                /* Drive timer procedure of low level disk I/O module */
                disk_timerproc();
+
+               j = tick_1s - 1;
+               if (j == 0) {
+                       system_tick();
+                       j = 100;
+               }
+               tick_1s = j;
+               i = 0;
        }
        tick_10ms = i;
-
 }
 
-
-
 /*--------------------------------------------------------------------------*/
 
-#if 0
-
-void do_10ms(void)
+void setup_timer(void)
 {
-               if (to_counter)
-                       to_counter--;
+       PRR1 &= ~_BV(PRTIM4);
+       OCR4A = F_CPU / 1000 - 1;       /* Timer4: 1000Hz interval */
+       TCCR4B = (0b00<<WGM42)|(0b001<<CS40); /* Normal Mode, Prescaler 1 */
+       TIMSK4 = _BV(OCIE4A);           /* Enable Output Compare A interrupt */
 }
 
-#endif
-
 /*--------------------------------------------------------------------------*/
 
-
-#if 0
-void timer_setup(void)
-{
-
-       /* Clock */
-       CLKPR = _BV(CLKPCE);
-       CLKPR = 0;
-
-       /* Timer */
-
-       OCR1A = F_CPU / 1000 - 1; // Timer1: 1000Hz interval (OC1A)
-       TCCR1B = 0b00001001;
-       TIMSK1 = _BV(OCIE1A); // Enable TC1.oca interrupt
-}
-#endif
-
 uint32_t get_timer(uint32_t base)
 {
        uint32_t ret;
-
        ATOMIC_BLOCK(ATOMIC_FORCEON)
        {
                ret = timestamp;