Refactor makefiles

[z180-stamp.git] / avr / Makefile

diff --git a/avr/Makefile b/avr/Makefile
index eab1d1f6d2adf65b57154a00f3af7a0c175a2e5c..89d13a0b5e5bb62f7058a2eea3f767b041365e46 100644 (file)
--- a/avr/Makefile
+++ b/avr/Makefile
@@ -6,10 +6,7 @@ DEBUG  :=      1
 
 TARGET = stamp-monitor
 
-FATFSDIR := ../fatfs/source
-FATFS   := $(FATFSDIR)/ff.c $(FATFSDIR)/ffunicode.c
-
-SRC_Z  := ../z180/hdrom.c ../z180/cfboot.c ../z180/cpuinfo.c
+###############################################################################
 
 SRC    := main.c
 SRC    += cli.c cli_readline.c command.c command_tbl.c
@@ -19,6 +16,15 @@ SRC  += cmd_loadihex.c cmd_loadcpm3.c cmd_sd.c cmd_fat.c
 SRC    += env.c con-utils.c print-utils.c getopt-min.c eval_arg.c
 SRC    += timer.c serial.c i2c.c bcd.c pcf8583.c mmc.c strerror.c
 SRC    += background.c z180-serv.c z80-if.c gpio.c
+
+FATFSDIR := ../fatfs/source
+FATFS   := $(FATFSDIR)/ff.c $(FATFSDIR)/ffunicode.c
+ZDIR   := ../z180
+SRC_Z  := $(ZDIR)/hdrom.c $(ZDIR)/cfboot.c $(ZDIR)/cpuinfo.c
+
+# Sources that may depend on Z180 code:
+Z_DEP  := $(shell grep -sl 'include[[:blank:]]\+"$(ZDIR)' $(SRC))
+
 SRC    += $(FATFS)
 SRC    += $(SRC_Z)
 
@@ -27,13 +33,7 @@ $(SRC_Z:%.c=%.o): CFLAGS += -D'const=const __flash'
 
 
 # Place -D or -U options here
-CDEFS := -DF_CPU=$(F_CPU)UL
-
-ifeq ($(MCU),atmega1281)
-  CDEFS        += -DMCU_STRING=\"ATmega1281\"
-else
-  CDEFS        += -DMCU_STRING=\"ATmega2561\"
-endif
+#CDEFS +=
 
 ifdef DEBUG
 SRC    += debug.c
@@ -43,30 +43,45 @@ endif
 # Place -I options here
 CINCS := -I../include
 
-OPT = s
-CSTANDARD = -std=gnu11
-CDEBUG =
-CWARN = -Wall -Wextra -Wstrict-prototypes -Wredundant-decls
-CTUNING = -funsigned-char -fshort-enums -funsigned-bitfields -fpack-struct
-CTUNING += -mrelax -fno-common
-CTUNING += -fno-move-loop-invariants
-CTUNING += -fno-tree-loop-optimize
-#CTUNING += -fno-split-wide-types
-CEXTRA = -ffunction-sections -fdata-sections
-#CEXTRA        += -flto
-CFLAGS = $(CDEBUG) $(CDEFS) $(CINCS) -O$(OPT) $(CWARN) $(CSTANDARD) $(CEXTRA) $(CTUNING)
+# Extra C flags
+#TGT_CFLAGS += -funsigned-char
+TGT_CFLAGS += -fno-move-loop-invariants
+TGT_CFLAGS += -fno-tree-loop-optimize
+#TGT_CFLAGS += -fno-split-wide-types
+#TGT_CFLAGS    += -flto
 
 
-
-# Linker Options - Create mapfile with cross reference
-LDFLAGS := -Wl,-Map=$(TARGET).map,--cref
-LDFLAGS += -Wl,--gc-sections
-
+###############################################################################
 # Programming support using avrdude.
 
 AVRDUDE_PROGRAMMER := dragon_isp
-AVRDUDE_PORT := usb
+# Uncomment, if the programmer is /not/ on USB.
+#AVRDUDE_PORT :=
 
+LFUSE = 0x97
+HFUSE = 0xD6
+EFUSE = 0xF5
+
+# Fuse low byte:
+# 0x97 = 1 0 0 1   0 1 1 1
+#        ^ ^ \ /   \--+--/
+#        | |  |       +------- CKSEL 3..0 (Low Power Crystal)
+#        | |  +--------------- SUT 1..0 (Crystal Osc, slowly rising power)
+#        | +------------------ CKOUT (Clock output enabled)
+#        +-------------------- CKDIV8 (don't divide clock by 8)
+# Fuse high byte:
+# 0xd6 = 1 1 0 1   0 1 1 0
+#        ^ ^ ^ ^   ^ \+/ ^---- BOOTRST (Boot Reset vector Enabled 0x3c00)
+#        | | | |   |  +------- BOOTSZ 1..0 (Boot Flash section size 512 words)
+#        | | | |   + --------- EESAVE (Preserve EEPROM over chip erase)
+#        | | | +-------------- WDTON (WDT not always on)
+#        | | +---------------- SPIEN (allow serial programming)
+#        | +------------------ JTAGEN (JTAG disabled)
+#        +-------------------- OCDEN (OCD disabled)
+# Fuse Extended byte:
+# 0xf5 = 1 1 1 1   0 1 0 1
+#                    \-+-/
+#                      +------ Bodlevel (VCC = 2.7V)
 
 # Uncomment the following if you do /not/ wish a verification to be
 # performed after programming the device.
@@ -77,35 +92,23 @@ AVRDUDE_PORT := usb
 # to submit bug reports.
 #AVRDUDE_VERBOSE = -v -v
 
-#HFUSE = 0xDE
-#LFUSE = 0xFF
-#EFUSE = 0xFD
-
-# Fuse high byte:
-# 0xda = 1 1 0 1   1 1 1 0 <-- BOOTRST (Boot Reset vector Enabled 0x3c00)
-#        ^ ^ ^ ^   ^ ^ ^------ BOOTSZ0
-#        | | | |   | +-------- BOOTSZ1 (Boot Flash section size 256 words)
-#        | | | |   + --------- EESAVE (don't preserve EEPROM over chip erase)
-#        | | | +-------------- WDTON (WDT not always on)
-#        | | +---------------- SPIEN (allow serial programming)
-#        | +------------------ DWEN (debugWIRE is not enabled)
-#        +-------------------- RSTDISBL (reset pin is enabled)
-# Fuse low byte:
-# 0x9f = 1 1 1 1   1 1 1 1
-#        ^ ^ \ /   \--+--/
-#        | |  |       +------- CKSEL 3..0 (Low Power Crystal)
-#        | |  +--------------- SUT 1..0 (Crystal Osc, slowly rising power)
-#        | +------------------ CKOUT (Clock output disabled)
-#        +-------------------- CKDIV8 (don't divide clock by 8)
-# Fuse Extended byte:
-# 0x9f = 1 1 1 1   1 1 0 1
-#                    \-+-/
-#                      +------ Bodlevel (VCC = 2.7V)
+###############################################################################
+#.SECONDEXPANSION:
 
 .PHONY:        all build
 # Default target.
 all: build
 
-build: elf hex lss
+build: hex lss
+
+clean: clean_z
+$(Z_DEP:%.c=%.o): $(SRC_Z)
+
+$(SRC_Z):
+       $(MAKE) -C $(ZDIR) $(@F)
+
+.PHONY: clean_z
+clean_z:
+       $(MAKE) -C $(ZDIR) clean
 
 include ../mk/avr.rules.mk