connect command 'esc \' enhancement, new 'esc :' subcommand

[z180-stamp.git] / z180 / config.inc

diff --git a/z180/config.inc b/z180/config.inc
index dfb41cd6103ba418e253c025d9f12e57eda87b63..ffab6e6c94040daebc742ae4d87832f1fa2d54d2 100644 (file)
--- a/z180/config.inc
+++ b/z180/config.inc
@@ -2,6 +2,9 @@
 FALSE  equ     0\r
 TRUE   equ     NOT FALSE\r
 \r
+\r
+DEBUG  equ     true\r
+\r
 banked equ     true\r
 \r
 ;-----------------------------------------------------\r
@@ -18,19 +21,28 @@ AVRCLK              equ     18432           ;[KHz]
     if CPU_Z180\r
 \r
 ;-----------------------------------------------------\r
-FOSC           equ     AVRCLK/2        ;Oscillator frequency [KHz]\r
-PHI            equ     FOSC*2          ;CPU frequency (clock doubler enabled)\r
+;FOSC          equ     AVRCLK/2        ;Oscillator frequency [KHz]\r
+;PHI           equ     FOSC*2          ;CPU frequency (clock doubler enabled)\r
+\r
+;----------------------------------------------------------------------\r
+; Baudrate Generator for x16 clock mode:\r
+; TC = (f PHI / (32 * baudrate)) - 2\r
+;\r
+;     PHI [MHz]: 9.216 18.432\r
+;     baudrate     TC     TC\r
+;     ----------------------\r
+;      115200      -      3\r
+;      57600       3      8\r
+;      38400       -     13\r
+;      19200      13     28\r
+;       9600      28     58\r
+\r
 \r
 ;-----------------------------------------------------\r
 ; Programmable Reload Timer (PRT)\r
 \r
 PRT_PRE                equ     20              ;PRT prescaler\r
 \r
-; Reload value for 10 ms Int. (0.1KHz):\r
-; tc10ms = phi/prescale/0.1KHz  = phi / (prescale/10)\r
-\r
-PRT_TC10MS     equ     PHI / (PRT_PRE/10)\r
-\r
 ;-----------------------------------------------------\r
 ; MMU\r
 \r
@@ -111,9 +123,9 @@ DDTZRSTVEC  equ     030h            ;DDTZ Restart vector (breakpoints)
 INIDONE                equ     03Fh            ;CP/M skip hw init, if this address\r
 INIDONEVAL     equ     080h            ;    is set to this value.\r
 \r
-mtx.fifo_len   equ     32              ;Message transfer fifos\r
+mtx.fifo_len   equ     64              ;Message transfer fifos\r
 mtx.fifo_id    equ     0               ;    This *must* have #0\r
-mrx.fifo_len   equ     32\r
+mrx.fifo_len   equ     64\r
 mrx.fifo_id    equ     1\r
 \r
 ci.fifo_len    equ     32              ;AVRCON Character I/O via AVR\r
@@ -134,7 +146,7 @@ AVRINT6             equ     5Fh
 ; Definition of (logical) top 2 memory pages\r
 \r
 sysram_start   equ     0FE00h\r
-stacksize      equ     80\r
+bs$stack$size  equ     80\r
 \r
 isvsw_loc      equ     0FEE0h\r
 \r
@@ -158,7 +170,8 @@ mkbuf       macro   id,name,size
     name&.mask equ ;wrong size error\r
   else\r
     db id\r
-    ds 3\r
+    db size-1\r
+    ds 2\r
     name:: ds size\r
     name&.mask equ low (size-1)\r
     if size ne 0\r
@@ -181,3 +194,10 @@ inidate    macro
        dseg\r
        ds      ??ps.len\r
        endm\r
+\r
+;-----------------------------------------------------\r
+\r
+b0call macro   address\r
+       call    _b0call\r
+       dw      address\r
+       endm\r