env.c needs getopt-min.h

[z180-stamp.git] / z180 / config.inc

diff --git a/z180/config.inc b/z180/config.inc
index dfb41cd6103ba418e253c025d9f12e57eda87b63..bea6e05cd302ac06d0121ae98c256d77570e4109 100644 (file)
--- a/z180/config.inc
+++ b/z180/config.inc
@@ -2,6 +2,7 @@
 FALSE  equ     0\r
 TRUE   equ     NOT FALSE\r
 \r
+\r
 banked equ     true\r
 \r
 ;-----------------------------------------------------\r
@@ -18,40 +19,61 @@ AVRCLK              equ     18432           ;[KHz]
     if CPU_Z180\r
 \r
 ;-----------------------------------------------------\r
-FOSC           equ     AVRCLK/2        ;Oscillator frequency [KHz]\r
-PHI            equ     FOSC*2          ;CPU frequency (clock doubler enabled)\r
+;FOSC          equ     AVRCLK/2        ;Oscillator frequency [KHz]\r
+;PHI           equ     FOSC*2          ;CPU frequency (clock doubler enabled)\r
+\r
+;----------------------------------------------------------------------\r
+; Baudrate Generator for x16 clock mode:\r
+; TC = (f PHI / (32 * baudrate)) - 2\r
+;\r
+;     PHI [MHz]: 9.216 18.432\r
+;     baudrate     TC     TC\r
+;     ----------------------\r
+;      115200      -      3\r
+;      57600       3      8\r
+;      38400       -     13\r
+;      19200      13     28\r
+;       9600      28     58\r
+\r
 \r
 ;-----------------------------------------------------\r
 ; Programmable Reload Timer (PRT)\r
 \r
 PRT_PRE                equ     20              ;PRT prescaler\r
 \r
-; Reload value for 10 ms Int. (0.1KHz):\r
-; tc10ms = phi/prescale/0.1KHz  = phi / (prescale/10)\r
-\r
-PRT_TC10MS     equ     PHI / (PRT_PRE/10)\r
-\r
 ;-----------------------------------------------------\r
 ; MMU\r
 \r
-COMMON_SIZE    equ     16*1024         ;Common Area size in bytes\r
+COMMON_SIZE    equ     4*1024          ;Common Area size in bytes\r
                                        ;must be multiple of 4K\r
-\r
 if (COMMON_SIZE mod 1000h)\r
        .printx COMMON_SIZE not multiple of 4K!\r
        end     ;stop assembly\r
 endif\r
+CMN_SIZE       equ     COMMON_SIZE/1000h               ;4K units\r
+BNK_SIZE       equ     64/4 - CMN_SIZE                 ;bank size (4K units)\r
+BANKS          equ     (512/4 - CMN_SIZE)/BNK_SIZE     ;max nr. of banks\r
+\r
+; Logical address space, CBAR values\r
 \r
-CSK    equ     COMMON_SIZE/1000h       ;\r
-CA     equ     10h - CSK               ;common area start\r
-BA     equ     0                       ;banked area start\r
+CA             equ     10h - CMN_SIZE          ;common area start (64K - common size)\r
+BA             equ     0                       ;banked area start\r
+\r
+   if 0\r
 \r
 SYS$CBR                equ     0\r
 SYS$CBAR       equ     CA*16 + CA      ;CBAR in system mode\r
 USR$CBAR       equ     CA*16 + BA      ;CBAR in user mode (CP/M)\r
 \r
+   endif\r
+   if 1\r
+\r
+SYS$CBR                equ     BNK_SIZE\r
+SYS$CBAR       equ     CA*16 + CA      ;CBAR in system mode\r
+USR$CBAR       equ     CA*16 + BA      ;CBAR in user mode (CP/M)\r
+\r
+   endif\r
 \r
-BANKS          equ     18              ;max nr. of banks\r
 \r
 ;-----------------------------------------------------\r
 \r
@@ -111,30 +133,37 @@ DDTZRSTVEC        equ     030h            ;DDTZ Restart vector (breakpoints)
 INIDONE                equ     03Fh            ;CP/M skip hw init, if this address\r
 INIDONEVAL     equ     080h            ;    is set to this value.\r
 \r
-mtx.fifo_len   equ     32              ;Message transfer fifos\r
+mtx.fifo_len   equ     64              ;Message transfer fifos\r
 mtx.fifo_id    equ     0               ;    This *must* have #0\r
-mrx.fifo_len   equ     32\r
+mrx.fifo_len   equ     64\r
 mrx.fifo_id    equ     1\r
 \r
-ci.fifo_len    equ     32              ;AVRCON Character I/O via AVR\r
+ci.fifo_len    equ     32              ;AVRCON (USB0) Character I/O via AVR\r
 ci.fifo_id     equ     2\r
 co.fifo_len    equ     32\r
 co.fifo_id     equ     3\r
 \r
+s0.rx_len      equ     128             ;Serial 0 (ASCI0) buffers\r
+s0.rx_id       equ     4               ;\r
+s0.tx_len      equ     128             ;\r
+s0.tx_id       equ     5               ;\r
+\r
 s1.rx_len      equ     128             ;Serial 1 (ASCI1) buffers\r
-s1.rx_id       equ     4               ;\r
+s1.rx_id       equ     6               ;\r
 s1.tx_len      equ     128             ;\r
-s1.tx_id       equ     5               ;\r
+s1.tx_id       equ     7               ;\r
 \r
 AVRINT5                equ     4Fh\r
 AVRINT6                equ     5Fh\r
 ;PMSG          equ     80h\r
 \r
+IDEBASE                equ     60h\r
+\r
 ;-----------------------------------------------------\r
 ; Definition of (logical) top 2 memory pages\r
 \r
 sysram_start   equ     0FE00h\r
-stacksize      equ     80\r
+bs$stack$size  equ     80\r
 \r
 isvsw_loc      equ     0FEE0h\r
 \r
@@ -158,7 +187,8 @@ mkbuf       macro   id,name,size
     name&.mask equ ;wrong size error\r
   else\r
     db id\r
-    ds 3\r
+    db size-1\r
+    ds 2\r
     name:: ds size\r
     name&.mask equ low (size-1)\r
     if size ne 0\r
@@ -181,3 +211,10 @@ inidate    macro
        dseg\r
        ds      ??ps.len\r
        endm\r
+\r
+;-----------------------------------------------------\r
+\r
+b0call macro   address\r
+       call    _b0call\r
+       dw      address\r
+       endm\r