ew debug command: xx busack: Measure time RESET to BUSACK

[z180-stamp.git] / avr / z80-if.c

diff --git a/avr/z80-if.c b/avr/z80-if.c
index 5d888420ed0d282242d1e2e6aeec3771c9a8586c..62199bb448258b881eb853526cffea5dbd983ada 100644 (file)
--- a/avr/z80-if.c
+++ b/avr/z80-if.c
@@ -145,14 +145,15 @@ void z80_bus_request_or_exit(void)
 static zstate_t zstate;
 static volatile uint8_t timer;         /* used for bus timeout */
 
-#if 0
-static volatile uint16_t req_cycles_ovl;
+
+static volatile uint16_t busack_cycles_ovl;
+
+static uint32_t busack_cycles;
 
 ISR(TIMER4_COMPB_vect)
 {
-       req_cycles_ovl++;
+       busack_cycles_ovl++;
 }
-#endif
 
 /*---------------------------------------------------------*/
 /* 10Hz timer interrupt generated by OC5A                  */
@@ -282,6 +283,11 @@ void z80_setup_bus(void)
 }
 
 
+uint32_t z80_get_busreq_cycles(void)
+{
+       return busack_cycles;
+}
+
 zstate_t z80_bus_state(void)
 {
        return zstate;
@@ -373,13 +379,38 @@ zstate_t z80_bus_cmd(bus_cmd_t cmd)
                switch (zstate) {
                case RESET:
                        Z80_O_BUSREQ = 0;
-                       z80_reset_inactive();
-                       timer = BUS_TO;
+                       timer = 255; //BUS_TO;
+
+                       uint16_t tcnt;
+                       uint16_t ovl_cnt;
+                       uint8_t ifr;
+                       busack_cycles = 0;
+                       busack_cycles_ovl = 0;
+                       ATOMIC_BLOCK(ATOMIC_FORCEON) {
+                               //z80_reset_inactive();
+                               Z80_I_RST = 1;                                  /* Toggle RESET  --> inactive */
+                               OCR4B = TCNT4;
+                               TIFR4 = _BV(OCF4B);                             /* Clear compare match flag */
+                       }
+                       TIMSK4 |= _BV(OCIE4B);                          /* Enable compare match interrupt */
+
                        while (Z80_I_BUSACK == 1 && timer)
                                ;
+
+                       ATOMIC_BLOCK(ATOMIC_FORCEON) {
+                               tcnt = TCNT4 - OCR4B;
+                               ovl_cnt = busack_cycles_ovl;
+                               ifr = TIFR4;
+                               TIMSK4 &= ~_BV(OCIE4B);                 /* Disable compare match interrupt */
+                       }
                        if (Z80_I_BUSACK == 0) {
+                               if ((ifr & _BV(OCF4B)) && !(tcnt & (1<<15)))
+                                       ovl_cnt++;
+                               busack_cycles = tcnt + ((uint32_t) ovl_cnt << 16);
                                z80_addrbus_set_out();
                                zstate = RESET_AQRD;
+//                             debug("### ovl: %u, ifr: %u, beg: %u, end: %u\n", ovl_cnt,
+//                                                             (ifr & _BV(OCF4B)) != 0,        OCR4B, tcnt);
                        } else {
                                z80_reset_active();
                                Z80_O_BUSREQ = 1;