]> cloudbase.mooo.com Git - z180-stamp.git/blobdiff - avr/cmd_loadihex.c
rewrite of cmd_cpu/do_cpu_freq
[z180-stamp.git] / avr / cmd_loadihex.c
index d55a63a2a01b0d4bb774aeb131490228989a5e00..a7c9238d675f69913631e1466de7ad24fc79f992 100644 (file)
 #include "debug.h"
 
 
-static uint32_t detect_ramsize(void)
-{
-       uint32_t addr;
-       uint8_t save_addr, save_0;
-       const uint8_t PATTERN_1 = 0x55;
-       const uint8_t PATTERN_2 = ~PATTERN_1;
-
-       if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) {
-               my_puts_P(PSTR("Bus timeout\n"));
-               return  0;
-       }
-
-       save_0 = z80_read(0);
-       z80_write(0, PATTERN_1);
-
-       for (addr=1; addr < CONFIG_SYS_RAMSIZE_MAX; addr <<= 1) {
-               save_addr = z80_read(addr);
-               z80_write(addr, PATTERN_2);
-               if (z80_read(0) != PATTERN_1 || z80_read(addr) != PATTERN_2)
-                       break;
-               z80_write(addr, save_addr);
-       }
-       z80_write(0, save_0);
-       z80_bus_cmd(Release);
-
-       return addr;
-}
-
 typedef enum {
        IHX_OK,
        IHX_BROKEN,
@@ -149,15 +121,22 @@ command_ret_t do_loadihex(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int
 {
        long offset = 0;
        uint32_t base_address = 0;
-       uint32_t address_max = detect_ramsize();
        uint32_t address_high = 0;
-       uint32_t address_low = address_max;
+       uint32_t address_max;
+       uint32_t address_low;
        bool firstrec = true;
        ihex_t rec;
 
        if (argc > 1)
                offset = strtol(argv[1], NULL, 16);
 
+       int32_t ram = z80_memsize_detect();
+       if (ram < 0)
+               cmd_error(CMD_RET_FAILURE, (ERRNUM) -ram, NULL);
+
+       address_max = ram;
+       address_low = address_max;
+
        my_puts_P(PSTR("Waiting for Intel Hex Records...\n"));
 
        while (ihex_get_record(&rec) > 0 &&