extrn $stack\r
extrn charini,?const,?conin\r
extrn ?cono,?conos\r
-\r
extrn romend\r
\r
\r
+ global iobyte\r
global isv_sw\r
\r
include config.inc\r
org romstart+0\r
jp start\r
\r
-iobyte: db 0\r
+iobyte: db 2\r
+\r
; restart vectors\r
\r
rsti defl 1\r
\r
hwini0:\r
if CPU_Z180\r
-\r
db 3 ;count\r
db rcr,CREFSH ;configure DRAM refresh\r
db dcntl,INIWAITS ;wait states\r
+ db cbr,SYS$CBR\r
db cbar,SYS$CBAR\r
- else\r
- db 0\r
endif\r
+ db 0\r
\r
if CPU_Z180\r
dmclrt: ;clear ram per dma\r
db 00h ;dst\r
dw 0-romend ;count (64k)\r
dmct_e:\r
+ db 0\r
endif\r
\r
\r
\r
kstart:\r
if CPU_Z180\r
- ld a,SYS$CBAR\r
- out0 (cbar),a\r
ld a,SYS$CBR\r
out0 (cbr),a\r
+ ld a,SYS$CBAR\r
+ out0 (cbar),a\r
endif\r
\r
ld sp,$stack ;01e1\r
\r
if CPU_Z180\r
if 0\r
- \r
+\r
ld hl,dmclrt ;load DMA registers\r
- call io.ini.m\r
+ call ioiniml\r
ld a,0cbh ;01ef dst +1, src fixed, burst\r
out0 (dmode),a ;01f1\r
\r
??cl_1:\r
out0 (dstat),a ;01f9 clear (up to) 64k\r
djnz ??cl_1 ; end of RAM?\r
- \r
+\r
endif\r
endif\r
\r
; -- wstart --\r
\r
wstart:\r
- call sysram_init ;027f\r
+ call sysram_init\r
call ivtab_init\r
if CPU_Z180\r
- call prt0_init\r
+; call prt0_init\r
endif\r
\r
call charini\r
call selbnk\r
endif\r
\r
- im 2 ;?030e\r
- ei ;0282\r
+ ld a,INIDONEVAL ;tell others (CP/M) that hardware and fifos\r
+ ld (INIDONE),a ; are allready initialized\r
+\r
+ im 2\r
+ ei\r
\r
- call ?const ;0284\r
- call ?const ;0287\r
- or a ;028a\r
- call nz,?conin ;028d\r
+ call ?const\r
+ call ?const\r
+ or a\r
+ call nz,?conin\r
\r
if CPU_Z180\r
ld e,0 ;Sys$Bank\r
else\r
; TODO:\r
endif\r
- jp ddtz ;0290\r
+ jp ddtz\r
\r
\r
if CPU_Z180\r
; TODO: SYS$CBR\r
-syscbr: db 1\r
+syscbr: db 0\r
endif\r
\r
;\r
;----------------------------------------------------------------------\r
;\r
\r
-;TODO: Make a ringbuffer module.\r
-\r
global buf.init\r
\r
buf.init:\r
ld (ix+o.in_idx),0\r
ld (ix+o.out_idx),0\r
ld (ix+o.mask),a\r
- ret\r
-\r
-;----------------------------------------------------------------------\r
-if 0\r
- extrn msginit,msg_tx_fifo,msg_rx_fifo\r
- extrn msg.sout\r
-\r
-bufferinit:\r
\r
- ld de,msg_tx_fifo\r
- in0 a,cbr\r
- call log2phys\r
- ld (40h+0),hl\r
- ld (40h+2),a\r
+ ld a,(ix+o.id)\r
+ cp 4\r
+ ret nc\r
\r
-; ld (bufdat+1),hl\r
-; ld (bufdat+3),a\r
-; ld a,1\r
-; ld (bufdat+0),a\r
-; ld hl,inimsg\r
-; call msg.sout\r
+ push de\r
+ push hl\r
+ ld hl,fifo_list\r
+ push hl ;save fifo_list\r
+ ld e,a\r
+ ld d,0\r
+ add hl,de\r
+ add hl,de\r
+ add hl,de\r
+ push ix\r
+ pop de\r
+; TODO: address translation\r
+ ld (hl),e\r
+ inc hl\r
+ ld (hl),d\r
+ pop hl ;get fifo_list back\r
+ or a\r
+ jr nz,bufi_ex\r
\r
- ld de,msg_rx_fifo\r
- in0 a,cbr\r
- call log2phys\r
- ld (bufdat+1),hl\r
- ld (bufdat+3),a\r
- ld a,2\r
- ld (bufdat+0),a\r
- ld hl,inimsg\r
- call msg.sout\r
+ ld (040h),hl\r
+ ld (040h+2),a\r
+bufi_ex:\r
+ pop hl\r
+ pop de\r
\r
ret\r
\r
-inimsg:\r
- db inimsg_e - $ - 1\r
- db 0AEh\r
- db inimsg_e - $ - 1\r
- db 0\r
-bufdat:\r
- db 0\r
- dw 0\r
- db 0\r
-inimsg_e:\r
\r
-endif\r
+fifo_list:\r
+ rept 4\r
+ dw 0\r
+ db 0\r
+ endm\r
\r
;----------------------------------------------------------------------\r
\r
inc hl\r
ld d,(hl)\r
inc hl\r
- push hl\r
+ ex de,hl\r
\r
or a\r
jr nz,bfi_2\r
- call hw_log2phys\r
- ld (40h+0),hl\r
- ld (40h+2),a\r
- out0 (AVRINT5),a\r
- jr bfi_3 \r
+; call hwl2phy\r
+; ld (40h+0),hl\r
+; ld (40h+2),a\r
+ out (AVRINT5),a\r
+ jr bfi_3\r
bfi_2:\r
- call hw_log2phys\r
+ call hwl2phy\r
ld (bufdat+1),hl\r
ld (bufdat+3),a\r
ld hl,inimsg\r
call msg.sout\r
bfi_3:\r
- pop hl\r
+ ex de,hl\r
djnz bfi_1\r
ret\r
\r
- else\r
+ else ;CPU_Z180\r
\r
call msginit\r
\r
jr nz,bfi_2\r
\r
ld a,(@cbnk)\r
- call bnk2phys\r
+ call bnk2phy\r
\r
ld (40h+0),hl\r
ld (40h+2),a\r
bfi_2:\r
\r
ld a,(@cbnk)\r
- call bnk2phys\r
+ call bnk2phy\r
\r
ld (bufdat+1),hl\r
ld (bufdat+3),a\r
db 1\r
dw mrx.fifo\r
db 2\r
- dw co.fifo\r
- db 3\r
dw ci.fifo\r
+ db 3\r
+ dw co.fifo\r
buftablen equ ($ - buffers)/3\r
\r
inimsg:\r
\r
;----------------------------------------------------------------------\r
\r
+; Reload value for 10 ms Int. (0.1KHz):\r
+; tc10ms = phi/prescale/0.1KHz = phi / (prescale/10)\r
+\r
+PRT_TC10MS equ 18432 / (PRT_PRE/10)\r
+\r
+\r
if CPU_Z180\r
prt0_init:\r
ld a,i\r
inc hl\r
ld (hl),high iprt0\r
ld hl,prt0itab\r
- call io.ini.m\r
+ call ioiniml\r
ret\r
\r
prt0itab:\r
dw PRT_TC10MS\r
db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count.\r
prt0it_e:\r
+ db 0\r
endif\r
\r
\r
;----------------------------------------------------------------------\r
;\r
\r
+ if CPU_Z180\r
io.ini:\r
+ if 0\r
push bc\r
- if CPU_Z180\r
-\r
ld b,0 ;high byte port adress\r
+ioi_nxt:\r
ld a,(hl) ;count\r
inc hl\r
or a\r
jr z,ioi_e\r
-ioi_1:\r
+\r
ld c,(hl) ;port address\r
inc hl\r
+ioi_r:\r
outi\r
inc b ;outi decrements b\r
dec a\r
- jr nz,ioi_1\r
-ioi_e: \r
+ jr nz,ioi_r\r
+ jr ioi_nxt\r
+ioi_e:\r
+ pop bc\r
+ ret\r
+\r
+ else ;(if 1/0)\r
+\r
+ push bc\r
+ jr ioi_nxt\r
+ioi_l:\r
+ ld c,(hl) ;port address\r
+ inc hl\r
+ inc c\r
+ioi_r:\r
+ dec c ;otim increments c\r
+ otim\r
+ jr z,ioi_r\r
+ioi_nxt:\r
+ ld b,(hl) ;count\r
+ inc hl\r
+ inc b ;stop if count == 0\r
+ djnz ioi_l\r
+ pop bc\r
+ ret\r
+\r
+ endif ;(1/0)\r
+\r
else\r
+\r
+io.ini:\r
+ push bc\r
jr ioi_nxt\r
ioi_l:\r
ld c,(hl) ;port address\r
pop bc\r
ret\r
\r
+;----------------------------------------------------------------------\r
+\r
if CPU_Z180\r
-io.ini.m:\r
+\r
+ global ioiniml\r
+\r
+ioiniml:\r
push bc\r
+ xor a\r
+ioml_lp:\r
ld b,(hl)\r
inc hl\r
+ cp b\r
+ jr z,ioml_e\r
+\r
ld c,(hl)\r
inc hl\r
otimr\r
+ jr ioml_lp\r
+ioml_e:\r
pop bc\r
- ret\r
+ ret z\r
endif\r
\r
io.ini.l:\r
;\r
if CPU_Z180\r
\r
-; a: Bank number\r
+;--------------------------------------------------------------------\r
+; Return the BBR value for the given bank number\r
;\r
+; in a: Bank number\r
; out a: bbr value\r
\r
bnk2log:\r
- push bc\r
- ld b,a\r
- ld c,CA\r
- mlt bc\r
- add a,10h\r
- pop bc\r
- ret\r
+ or a ;\r
+ ret z ; Bank 0 is at physical address 0\r
+\r
+ push bc ;\r
+ ld b,a ;\r
+ ld c,CA ;\r
+ mlt bc ;\r
+ ld a,c ;\r
+ add a,10h ;\r
+ pop bc ;\r
+ ret ;\r
+\r
+;--------------------------------------------------------------\r
\r
-; de: Log. Address\r
-; a: Bank number\r
+;in hl: Log. Address\r
+; a: Bank number\r
;\r
;out ahl: Phys. (linear) Address\r
\r
\r
-bnk2phys:\r
+bnk2phy:\r
call bnk2log\r
-\r
; fall thru\r
+\r
;--------------------------------------------------------------\r
;\r
-; de: Log. Address\r
+; hl: Log. Address\r
; a: Bank base (bbr)\r
;\r
-; OP: ahl = (a<<12) + (d<<8) + e\r
+; 2 0 0\r
+; 0 6 8 0\r
+; hl hhhhhhhhllllllll\r
+; a + bbbbbbbb\r
+;\r
+; OP: ahl = (a<<12) + (h<<8) + l\r
;\r
;out ahl: Phys. (linear) Address\r
\r
-\r
-log2phys:\r
+log2phy:\r
push bc ;\r
+l2p_i:\r
ld c,a ;\r
ld b,16 ;\r
- mlt bc ; bc = a<<4\r
- ld l,d ;4\r
- ld h,0 ;6\r
- add hl,bc ;7 bc + d == a<<4 + d\r
- ld a,h ;4\r
- ld h,l ;4\r
- ld l,e ;4\r
- pop bc ;\r
- ret ;\r
-\r
- if 0\r
- \r
-log2phys:\r
- push bc ;\r
- ld b,a ;\r
- ld c,16 ;\r
mlt bc ; bc = a<<4\r
- ld a,c ;4\r
- add a,h ;4\r
- ld h,a ;4\r
- ld a,b ;4\r
- adc a,0 ;6\r
+ ld a,c ;\r
+ add a,h ;\r
+ ld h,a ;\r
+ ld a,b ;\r
+ adc a,0 ;\r
pop bc ;\r
ret ;\r
\r
- endif\r
;--------------------------------------------------------------\r
;\r
-; de: Log. Address\r
-; \r
+; hl: Log. Address\r
+;\r
;\r
; OP: ahl = (bankbase<<12) + (d<<8) + e\r
;\r
;out ahl: Phys. (linear) Address\r
\r
\r
-hw_log2phys:\r
+hwl2phy:\r
push bc ;\r
- in0 c,(cbar)\r
- ld a,d\r
- or 00fh\r
+ in0 c,(cbar) ;\r
+ ld a,h ;\r
+ or 00fh ; log. addr in common1?\r
cp c\r
jr c,hlp_1\r
- in0 c,(cbr)\r
- jr hlp_e\r
+\r
+ in0 a,(cbr) ; yes, cbr is address base\r
+ jr hl2p_x\r
hlp_1:\r
- ld b,16\r
+ ld b,16 ; log. address in baked area?\r
mlt bc\r
- ld a,d\r
+ ld a,h\r
cp c\r
- ld c,0\r
- jr c,hlp_e\r
- in0 c,(bbr)\r
-hlp_e: \r
- ld b,16 ;\r
- mlt bc ;bc = a<<4\r
- ld l,d ;\r
- ld h,0 ;\r
- add hl,bc ;bc + d == a<<4 + d\r
- ld a,h ;\r
- ld h,l ;\r
- ld l,e ;\r
- pop bc ;\r
+ jr c,hlp_2\r
+ in0 a,(bbr) ; yes, bbr is address base\r
+ jr hl2p_x\r
+hlp_2:\r
+ xor a ; common1\r
+hl2p_x:\r
+ jr nz,l2p_i\r
+\r
+ pop bc ; bank part is 0, no translation\r
ret ;\r
\r
- else\r
\r
-;\r
+\r
+ else ;CPU_Z180\r
+\r
;----------------------------------------------------------------------\r
;\r
\r
-bnk2phys:\r
+bnk2phy:\r
sla h\r
jr nc,b2p_1 ;A15=1 --> common\r
ld a,3\r
; Save cbar\r
\r
isv_sw: ;\r
- ex (sp),hl ; save hl, return adr in hl\r
+ ex (sp),hl ;save hl, 'return adr' in hl\r
push de ;\r
push af ;\r
- ex de,hl ;\r
+ ex de,hl ;'return address' in de\r
ld hl,0 ;\r
add hl,sp ;\r
ld a,h ;\r
cp 0f8h ;\r
- jr nc,isw_1 ;\r
+ jr nc,isw_1 ;stack allready in top ram\r
ld sp,$stack ;\r
isw_1:\r
- push hl ;\r
+ push hl ;save user stack pointer\r
in0 h,(cbar) ;\r
push hl ;\r
ld a,SYS$CBAR ;\r
\r
\r
end\r
-\r
projects / z180-stamp.git / blobdiff