X-Git-Url: http://cloudbase.mooo.com/gitweb/z180-stamp.git/blobdiff_plain/05437fb4cdb907816a4fc3ffafa2617fcf33266a..a2907f2e2b2725679d6b3b8d3231f3d94c325014:/z180/config.inc

diff --git a/z180/config.inc b/z180/config.inc
index 9cef051..bea6e05 100644
--- a/z180/config.inc
+++ b/z180/config.inc
@@ -1,64 +1,169 @@
 
+FALSE	equ	0
+TRUE	equ	NOT FALSE
 
-FOSC		equ	9216		;Oscillator frequency [KHz]
-PHI		equ	FOSC*2		;CPU frequency
+
+banked	equ	true
 
 ;-----------------------------------------------------
-; Programmable Reload Timer (PRT)
+; CPU and BANKING types
 
-PRT_PRE		equ	20		;PRT prescaler
 
-; Reload value for 10 ms Int. (0.1KHz):
-; tc10ms = phi/prescale/0.1KHz  = phi / (prescale/10)
+CPU_Z180	equ	TRUE
+CPU_Z80		equ	FALSE
+
+ROMSYS		equ	FALSE
 
-PRT_TC10MS	equ	PHI / (PRT_PRE/10)
+AVRCLK		equ	18432		;[KHz]
+
+    if CPU_Z180
 
 ;-----------------------------------------------------
-; MMU
+;FOSC		equ	AVRCLK/2	;Oscillator frequency [KHz]
+;PHI		equ	FOSC*2		;CPU frequency (clock doubler enabled)
+
+;----------------------------------------------------------------------
+; Baudrate Generator for x16 clock mode:
+; TC = (f PHI / (32 * baudrate)) - 2
+;
+;     PHI [MHz]: 9.216 18.432
+;     baudrate     TC     TC
+;     ----------------------
+;      115200	    -      3
+;	57600	    3      8
+;	38400       -     13
+;	19200	   13     28
+;	 9600	   28     58
 
-SYS$CBAR	equ	0C8h
-USR$CBAR	equ	0F0h
 
+;-----------------------------------------------------
+; Programmable Reload Timer (PRT)
 
-BANKS		equ	18		;max nr. of banks
+PRT_PRE		equ	20		;PRT prescaler
 
 ;-----------------------------------------------------
+; MMU
 
-CREFSH		equ	0		;Refresh rate register (disable refresh)
-CWAITIO		equ	3 shl IWI0	;Max I/O Wait States, 0 Memory Wait States
+COMMON_SIZE	equ	4*1024		;Common Area size in bytes
+					;must be multiple of 4K
+if (COMMON_SIZE mod 1000h)
+	.printx COMMON_SIZE not multiple of 4K!
+	end	;stop assembly
+endif
+CMN_SIZE	equ	COMMON_SIZE/1000h		;4K units
+BNK_SIZE	equ	64/4 - CMN_SIZE			;bank size (4K units)
+BANKS		equ	(512/4 - CMN_SIZE)/BNK_SIZE	;max nr. of banks
+
+; Logical address space, CBAR values
+
+CA		equ	10h - CMN_SIZE		;common area start (64K - common size)
+BA		equ	0			;banked area start
+
+   if 0
 
+SYS$CBR		equ	0
+SYS$CBAR	equ	CA*16 + CA	;CBAR in system mode
+USR$CBAR	equ	CA*16 + BA	;CBAR in user mode (CP/M)
 
-ROMSYS		equ	0
+   endif
+   if 1
 
-	if	ROMSYS
+SYS$CBR		equ	BNK_SIZE
+SYS$CBAR	equ	CA*16 + CA	;CBAR in system mode
+USR$CBAR	equ	CA*16 + BA	;CBAR in user mode (CP/M)
+
+   endif
+
+
+;-----------------------------------------------------
+
+CREFSH		equ	0		;Refresh rate register (disable refresh)
+CWAITIO		equ	3 shl IWI0	;Max I/O Wait States, 0 Memory Wait States
+PHI_X2		equ	0		;set to M_X2CM to enable the clock doubler
+
+    endif 		;CPU_Z180
+    if	CPU_Z80
+
+PHI		equ	AVRCLK/5	;CPU frequency [KHz]
+BAUDCLCK	equ	AVRCLK/10	;Baudrate clock [KHz]
+;BDCLK16		equ
+
+SIOAD	EQU	0bch
+SIOAC	EQU	0bdh
+SIOBD	EQU	0beh
+SIOBC	EQU	0bfh
+
+CTC0	EQU	0f4h
+CTC1	EQU	0f5h
+CTC2	EQU	0f6h
+CTC3	EQU	0f7h
+
+;
+; Init Serial I/O for console input and output (SIO-A)
+;
+; Baudrate clock: 1843200 Hz (Bus connector pin A17)
+;
+; Baudrate   Divider	SIO	CTC
+; ---------------------------------
+; 115200	  16	 16	  1
+;  57600	  32	 16	  2
+;  38400	  48	 16	  3
+;  19200	  96	 16	  6
+;   9600	 192	 16	 12
+;   4800	 384	 16	 24
+;   2400	 768	 16	 48
+;   1200	1536	 16	 96
+;    600	3072	 16	192
+;    300	6144	 64	 92
+
+    endif	; CPU_Z80
+
+    if	ROMSYS
 c$rom		equ	0a5h
 ROM_EN		equ	0C0h
 ROM_DIS		equ	ROMEN+1
+     if CPU_Z180
 CWAITROM 	equ	2 shl MWI0
-	endif
+     endif
+    endif
+
 
+DDTZRSTVEC 	equ	030h		;DDTZ Restart vector (breakpoints)
 
-DRSTNUM 	equ	30h		;DDTZ Restart vector (breakpoints)
+INIDONE		equ	03Fh		;CP/M skip hw init, if this address
+INIDONEVAL	equ	080h		;    is set to this value.
 
+mtx.fifo_len	equ	64		;Message transfer fifos
+mtx.fifo_id	equ	0		;    This *must* have #0
+mrx.fifo_len	equ	64
+mrx.fifo_id	equ	1
 
-mrx.fifo_len	equ	256
-mtx.fifo_len	equ	256
+ci.fifo_len	equ	32		;AVRCON (USB0) Character I/O via AVR
+ci.fifo_id	equ	2
+co.fifo_len	equ	32
+co.fifo_id	equ	3
 
-ci.fifo_len	equ	128
-co.fifo_len	equ	256
+s0.rx_len	equ	128		;Serial 0 (ASCI0) buffers
+s0.rx_id	equ	4		;
+s0.tx_len	equ	128		;
+s0.tx_id	equ	5		;
 
-s1.rx_len	equ	256		;Serial 1 (ASCI1) buffers
-s1.tx_len	equ	256		;
+s1.rx_len	equ	128		;Serial 1 (ASCI1) buffers
+s1.rx_id	equ	6		;
+s1.tx_len	equ	128		;
+s1.tx_id	equ	7		;
 
-AVRINT5		equ	40h
-AVRINT6		equ	50h
+AVRINT5		equ	4Fh
+AVRINT6		equ	5Fh
 ;PMSG		equ	80h
 
+IDEBASE		equ	60h
+
 ;-----------------------------------------------------
-; Definition of (locical) top 2 memory pages
+; Definition of (logical) top 2 memory pages
 
 sysram_start	equ	0FE00h
-stacksize	equ	80
+bs$stack$size	equ	80
 
 isvsw_loc	equ	0FEE0h
 
@@ -69,24 +174,27 @@ iv2tab		equ	ivtab + 2*9
 
 ;-----------------------------------------------------
 
-
+o.id		equ	-4
 o.mask		equ	-3
 o.in_idx	equ	-2
 o.out_idx	equ	-1
 
 	.lall
 
-mkbuf	macro	name,size
-  if ((size & (size-1)) ne 0) or (size gt 256)
+mkbuf	macro	id,name,size
+  if ((size AND (size-1)) NE 0) OR (size GT 256)
     .printx Error: buffer ^size must be power of 2 and in range 0..256!
     name&.mask equ ;wrong size error
   else
-    ds 3
+    db id
+    db size-1
+    ds 2
     name:: ds size
     name&.mask equ low (size-1)
     if size ne 0
       name&.end equ $-1
       name&.len equ size
+      name&.id equ id
     endif
   endif
 endm
@@ -104,3 +212,9 @@ inidate	macro
 	ds	??ps.len
 	endm
 
+;-----------------------------------------------------
+
+b0call	macro	address
+	call	_b0call
+	dw	address
+	endm