X-Git-Url: http://cloudbase.mooo.com/gitweb/z180-stamp.git/blobdiff_plain/1e5609bf0dfb390b0d62651cbd979e0ee21184fe..51dd0948df5ed53b11cab4e909e19ee7cee363c5:/avr/z80-if.c?ds=sidebyside

diff --git a/avr/z80-if.c b/avr/z80-if.c
index 6d83172..5d88842 100644
--- a/avr/z80-if.c
+++ b/avr/z80-if.c
@@ -144,10 +144,18 @@ void z80_bus_request_or_exit(void)
 
 static zstate_t zstate;
 static volatile uint8_t timer;		/* used for bus timeout */
-static bool reset_polarity;
+
+#if 0
+static volatile uint16_t req_cycles_ovl;
+
+ISR(TIMER4_COMPB_vect)
+{
+	req_cycles_ovl++;
+}
+#endif
 
 /*---------------------------------------------------------*/
-/* 10Hz timer interrupt generated by OC4A                  */
+/* 10Hz timer interrupt generated by OC5A                  */
 /*---------------------------------------------------------*/
 
 ISR(TIMER5_COMPA_vect)
@@ -207,7 +215,7 @@ static void z80_dbus_set_out(void)
 
 static void z80_reset_active(void)
 {
-	if (reset_polarity)
+	if (Stat & S_RESET_POLARITY)
 		Z80_O_RST = 1;
 	else
 		Z80_O_RST = 0;
@@ -215,7 +223,7 @@ static void z80_reset_active(void)
 
 static void z80_reset_inactive(void)
 {
-	if (reset_polarity)
+	if (Stat & S_RESET_POLARITY)
 		Z80_O_RST = 0;
 	else
 		Z80_O_RST = 1;
@@ -255,7 +263,10 @@ void z80_setup_bus(void)
 			DDR_SS = (DDR_SS & ~_BV(WAIT)) | _BV(RUN) | _BV(STEP);
 		}
 
-		reset_polarity = Z80_I_RST;
+		if (Z80_I_RST)
+			Stat |= S_RESET_POLARITY;
+		else
+			Stat &= ~S_RESET_POLARITY;
 		z80_reset_active();
 		DDR_RST |= _BV(RST);
 
@@ -350,7 +361,11 @@ zstate_t z80_bus_cmd(bus_cmd_t cmd)
 		z80_dbus_set_in();
 		z80_addrbus_set_in();
 		z80_reset_active();
+		_delay_us(10);
 		Z80_O_BUSREQ = 1;
+		timer = BUS_TO;
+		while (Z80_I_BUSACK == 0 && timer)
+			;
 		zstate = RESET;
 		break;
 
@@ -395,13 +410,20 @@ zstate_t z80_bus_cmd(bus_cmd_t cmd)
 			z80_dbus_set_in();
 			z80_addrbus_set_in();
 			z80_reset_active();
+			_delay_us(10);
 			Z80_O_BUSREQ = 1;
+			timer = BUS_TO;
+			while (Z80_I_BUSACK == 0 && timer)
+				;
 			zstate = RESET;
 			break;
 		case RUNNING_AQRD:
 			z80_dbus_set_in();
 			z80_addrbus_set_in();
 			Z80_O_BUSREQ = 1;
+			timer = BUS_TO;
+			while (Z80_I_BUSACK == 0 && timer)
+				;
 			zstate = RUNNING;
 			break;
 		default:
@@ -412,6 +434,7 @@ zstate_t z80_bus_cmd(bus_cmd_t cmd)
 	case Run:
 		switch (zstate) {
 		case RESET:
+			_delay_ms(20);		/* TODO: */
 			z80_reset_inactive();
 			zstate = RUNNING;
 			break;
@@ -496,6 +519,8 @@ int32_t z80_memsize_detect(void)
 	return addr;
 }
 
+/*--------------------------------------------------------------------------*/
+
 void z80_write(uint32_t addr, uint8_t data)
 {
 	z80_setaddress(addr);
@@ -595,6 +620,7 @@ void z80_read_block (uint8_t *dest, uint32_t src, size_t length)
 	Z80_O_MREQ = 1;
 }
 
+/*--------------------------------------------------------------------------*/
 
 /*
   0179'                         rx.bs_mask:	ds	1		; (buf_len - 1)
@@ -735,3 +761,31 @@ void z80_memfifo_putc(fifo_t f, uint8_t val)
 	z80_write(fifo_dsc[f].base+FIFO_INDEX_IN, fifo_dsc[f].idx_in);
 	z80_bus_cmd(Release);
 }
+
+/*--------------------------------------------------------------------------*/
+
+void z80_load_mem(int_fast8_t verbosity,
+				const FLASH unsigned char data[],
+				const FLASH unsigned long *sections,
+				const FLASH unsigned long address[],
+				const FLASH unsigned long length_of_sections[])
+{
+	uint32_t sec_base = 0;
+
+	if (verbosity > 1)
+		printf_P(PSTR("Loading Z180 memory... \n"));
+
+	for (unsigned sec = 0; sec < *sections; sec++) {
+		if (verbosity > 0) {
+			printf_P(PSTR("   From: 0x%.5lX to: 0x%.5lX    (%5li bytes)\n"),
+					address[sec],
+					address[sec]+length_of_sections[sec] - 1,
+					length_of_sections[sec]);
+		}
+
+		z80_write_block_P((const FLASH unsigned char *) &data[sec_base],  /* src */
+				address[sec],                  /* dest */
+				length_of_sections[sec]);      /* len */
+		sec_base += length_of_sections[sec];
+	}
+}