X-Git-Url: http://cloudbase.mooo.com/gitweb/z180-stamp.git/blobdiff_plain/296050043a19ee9b18c850dad01cc36ee64bd7b0..32154e5a9e9bf0a52269b3715711b76dc8fcac0f:/z180/init.180 diff --git a/z180/init.180 b/z180/init.180 index 9edeaf2..05c24ff 100644 --- a/z180/init.180 +++ b/z180/init.180 @@ -4,50 +4,87 @@ extrn ddtz,bpent extrn $stack extrn charini,?const,?conin - + extrn ?cono,?conos extrn romend + global iobyte global isv_sw include config.inc + if CPU_Z180 include z180reg.inc include z180.lib + endif -;CR equ 0dh ;---------------------------------------------------------------------- cseg +romstart equ $ + org romstart+0 jp start +iobyte: db 2 + ; restart vectors rsti defl 1 rept 7 - db 0, 0, 0, 0, 0 - jp bpent -rsti defl rsti+1 + org 8*rsti + romstart + jp bpent +rsti defl rsti+1 endm - db 0, 0, 0, 0, 0 ;---------------------------------------------------------------------- - - ;org 40h +; Config space +; + + org romstart+40h dw 0 db 0 - if ROMSYS -$crom: defb c$rom ; - else - db 0 ; - endif + if ROMSYS +$crom: defb c$rom ; + else + db 0 ; + endif +INIWAITS defl CWAITIO + if ROMSYS +INIWAITS defl INIWAITS+CWAITROM + endif + +;---------------------------------------------------------------------- + + org romstart+50h +start: + jp cstart + jp wstart + jp ?const + jp ?conin + jp ?cono + jp ?conos + jp charini + +;---------------------------------------------------------------------- + +hwini0: + if CPU_Z180 + db ;count + db rcr,CREFSH ;configure DRAM refresh + db dcntl,INIWAITS ;wait states + db cbr,SYS$CBR + db cbar,SYS$CBAR + endif + db 0 + + if CPU_Z180 dmclrt: ;clear ram per dma db dmct_e-dmclrt-2 ; db sar0l ;first port @@ -58,37 +95,27 @@ nullbyte: db 00h ;dst dw 0-romend ;count (64k) dmct_e: + db 0 + endif -INIWAITS defl CWAITIO - if ROMSYS -INIWAITS defl INIWAITS+CWAITROM - endif - -hwini0: - db 3 ;count - db rcr,CREFSH ;configure DRAM refresh - db dcntl,INIWAITS ;wait states - db cbar,SYS$CBAR -;---------------------------------------------------------------------- +cstart: + if CPU_Z180 -start: - ld (tmpstack),sp - ld sp,tmpstack push af in0 a,(itc) ;Illegal opcode trap? jp m,??st01 ld a,i ;I register == 0 ? - jr z,??st02 ; yes, harware reset + jr z,hw_reset ; yes, harware reset ??st01: + ; TODO: SYS$CBR ld a,(syscbr) out0 (cbr),a pop af ;restore registers - ld sp,(tmpstack) ; jp bpent ; -??st02: +hw_reset: di ;0058 ld a,CREFSH out0 (rcr),a ; configure DRAM refresh @@ -99,107 +126,47 @@ start: out0 (ccr),a ; ld a,M_X2CM ;X2 Clock Multiplier ; out0 (cmr),a + else + di + xor a + ld (@cbnk),a + endif + +; check warm start mark + + ld ix,mark_55AA ; top of common area + ld a,0aah ; + cp (ix+000h) ; + jr nz,kstart ; + cp (ix+002h) ; + jr nz,kstart ; + cpl ; + cp (ix+001h) ; + jr nz,kstart ; + cp (ix+003h) ; + jr nz,kstart ; + ld sp,$stack ; mark found, check + jp z,wstart ; check ok, -; search warm start mark - - ld ix,mark_55AA ;00b8 ; top of common area - ld a,SYS$CBAR ; - out0 (cbar),a ; - ld a,071h ;00bc - ex af,af' ;00be ;for cbr = 0x70 downto 0x40 -swsm_l: - ex af,af' ;00bf - dec a ;00c0 - cp 03fh ;00c1 - jr z,kstart ;00c3 ; break (mark not found) - out0 (cbr),a ;00c5 - ex af,af' ;00c8 - ld a,0aah ;00c9 - cp (ix+000h) ;00cb - jr nz,swsm_l ;00ce - cp (ix+002h) ;00d0 - jr nz,swsm_l ;00d3 - cpl ;00d5 - cp (ix+001h) ;00d6 - jr nz,swsm_l ;00d9 - cp (ix+003h) ;00db - jr nz,swsm_l ;00de - ld sp,$stack ;00e0 mark found, check - call checkcrc_alv ;00e3 - jp z,wstart ;00e6 check ok, - -; ; ram not ok, initialize -- kstart -- kstart: + if CPU_Z180 + ld a,SYS$CBR ;TODO: + out0 (cbr),a + ld a,SYS$CBAR + out0 (cbar),a + endif - ld a,088h ;00e9 0000-7fff: common 0 - out0 (cbar),a ;00eb 8000-ffff: common 1 - ld ix,08000h ;00f3 - ld a,0 ;00f1 start at 008000 (2. phys. 32k block) -??f_0: - out0 (cbr),a ;00f9 - - ld (ix+0),a ;0103 - cpl - ld (ix+1),a ;0103 - cpl - add a,8 ;010a next 'bank' - cp 078h ;010c stop at 078000 - jr nz,??f_0 ;010e - - ld de,8000h ;0114 first block not tested, but mark as ok - ld a,0 ;00f1 start at 008000 (2. phys. 32k block) -??cp_0: - out0 (cbr),a ;011c - ld c,a - xor (ix+0) - ld b,a - ld a,c - cpl - xor (ix+1) - or b - jr nz,??cp_1 - scf -??cp_1: - rr d - rr e - ld a,c - add a,8 - cp 078h ; stop at 078000 - jr nz,??cp_0 - -; -; ram test found 1 or more error free blocks (32k) -; - -ramok: - ld a,SYS$CBAR ;01c8 - out0 (cbar),a ;01ca - ld h,d - ld l,e - ld c,070h ;01ce highest block - ld b,15 ;01d0 -??sr_1: - add hl,hl - jr c,alloc ;01d4 highest "error free" block - ld a,c ;01d6 - sub 008h ;01d7 - ld c,a ;01d9 - djnz ??sr_1 ;01da - - slp ;01dc should never be reached - -alloc: - out0 (cbr),c ;01de - ld a,c - ld (syscbr),a ld sp,$stack ;01e1 ; Clear RAM using DMA0 + if CPU_Z180 + if 0 + ld hl,dmclrt ;load DMA registers - call io.ini.m + call ioiniml ld a,0cbh ;01ef dst +1, src fixed, burst out0 (dmode),a ;01f1 @@ -209,174 +176,123 @@ alloc: out0 (dstat),a ;01f9 clear (up to) 64k djnz ??cl_1 ; end of RAM? -; Init bank manager - - ld hl,banktabsys ;020f - ld (hl),c ; Common area - inc hl ;0213 - ld (hl),c ; System work area - inc hl ;0215 Point to bank 0 entry - ld b,BANKS ;0216 -l0218h: - ld (hl),0ffh ;0218 Mark all banks as unassigned - inc hl ;021a - djnz l0218h ;021b - - ld hl,memalv ; - ld b,8 ; 8*4k ie. first 32k -??a_0: - ld (hl),0e0h ; mark as sys ("rom"/monitor) - inc hl - djnz ??a_0 - - rr d ; shift out bit for block 0 - rr e ; - ld c,15 ;022c 15*32k remaining blocks -l022eh: - ld a,0feh ; 0xfe == block with error(s) - rr d ; - rr e - adc a,0 ; ==> 0xff : block ok - ld b,32/4 ; 32k == 8 * 4k -l0236h: - ld (hl),a ; - inc hl ; - djnz l0236h ; - dec c ; - jr nz,l022eh ;next 32k block - - ld hl,memalv+0ch ;memalv+0ch - ld a,(banktabsys) ; - call add_hl_a - ld b,3 ; -l024ah: - ld (hl),0ech ;alloc system ram - inc hl ; - djnz l024ah ; - ld (hl),0efh ;alloc common - call gencrc_alv - - ld hl,0000h ;bank # - ld bc,0f0fh ; size (?) (4k blocks) - xor a ; - call sub_0420h ;alloc mem for bank 0 - ld c,l ; - or a ; - call z,sub_04b5h ; - - ld hl,0101h ; - ld bc,0f0fh ; - xor a ; - call sub_0420h ; - ld c,l ; - or a ; - call z,sub_04b5h ; + endif + endif ld hl,055AAh ;set warm start mark - ld (mark_55AA),hl ; - ld (mark_55AA+2),hl; + ld (mark_55AA),hl + ld (mark_55AA+2),hl + +; -- wstart -- -; -; crc ok -- wstart -- -; wstart: - call sysram_init ;027f + call sysram_init call ivtab_init + if CPU_Z180 +; call prt0_init + endif - call prt0_init - + call msginit call charini - call bufferinit + if CPU_Z80 + ld a,0 + call selbnk + endif + ld a,INIDONEVAL ;tell others (CP/M) that hardware and fifos + ld (INIDONE),a ; are allready initialized + im 2 + ei - im 2 ;?030e - ei ;0282 - - call ?const ;0284 - call ?const ;0287 - or a ;028a - call nz,?conin ;028d + call ?const + call ?const + or a + call nz,?conin - ld a,(banktab) ; - ld e,a ; - jp ddtz ;0290 + if CPU_Z180 + ld e,0 ;Sys$Bank + else +; TODO: + endif + jp ddtz - ds 8 -tmpstack: - dw 2 -syscbr: db 1 + if CPU_Z180 +; TODO: SYS$CBR +syscbr: db 0 + endif ; ;---------------------------------------------------------------------- ; -;TODO: Make a ringbuffer module. - - global buf.init + global bufinit -buf.init: - ld (ix+o.in_idx),0 +bufinit: + ld (ix+o.in_idx),0 ;reset pointers (empty fifo) ld (ix+o.out_idx),0 - ld (ix+o.mask),a - ret - -;---------------------------------------------------------------------- -if 0 - extrn msginit,msg_tx_fifo,msg_rx_fifo - extrn msg.sout - -bufferinit: - - ld de,msg_tx_fifo - in0 a,cbr - call log2phys - ld (40h+0),hl - ld (40h+2),a - -; ld (bufdat+1),hl -; ld (bufdat+3),a -; ld a,1 -; ld (bufdat+0),a -; ld hl,inimsg -; call msg.sout + ld a,(ix+o.id) + ld hl,fifolst + ld e,a + ld d,0 + add hl,de + add hl,de + push ix + pop de + cp 4 + jr nc,bfi_skip + + ld (hl),e + inc hl + ld (hl),d - ld de,msg_rx_fifo - in0 a,cbr - call log2phys - ld (bufdat+1),hl - ld (bufdat+3),a - ld a,2 - ld (bufdat+0),a - ld hl,inimsg - call msg.sout +bfi_skip: + ex de,hl + call hwl2phy ;get phys. address of fifo + ld c,a + ld a,(ix+o.id) ;fifo id + or a ;test if fifo 0 + ret z + ld b,a + push bc ;c: bank-addr, b: ignored + push hl ;address + ld c,0 + push bc ;c: function, b:subf + ld b,5 + ld h,c + ld l,c + add hl,sp + call msg.sm + pop hl + pop hl + pop hl ret -inimsg: - db inimsg_e - $ - 1 - db 0AEh - db inimsg_e - $ - 1 - db 0 -bufdat: - db 0 - dw 0 - db 0 -inimsg_e: + public fifolst +fifolst : + rept 4 + dw 0 + endm -endif ;---------------------------------------------------------------------- -; + extrn msg.sm extrn msginit,msg.sout extrn mtx.fifo,mrx.fifo - extrn co.fifo,ci.fifo + extrn ff.init,co.fifo,ci.fifo + + +fifoinit: + if CPU_Z180 + + ret + else ;CPU_Z180 -bufferinit: - call msginit + call msginit ld hl,buffers ld b,buftablen @@ -388,49 +304,34 @@ bfi_1: inc hl ld d,(hl) inc hl - push hl + ex de,hl or a jr nz,bfi_2 - in0 a,cbr - call log2phys + + ld a,(@cbnk) + call bnk2phy + ld (40h+0),hl ld (40h+2),a - out0 (AVRINT5),a - jr bfi_3 + out (AVRINT5),a + jr bfi_3 bfi_2: - in0 a,cbr - call log2phys + + ld a,(@cbnk) + call bnk2phy + ld (bufdat+1),hl ld (bufdat+3),a ld hl,inimsg call msg.sout bfi_3: - pop hl + ex de,hl djnz bfi_1 ret + endif + -buffers: - db 0 - dw mtx.fifo - db 1 - dw mrx.fifo - db 2 - dw co.fifo - db 3 - dw ci.fifo -buftablen equ ($ - buffers)/3 - -inimsg: - db inimsg_e - $ -1 - db 0AEh - db inimsg_e - $ -1 - db 0 -bufdat: - db 0 - dw 0 - db 0 -inimsg_e: ; @@ -451,7 +352,9 @@ ivtab_init: ld hl,ivtab ; ld a,h ; ld i,a ; + if CPU_Z180 out0 (il),l ; + endif ; Let all vectors point to spurious int routines. @@ -469,6 +372,13 @@ ivt_i1: ;---------------------------------------------------------------------- +; Reload value for 10 ms Int. (0.1KHz): +; tc10ms = phi/prescale/0.1KHz = phi / (prescale/10) + +PRT_TC10MS equ 18432 / (PRT_PRE/10) + + + if CPU_Z180 prt0_init: ld a,i ld h,a @@ -480,7 +390,7 @@ prt0_init: inc hl ld (hl),high iprt0 ld hl,prt0itab - call io.ini.m + call ioiniml ret prt0itab: @@ -490,319 +400,224 @@ prt0itab: dw PRT_TC10MS db M_TIE0+M_TDE0 ;enable timer 0 interrupt and down count. prt0it_e: + db 0 + endif ; ;---------------------------------------------------------------------- ; + if CPU_Z180 io.ini: + if 0 push bc ld b,0 ;high byte port adress +ioi_nxt: ld a,(hl) ;count inc hl -ioi_1: + or a + jr z,ioi_e + ld c,(hl) ;port address inc hl +ioi_r: outi inc b ;outi decrements b dec a - jr nz,ioi_1 + jr nz,ioi_r + jr ioi_nxt +ioi_e: pop bc ret -io.ini.m: + else ;(if 1/0) + push bc + jr ioi_nxt +ioi_l: + ld c,(hl) ;port address + inc hl + inc c +ioi_r: + dec c ;otim increments c + otim + jr z,ioi_r +ioi_nxt: + ld b,(hl) ;count + inc hl + inc b ;stop if count == 0 + djnz ioi_l + pop bc + ret + + endif ;(1/0) + + else + +io.ini: + push bc + jr ioi_nxt +ioi_l: + ld c,(hl) ;port address + inc hl + otir +ioi_nxt: + ld b,(hl) ;count + inc hl + inc b + djnz ioi_l + endif + pop bc + ret + +;---------------------------------------------------------------------- + + if CPU_Z180 + + global ioiniml + +ioiniml: + push bc + xor a +ioml_lp: ld b,(hl) inc hl + cp b + jr z,ioml_e + ld c,(hl) inc hl otimr + jr ioml_lp +ioml_e: pop bc - ret + ret z + endif io.ini.l: ; + + ;---------------------------------------------------------------------- ; + if CPU_Z180 -; compute crc -; hl: start adr -; bc: len -; bc returns crc val - -do_crc16: - ld de,0FFFFh -crc1: - ld a,(hl) - xor e - ld e,a - rrca - rrca - rrca - rrca - and 0Fh - xor e - ld e,a - rrca - rrca - rrca - push af - and 1Fh - xor d - ld d,a - pop af - push af - rrca - and 0F0h - xor d - ld d,a - pop af - and 0E0h - xor e - ld e,d - ld d,a - cpi - jp pe,crc1 - or e ;z-flag - ret +;-------------------------------------------------------------------- +; Return the BBR value for the given bank number +; +; in a: Bank number +; out a: bbr value +bnk2log: + or a ; + ret z ; Bank 0 is at physical address 0 -gencrc_alv: - push hl ;03f6 - push de ;03f7 - push bc - push af ;03f8 - ld hl,banktabsys ;03f9 - ld bc,crc_len ;03fc - call do_crc16 ;03ff - ld (hl),e - inc hl - ld (hl),d - pop af ;0406 - pop bc - pop de ;0407 - pop hl ;0408 - ret ;0409 - -checkcrc_alv: - push hl ;040a - push de - push bc ;040b - ld hl,banktabsys ;040d - ld bc,crc_len+2 ;0410 - call do_crc16 ;0413 - pop bc ;041d - pop de - pop hl ;041e - ret ;041f + push bc ; + ld b,a ; + ld c,CA ; + mlt bc ; + ld a,c ; + add a,10h ; + pop bc ; + ret ; -;---------------------------------------------------------------------- +;-------------------------------------------------------------- +;in hl: Log. Address +; a: Bank number ; -; alloc -; -; h: max bank # -; l: min bank # -; b: max size -; c: min size -; -; ret: -; a: 0 == ok -; 1 == -; 2 == no bank # in requested range -; ff == crc error -; +;out ahl: Phys. (linear) Address -sub_0420h: - call checkcrc_alv ;0420 - jr nz,l049ch ;0424 crc error, tables corrupt - - call sub_049dh ;0427 bank # in req. range available? - jr c,l0499h ;042a - push ix ;042c - push iy ;042e - push de ;0430 - push hl ;0431 - push bc ;0432 - ld c,b ;0433 - ld b,alv_len+1 ;0434 - ld d,0 ;0436 - ld hl,memalv-1 ;0438 - jr l0441h ;043b - -; find free blocks - -l043dh: - ld a,(hl) ;043d - inc a ;043e free blocks are marked 0ffh - jr z,l0446h ;043f -l0441h: - inc hl ;0441 - djnz l043dh ;0442 - jr l0464h ;0444 -l0446h: - push hl ;0446 - pop ix ;0447 free blocks start here - ld e,000h ;0449 - jr l0451h ;044b -l044dh: ; count free blocks - ld a,(hl) ;044d - inc a ;044e - jr nz,l0457h ;044f -l0451h: - inc e ;0451 - inc hl ;0452 - djnz l044dh ;0453 - jr l0464h ;0455 - -; end of free blocks run. - -l0457h: - ld a,d ;0457 - cp e ;0458 nr of blocks >= requested ? - jr nc,l0441h ;0459 - - ld d,e ;045b - push ix ;045c - pop iy ;045e - ld a,d ;0460 - cp c ;0461 - jr c,l0441h ;0462 -l0464h: - pop bc ;0464 - ld a,d ;0465 - cp b ;0466 - jr c,l046ch ;0467 - ld d,b ;0469 - jr l0471h ;046a -l046ch: - cp c ;046c - jr nc,l0471h ;046d - ld d,000h ;046f -l0471h: - ld a,d ;0471 - push iy ;0472 - pop hl ;0474 - ld de,memalv ;0475 - or a ;0478 - sbc hl,de ;0479 - ld b,l ;047b - ld c,a ;047c - pop hl ;047d -l047eh: - or a ;047e - jr z,l0489h ;047f - ld (iy+0),l ;0481 - inc iy ;0484 - dec a ;0486 - jr l047eh ;0487 -l0489h: - pop de ;0489 - pop iy ;048a - pop ix ;048c - call gencrc_alv ;048e - ld a,c ;0491 - or a ;0492 - ld a,000h ;0493 - ret nz ;0495 - or 001h ;0496 - ret ;0498 - -l0499h: - ld a,2 ;0499 -l049ch: - or a - ret ;049c - - -; search a free bank number in range -; h: max # -; l: min # -; ret: -; l: bank number available -; nc, if found, bank nr. in l -; cy, if none found - -sub_049dh: - push de ;049d - push bc ;049e - ex de,hl ;049f - dec e ;04a0 -l04a1h: - inc e ;04a1 test next # - ld a,d ;04a2 - cp e ;04a3 - jr c,l04b1h ;04a4 - ld a,e ;04a6 - ld hl,memalv ;04a7 - ld bc,alv_len ;04aa - cpir ;04ad bank# allready allocated? - jr z,l04a1h ;04af if yes, search for next -l04b1h: - ex de,hl ;04b1 - pop bc ;04b2 - pop de ;04b3 - ret ;04b4 - - -sub_04b5h: - ld a,l ;04b5 - cp 012h ;04b6 - ccf ;04b8 - ret c ;04b9 - push hl ;04ba - ld hl,banktab ;04bb - call add_hl_a - ld (hl),b ;04c3 - call gencrc_alv ;04c4 - pop hl ;04c7 - or a ;04c8 clear carry - ret ;04c9 +bnk2phy: + call bnk2log + ; fall thru ;-------------------------------------------------------------- ; -; de: Log. Address -; a: Bank number +; hl: Log. Address +; a: Bank base (bbr) +; +; 2 0 0 +; 0 6 8 0 +; hl hhhhhhhhllllllll +; a + bbbbbbbb +; +; OP: ahl = (a<<12) + (h<<8) + l ; ;out ahl: Phys. (linear) Address +log2phy: + push bc ; +l2p_i: + ld c,a ; + ld b,16 ; + mlt bc ; bc = a<<4 + ld a,c ; + add a,h ; + ld h,a ; + ld a,b ; + adc a,0 ; + pop bc ; + ret ; -bnk2phys: - push hl - ld hl,banktab - call add_hl_a - ld a,(hl) - pop hl - - ; fall thru ;-------------------------------------------------------------- ; -; de: Log. Address -; a: Bank (bbr) +; hl: Log. Address +; ; -; OP: ahl = (a<<12) + (d<<8) + e +; OP: ahl = (bankbase<<12) + (d<<8) + e ; ;out ahl: Phys. (linear) Address + public hwl2phy -log2phys: +hwl2phy: push bc ; - ld c,a ; - ld b,16 ; - mlt bc ;bc = a<<4 - ld l,d ; - ld h,0 ; - add hl,bc ;bc + d == a<<4 + d + in0 c,(cbar) ; ld a,h ; - ld h,l ; - ld l,e ; - pop bc ; + or 00fh ; log. addr in common1? + cp c + jr c,hlp_1 + + in0 a,(cbr) ; yes, cbr is address base + jr hl2p_x +hlp_1: + ld b,16 ; log. address in baked area? + mlt bc + ld a,h + cp c + jr c,hlp_2 + in0 a,(bbr) ; yes, bbr is address base + jr hl2p_x +hlp_2: + xor a ; common1 +hl2p_x: + jr nz,l2p_i + + pop bc ; bank part is 0, no translation ret ; + + else ;CPU_Z180 + +;---------------------------------------------------------------------- +; + +bnk2phy: + sla h + jr nc,b2p_1 ;A15=1 --> common + ld a,3 +b2p_1: + srl a + rr h + ret + + endif + ;-------------------------------------------------------------- ; ;return: @@ -829,18 +644,18 @@ topcodsys: ; Save cbar isv_sw: ; - ex (sp),hl ; save hl, return adr in hl + ex (sp),hl ;save hl, 'return adr' in hl push de ; push af ; - ex de,hl ; + ex de,hl ;'return address' in de ld hl,0 ; add hl,sp ; ld a,h ; cp 0f8h ; - jr nc,isw_1 ; + jr nc,isw_1 ;stack allready in top ram ld sp,$stack ; isw_1: - push hl ; + push hl ;save user stack pointer in0 h,(cbar) ; push hl ; ld a,SYS$CBAR ; @@ -868,6 +683,7 @@ jphl: ; --------------------------------------------------------- + if CPU_Z180 iprt0: push af @@ -890,6 +706,8 @@ iprt_1: ei ret + endif + ; --------------------------------------------------------- sp.int0: @@ -915,6 +733,160 @@ sp.i.1: ; out (80h),a halt +; --------------------------------------------------------- + + if CPU_Z80 + +; Get IFF2 +; This routine may not be loaded in page zero +; +; return Carry clear, if INTs are enabled. +; + global getiff +getiff: + xor a ;clear accu and carry + push af ;stack bottom := 00xxh + pop af + ld a,i ;P flag := IFF2 + ret pe ;exit carry clear, if enabled + dec sp + dec sp ;has stack bottom been overwritten? + pop af + and a ;if not 00xxh, INTs were + ret nz ;actually enabled + scf ;Otherwise, they really are disabled + ret + +;---------------------------------------------------------------------- + + global selbnk + +; a: bank (0..2) + +selbnk: + push bc + ld c,a + call getiff + push af + + ld a,c + di + ld (@cbnk),a + ld a,5 + out (SIOAC),a + ld a,(mm_sio0) + rla + srl c + rra + out (SIOAC),a + ld (mm_sio0),a + + ld a,5 + out (SIOBC),a + ld a,(mm_sio1) + rla + srl c + rra + out (SIOBC),a + ld (mm_sio1),a + pop af + pop bc + ret c ;INTs were disabled + ei + ret + +;---------------------------------------------------------------------- + +; c: bank (0..2) + + if 0 + +selbnk: + ld a,(@cbnk) + xor c + and 3 + ret z ;no change + + call getiff + push af + ld a,c + di + ld (@cbnk),a + ld a,5 + out (SIOAC),a + ld a,(mm_sio0) + rla + srl c + rra + out (SIOAC),a + ld (mm_sio0),a + + ld a,5 + out (SIOBC),a + ld a,(mm_sio1) + rla + srl c + rra + out (SIOBC),a + ld (mm_sio1),a + pop af + ret nc ;INTs were disabled + ei + ret + + endif + +;---------------------------------------------------------------------- + + if 0 + ex af,af' + push af + ex af,af' + + rra + jr nc,stbk1 + ex af,af' + ld a,5 + out (SIOAC),a + ld a,(mm_sio0) + rla + srl c + rra + out (SIOAC),a + ld (mm_sio1),a + ex af,af' + +stbk1: + rra + jr nc,stbk2 + ex af,af' + ld a,5 + out (SIOBC),a + ld a,(mm_sio1) + rla + srl c + rra + out (SIOBC),a + ld (mm_sio1),a + ex af,af' + +stbk2: + endif + + global @cbnk + global mm_sio0, mm_sio1 + +@cbnk: db 0 ; current bank (0..2) +mm_sio0: + ds 1 +mm_sio1: + ds 1 + + + endif + +;---------------------------------------------------------------------- + curph defl $ .dephase sysrame: @@ -925,21 +897,6 @@ tim_s: dw 0 ;----------------------------------------------------- - dseg - - ds 1 -banktabsys: - ds 1 ;0c001h - ds 1 ;0c002h -banktab: - ds BANKS ;0c003h -memalv: - ds 512/4 ;Number of 4k blocks -alv_len equ $-memalv -crc_len equ $-banktabsys - -crc_memalv: - ds 2 ; cseg @@ -947,11 +904,10 @@ crc_memalv: ;ivtab equ 0ffc0h ; 0ffc0h ;int vector table ;.dephase - ;.phase 0fffch -mark_55AA equ 0fffch - ;ds 4 ; 0fffch + ;.phase 0fffah +mark_55AA equ 0 - 2 - 4 ;2 byte for trap stack + ;ds 4 ;.dephase end -