X-Git-Url: http://cloudbase.mooo.com/gitweb/z180-stamp.git/blobdiff_plain/6a4e9540b950d871ea8fa072b195490a231b251d..bf5870430d2d1903b6dcdf1431d80b261f9a5d45:/z180/config.inc

diff --git a/z180/config.inc b/z180/config.inc
index 9cef051..ed98656 100644
--- a/z180/config.inc
+++ b/z180/config.inc
@@ -1,7 +1,23 @@
 
+FALSE	equ	0
+TRUE	equ	NOT FALSE
 
-FOSC		equ	9216		;Oscillator frequency [KHz]
-PHI		equ	FOSC*2		;CPU frequency
+;-----------------------------------------------------
+; CPU and BANKING types
+
+
+CPU_Z180	equ	TRUE
+CPU_Z80		equ	FALSE
+
+ROMSYS		equ	FALSE
+
+AVRCLK		equ	18432		;[KHz]
+
+    if CPU_Z180
+
+;-----------------------------------------------------
+FOSC		equ	AVRCLK/2	;Oscillator frequency [KHz]
+PHI		equ	FOSC*2		;CPU frequency (clock doubler enabled)
 
 ;-----------------------------------------------------
 ; Programmable Reload Timer (PRT)
@@ -16,8 +32,21 @@ PRT_TC10MS	equ	PHI / (PRT_PRE/10)
 ;-----------------------------------------------------
 ; MMU
 
-SYS$CBAR	equ	0C8h
-USR$CBAR	equ	0F0h
+COMMON_SIZE	equ	4*1024		;Common Area size in bytes
+					;must be multiple of 4K
+
+if (COMMON_SIZE mod 1000h) 
+	.printx COMMON_SIZE not multiple of 4K!
+	end	;stop assembly
+endif
+
+CSK	equ	COMMON_SIZE/1000h	;
+CA	equ	10h - CSK		;common area start
+BA	equ	0			;banked area start
+
+SYS$CBR		equ	0
+SYS$CBAR	equ	CA<<4 + CA	;CBAR in system mode
+USR$CBAR	equ	CA<<4 + BA	;CBAR in user mode (CP/M)
 
 
 BANKS		equ	18		;max nr. of banks
@@ -27,15 +56,51 @@ BANKS		equ	18		;max nr. of banks
 CREFSH		equ	0		;Refresh rate register (disable refresh)
 CWAITIO		equ	3 shl IWI0	;Max I/O Wait States, 0 Memory Wait States
 
-
-ROMSYS		equ	0
-
-	if	ROMSYS
+    endif 		;CPU_Z180
+    if	CPU_Z80
+
+PHI		equ	AVRCLK/5	;CPU frequency [KHz]
+BAUDCLCK	equ	AVRCLK/10	;Baudrate clock [KHz]
+;BDCLK16		equ
+
+SIOAD	EQU	0bch
+SIOAC	EQU	0bdh
+SIOBD	EQU	0beh
+SIOBC	EQU	0bfh
+
+CTC0	EQU	0f4h
+CTC1	EQU	0f5h
+CTC2	EQU	0f6h
+CTC3	EQU	0f7h
+
+;
+; Init Serial I/O for console input and output (SIO-A)
+;
+; Baudrate clock: 1843200 Hz (Bus connector pin A17)
+;
+; Baudrate   Divider	SIO	CTC
+; ---------------------------------
+; 115200	  16	 16	  1
+;  57600	  32	 16	  2
+;  38400	  48	 16	  3
+;  19200	  96	 16	  6
+;   9600	 192	 16	 12
+;   4800	 384	 16	 24
+;   2400	 768	 16	 48
+;   1200	1536	 16	 96
+;    600	3072	 16	192
+;    300	6144	 64	 92
+
+    endif	; CPU_Z80
+
+    if	ROMSYS
 c$rom		equ	0a5h
 ROM_EN		equ	0C0h
 ROM_DIS		equ	ROMEN+1
+     if CPU_Z180
 CWAITROM 	equ	2 shl MWI0
-	endif
+     endif
+    endif
 
 
 DRSTNUM 	equ	30h		;DDTZ Restart vector (breakpoints)
@@ -50,12 +115,12 @@ co.fifo_len	equ	256
 s1.rx_len	equ	256		;Serial 1 (ASCI1) buffers
 s1.tx_len	equ	256		;
 
-AVRINT5		equ	40h
-AVRINT6		equ	50h
+AVRINT5		equ	4Fh
+AVRINT6		equ	5Fh
 ;PMSG		equ	80h
 
 ;-----------------------------------------------------
-; Definition of (locical) top 2 memory pages
+; Definition of (logical) top 2 memory pages
 
 sysram_start	equ	0FE00h
 stacksize	equ	80