X-Git-Url: http://cloudbase.mooo.com/gitweb/z180-stamp.git/blobdiff_plain/76f079e76b11f63d0b48317dd3450ddbfab784d9..aea51b6c4c93c56715f50e64d424e1181c6d0242:/avr/cmd_cpu.c diff --git a/avr/cmd_cpu.c b/avr/cmd_cpu.c index e5158fd..64dd721 100644 --- a/avr/cmd_cpu.c +++ b/avr/cmd_cpu.c @@ -21,6 +21,11 @@ #include "../z180/cpuinfo.h" #undef const +#define DEBUG_CPU 1 /* set to 1 to debug */ + +#define debug_cpu(fmt, args...) \ + debug_cond(DEBUG_CPU, fmt, ##args) + /* * delay for ms... @@ -32,24 +37,14 @@ static void test_delay(uint32_t count) while (get_timer(ts) <= count); } -uint32_t z80_measure_phi(uint_fast8_t cycles) +static uint32_t z80_measure_phi(uint_fast8_t cycles) { uint16_t ref_stop; uint16_t ref_ovfl; uint8_t x_ovfl; - uint8_t eimsk_save,eicrb_save; uint32_t x_freq; - ATOMIC_BLOCK(ATOMIC_FORCEON) { - /* Save state and disable INT6 */ - eimsk_save = EIMSK; - EIMSK &= ~_BV(INT6); - /* Save state and set INT6 for falling edge */ - eicrb_save = EICRB; - EICRB = (eicrb_save & ~(0b11 << ISC60)) | (0b10 << ISC60); - } - PRR1 &= ~_BV(PRTIM3); TCCR3A = 0; TCCR3B = 0b000<> 32), (uint32_t) (x_tmp & 0xffffffff)); + debug_cpu("TCNT3: %6u, ref_cnt: %9lu\n", TCNT3, ref_cnt); + debug_cpu("x_tmp: %lu %lu\n", (uint32_t) (x_tmp >> 32), (uint32_t) (x_tmp & 0xffffffff)); x_tmp = (x_tmp * getenv_ulong(PSTR(ENV_FMON), 10, F_CPU) + (ref_cnt / 2)) / ref_cnt; - debug("x_tmp: %lu %lu\n", (uint32_t) (x_tmp >> 32), (uint32_t) (x_tmp & 0xffffffff)); + debug_cpu("x_tmp: %lu %lu\n", (uint32_t) (x_tmp >> 32), (uint32_t) (x_tmp & 0xffffffff)); /* round to 5 decimal digits */ int_fast8_t sc = 5; - while (x_tmp >= 100000) { + while (sc > 0 || x_tmp >= 100000) { x_tmp = (x_tmp + 5)/10; sc--; } @@ -132,8 +118,6 @@ uint32_t z80_measure_phi(uint_fast8_t cycles) x_freq *= 10; sc++; } - x_freq += (uint32_t) sc << 28; - /* Stop Timer */ TCCR3B = 0; @@ -142,258 +126,144 @@ uint32_t z80_measure_phi(uint_fast8_t cycles) return x_freq; } -#if 0 -float z80_measure_phi(uint_fast8_t cycles, uint16_t wait_ms) -{ - uint16_t ref_stop; - uint16_t ref_ovfl; - uint8_t x_ovfl; - uint8_t eimsk_save,eicrb_save; - float x_freq; +static const FLASH uint8_t loop_code[] = { +/* 0000 */ 0x00, /* nop */ +/* 0001 */ 0xAF, /* xor a */ +/* 0005 */ 0xD3,0x32, /* out (032h),a ;DCNTL */ +/* 0002 */ 0xD3,0x36, /* out (036h),a ;RCR */ +/* */ /* */ +/* 0006 */ 0xD3,0x40, /* out (040H),a ;Ready */ +/* */ /* */ +/* */ /* ;Z80 Z180(0W) Z180(MaxW) */ +/* 0008 */ /* loop: ;-------------------------- */ +/* 0008 */ 0xDB,0x50, /* in a,(050h) ;11 10 +3*3 19 */ +/* 000A */ 0xC3,0x08,0x00 /* jp loop ;10 9 +3*3 18 */ + /* ;-------------------------- */ + /* ;21 19 37 */ +}; +command_ret_t do_cpu_freq(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int argc, char * const argv[]) +{ - ATOMIC_BLOCK(ATOMIC_FORCEON) { - /* Save state and disable INT6 */ - eimsk_save = EIMSK; - EIMSK &= ~_BV(INT6); - /* Save state and set INT6 for falling edge */ - eicrb_save = EICRB; - EICRB = (eicrb_save & ~(0b11 << ISC60)) | (0b10 << ISC60); - } +#define O_SILENT (1<<0) +#define O_WENV (1<<1) +#define O_LOAD_LOOP (1<<2) +#define O_UNLOAD_LOOP (1<<3) - PRR1 &= ~_BV(PRTIM3); - TCCR3A = 0; - TCCR3B = 0b000<= 100000UL) { - x_freq = (x_freq + 5)/10; - ++sc; - } - while (sc--) - x_freq *= 10; + z80_bus_cmd(Reset); + if (options & O_UNLOAD_LOOP) { + z80_bus_cmd(Request); + z80_write_block(mem_save, 0, ARRAY_SIZE(loop_code)); + z80_bus_cmd(Release); } - - /* Stop Timer */ - TCCR3B = 0; - PRR1 |= _BV(PRTIM3); - ATOMIC_BLOCK(ATOMIC_FORCEON) { - /* Restore INT6 */ -#if 0 /* wtf? */ - eicrb_save = EICRB; - EICRB = (EICRB & ~(0b11 << ISC60)) | (eicrb_save & (0b11 << ISC60)); -#endif - EICRB = eicrb_save; + /* Restore INT5/INT6 */ + if ((eimsk_save & _BV(INT5)) != 0) + EIMSK |= _BV(INT5); if ((eimsk_save & _BV(INT6)) != 0) EIMSK |= _BV(INT6); /* Reset pending int */ + EIFR = _BV(INTF5); EIFR = _BV(INTF6); } - return (int32_t) x_freq; -} + Stat &= ~S_MSG_PENDING; + Stat &= ~S_CON_PENDING; + + if (err) + cmd_error(CMD_RET_FAILURE, err, NULL); + + if (!(options & O_SILENT)) { + uint8_t sc = cpu_freq >> 28; + printf_P(PSTR("%lu %3u\n"), cpu_freq & 0x0fffffff, sc); + } +#if 0 + if (options & O_WENV) { + if (setenv_ulong(PSTR(ENV_CPU_FREQ), cpu_freq)) { + if (!(options & O_SILENT)) + printf_P(PSTR("'SETENV (%S, %lu)' failed!\n"), PSTR(ENV_CPU_FREQ), cpu_freq); + return CMD_RET_FAILURE; + } + } #endif + return CMD_RET_SUCCESS; +} static const FLASH char * const FLASH cpu_strings[] = { - FSTR("Unknown CPU"), + FSTR("Unknown"), FSTR("8080"), FSTR("8085"), FSTR("Z80"), @@ -407,6 +277,7 @@ command_ret_t do_cpuchk(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int a { uint_fast8_t cputype = 0; ERRNUM err = ESUCCESS; + uint8_t eimsk_save; uint8_t ram_save[cpuinfo_length]; if (z80_bus_state() & ZST_RUNNING) { @@ -423,26 +294,41 @@ command_ret_t do_cpuchk(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int a if (argv[1] && (argv[1][0] == 'n')) goto donot; + ATOMIC_BLOCK(ATOMIC_FORCEON) { + /* Save state and disable INT5/INT6 */ + eimsk_save = EIMSK; + EIMSK &= ~_BV(INT6); + EIMSK &= ~_BV(INT5); + } + EIFR = _BV(INTF5); /* Reset pending int */ z80_bus_cmd(Run); clear_ctrlc(); /* forget any previous Control C */ - uint_fast8_t done = 0; - while (done != 0xFF) { - _delay_ms(8); + do { /* check for ctrl-c to abort... */ if (had_ctrlc() || ctrlc()) { err = EINTR; break; } - z80_bus_cmd(Request); - done = z80_read(3); - if (done == 0xFF) - cputype = z80_read(4); - z80_bus_cmd(Release); - } + } while ((EIFR & _BV(INTF5)) == 0); z80_bus_cmd(Reset); + ATOMIC_BLOCK(ATOMIC_FORCEON) { + /* Restore INT5/INT6 */ + if ((eimsk_save & _BV(INT5)) != 0) + EIMSK |= _BV(INT5); + if ((eimsk_save & _BV(INT6)) != 0) + EIMSK |= _BV(INT6); + /* Reset pending int */ + EIFR = _BV(INTF5); + EIFR = _BV(INTF6); + } + Stat &= ~S_MSG_PENDING; + Stat &= ~S_CON_PENDING; z80_bus_cmd(Request); -// z80_write_block(ram_save, 0, cpuinfo_length); + if (z80_read(3) == 0xFF) { + cputype = z80_read(4); + } + z80_write_block(ram_save, 0, cpuinfo_length); z80_bus_cmd(Release); } @@ -569,134 +455,15 @@ command_ret_t do_busack_test(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, return CMD_RET_SUCCESS; } -static const FLASH uint8_t loop_code[] = { -/* 0000 */ 0x00, /* nop */ -/* 0001 */ 0xAF, /* xor a */ -/* 0005 */ 0xD3,0x32, /* out (032h),a ;DCNTL */ -/* 0002 */ 0xD3,0x36, /* out (036h),a ;RCR */ -/* */ /* */ -/* 0006 */ 0xD3,0x40, /* out (040H),a ;Ready */ -/* */ /* */ -/* */ /* ;Z80 Z180(0W) Z180(MaxW) */ -/* 0008 */ /* loop: ;-------------------------- */ -/* 0008 */ 0xDB,0x50, /* in a,(050h) ;11 10 +3*3 19 */ -/* 000A */ 0xC3,0x08,0x00 /* jp loop ;10 9 +3*3 18 */ - /* ;-------------------------- */ - /* ;21 19 37 */ -}; - -command_ret_t do_cpu_freq(cmd_tbl_t *cmdtp UNUSED, uint_fast8_t flag UNUSED, int argc, char * const argv[]) -{ - -#define O_SILENT (1<<0) -#define O_WENV (1<<1) -#define O_LOAD_LOOP (1<<2) -#define O_UNLOAD_LOOP (1<<3) - - uint_fast8_t options = O_LOAD_LOOP | O_UNLOAD_LOOP; - uint_fast8_t lcycles = 19; - uint16_t timeout = 1000; - - uint8_t mem_save[ARRAY_SIZE(loop_code)]; - - int opt; - while ((opt = getopt(argc, argv, PSTR("swnuc:t:"))) != -1) { - switch (opt) { - case 's': - options |= O_SILENT; - break; - case 'w': - options |= O_WENV; - break; - case 'n': - options &= ~O_LOAD_LOOP; - break; - case 'u': - options &= ~O_UNLOAD_LOOP; - break; - case 'c': - lcycles = eval_arg(optarg, NULL); - break; - case 't': - timeout = eval_arg(optarg, NULL); - break; - default: /* '?' */ - return CMD_RET_USAGE; - } - } - if (argc - optind != 0) - return CMD_RET_USAGE; - - if (z80_bus_state() & ZST_RUNNING) { - if (!(options & O_SILENT)) - printf_P(PSTR("Frequency measuring failed. CPU allready running!\n")); - return CMD_RET_FAILURE; - } - - - z80_bus_cmd(Request); - if (options & O_LOAD_LOOP) { - z80_read_block(mem_save, 0, ARRAY_SIZE(loop_code)); - z80_write_block_P(loop_code, 0, ARRAY_SIZE(loop_code)); - } - Stat &= ~S_IO_0X40; /* Reset pending int */ - z80_bus_cmd(Release); - z80_bus_cmd(Run); - - clear_ctrlc(); /* forget any previous Control C */ - ERRNUM err = 0; - - /* Wait for falling edge */ - do { - /* check for ctrl-c to abort... */ - if (had_ctrlc() || ctrlc()) { - err = EINTR; - break; - } - } while ((Stat & S_IO_0X40) == 0); - - uint32_t cpu_freq = 0; - if (!err) - cpu_freq = z80_measure_phi(lcycles); - - z80_bus_cmd(Reset); - if (options & O_UNLOAD_LOOP) { - z80_bus_cmd(Request); - z80_write_block(mem_save, 0, ARRAY_SIZE(loop_code)); - z80_bus_cmd(Release); - } - if (err) - cmd_error(CMD_RET_FAILURE, err, NULL); - - if (!(options & O_SILENT)) { - printf_P(PSTR("%lu %3u\n"), cpu_freq & 0x0fffffff, cpu_freq >> 28); - -// printf_P(PSTR("%f%S\n"), cpu_freq, cpu_freq < 0 ? PSTR("") : PSTR("Hz")); -// if (cpu_freq != 0) -// else -// printf_P(PSTR("No CPU clock or input frequency to low!\n")); - } -#if 0 - if (options & O_WENV) { - if (setenv_ulong(PSTR(ENV_CPU_FREQ), cpu_freq)) { - if (!(options & O_SILENT)) - printf_P(PSTR("'SETENV (%S, %lu)' failed!\n"), PSTR(ENV_CPU_FREQ), cpu_freq); - return CMD_RET_FAILURE; - } - } -#endif - return CMD_RET_SUCCESS; -} - /* - * command table for fat subcommands + * command table for subcommands */ cmd_tbl_t cmd_tbl_cpu[] = { CMD_TBL_ITEM( - chkcpu, CONFIG_SYS_MAXARGS, CTBL_RPT, do_cpuchk, - "Check CPU", + chkcpu, CONFIG_SYS_MAXARGS, CTBL_RPT|CTBL_SUBCMDAUTO, do_cpuchk, + "Check/Identify CPU", "" ), CMD_TBL_ITEM(