X-Git-Url: http://cloudbase.mooo.com/gitweb/z180-stamp.git/blobdiff_plain/889202c46ced1be4fc0db3faf63564722eba2865..0c728c8de88d86247d2a75348e71f5af37838c28:/avr/z180-serv.c diff --git a/avr/z180-serv.c b/avr/z180-serv.c index 56852cb..9b4228a 100644 --- a/avr/z180-serv.c +++ b/avr/z180-serv.c @@ -1,14 +1,30 @@ /* + * (C) Copyright 2014 Leo C. + * + * SPDX-License-Identifier: GPL-2.0+ */ #include "common.h" +#include +#include +#include #include #include "background.h" +#include "env.h" +#include "ff.h" #include "serial.h" #include "z80-if.h" #include "debug.h" +#include "print-utils.h" #include "z180-serv.h" +#include "timer.h" + + +#define DEBUG_CPM_SDIO 0 /* set to 1 to debug */ + +#define debug_cpmsd(fmt, args...) \ + debug_cond(DEBUG_CPM_SDIO, fmt, ##args) @@ -18,11 +34,11 @@ uint8_t z80_get_byte(uint32_t adr) { uint8_t data; - + z80_bus_cmd(Request); data = z80_read(adr); z80_bus_cmd(Release); - + return data; } @@ -51,6 +67,25 @@ uint32_t msg_to_addr(uint8_t *msg) } +static int msg_xmit_header(uint8_t func, uint8_t subf, int len) +{ + z80_memfifo_putc(fifo_msgout, 0xAE); + z80_memfifo_putc(fifo_msgout, len+2); + z80_memfifo_putc(fifo_msgout, func); + z80_memfifo_putc(fifo_msgout, subf); + + return 0; +} + +int msg_xmit(uint8_t func, uint8_t subf, int len, uint8_t *msg) +{ + msg_xmit_header(func, subf, len); + while (len--) + z80_memfifo_putc(fifo_msgout, *msg++); + + return 0; +} + void do_msg_ini_memfifo(uint8_t subf, int len, uint8_t * msg) { (void)len; @@ -67,6 +102,241 @@ void do_msg_char_out(uint8_t subf, int len, uint8_t * msg) putchar(*msg++); } +/* echo message */ +void do_msg_echo(uint8_t subf, int len, uint8_t * msg) +{ + (void)subf; + + /* send re-echo */ + msg_xmit(1, 3, len, msg); +} + +/* ---------------------------------------------------------------------------*/ + +#define MAX_DRIVE 4 +#define BLOCK_SIZE 512 +#define TPA_BASE 0x10000 +#define COMMON_BASE 0xC000 + +struct cpm_drive_s { + uint8_t drv; + uint8_t device; + char *img_name; + FIL fd; +}; + +static uint8_t disk_buffer[BLOCK_SIZE]; +static struct cpm_drive_s drv_table[MAX_DRIVE]; + +/* + db 2 ; disk command + ds 1 ; subcommand (login/read/write) + ds 1 ; @adrv (8 bits) +0 + ds 1 ; @rdrv (8 bits) +1 + ds 3 ; @xdph (24 bits) +2 +*/ + +void do_msg_cpm_login(uint8_t subf, int len, uint8_t * msg) +{ + + FRESULT res = 0; + uint8_t rc = 0; + uint8_t drv; + char *np; + uint8_t result_msg[3]; + + (void)subf; + + if (len != 5) { /* TODO: check adrv, rdrv */ + rc = 0x01; + goto out; + } + + debug_cpmsd("\n## %7lu login: %c:\n", get_timer(0), msg[0]+'A'); + + + drv = msg[0]; + if ( drv>= MAX_DRIVE) { + rc = 0x02; + goto out; + } + +/* + uint32_t dph = ((uint32_t)msg[4] << 16) + ((uint16_t)msg[3] << 8) + msg[2]; +*/ + + if (drv_table[drv].img_name != NULL) { + debug_cpmsd("## %7lu close: '%s'\n", get_timer(0), drv_table[drv].img_name); + f_close(&drv_table[drv].fd); + free(drv_table[drv].img_name); + drv_table[drv].img_name = NULL; + } + + strcpy_P((char *)disk_buffer, PSTR("dsk0")); + disk_buffer[3] = msg[0] + '0'; + if (((np = getenv((char*)disk_buffer)) == NULL) || + ((drv_table[drv].img_name = strdup(np)) == NULL)) { + rc = 0x03; + goto out; + } + + + res = f_open(&drv_table[drv].fd, drv_table[drv].img_name, + FA_WRITE | FA_READ); + + debug_cpmsd("## %7lu open: '%s', (env: '%s'), res: %d\n", get_timer(0), + drv_table[drv].img_name, disk_buffer, res); + +out: + + if (res) + rc |= 0x80; + + result_msg[0] = rc; + result_msg[1] = res; + result_msg[2] = res >> 8; + + if (rc) { + debug_cpmsd("## %7lu error rc: %.02x, res: %d\n", get_timer(0), rc, res); + }; + + /* send result*/ + msg_xmit(2, subf, sizeof(result_msg), result_msg); +} + + +/* + db 2 ; disk command + ds 1 ; subcommand (login/read/write) + ds 1 ; @adrv (8 bits) +0 + ds 1 ; @rdrv (8 bits) +1 + ds 2 ; @trk (16 bits) +2 + ds 2 ; @sect(16 bits) +4 + ds 1 ; @cnt (8 bits) +6 + ds 3 ; phys. transfer addr +7 +*/ + +#define ADRV 0 +#define RDRV 1 +#define TRK 2 +#define SEC 4 +#define CNT 6 +#define ADDR 7 + +void do_msg_cpm_rw(uint8_t subf, int len, uint8_t * msg) +{ + uint8_t drv; + uint32_t addr; + uint32_t pos; + uint8_t secs; + bool dowrite = (subf == 2); + FRESULT res = 0; + uint8_t rc = 0; + bool buserr = 0; + uint8_t result_msg[3]; + + if (len != 10) { /* TODO: check adrv, rdrv */ + rc = 0x01; + goto out; + } + + drv = msg[ADRV]; + if ( drv>= MAX_DRIVE) { + rc = 0x02; + goto out; + } + + secs = msg[CNT]; + addr = ((uint32_t)msg[ADDR+2] << 16) + ((uint16_t)msg[ADDR+1] << 8) + msg[ADDR]; + + + /* TODO: tracks per sector from dpb */ + pos = (((uint16_t)(msg[TRK+1] << 8) + msg[TRK]) * 8 + + ((uint32_t)(msg[SEC+1] << 8) + msg[SEC])) * BLOCK_SIZE; + + debug_cpmsd("## %7lu cpm_rw: %s %c: trk:%4d, sec: %d, pos: %.8lx, secs: %2d, " + "addr: %.5lx\n", get_timer(0), dowrite ? "write" : " read", + msg[ADRV]+'A', ((uint16_t)(msg[TRK+1] << 8) + msg[TRK]), msg[SEC], + pos, msg[CNT], addr); + + res = f_lseek(&drv_table[drv].fd, pos); + while (!res && secs--) { + unsigned int cnt, br; + + /* check bank boundary crossing */ + cnt = 0; + if (addr < (TPA_BASE + COMMON_BASE) && + (addr + BLOCK_SIZE) > (TPA_BASE + COMMON_BASE)) { + cnt = (TPA_BASE + COMMON_BASE) - addr; + } + + if (cnt) { + debug_cpmsd("## %67c addr: %.5lx, cnt: %3d\n", ' ', addr, cnt); + debug_cpmsd("## %67c addr: %.5lx, cnt: %3d\n", ' ', addr+cnt-TPA_BASE, BLOCK_SIZE-cnt); + } + + if (dowrite) { + if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) { + buserr = 1; + break; + } else { + if (cnt) { + z80_read_block(disk_buffer, addr, cnt); + addr = addr + cnt - TPA_BASE; + } + z80_read_block(disk_buffer+cnt, addr, BLOCK_SIZE - cnt); + z80_bus_cmd(Release); + } + res = f_write(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br); + } else { + res = f_read(&drv_table[drv].fd, disk_buffer, BLOCK_SIZE, &br); + if (res == FR_OK && br == BLOCK_SIZE) { + if (!(z80_bus_cmd(Request) & ZST_ACQUIRED)) { + buserr = 1; + break; + } else { + if (cnt) { + z80_write_block(disk_buffer, addr, cnt); + addr = addr + cnt - TPA_BASE; + } + z80_write_block(disk_buffer+cnt, addr, BLOCK_SIZE - cnt); + z80_bus_cmd(Release); + } + } + } + + if (br != BLOCK_SIZE) { + debug_cpmsd("## %7lu f_read res: %d, bytes rd/wr: %u\n", get_timer(0), res, br); + dump_ram(disk_buffer, 0, 64, "Read Data"); + res = -1; + } + + addr += BLOCK_SIZE; + } + + if (dowrite && !res) + res = f_sync(&drv_table[drv].fd); + +out: + if (buserr) { + debug_cpmsd("Bus timeout\n"); + rc = 0x03; + } + if (res) + rc |= 0x80; + + result_msg[0] = rc; + result_msg[1] = res; + result_msg[2] = res >> 8; + + if (rc) { + debug_cpmsd("###%7lu error rc: %.02x, res: %d\n", get_timer(0), rc, res); + } + + /* send result*/ + msg_xmit(2, subf, sizeof(result_msg), result_msg); +} + const FLASH struct msg_item z80_messages[] = { @@ -76,6 +346,15 @@ const FLASH struct msg_item z80_messages[] = { 1, 1, 1, do_msg_char_out}, + { 1, + 2, 2, + do_msg_echo}, + { 2, + 0, 0, + do_msg_cpm_login}, + { 2, + 1, 2, + do_msg_cpm_rw}, { 0xff, /* end mark */ 0, 0, 0}, @@ -101,12 +380,12 @@ void do_message(int len, uint8_t *msg) fct, sub_fct); return; /* TODO: unknown message # */ } - + ++i; } while (fct == z80_messages[i].fct) { - if (sub_fct >= z80_messages[i].sub_min && + if (sub_fct >= z80_messages[i].sub_min && sub_fct <= z80_messages[i].sub_max ) break; ++i; @@ -141,7 +420,7 @@ void check_msg_fifo(void) while ((ch = z80_memfifo_getc(fifo_msgin)) >= 0) { switch (state) { case 0: /* wait for start of message */ - if (ch == 0x81) { + if (ch == 0xAE) { /* TODO: magic number */ msglen = 0; idx = 0; state = 1; @@ -169,26 +448,35 @@ void check_msg_fifo(void) int msg_handling(int state) { uint8_t pending; - - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { + + ATOMIC_BLOCK(ATOMIC_FORCEON) { pending = (Stat & S_MSG_PENDING) != 0; Stat &= ~S_MSG_PENDING; } - + if (pending) { switch (state) { - case 0: + case 0: /* need init */ + /* Get address of fifo_list */ z80_bus_cmd(Request); - uint32_t addr = z80_read(0x40) + + uint32_t fifo_list = z80_read(0x40) + ((uint16_t) z80_read(0x41) << 8) + ((uint32_t) z80_read(0x42) << 16); z80_bus_cmd(Release); - if (addr != 0) { - z80_memfifo_init(fifo_msgin, addr); - state = 1; + if (fifo_list != 0) { + /* Get address of fifo 0 */ + z80_bus_cmd(Request); + uint32_t fifo_addr = z80_read(fifo_list) + + ((uint16_t) z80_read(fifo_list+1) << 8) + + ((uint32_t) z80_read(fifo_list+2) << 16); + z80_bus_cmd(Release); + if (fifo_addr != 0) { + z80_memfifo_init(fifo_msgin, fifo_addr); + state = 1; + } } break; - case 1: + case 1: /* awaiting messages */ check_msg_fifo(); break; } @@ -196,37 +484,14 @@ int msg_handling(int state) return state; } - - -int console_handling(int state) -{ - int ch; - uint8_t pending; - - ATOMIC_BLOCK(ATOMIC_RESTORESTATE) { - pending = (Stat & S_CON_PENDING) != 0; - Stat &= ~S_CON_PENDING; - } - - if (pending) { - while ((ch = z80_memfifo_getc(fifo_conout)) >= 0) { - putchar(ch); - } - } - - return state; -} - - static int handle_msg_handling; void setup_z180_serv(void) { - + handle_msg_handling = bg_register(msg_handling, 0); -// bg_register(console_handling, 0); } void restart_z180_serv(void) @@ -236,27 +501,14 @@ void restart_z180_serv(void) z80_write(0x41, 0); z80_write(0x42, 0); z80_bus_cmd(Release); - - bg_setstat(handle_msg_handling, 0); -} -/*--------------------------------------------------------------------------*/ + for (int i = 0; i < NUM_FIFOS; i++) + z80_memfifo_init(i, 0); + bg_setstat(handle_msg_handling, 0); -#if 0 -void dump_mem(const FLASH uint8_t *addr, uint32_t len) -{ - DBG_P(1, "hdrom dump:"); - while (len) { - DBG_P(1, "\n %.5x:", addr); - for (unsigned i = 0; i<16; i++) - DBG_P(1, " %.2x", *addr++); - len -= len > 16 ? 16 : len; - } - DBG_P(1, "\n"); } -#endif -/*--------------------------------------------------------------------------*/ +/*--------------------------------------------------------------------------*/ const FLASH uint8_t iniprog[] = { 0xAF, // xor a @@ -295,18 +547,15 @@ const FLASH uint8_t test1[] = { 0x21, 0x1E, 0x00, // ld hl,dmclrt ;load DMA registers 0x06, 0x08, // ld b,dmct_e-dmclrt 0x0E, 0x20, // ld c,sar0l - 0xED, 0x93, // otimr + 0xED, 0x93, // otimr 0x3E, 0xC3, // ld a,0c3h ;dst +1, src +1, burst 0xED, 0x39, 0x31, // out0 (dmode),a ; - 0x3E, 0x62, // ld a,062h ;enable dma0, + 0x3E, 0x62, // ld a,062h ;enable dma0, 0xED, 0x39, 0x30, //cl_1: out0 (dstat),a ;copy 64k 0x18, 0xFB, // jr cl_1 ; - 0x00, 0x00, //dmclrt: dw 0 ;src (inc) + 0x00, 0x00, //dmclrt: dw 0 ;src (inc) 0x00, // db 0 ;src 0x00, 0x00, // dw 0 ;dst (inc), 0x00, // db 0 ;dst 0x00, 0x00, // dw 0 ;count (64k) }; - - -