X-Git-Url: http://cloudbase.mooo.com/gitweb/z180-stamp.git/blobdiff_plain/fecee2418b6aea15008ed6d3a856d202d59a5cdb..32154e5a9e9bf0a52269b3715711b76dc8fcac0f:/z180/init.180

diff --git a/z180/init.180 b/z180/init.180
index 0bd37c1..05c24ff 100644
--- a/z180/init.180
+++ b/z180/init.180
@@ -5,10 +5,10 @@
 	extrn $stack
 	extrn charini,?const,?conin
 	extrn ?cono,?conos
-
 	extrn romend
 
 
+	global	iobyte
 	global	isv_sw
 
 	include config.inc
@@ -28,7 +28,8 @@ romstart equ	$
 	org	romstart+0
 	jp start
 
-iobyte:	db	0
+iobyte:	db	2
+
 ; restart vectors
 
 rsti	defl	1
@@ -75,14 +76,13 @@ start:
 
 hwini0:
     if CPU_Z180
-
-	db	3		;count
+	db			;count
 	db	rcr,CREFSH	;configure DRAM refresh
 	db	dcntl,INIWAITS	;wait states
+	db	cbr,SYS$CBR
 	db	cbar,SYS$CBAR
-    else
-	db     0
     endif
+	db     0
 
     if CPU_Z180
 dmclrt:				;clear ram per dma
@@ -95,6 +95,7 @@ nullbyte:
 	db	00h		;dst
 	dw 	0-romend	;count (64k)
 dmct_e:
+	db	0
     endif
 
 
@@ -151,10 +152,10 @@ hw_reset:
 
 kstart:
     if CPU_Z180
+	ld	a,SYS$CBR	;TODO:
+	out0	(cbr),a
 	ld	a,SYS$CBAR
 	out0	(cbar),a
-	ld	a,SYS$CBR
-	out0	(cbr),a
     endif
 
 	ld	sp,$stack	;01e1
@@ -163,9 +164,9 @@ kstart:
 
     if CPU_Z180
      if 0
-	
+
 	ld	hl,dmclrt	;load DMA registers
-	call	io.ini.m
+	call	ioiniml
 	ld	a,0cbh		;01ef	dst +1, src fixed, burst
 	out0	(dmode),a	;01f1
 
@@ -174,7 +175,7 @@ kstart:
 ??cl_1:
 	out0	(dstat),a	;01f9	clear (up to) 64k
 	djnz	??cl_1		;	end of RAM?
-	
+
      endif
     endif
 
@@ -185,142 +186,111 @@ kstart:
 ;	--  wstart  --
 
 wstart:
-	call	sysram_init	;027f
+	call	sysram_init
 	call	ivtab_init
     if CPU_Z180
-	call	prt0_init
+;	call	prt0_init
     endif
 
+	call	msginit
 	call	charini
-	call	bufferinit
 
     if CPU_Z80
 	ld	a,0
 	call	selbnk
     endif
 
-	im 2			;?030e
-	ei			;0282
+	ld	a,INIDONEVAL	;tell others (CP/M) that hardware and fifos
+	ld	(INIDONE),a	;    are allready initialized
 
-	call ?const		;0284
-	call ?const		;0287
-	or a			;028a
-	call nz,?conin		;028d
+	im 2
+	ei
+
+	call ?const
+	call ?const
+	or a
+	call nz,?conin
 
     if CPU_Z180
 	ld e,0			;Sys$Bank
     else
 ; TODO:
     endif
-	jp ddtz			;0290
+	jp ddtz
 
 
     if CPU_Z180
 ; TODO: SYS$CBR
-syscbr:	db	1
+syscbr:	db	0
     endif
 
 ;
 ;----------------------------------------------------------------------
 ;
 
-;TODO: Make a ringbuffer module.
-
-	global	buf.init
+	global	bufinit
 
-buf.init:
-	ld	(ix+o.in_idx),0
+bufinit:
+	ld	(ix+o.in_idx),0		;reset pointers (empty fifo)
 	ld	(ix+o.out_idx),0
-	ld	(ix+o.mask),a
-	ret
-
-;----------------------------------------------------------------------
-if 0
-	extrn	msginit,msg_tx_fifo,msg_rx_fifo
-	extrn	msg.sout
-
-bufferinit:
-
-	ld	de,msg_tx_fifo
-	in0	a,cbr
-	call	log2phys
-	ld	(40h+0),hl
-	ld	(40h+2),a
-
-;	ld	(bufdat+1),hl
-;	ld	(bufdat+3),a
-;	ld	a,1
-;	ld	(bufdat+0),a
-;	ld	hl,inimsg
-;	call	msg.sout
+	ld	a,(ix+o.id)
+	ld	hl,fifolst
+	ld	e,a
+	ld	d,0
+	add	hl,de
+	add	hl,de
+	push	ix
+	pop	de
+	cp	4
+	jr	nc,bfi_skip
+
+	ld	(hl),e
+	inc	hl
+	ld	(hl),d
 
-	ld	de,msg_rx_fifo
-	in0	a,cbr
-	call	log2phys
-	ld	(bufdat+1),hl
-	ld	(bufdat+3),a
-	ld	a,2
-	ld	(bufdat+0),a
-	ld	hl,inimsg
-	call	msg.sout
+bfi_skip:
+	ex	de,hl
+	call	hwl2phy			;get phys. address of fifo
+	ld	c,a
+	ld	a,(ix+o.id)		;fifo id
+	or	a			;test if fifo 0
+	ret	z
 
+	ld	b,a
+	push	bc			;c: bank-addr, b: ignored
+	push	hl			;address
+	ld	c,0
+	push	bc			;c: function, b:subf
+	ld	b,5
+	ld	h,c
+	ld	l,c
+	add	hl,sp
+	call	msg.sm
+	pop	hl
+	pop	hl
+	pop	hl
 	ret
 
-inimsg:
-	db	inimsg_e - $ - 1
-	db	0AEh
-	db	inimsg_e - $ - 1
-	db	0
-bufdat:
-	db	0
-	dw	0
-	db	0
-inimsg_e:
-
-endif
+	public	fifolst
+fifolst :
+	rept 4
+	 dw	0
+	endm
 
 ;----------------------------------------------------------------------
 
+	extrn	msg.sm
 	extrn	msginit,msg.sout
 	extrn	mtx.fifo,mrx.fifo
-	extrn	co.fifo,ci.fifo
+	extrn	ff.init,co.fifo,ci.fifo
 
 
-bufferinit:
+fifoinit:
     if CPU_Z180
-	call	msginit
 
-	ld	hl,buffers
-	ld	b,buftablen
-bfi_1:
-	ld	a,(hl)
-	inc	hl
-	ld	(bufdat+0),a
-	ld	e,(hl)
-	inc	hl
-	ld	d,(hl)
-	inc	hl
-	push	hl
-
-	or	a
-	jr	nz,bfi_2
-	call	hw_log2phys
-	ld	(40h+0),hl
-	ld	(40h+2),a
-	out0	(AVRINT5),a
-	jr	bfi_3	
-bfi_2:
-	call	hw_log2phys
-	ld	(bufdat+1),hl
-	ld	(bufdat+3),a
-	ld	hl,inimsg
-	call	msg.sout
-bfi_3:
-	pop	hl
-	djnz	bfi_1
 	ret
 
-    else
+    else ;CPU_Z180
 
 	call	msginit
 
@@ -340,7 +310,7 @@ bfi_1:
 	jr	nz,bfi_2
 
 	ld	a,(@cbnk)
-	call	bnk2phys
+	call	bnk2phy
 
 	ld	(40h+0),hl
 	ld	(40h+2),a
@@ -349,7 +319,7 @@ bfi_1:
 bfi_2:
 
 	ld	a,(@cbnk)
-	call	bnk2phys
+	call	bnk2phy
 
 	ld	(bufdat+1),hl
 	ld	(bufdat+3),a
@@ -361,27 +331,7 @@ bfi_3:
 	ret
     endif
 
-buffers:
-	db	0
-	dw	mtx.fifo
-	db	1
-	dw	mrx.fifo
-	db	2
-	dw	co.fifo
-	db	3
-	dw	ci.fifo
-buftablen equ	($ - buffers)/3
-
-inimsg:
-	db	inimsg_e - $ -1
-	db	0AEh
-	db	inimsg_e - $ -1
-	db	0
-bufdat:
-	db	0
-	dw	0
-	db	0
-inimsg_e:
+
 
 
 ;
@@ -422,6 +372,12 @@ ivt_i1:
 
 ;----------------------------------------------------------------------
 
+; Reload value for 10 ms Int. (0.1KHz):
+; tc10ms = phi/prescale/0.1KHz  = phi / (prescale/10)
+
+PRT_TC10MS	equ	18432 / (PRT_PRE/10)
+
+
     if CPU_Z180
 prt0_init:
 	ld	a,i
@@ -434,7 +390,7 @@ prt0_init:
 	inc	hl
 	ld	(hl),high iprt0
 	ld	hl,prt0itab
-	call	io.ini.m
+	call	ioiniml
 	ret
 
 prt0itab:
@@ -444,6 +400,7 @@ prt0itab:
 	dw	PRT_TC10MS
 	db	M_TIE0+M_TDE0	;enable timer 0 interrupt and down count.
 prt0it_e:
+	db	0
     endif
 
 
@@ -451,24 +408,55 @@ prt0it_e:
 ;----------------------------------------------------------------------
 ;
 
+    if CPU_Z180
 io.ini:
+     if 0
 	push	bc
-    if CPU_Z180
-
 	ld	b,0		;high byte port adress
+ioi_nxt:
 	ld	a,(hl)		;count
 	inc	hl
 	or	a
 	jr	z,ioi_e
-ioi_1:
+
 	ld	c,(hl)		;port address
 	inc	hl
+ioi_r:
 	outi
 	inc	b		;outi decrements b
 	dec	a
-	jr	nz,ioi_1
-ioi_e:	
+	jr	nz,ioi_r
+	jr	ioi_nxt
+ioi_e:
+	pop	bc
+	ret
+
+     else ;(if 1/0)
+
+	push	bc
+	jr	ioi_nxt
+ioi_l:
+	ld	c,(hl)		;port address
+	inc	hl
+	inc	c
+ioi_r:
+	dec	c		;otim increments c
+	otim
+	jr	z,ioi_r
+ioi_nxt:
+	ld	b,(hl)		;count
+	inc	hl
+	inc	b		;stop if count == 0
+	djnz	ioi_l
+	pop	bc
+	ret
+
+     endif ;(1/0)
+
     else
+
+io.ini:
+	push	bc
 	jr	ioi_nxt
 ioi_l:
 	ld	c,(hl)		;port address
@@ -483,16 +471,28 @@ ioi_nxt:
 	pop	bc
 	ret
 
+;----------------------------------------------------------------------
+
     if CPU_Z180
-io.ini.m:
+
+	global ioiniml
+
+ioiniml:
 	push	bc
+	xor	a
+ioml_lp:
 	ld	b,(hl)
 	inc	hl
+	cp	b
+	jr	z,ioml_e
+
 	ld	c,(hl)
 	inc	hl
 	otimr
+	jr	ioml_lp
+ioml_e:
 	pop	bc
-	ret
+	ret	z
     endif
 
 io.ini.l:
@@ -504,115 +504,110 @@ io.ini.l:
 ;
     if CPU_Z180
 
-; a: Bank number
+;--------------------------------------------------------------------
+; Return the BBR value for the given bank number
 ;
+; in  a: Bank number
 ; out a: bbr value
 
 bnk2log:
-	push	bc
-	ld	b,a
-	ld	c,CA
-	mlt	bc
-	add	a,10h
-	pop	bc
-	ret
+	or	a		;
+	ret	z		; Bank 0 is at physical address 0
+
+	push	bc		;
+	ld	b,a		;
+	ld	c,CA		;
+	mlt	bc		;
+	ld	a,c		;
+	add	a,10h		;
+	pop	bc		;
+	ret			;
 
-; de: Log. Address
-;  a: Bank number
+;--------------------------------------------------------------
+
+;in  hl: Log. Address
+;     a: Bank number
 ;
 ;out ahl: Phys. (linear) Address
 
 
-bnk2phys:
+bnk2phy:
 	call	bnk2log
-
 	; fall thru
+
 ;--------------------------------------------------------------
 ;
-; de: Log. Address
+; hl: Log. Address
 ;  a: Bank base (bbr)
 ;
-; OP: ahl = (a<<12) + (d<<8) + e
+;	     2           0       0
+;	     0   6       8       0
+; hl	          hhhhhhhhllllllll
+;  a	+     bbbbbbbb
+;
+; OP: ahl = (a<<12) + (h<<8) + l
 ;
 ;out ahl: Phys. (linear) Address
 
-
-log2phys:
+log2phy:
 	push	bc		;
+l2p_i:
 	ld	c,a		;
 	ld	b,16		;
-	mlt	bc		;  bc = a<<4
-	ld	l,d		;4
-	ld	h,0		;6
-	add	hl,bc		;7  bc + d == a<<4 + d
-	ld	a,h		;4
-	ld	h,l		;4
-	ld	l,e		;4
-	pop	bc		;
-	ret			;
-
-    if 0
-    
-log2phys:
-	push	bc		;
-	ld	b,a		;
-	ld	c,16		;
 	mlt	bc		; bc = a<<4
-	ld	a,c		;4
-	add	a,h		;4
-	ld	h,a		;4
-	ld	a,b		;4
-	adc	a,0		;6
+	ld	a,c		;
+	add	a,h		;
+	ld	h,a		;
+	ld	a,b		;
+	adc	a,0		;
 	pop	bc		;
 	ret			;
 
-    endif
 ;--------------------------------------------------------------
 ;
-; de: Log. Address
-; 
+; hl: Log. Address
+;
 ;
 ; OP: ahl = (bankbase<<12) + (d<<8) + e
 ;
 ;out ahl: Phys. (linear) Address
 
+	public	hwl2phy
 
-hw_log2phys:
+hwl2phy:
 	push	bc		;
-	in0	c,(cbar)
-	ld	a,d
-	or	00fh
+	in0	c,(cbar)	;
+	ld	a,h		;
+	or	00fh		; log. addr in common1?
 	cp	c
 	jr	c,hlp_1
-	in0	c,(cbr)
-	jr	hlp_e
+
+	in0	a,(cbr)		; yes, cbr is address base
+	jr	hl2p_x
 hlp_1:
-	ld	b,16
+	ld	b,16		; log. address in baked area?
 	mlt	bc
-	ld	a,d
+	ld	a,h
 	cp	c
-	ld	c,0
-	jr	c,hlp_e
-	in0	c,(bbr)
-hlp_e:	
-	ld	b,16		;
-	mlt	bc		;bc = a<<4
-	ld	l,d		;
-	ld	h,0		;
-	add	hl,bc		;bc + d == a<<4 + d
-	ld	a,h		;
-	ld	h,l		;
-	ld	l,e		;
-	pop	bc		;
+	jr	c,hlp_2
+	in0	a,(bbr)		; yes, bbr is address base
+	jr	hl2p_x
+hlp_2:
+	xor	a		; common1
+hl2p_x:
+	jr	nz,l2p_i
+
+	pop	bc		; bank part is 0, no translation
 	ret			;
 
-    else
 
-;
+
+    else	;CPU_Z180
+
 ;----------------------------------------------------------------------
 ;
 
-bnk2phys:
+bnk2phy:
 	sla	h
 	jr	nc,b2p_1		;A15=1 --> common
 	ld	a,3
@@ -649,18 +644,18 @@ topcodsys:
 ; Save cbar
 
 isv_sw:				;
-	ex (sp),hl		;	save hl, return adr in hl
+	ex (sp),hl		;save hl, 'return adr' in hl
 	push de			;
 	push af			;
-	ex de,hl		;
+	ex de,hl		;'return address' in de
 	ld hl,0			;
 	add hl,sp		;
 	ld a,h			;
 	cp 0f8h			;
-	jr nc,isw_1		;
+	jr nc,isw_1		;stack allready in top ram
 	ld sp,$stack		;
 isw_1:
-	push hl			;
+	push hl			;save user stack pointer
 	in0 h,(cbar)		;
 	push hl			;
 	ld a,SYS$CBAR		;
@@ -916,4 +911,3 @@ mark_55AA equ 0 - 2 - 4		;2 byte for trap stack
 
 
 	end
-