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authorukw2011-09-12 10:02:26 +0000
committerukw2011-09-12 10:02:26 +0000
commit476267f4e9854c75c890799df29225e61623c3cc (patch)
tree2372f195b08c708708854ad7ea1f3bad638c7eae /irsndmain.c
parent2b27d37bdb090a10a5f3bc6175984aafbe146035 (diff)
downloadirmp-476267f4e9854c75c890799df29225e61623c3cc.zip
version 2.0.0-pre7: added support for ATtiny84, added ISR in main.c, corrected timer1_init() for ATTiny85, added NEC16 & NEC42 for IRSND.
git-svn-id: svn://mikrocontroller.net/irmp@80 aeb2e35e-bfc4-4214-b83c-9e8de998ed28
Diffstat (limited to 'irsndmain.c')
-rw-r--r--irsndmain.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/irsndmain.c b/irsndmain.c
index 213a4f8..ff4838c 100644
--- a/irsndmain.c
+++ b/irsndmain.c
@@ -30,18 +30,18 @@
void
timer1_init (void)
{
-#if defined (__AVR_ATtiny85__) // ATtiny85:
- OCR1A = (F_CPU / (2 * F_INTERRUPTS) / 2) - 1; // compare value: 1/28800 of CPU frequency, presc = 2
- TCCR1 = (1 << CTC1) | (1 << CS11); // switch CTC Mode on, set prescaler to 2
-#else // ATmegaXX:
- OCR1A = (F_CPU / (2 * F_INTERRUPTS)) - 1; // compare value: 1/28800 of CPU frequency
- TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1
+#if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85:
+ OCR1A = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4
+ TCCR1 = (1 << CTC1) | (1 << CS11) | (1 << CS10); // switch CTC Mode on, set prescaler to 4
+#else // ATmegaXX:
+ OCR1A = (F_CPU / F_INTERRUPTS) - 1; // compare value: 1/15000 of CPU frequency
+ TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1
#endif
#ifdef TIMSK1
- TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare
+ TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare
#else
- TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare
+ TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare
#endif
}