Disable all peripheral functions globally. Enable used functions when needed.

3 files changed, 39 insertions, 28 deletions

diff --git a/avr/i2c.c b/avr/i2c.c
index dbb5da1..e0e5a19 100644
--- a/avr/i2c.c
+++ b/avr/i2c.c
@@ -1,6 +1,6 @@
 
-/* 
- * I2C (TWI) master interface. 
+/*
+ * I2C (TWI) master interface.
  */
 
 #include "common.h"
@@ -48,33 +48,33 @@
  * TWSTO: TWI STOP Condition Bit
  * TWEN:  TWI Enable Bit
  * TWIE:  TWI Interrupt Enable
- * 
+ *
  * 	(1<<TWEN)|(1<<TWIE)|(1<<TWINT)
  * 	(1<<TWEN)|(1<<TWIE)|(1<<TWINT)|           (1<<TWEA)
  * 	(1<<TWEN)|(1<<TWIE)|(1<<TWINT)
- * 
+ *
  * default:
  * 	(1<<TWEN)|          (1<<TWINT)|           (1<<TWSTO)
- * 
+ *
  * Init:
  * 	(1<<TWEN)
- * 
+ *
  * start read/write:
  * 	(1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWSTA)
  * 	(1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWSTA)
  * 	(1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWSTA)
  * 	(1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWSTA)
- * 
+ *
  * wait ready:
  * 	 (1<<TWIE)|(1<<TWSTO)
  *
  *
  *
- *i2c_result	
+ *i2c_result
  *
  *	0b10000000	Busy (Transmission in progress)
  *	0b01000000	Timeout
- *	0b00001000	Start transmitted 
+ *	0b00001000	Start transmitted
  *	0b00000100	Slave acknowledged address
  *	0b00000010	Data byte(s) transmitted/received
  *	0b00000001	Transmission completed
@@ -86,8 +86,8 @@
 #define TWI_C_DISABLE		0x00
 #define TWI_C_ENABLE		(1<<TWEN)
 
- 
- 
+
+
  typedef struct i2c_msg_s {
 	uint8_t stat;
  #define XMIT_DONE	(1<<0)
@@ -114,7 +114,7 @@ ISR(TWI_vect)
 	tmp_stat = xmit.stat;
 
 	uint8_t twsr = TWSR;
-		
+
 	switch (twsr & 0xf8) {
 
 	case TWI_START:
@@ -223,7 +223,7 @@ void i2c_init(uint32_t speed)
 {
 	twps = 0;
 	uint32_t tmp_twbr = F_CPU /2 / speed - 8;
-	
+
 	while (tmp_twbr > 255) {
 		tmp_twbr >>= 4;
 		twps += 1;
@@ -231,6 +231,8 @@ void i2c_init(uint32_t speed)
 	debug_cond((twps > 3), "*** TWCLK too low: %lu Hz\n", speed);
 
 	twbr = (uint8_t) tmp_twbr;
+
+	PRR0 &= ~_BV(PRTWI);
 	_init();
 }
 
@@ -239,7 +241,7 @@ int_fast8_t i2c_waitready(void)
 {
 	uint32_t timer = get_timer(0);
 	uint8_t timeout = 0;
-	
+
 	do {
 		if (get_timer(timer) >= 30) {
 			timeout = TIMEOUT;
@@ -252,7 +254,7 @@ int_fast8_t i2c_waitready(void)
 #if DEBUG_I2C
 	dump_ram((uint8_t *) &xmit, 4, "=== i2c_wait ready: (done)");
 	_delay_ms(30);
-#endif	
+#endif
 	return xmit.stat;
 }
 
@@ -275,11 +277,11 @@ int i2c_send(uint8_t chip, uint16_t addr, uint8_t alen, uint8_t *buffer, int8_t
 	for (n = len + i; i < n; i++)
 		xmit.buf[i] = *buffer++;
 	xmit.len = i;
-	
+
 #if DEBUG_I2C
 	dump_ram((uint8_t *) &xmit, 0x20, "=== i2c_send");
 	_delay_ms(30);
-#endif	
+#endif
 	/* Enable TWI, TWI int and initiate start condition */
 	TWCR = (1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWSTA);
 
@@ -339,13 +341,13 @@ int i2c_write(uint8_t chip, unsigned int addr, uint_fast8_t alen,
 				uint8_t *buffer, uint_fast8_t len)
 {
 	int rc;
-	
+
 	if ((alen > 2) || (1 + alen + len > CONFIG_SYS_I2C_BUFSIZE)) {
 		debug("** i2c_write: buffer overflow, alen: %u, len: %u\n",
 			alen, len);
 		return -1;
 	}
-	
+
 	i2c_send(chip, addr, alen, buffer, len);
 	rc = i2c_waitready();
 
@@ -362,10 +364,10 @@ int i2c_read(uint8_t chip, unsigned int addr, uint_fast8_t alen,
 			alen, len);
 		return -1;
 	}
-	
+
 	if (alen != 0) {
 		i2c_send(chip, addr, alen, NULL, 0);
-	}	
+	}
 	rc = i2c_recv(chip, buffer, len);
 
 	return !((rc & (XMIT_DONE|DATA_ACK)) == (XMIT_DONE|DATA_ACK));
diff --git a/avr/main.c b/avr/main.c
index 65622cc..9d7c89f 100644
--- a/avr/main.c
+++ b/avr/main.c
@@ -77,11 +77,15 @@ void setup_avr(void)
 	MCUCR = _BV(JTD);
 	MCUCR = _BV(JTD);
 
-	/* disable unused peripherals */
-	PRR0 = _BV(PRTIM0) | _BV(PRADC);
+	/* Disable peripherals. Enable individually in respective init function. */
+	PRR0 = _BV(PRTWI) |
+		_BV(PRTIM2) | _BV(PRTIM0) | _BV(PRTIM1) |
+		_BV(PRSPI) | _BV(PRUSART0) | _BV(PRADC);
+
 	PRR1 = _BV(PRTIM5) | _BV(PRTIM4) | _BV(PRTIM3) |
 		_BV(PRUSART3) | _BV(PRUSART2) | _BV(PRUSART1);
 
+
 	/* disable analog comparator */
 	ACSR = _BV(ACD);
 	/* Ports */
@@ -91,7 +95,7 @@ void setup_avr(void)
 	CLKPR = 0;
 
 	/* Timer */
-
+	PRR0 &= ~_BV(PRTIM2);
 	OCR2A = F_CPU / 256 / 1000 - 1; /* Timer2: 1000Hz interval (OC2A) */
 	TCCR2A = (0b10 << WGM20);	/* CTC Mode */
 	TCCR2B = (0b110 << CS20);	/* Prescaler 256 */
diff --git a/avr/z80-if.c b/avr/z80-if.c
index c0f128e..dd0dd96 100644
--- a/avr/z80-if.c
+++ b/avr/z80-if.c
@@ -144,6 +144,7 @@ struct bits {
 #define MASK(n)	((1<<(n))-1)
 #define SMASK(w,s) (MASK(w) << (s))
 
+#define LOWSPEED	50000
 
 
 typedef union {
@@ -158,6 +159,13 @@ static zstate_t zstate;
 /*--------------------------------------------------------------------------*/
 
 static
+uint8_t is_lowspeed()
+{
+	return (TCCR1B & 7) < 2 &&
+		OCR1A > (F_CPU / 2 / LOWSPEED);
+}
+
+static
 void z80_setup_clock(void)
 {
 	/* ZCLK: Output and low */
@@ -206,12 +214,10 @@ int z80_clock_set(unsigned long freq)
 	TCCR1A = (0b01 << COM1C0) | (0b00 << WGM10);
 	TCCR1B = (0b01 << WGM12)  | ((prescale+1) << CS10);
 
-	if (ocrval == 0) {
-//		TCCR1C |= _BV(FOC1C);
+	if (ocrval == 0)
 		ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
 			TCNT1 = 0xFFFF;
 		}
-	}
 
 	PINB |= _BV(6);		/* Debug */
 
@@ -229,7 +235,6 @@ uint32_t z80_clock_get(void)
 		else
 			count *= 8;
 		pre--;
-
 	}
 
 	return F_CPU/count;