Define fifos: msg_tx_fifo, msg_rx_fifo

3 files changed, 12 insertions, 167 deletions

diff --git a/avr/main.c b/avr/main.c
index ba8a672..2955630 100644
--- a/avr/main.c
+++ b/avr/main.c
@@ -61,6 +61,11 @@ void print_reset_reason(void)
 
 #endif
 
+ISR(INT5_vect)
+{
+	Stat |= S_MSG_PENDING;
+}
+
 static
 void setup_avr(void)
 {
@@ -99,6 +104,11 @@ void setup_avr(void)
 	OCR3A = F_CPU / 1000 - 1;	/* Timer3: 1000Hz interval (OC3A) */
 	TCCR3B = (0b01<<WGM32)|(0b001<<CS30); /* CTC Mode, Prescaler 1 */
 	TIMSK3 = _BV(OCIE3A);		/* Enable TC2.oca interrupt */
+
+	/* INT5 falling edge */
+	EICRB = (EICRB & ~(0b11 << ISC50)) | 0b10 << ISC50;
+	/* Enable INT5 */
+	EIMSK |= _BV(INT5);
 }
 
 static
diff --git a/avr/z180-serv.c b/avr/z180-serv.c
index 193b23f..c920326 100644
--- a/avr/z180-serv.c
+++ b/avr/z180-serv.c
@@ -17,79 +17,6 @@
 
 /*--------------------------------------------------------------------------*/
 
-uint32_t z80_sram_cmp(uint32_t addr, uint32_t length, uint8_t wval, int inc)
-{
-	uint8_t rval;
-	int_fast8_t errors = 0;
-	
-	DBG_P(1, "SRAM: Check 0x%.5lx byte... ", length);
-	while (length--) {
-		if ((rval = z80_read(addr)) != wval) {
-			if (errors == 0) { 
-				DBG_P(1, "\nSRAM: Address   W    R\n" \
-				         "      ------------------\n");
-			}
-			errors++;
-			if (errors > 20) {
-				DBG_P(1, "      ...\n");
-				break;
-			}
-			DBG_P(1, "      0x%.5lx  0x%.2x 0x%.2x\n", addr, wval, rval);
-		}
-		addr++;
-		wval += inc;
-	}
-	DBG_P(1, "Done.\n");
-
-	return addr;
-}
-
-void z80_sram_fill(uint32_t addr, uint32_t length, uint8_t startval, int inc)
-{
-	printf("SRAM: Write 0x%.5lx byte... ", length);
-	while (length--) {
-		z80_write(addr, startval);
-		++addr; 
-		startval += inc;
-	}
-	printf("Done.\n");
-}
-
-
-#if 0
-void z80_sram_fill_string(uint32_t addr, int length, const char *text)
-{
-	char c;
-	const char *p = text;
-
-	while (length--) {
-		z80_write(addr++, c = *p++);
-		if (c == 0)
-			p = text;
-	}
-}
-
-
-uint32_t z80_sram_cmp_string(uint32_t addr, int length, const char *text)
-{
-	char c;
-	const char *p = text;
-
-	while (length--) {
-		c = *p++;
-		if (z80_read(addr) != c)
-			break;
-		++addr;
-		if (c == 0)
-			p = text;
-	}
-	return addr;
-}
-
-const char * const qbfox = "Zhe quick brown fox jumps over the lazy dog!";
-const char * const qbcat = "Zhe quick brown fox jumps over the lazy cat!";
-
-#endif
 
 uint8_t z80_get_byte(uint32_t adr)
 {
diff --git a/avr/z80-if.c b/avr/z80-if.c
index 3a2c184..d14d9d7 100644
--- a/avr/z80-if.c
+++ b/avr/z80-if.c
@@ -518,7 +518,8 @@ int z80_memfifo_is_empty(const fifo_t f)
 {
 	int rc = 1;
 
-	if (fifo_dsc[f].base != 0) {
+	if (((Stat & S_MSG_PENDING) || f != fifo_in) && fifo_dsc[f].base != 0)
+	{
 
 		uint32_t adr = fifo_dsc[f].base + FIFO_INDEX_IN;
 		uint8_t idx;
@@ -577,96 +578,3 @@ void z80_memfifo_putc(fifo_t f, uint8_t val)
 	z80_write(fifo_dsc[f].base+FIFO_INDEX_IN, fifo_dsc[f].idx_in);
 	z80_bus_cmd(Release);
 }
-
-/*--------------------------------------------------------------------------*/
-/*
-	TODO: Rewrite msg_fifo routines for AVR
-*/
-
-static struct {
-	uint32_t base;
-	//uint8_t  idx_out, idx_in;
-	uint16_t count;
-	uint8_t  buf[256];
-	} msg_fifo;
-
-/*--------------------------------------------------------------------------*/
-
-#if 0
-
-static void tim1_setup(void)
-{
-	RCC_APB2RSTR |= RCC_APB2RSTR_TIM1RST;
-	RCC_APB2RSTR &= ~RCC_APB2RSTR_TIM1RST;
-
-	TIM1_CR1 = 0;
-
-	TIM1_SMCR = 0
-	/*	| TIM_SMCR_ETP			*/
-	/*	| TIM_SMCR_ETF_CK_INT_N_2	*/
-		| TIM_SMCR_TS_ETRF
-		| TIM_SMCR_SMS_OFF
-		;
-
-	TIM1_DIER = TIM_DIER_TDE;
-
-
-	TIM1_CCMR1 = 0
-		| TIM_CCMR1_OC1M_FORCE_LOW
-		| TIM_CCMR1_CC1S_OUT;
-
-	TIM1_SMCR |= TIM_SMCR_SMS_TM;
-}
-
-#endif
-
-/*--------------------------------------------------------------------------*/
-
-void z80_setup_msg_fifo(void)
-{
-
-
-//	gpio_set_mode(P_BUSACK, GPIO_MODE_INPUT,
-//		GPIO_CNF_INPUT_FLOAT, GPIO_BUSACK | GPIO_IOCS1);
-
-//...
-
-//	msg_fifo.count = NELEMS(msg_fifo.buf);
-	msg_fifo.count = 0;
-	msg_fifo.base = 0;
-
-}
-
-
-void z80_init_msg_fifo(uint32_t addr)
-{
-
-DBG_P(1, "z80_init_msg_fifo: %lx\n", addr);
-
-	z80_bus_cmd(Request);
-	z80_write(addr+FIFO_INDEX_OUT, z80_read(addr+FIFO_INDEX_IN));
-	z80_bus_cmd(Release);
-	msg_fifo.base = addr;
-}
-
-
-int z80_msg_fifo_getc(void)
-{
-	int c = -1;
-
-#if 0
-	if (msg_fifo.count != (NELEMS(msg_fifo.buf) /*- DMA1_CNDTR4 */ )) {
-		c = msg_fifo.buf[msg_fifo.count];
-		if (++msg_fifo.count == NELEMS(msg_fifo.buf))
-			msg_fifo.count = 0;
-
-		if (msg_fifo.base != 0) {
-			z80_bus_cmd(Request);
-			z80_write(msg_fifo.base+FIFO_INDEX_OUT, msg_fifo.count);
-			z80_bus_cmd(Release);
-		}
-	}
-#endif
-
-	return c;
-}