Integrate changes from z80-support branch

5 files changed, 206 insertions, 187 deletions

diff --git a/z180/Makefile b/z180/Makefile
index f676826..bd46639 100644
--- a/z180/Makefile
+++ b/z180/Makefile
@@ -1,6 +1,6 @@
 
 
-SRC :=  r3init.180 ddtz.180
+SRC :=  init.180 ddtz.180
 SRC += fifoio.180 msgbuf.180 ser1-i.180 console.180
 SRC += romend.180
 
@@ -70,7 +70,7 @@ define cpm-link =
 endef
 
 #Use:   MAKESYM Filename[.ext][/PXXXX][/DXXXX][/CXXXX]
-#egrep '^[[:xdigit:]]{4}[[:space:]]+[[:xdigit:]]{4}[[:space:]]+D.*r3init\.rel' hdrom.map
+#egrep '^[[:xdigit:]]{4}[[:space:]]+[[:xdigit:]]{4}[[:space:]]+D.*init\.rel' hdrom.map
 define cpm-mksym =
 COMMAND="$(CPMEMU) makesym -$^ -/P -D"; \
 OUTPUT=$$(mktemp); echo $${COMMAND}; \
diff --git a/z180/Tupfile b/z180/Tupfile
index bb88946..3105c94 100644
--- a/z180/Tupfile
+++ b/z180/Tupfile
@@ -2,7 +2,7 @@ include_rules
 
 PROG	= hdrom
 
-SRC 	= r3init.180 
+SRC 	= init.180 
 SRC	+= ddtz.180
 #SRC	+= fifoio.180 msgbuf.180 ser1-i.180 console.180
 SRC	+= msgbuf-a.180 conbuf-a.180 ser1-i.180 bioscio.180 chario.180
diff --git a/z180/config.inc b/z180/config.inc
index 9cef051..390d3bc 100644
--- a/z180/config.inc
+++ b/z180/config.inc
@@ -1,7 +1,17 @@
+;-----------------------------------------------------

+; CPU and BANKING types

+

 

+CPU_Z180	equ	1		; 0 = Z80, else Z180

+ROMSYS		equ	0

 

-FOSC		equ	9216		;Oscillator frequency [KHz]

-PHI		equ	FOSC*2		;CPU frequency

+AVRCLK		equ	18432		;[KHz]

+

+	if CPU_Z180

+

+;-----------------------------------------------------

+FOSC		equ	AVRCLK/2	;Oscillator frequency [KHz]

+PHI		equ	FOSC*2		;CPU frequency (clock doubler enabled)

 

 ;-----------------------------------------------------

 ; Programmable Reload Timer (PRT)

@@ -27,15 +37,50 @@ BANKS		equ	18		;max nr. of banks
 CREFSH		equ	0		;Refresh rate register (disable refresh)

 CWAITIO		equ	3 shl IWI0	;Max I/O Wait States, 0 Memory Wait States

 

-

-ROMSYS		equ	0

+	else	; Z80

+

+PHI		equ	AVRCLK/5	;CPU frequency [KHz]

+BAUDCLCK	equ	AVRCLK/10	;Baudrate clock [KHz]

+;BDCLK16		equ

+

+SIOAD	EQU	0bch

+SIOAC	EQU	0bdh

+SIOBD	EQU	0beh

+SIOBC	EQU	0bfh

+

+CTC0	EQU	0f4h

+CTC1	EQU	0f5h

+CTC2	EQU	0f6h

+CTC3	EQU	0f7h

+

+;

+; Init Serial I/O for console input and output (SIO-A)

+;

+; Baudrate clock: 1843200 Hz (Bus connector pin A17)

+;

+; Baudrate   Divider	SIO	CTC

+; ---------------------------------

+; 115200	  16	 16	  1

+;  57600	  32	 16	  2

+;  38400	  48	 16	  3

+;  19200	  96	 16	  6

+;   9600	 192	 16	 12

+;   4800	 384	 16	 24

+;   2400	 768	 16	 48

+;   1200	1536	 16	 96

+;    600	3072	 16	192

+;    300	6144	 64	 92

+

+	endif	; CPU_Z180

 

 	if	ROMSYS

 c$rom		equ	0a5h

 ROM_EN		equ	0C0h

 ROM_DIS		equ	ROMEN+1

+	if CPU_Z180

 CWAITROM 	equ	2 shl MWI0

 	endif

+	endif

 

 

 DRSTNUM 	equ	30h		;DDTZ Restart vector (breakpoints)

@@ -50,8 +95,8 @@ co.fifo_len	equ	256
 s1.rx_len	equ	256		;Serial 1 (ASCI1) buffers

 s1.tx_len	equ	256		;

 

-AVRINT5		equ	40h

-AVRINT6		equ	50h

+AVRINT5		equ	4Fh

+AVRINT6		equ	5Fh

 ;PMSG		equ	80h

 

 ;-----------------------------------------------------

diff --git a/z180/ddtz.180 b/z180/ddtz.180
index 10fecf8..5f8bf20 100644
--- a/z180/ddtz.180
+++ b/z180/ddtz.180
@@ -2,14 +2,18 @@
 	.z80

 

 	extrn	?const,?conin,?cono

+	extrn	getiff

+	extrn	selbnk,@cbnk

 

 	global	ddtz,bpent

 	global	$stack

 

 

 	include config.inc

+	if CPU_Z180

 	include	z180reg.inc

 	include z180.lib

+	endif

 

 BS	equ	08h

 TAB	equ	09h

@@ -51,10 +55,6 @@ comend	macro
 	endif

 	endm

 

-; repeat execution of last common code snippet

-comrep	macro

-	call	?exclst

-	endm

 

 

 

@@ -97,7 +97,7 @@ ddtz:
 	ld	sp,$stack

 	ld	a,(wstrtflg)		;check warm start flag

 	or	a

-	jr	nz,ddtz_w

+;;;	jr	nz,ddtz_w

 

 	exx

 	ld	hl,sysramc

@@ -105,14 +105,12 @@ ddtz:
 	ld	bc,topcodend-topcodbeg

 	ldir

 

-	ld	hl,vartab

-	ld	de,ddtram

-	ld	bc,vartabe-vartab

-	ldir

 	exx

 

+	if CPU_Z180

 	ld	a,e

 	ld	(ubbr),a

+	endif

 

 ddtz_w:

 	ld hl,MSG		;073c

@@ -295,7 +293,7 @@ l085ch:
 	ld (hl),a		;

 	cp ' '			;

 	jr nc,l0869h		;

-	ld a,'^'		;Controle characters

+	ld a,'^'		;Controll characters

 	call $co		;

 	ld a,(hl)		;

 	add a,'@'		;

@@ -918,7 +916,8 @@ do_op_sub:
 	jr l0b58h		;0b5e

 

 do_op_mlt:

-	push bc			;0b60

+	push	bc

+	if CPU_Z180

 	ld	b,h

 	ld	c,e

 	ld	h,e

@@ -930,8 +929,24 @@ do_op_mlt:
 	add	a,c

 	add	a,e

 	ld	h,a

-	pop bc			;0b72

-	jr l0b58h		;0b73

+	else

+	 ld	b,h

+	 ld	c,l

+	 ld	hl,0

+	 ld	a,16

+mlt_1:

+	 add	hl,hl

+	 ex	de,hl

+	 add	hl,hl

+	 ex	de,hl

+	 jr	nc,mlt_2

+	 add	hl,bc

+mlt_2:

+	 dec	a

+	 jr	nz,mlt_1

+	endif

+	pop	bc

+	jr	l0b58h

 

 do_op_div:

 	call DIV_HL_DE		;0b75

@@ -1636,67 +1651,80 @@ sub_0f91h:
 

 bpddtz:

 	if ROMSYS

-	 ld h,ROMEN		;0fcd

-	 jr z,l0fd2h		;0fcf

-	 inc h			;0fd1

+	 ld	h,ROMEN

+	 jr	z,l0fd2h

+	 inc	h

 l0fd2h:

-	 push hl		;0fd2	save rom enable stat

+	 push	hl		;save rom enable stat

+	endif

+	push	bc

+	push	de

+	push	ix

+	push	iy

+	ld	a,i

+	ld	h,a

+	ld	l,000h

+	push	hl		;save I register

+

+	if CPU_Z180

+	 ld	a,0f3h		;DI

+	 jp	po,l0fe6h

+	 ld	a,0fbh		;EI

+	else			;NMOS Z80 design flaw

+	 call	getiff		;return Carry set, if INTs are disabled.

+	 ld	a,0f3h		;DI

+	 jr	c,l0fe6h

+	 ld	a,0fbh		;EI

 	endif

-	push bc			;0fd3

-	push de			;0fd4

-	push ix			;0fd5

-	push iy			;0fd7

-	ld a,i			;0fd9

-	ld h,a			;0fdb

-	ld l,000h		;0fdc

-	push hl			;0fde

-	ld a,0f3h		;0fdf	DI

-	jp po,l0fe6h		;0fe1

-	ld a,0fbh		;0fe4	EI

 l0fe6h:

-	ld (reg.iff),a		;0fe6

-	ld hl,ivtab		;0fe9

-	ld a,h			;0fec

-	ld i,a			;0fed

-	call ddtei		;0fef

-	ex af,af'		;0ff2

-	push af			;0ff3

-	exx			;0ff4

-	push bc			;0ff5

-	push de			;0ff6

-	push hl			;0ff7

-	call bp.unset		;0ff8

-	in0 a,(itc)		;0ffb

-	jp p,l1017h		;0ffe

-	res TRAP,a		;1001

-	out0 (itc),a		;1003

-	bit UFO,a		;1006

-	jr z,l1011h		;1008

-	ld hl,(REG.PC)		;100a

-	dec hl			;100d

-	ld (REG.PC),hl		;100e

+	ld	(reg.iff),a

+	ld	hl,ivtab

+	ld	a,h

+	ld	i,a

+	call	ddtei

+	ex	af,af'

+	push	af

+	exx

+	push	bc

+	push	de

+	push	hl

+	call	bp.unset

+	if CPU_Z180

+	 in0	a,(itc)

+	 jp	p,l1017h

+	 res	TRAP,a

+	 out0	(itc),a

+	 bit	UFO,a

+	 jr	z,l1011h

+	 ld	hl,(REG.PC)

+	 dec	hl

+	 ld	(REG.PC),hl

 l1011h:

-	ld hl,MSG_trap		;1011

-	call PSTR		;1014

+	 ld	hl,MSG_trap

+	 call	PSTR

 l1017h:

-	ld a,(XBFE8)		;1017

-	dec a			;101a

-	jr z,l1051h		;101b

-	call inchar		;101d

-	jr c,l102eh		;1020

-	call sub_1059h		;1022

-	and a			;1025

-	jp z,l1183h		;1026

-	and 083h		;1029

-	jp z,l284ah		;102b

+	endif

+

+	ld	a,(XBFE8)

+	dec	a

+	jr	z,l1051h

+	call	inchar

+	jr	c,l102eh

+	call	sub_1059h

+	and	a

+	jp	z,l1183h

+	and	083h

+	jp	z,l284ah

 l102eh:

-	call sub_0e68h		;102e

+	call	sub_0e68h

 	call prnt_cpustat	;1031

-	jp DDTZML		;1034

+	jp	DDTZML

 

+	if CPU_Z180

 MSG_trap:

 	DB	CR,LF,'Undefined opcode trap'

 	DB	CR,LF,0

+	endif

 

 l1051h:

 	ld (XBFE8),a		;1051

@@ -1830,30 +1858,6 @@ l1144h:
 	ld l,(ix+002h)		;114e

 	ld h,(ix+003h)		;1151

 

-	if 0

-

-	comst			;1154

-	 ld a,(hl)		;1158

-	comend

-	ld (ix+001h),a		;1159

-	ld a,(ddtrst)		;115c

-	comst			;115f

-	ld (hl),a		;1163

-	comend

-	and 038h		;1164

-	ld h,000h		;1166

-	ld l,a			;1168

-	ld a,0c3h		;1169

-	comrep			;116b

-	inc hl			;116e

-	ld de,bpent		;116f

-	ld a,e			;1172

-	comrep			;1173

-	inc hl			;1176

-	ld a,d			;1177

-	comrep			;1178

-

-	else

 

 	ld a,(ddtrst)		;115c

 	comst			;115f

@@ -1873,7 +1877,6 @@ l1144h:
 	ld (hl),d		;1177

 	comend

 

-	endif

 	

 l117bh:

 	ld de,BP_SIZE		;117b

@@ -2146,8 +2149,15 @@ sub_1315h:
 	ret			;1329

 

 b_0x132A_start:

+	if ROMSYS

+	 DC	'ROMSEL'

+	endif

+	if CPU_Z180

 	DC	'CBAR'

 	DC	'BBR'

+	else

+	 DC	'BNK'

+	endif

 	DC	'BC'''

 	DC	'DE'''

 	DC	'HL'''

@@ -2179,15 +2189,21 @@ b_0x132A_start:
 	DC	'I'

 	DC	'F'''

 	DC	'F'

-	if ROMSYS

-	 DC	'ROMSEL'

-	endif

 	DB	0

 b_0x136C_start:

+	if ROMSYS

+	 defb 000h		;13cf

+	 defw uromen		;13d0

+	endif

+	if CPU_Z180

 	defb 000h		;136c

 	defw ucbar		;136d

 	defb 000h		;136f

 	defw ubbr		;1370

+	else

+	 defb 000h		;136f

+	 defw ubnk		;1370

+	endif

 	defb 003h		;1372

 	defw reg.c2		;1373

 	defb 003h		;1375

@@ -2250,10 +2266,6 @@ b_0x136C_start:
 	defw reg.f2		;13ca

 	defb 000h		;13cc

 	defw reg.f		;13cd

-	if ROMSYS

-	 defb 000h		;13cf

-	 defw uromen		;13d0

-	endif

 CMD.S:

 	ld hl,(lst.S)		;13d2

 	call get_lastarg_def	;13d5

@@ -2303,6 +2315,7 @@ CMD.I:
 	ld (lst.IP),hl		;1427

 	ld b,h			;142a

 	ld c,l			;142b

+	if CPU_Z180

 	ld a,b			;142c

 	or a			;142d

 	jr nz,l1442h		;142e

@@ -2317,6 +2330,7 @@ l143fh:
 	ld a,(hl)		;143f

 	jr l1444h		;1440

 l1442h:

+	endif

 	in a,(c)		;1442

 l1444h:

 	push af			;1444

@@ -2339,6 +2353,7 @@ CMD.O:
 	ld (lst.OP),hl		;146c

 	ld b,h			;146f

 	ld c,l			;1470

+	if CPU_Z180

 	ld a,b			;1471

 	or a			;1472

 	jr nz,l1489h		;1473

@@ -2352,13 +2367,16 @@ CMD.O:
 	cp cbr			;1484

 	jp z,ERROR		;1486

 l1489h:

+	endif

 	pop af			;1489

 	out (c),a		;148a

 	ret			;148c

+	if CPU_Z180

 l148dh:

 	pop af			;148d

 	ld (hl),a		;148e

 	ret			;148f

+	endif

 

 CMD.V:

 	call get_arg3		;1490	get from, size, to

@@ -6093,10 +6111,14 @@ l28dbh:
 	pop bc			;28f8

 	pop af			;28f9

 	ex (sp),hl		;28fa

-?exclst:

+	if CPU_Z180

 	push hl			;28fb

 	ld hl,(ubbr)		;2900

 

+	else

+	 push af			;28fb

+	 ld a,(ubnk)		;2900

+	endif

 	if ROMSYS

 	 push af		;28fc

 	 ld a,(uromen)		;28fd

@@ -6114,178 +6136,100 @@ ddtram:
 ; The following 2 params are changeable by user.

 ; Should these moved to top ram?

 ;

-ddtrst:	inidat			;

-	rst	DRSTNUM		;rst used by ddtz

-	inidate			;

-ddtei:	inidat			;

-	ei			;ints enabled/disabled while ddtz is running

+ddtrst:	rst	DRSTNUM		;rst used by ddtz

+ddtei:	ei			;ints enabled/disabled while ddtz is running

 	ret			;

-	inidate			;

 offs.pc:

-	inidat	

 	dw	TPA	

-	inidate

 offs.@:

-	inidat

 	dw	0	

-	inidate

 CMD_ERR:

-	inidat

 	dw	0	

-	inidate

 CMD_RPT:

-	inidat

 	dw	DDTZML	

-	inidate

 ci.buf:

-	inidat

 	db	80	

 	rept	83

 	db	0

 	endm

-	inidate

 CON.COL:

-	inidat

 	db 	0	

-	inidate

 XA747:

-	inidat

 	db	0	

-	inidate

 bp_tab:

-	inidat

 	rept	BP_CNT	

 	db	0,0

 	dw	0,0,0

 	endm

 BP_SIZE	equ	8

-	inidate

 sexp1:

-	inidat

 	dw	sexpbuf	

-	inidate

 sexp2:

-	inidat

 	dw	sexpbuf	

-	inidate

 sexpbuf:

-	inidat

 	rept	128	

 	db	0

 	endm

-	inidate

 sexpbufe:

 

 msg.Y:

-	inidat

 	dc	'Y0'	

-	inidate

 reg.Y:

-	inidat

 	rept	10	

 	dw	0

 	endm

-	inidate

 lst.S:

-	inidat

 	dw	0	

-	inidate

 lst.IP:

-	inidat

 	dw	0	

-	inidate

 lst.OP:

-	inidat

 	dw	0	

-	inidate

 lst.OD:

-	inidat

 	db	0

-	inidate

 lst.Qj:

-	inidat

 	db	0

-	inidate

 lst.D:

-	inidat

 	dw	0	

-	inidate

 HILOD:

-	inidat

 	dw	0	

-	inidate

 MAXLOD:

-	inidat

 	dw	0	

-	inidate

 XB068:

-	inidat

 	dw	0	

-	inidate

 lst.A:

-	inidat

 	dw	0	

-	inidate

 XB06C:

-	inidat

 	dw	0	

-	inidate

 pfx.IXY:

-	inidat

 	db	000h	

-	inidate

 is.pfx.IXY:

-	inidat

 	db	000h	

-	inidate

 lst.L:

-	inidat

 	dw	0	

-	inidate

 XBE01:

-	inidat

 	dw	0	

-	inidate

 XBE03:

-	inidat

 	db	000h	

-	inidate

 XBEDD:

-	inidat

 	ret		;ret cc

 	and a		

 	pop hl		

 	inc hl		

 	jp (hl)		

-	inidate

 XBFE8:

-	inidat

 	db	0	

-	inidate

 TCFLG:

-	inidat

 	db	0	

-	inidate

 XBFEA:

-	inidat

 	db	0	

-	inidate

 TCCSTR:

-	inidat

 	dw	0	

-	inidate

 TCNFLG:

-	inidat

 	db	0	

-	inidate

 TRJFLG:

-	inidat

 	db	0	

-	inidate

 wstrtflg:

-	inidat

 	db	1

-	inidate

 

 	cseg

 vartabe:

@@ -6322,8 +6266,13 @@ reg.b:	db	0		; 0fe61h
 udcntl:	 db	CWAITIO		; 0fe62h	(mem-, io- wait)

 uromen:	 db	ROM_DIS		; 0fe63h

 	endif

+	if CPU_Z180

 ubbr:	db	0		; 0fe64h

 ucbar:	db	USR$CBAR	; 0fe65h

+	else

+	 db	0		; 0fe64h

+ubnk:	 db	0		; 0fe65h

+	endif

 reg.f:	db	0		; 0fe66h

 reg.a:	db	0		; 0fe67h

 reg.l:	db	0		; 0fe68h

@@ -6334,10 +6283,15 @@ $go:
 	if	ROMSYS

 	 out (000h),a		;064c fe6c

 	 out0 (dcntl),l		;064e

-	 pop hl			;0651

+	 pop hl

 	endif

+	if CPU_Z180

 	out0 (cbar),h		;0652

 	out0 (bbr),l		;0655

+	else

+	 ld a,h

+	 call selbnk

+	endif

 	pop af			;0658

 	pop hl			;0659

 	ld sp,(reg.sp)		;065a

@@ -6355,11 +6309,20 @@ bpent:
 	ld (reg.sp),sp		;066a

 	ld sp,reg.l		;066e

 	push af			;0671

+	if CPU_Z180

 	in0 h,(cbar)		;0672

 	in0 l,(bbr)		;0675

-	push hl			;0678

 	ld a,SYS$CBAR		;0679

 	out0 (cbar),a		;067b

+;;;	 TODO: bbr?

+	else

+	 ld a,(@cbnk)

+	 ld h,a

+	 xor a

+	 ld l,a

+	 call selbnk

+	endif

+	 push hl		;0678

 

 	if ROMSYS

 	 in0 l,(dcntl)		;067e

@@ -6379,15 +6342,26 @@ bpent:
 	 pop af			;069a

 	endif

 

+	if CPU_Z180

 	out0 (cbar),h		;0694

 	out0 (bbr),l		;0697

 	pop hl			;069b

+	else

+	 call selbnk

+	 pop af

+	endif

 ?exeit:

 	ds ?lcmax+2

 	push af			;069f

+	if CPU_Z180

 	ld a,SYS$CBAR		;06a0

 	out0 (cbar),a		;06a2

 

+;;;	 TODO: bbr?

+	else

+	 xor a

+	 call selbnk

+	endif

 	if ROMSYS

 	 ld a,ROM_EN		;06a5

 	 out (000h),a		;06a7

diff --git a/z180/r3init.180 b/z180/init.180
index 9edeaf2..9edeaf2 100644
--- a/z180/r3init.180
+++ b/z180/init.180