Enable X2 Clock Multiplier, disable Clock Divider

3 files changed, 63 insertions, 57 deletions

diff --git a/z180/config.inc b/z180/config.inc
index b03761c..b5df1cc 100644
--- a/z180/config.inc
+++ b/z180/config.inc
@@ -1,7 +1,7 @@
 

 

-FOSC		equ	18432		;Oscillator frequency [KHz]

-PHI		equ	FOSC/2		;CPU frequency 

+FOSC		equ	9216		;Oscillator frequency [KHz]

+PHI		equ	FOSC*2		;CPU frequency

 

 ;-----------------------------------------------------

 ; Programmable Reload Timer (PRT)

@@ -54,7 +54,7 @@ s1.tx_len	equ	256		;
 PMSG		equ	80h

 

 ;-----------------------------------------------------

-; Definition of (locical) top 2 memory pages 

+; Definition of (locical) top 2 memory pages

 

 sysram_start	equ	0FE00h

 stacksize	equ	80

@@ -72,7 +72,7 @@ iv2tab		equ	ivtab + 2*9
 o.mask		equ	-3

 o.in_idx	equ	-2

 o.out_idx	equ	-1

-	

+

 	.lall

 

 mkbuf	macro	name,size

@@ -80,7 +80,7 @@ mkbuf	macro	name,size
     .printx Error: buffer ^size must be power of 2 and in range 0..256!

     name&.mask equ ;wrong size error

   else

-    ds 3	

+    ds 3

     name:: ds size

     name&.mask equ low (size-1)

     if size ne 0

@@ -92,9 +92,9 @@ endm
 

 ;-----------------------------------------------------

 

-inidat	macro	

+inidat	macro

 	cseg

-??ps.a	defl	$	

+??ps.a	defl	$

 	endm

 

 inidate	macro

diff --git a/z180/r3init.180 b/z180/r3init.180
index 7ba9a0c..8156ed7 100644
--- a/z180/r3init.180
+++ b/z180/r3init.180
@@ -13,7 +13,7 @@
 	include config.inc

 	include	z180reg.inc

 	include z180.lib

-	

+

 ;CR	equ	0dh

 

 

@@ -22,7 +22,7 @@
 

 	cseg

 

-	jp start		

+	jp start

 

 ; restart vectors

 

@@ -44,7 +44,7 @@ $crom:	 defb c$rom		;
 dmclrt:				;clear ram per dma

 	db	dmct_e-dmclrt-2 ;

 	db	sar0l		;first port

-	dw	nullbyte	;src (fixed) 

+	dw	nullbyte	;src (fixed)

 nullbyte:

 	db 	000h		;src

 	dw	romend		;dst (inc), start after "rom" code

@@ -73,9 +73,9 @@ start:
 	jp bpent		;0044	  yes, handle

 

 ??st01:

-	ld a,i			;0047	I register == 0 ? 

+	ld a,i			;0047	I register == 0 ?

 	jr z,??st02		;004b     yes, harware reset

-	pop af			;004d	

+	pop af			;004d

 	jp bpent		;004e	  no, allready set up

 

 ??st02:

@@ -85,6 +85,11 @@ start:
 	ld	a,CWAITIO

 	out0	(dcntl),a	;	wait states

 

+	ld	a,M_NCD		;No Clock Divide

+	out0	(ccr),a

+	ld	a,M_X2CM	;X2 Clock Multiplier

+	out0	(cmr),a

+

 ; search warm start mark

 

 	ld ix,mark_55AA		;00b8	; top of common area

@@ -93,7 +98,7 @@ start:
 	ld a,071h		;00bc

 	ex af,af'		;00be	;for cbr = 0x70 downto 0x40

 swsm_l:

-	ex af,af'		;00bf	

+	ex af,af'		;00bf

 	dec a			;00c0

 	cp 03fh			;00c1

 	jr z,kstart		;00c3	;  break (mark not found)

@@ -125,9 +130,9 @@ kstart:
 ??f_0:

 	out0	(cbr),a		;00f9

 

-	ld	(ix+0),a	;0103	

+	ld	(ix+0),a	;0103

 	cpl

-	ld	(ix+1),a	;0103	

+	ld	(ix+1),a	;0103

 	cpl

 	add	a,8		;010a	next 'bank'

 	cp	078h		;010c	stop at 078000

@@ -153,7 +158,7 @@ kstart:
 	add	a,8

 	cp	078h		;	stop at 078000

 	jr	nz,??cp_0

-	

+

 ;

 ;  ram test found 1 or more error free blocks (32k)

 ;

@@ -178,7 +183,7 @@ ramok:
 alloc:

 	out0	(cbr),c		;01de

 	ld	sp,$stack	;01e1

-	

+

 ; Clear RAM using DMA0

 

 	ld	hl,dmclrt	;load DMA registers

@@ -187,13 +192,13 @@ alloc:
 	out0	(dmode),a	;01f1

 

 	ld	b,512/64

-	ld	a,062h		;01f4	enable dma0, 

+	ld	a,062h		;01f4	enable dma0,

 ??cl_1:

 	out0	(dstat),a	;01f9	clear (up to) 64k

 	djnz	??cl_1		;	end of RAM?

-	

+

 ; Init bank manager

-	

+

 	ld	hl,banktabsys	;020f

 	ld	(hl),c		;	Common area

 	inc	hl		;0213

@@ -211,7 +216,7 @@ l0218h:
 	ld	(hl),0e0h	;	mark as sys ("rom"/monitor)

 	inc	hl

 	djnz	??a_0

-	

+

 	rr	d		;	shift out bit for block 0

 	rr	e		;

 	ld	c,15		;022c	15*32k remaining blocks

@@ -220,14 +225,14 @@ l022eh:
 	rr	d		;

 	rr	e

 	adc	a,0		;	==> 0xff : block ok

-	ld	b,32/4		;	32k == 8 * 4k	

+	ld	b,32/4		;	32k == 8 * 4k

 l0236h:

 	ld	(hl),a		;

 	inc	hl		;

 	djnz	l0236h		;

 	dec	c		;

 	jr	nz,l022eh	;next 32k block

-	

+

 	ld	hl,memalv+0ch	;memalv+0ch

 	ld	a,(banktabsys)	;

 	call	add_hl_a

@@ -239,7 +244,7 @@ l024ah:
 	ld	(hl),0efh	;alloc common

 	call	gencrc_alv

 

-	ld	hl,0000h	;bank # 

+	ld	hl,0000h	;bank #

 	ld	bc,0f0fh	;  size (?) (4k blocks)

 	xor	a		;

 	call	sub_0420h	;alloc mem for bank 0

@@ -284,11 +289,11 @@ wstart:
 	call $cists		;0287

 	or a			;028a

 	call nz,$ci		;028d

-	

-	ld a,(banktab)		;	

-	ld e,a			;	

+

+	ld a,(banktab)		;

+	ld e,a			;

 	jp ddtz			;0290

-	

+

 

 ;

 ;----------------------------------------------------------------------

@@ -297,7 +302,7 @@ wstart:
 ;TODO: Make a ringbuffer module.

 

 	global	buf.init

-	

+

 buf.init:

 	ld	(ix+o.in_idx),0

 	ld	(ix+o.out_idx),0

@@ -314,7 +319,7 @@ buf.init:
 

 bufferinit:

 	call	 msginit

-	

+

 	ld	hl,buffers

 	ld	bc,0300h

 bfi_1:

@@ -339,13 +344,13 @@ bfi_1:
 	rept	20

 	db	0

 	endm

-	

+

 buffers:

 	dw	msg_fifo

 	dw	tx.buf

 	dw	rx.buf

-	

-inimsg:	

+

+inimsg:

 	db	inimsg_e - $ -2

 	db	PMSG

 	db	81h

@@ -384,7 +389,7 @@ ivtab_init:
 	ld	d,high sp.int0

 	ld	a,low  sp.int0

 	ld	b,9

-ivt_i1:	

+ivt_i1:

 	ld	(hl),a

 	inc	l

 	ld	(hl),d

@@ -408,7 +413,7 @@ prt0_init:
 	ld	hl,prt0itab

 	call	io.ini.m

 	ret

-	

+

 prt0itab:

 	db	prt0it_e-prt0itab-2

 	db	tmdr0l

@@ -443,10 +448,10 @@ io.ini.m:
 	inc	hl

 	ld	c,(hl)

 	inc	hl

-	otimr	

-	pop	bc	

+	otimr

+	pop	bc

 	ret

-	

+

 io.ini.l:

 ;

 

@@ -536,7 +541,7 @@ checkcrc_alv:
 ;

 ;    ret:

 ;	a: 	0  == ok

-;		1  == 

+;		1  ==

 ;		2  == no bank # in requested range

 ;		ff == crc error

 ;

@@ -544,7 +549,7 @@ checkcrc_alv:
 sub_0420h:

 	call checkcrc_alv	;0420

 	jr nz,l049ch		;0424	crc error, tables corrupt

-	

+

 	call sub_049dh		;0427	bank # in req. range available?

 	jr c,l0499h		;042a

 	push ix			;042c

@@ -569,7 +574,7 @@ l0441h:
 	djnz l043dh		;0442

 	jr l0464h		;0444

 l0446h:

-	push hl			;0446	

+	push hl			;0446

 	pop ix			;0447	free blocks start here

 	ld e,000h		;0449

 	jr l0451h		;044b

@@ -583,12 +588,12 @@ l0451h:
 	djnz l044dh		;0453

 	jr l0464h		;0455

 

-; end of free blocks run. 

+; end of free blocks run.

 

 l0457h:

 	ld a,d			;0457

 	cp e			;0458	nr of blocks >= requested ?

-	jr nc,l0441h		;0459	

+	jr nc,l0441h		;0459

 

 	ld d,e			;045b

 	push ix			;045c

@@ -660,7 +665,7 @@ l04a1h:
 	inc e			;04a1	test next #

 	ld a,d			;04a2

 	cp e			;04a3

-	jr c,l04b1h		;04a4	

+	jr c,l04b1h		;04a4

 	ld a,e			;04a6

 	ld hl,memalv		;04a7

 	ld bc,alv_len		;04aa

@@ -721,7 +726,7 @@ log2phys:
 	mlt	bc		;bc = a<<4

 	ld	l,d		;

 	ld	h,0		;

-	add	hl,bc		;bc + d == a<<4 + d 

+	add	hl,bc		;bc + d == a<<4 + d

 	ld	a,h		;

 	ld	h,l		;

 	ld	l,e		;

@@ -737,11 +742,11 @@ log2phys:
 ;

 

 add_hl_a:

-	add a,l	

-	ld l,a	

-	ret nc	

-	inc h	

-	ret	

+	add a,l

+	ld l,a

+	ret nc

+	inc h

+	ret

 

 ; ---------------------------------------------------------

 

@@ -753,7 +758,7 @@ topcodsys:
 ; Trampoline for interrupt routines in banked ram.

 ; Switch stack pointer to "system" stack in top ram

 ; Save cbar

-	

+

 isv_sw:				;

 	ex (sp),hl		;	save hl, return adr in hl

 	push de			;

@@ -848,7 +853,7 @@ sysrame:
 tim_ms:	db	0

 tim_s:	dw	0

 	.dephase

-	

+

 ;-----------------------------------------------------

 

 	dseg

@@ -864,7 +869,7 @@ memalv:
 alv_len	equ	$-memalv

 crc_len	equ	$-banktabsys

 

-crc_memalv:	

+crc_memalv:

 	ds	2	;

 

 	cseg

diff --git a/z180/z180reg.inc b/z180/z180reg.inc
index 616138c..5bbd088 100644
--- a/z180/z180reg.inc
+++ b/z180/z180reg.inc
@@ -51,10 +51,10 @@ stat1	equ	IOBASE+05h	;ASCI Status Channel 1
 	b2m TDRE,1		;Transmit Data Register Empty

 	b2m TIE,0		;Transmit Interrupt Enable

 

-tdr0	equ	IOBASE+06h	;ASCI Transmit Data 

-tdr1	equ	IOBASE+07h	;ASCI Transmit Data 

-rdr0	equ	IOBASE+08h	;ASCI Receive Data 

-rdr1	equ	IOBASE+09h	;ASCI Receive Data 

+tdr0	equ	IOBASE+06h	;ASCI Transmit Data

+tdr1	equ	IOBASE+07h	;ASCI Transmit Data

+rdr0	equ	IOBASE+08h	;ASCI Receive Data

+rdr1	equ	IOBASE+09h	;ASCI Receive Data

 

 cntr	equ	IOBASE+0Ah	;CSI/O Control Register

 trdr	equ	IOBASE+0Bh	;CSI/O Transmit/Receive Data Register

@@ -94,6 +94,7 @@ cmr	equ	IOBASE+1Eh	;Clock Mutiplier Register
 	b2m LNC,6		;Low Noise Crystal

 

 ccr	equ	IOBASE+1Fh	;CPU Control Register

+	b2m NCD	7		;No Clock Divide

 

 sar0l	equ	IOBASE+20h	;DMA Src Adr Register Channel 0

 sar0h	equ	IOBASE+21h	;