diff options
Diffstat (limited to 'stm32/z80-if.c')
| -rw-r--r-- | stm32/z80-if.c | 140 |
1 files changed, 92 insertions, 48 deletions
diff --git a/stm32/z80-if.c b/stm32/z80-if.c index a9ce884..409c32a 100644 --- a/stm32/z80-if.c +++ b/stm32/z80-if.c @@ -57,13 +57,17 @@ AFIO_MAPR_SPI1_REMAP */ +#include <stdio.h> + #include <libopencm3/stm32/gpio.h> #include <libopencm3/stm32/rcc.h> #include <libopencm3/stm32/timer.h> #include <libopencm3/stm32/dma.h> +#include "debug.h" #include "z80-if.h" + /* Number of array elements */ #define NELEMS(x) (sizeof x/sizeof *x) @@ -433,60 +437,78 @@ void z80_write_block(uint8_t *src, uint32_t dest, uint32_t length) 019E' tx.buf_end equ $-1 ; last byte */ -#define fifo_bufsize_mask -3 -#define fifo_index_in -2 -#define fifo_index_out -1 -#if 1 +typedef struct __attribute__((packed)) { + uint8_t mask; + uint8_t in_idx; + uint8_t out_idx; + uint8_t buf[]; +} zfifo_t; + + + +#define FIFO_BUFSIZE_MASK -3 +#define FIFO_INDEX_IN -2 +#define FIFO_INDEX_OUT -1 + static struct { uint32_t base; uint8_t idx_out, idx_in, mask; - } fifo_dsc[2]; + } fifo_dsc[NUM_FIFOS]; -void z80_memfifo_init(void) + +void z80_memfifo_init(const fifo_t f, uint32_t adr) { + +DBG_P(2, "z80_memfifo_init: %i, %lx\n", f, adr); + + fifo_dsc[f].base = adr; + z80_request_bus(); - fifo_dsc[fifo_in].base = tx_fifo; - fifo_dsc[fifo_in].idx_out = z80_read(tx_fifo+fifo_index_out); - fifo_dsc[fifo_in].idx_in = z80_read(tx_fifo+fifo_index_in); - fifo_dsc[fifo_in].mask = z80_read(tx_fifo+fifo_bufsize_mask); - - fifo_dsc[fifo_out].base = rx_fifo; - fifo_dsc[fifo_out].idx_out = z80_read(rx_fifo+fifo_index_out); - fifo_dsc[fifo_out].idx_in = z80_read(rx_fifo+fifo_index_in); - fifo_dsc[fifo_out].mask = z80_read(rx_fifo+fifo_bufsize_mask); + + fifo_dsc[f].mask = z80_read(adr + FIFO_BUFSIZE_MASK); + fifo_dsc[f].idx_in = z80_read(adr + FIFO_INDEX_IN); + fifo_dsc[f].idx_out = z80_read(adr + FIFO_INDEX_OUT); + z80_release_bus(); } -#endif -int z80_memfifo_is_empty(fifo_t f) + +int z80_memfifo_is_empty(const fifo_t f) { - uint32_t adr = fifo_dsc[f].base+fifo_index_in; - uint8_t idx; - - z80_request_bus(); - idx = z80_read(adr); - z80_release_bus(); + int rc = 1; + + if (fifo_dsc[f].base != 0) { + + uint32_t adr = fifo_dsc[f].base + FIFO_INDEX_IN; + uint8_t idx; + + z80_request_bus(); + idx = z80_read(adr); + z80_release_bus(); + rc = idx == fifo_dsc[f].idx_out; + } - return idx == fifo_dsc[f].idx_out; + return rc; } -int z80_memfifo_is_full(fifo_t f) +int z80_memfifo_is_full(const fifo_t f) { - int rc; - - z80_request_bus(); - rc = ((fifo_dsc[f].idx_in + 1) & fifo_dsc[f].mask) - == z80_read(fifo_dsc[f].base+fifo_index_out); - z80_release_bus(); + int rc = 1; + if (fifo_dsc[f].base != 0) { + z80_request_bus(); + rc = ((fifo_dsc[f].idx_in + 1) & fifo_dsc[f].mask) + == z80_read(fifo_dsc[f].base+FIFO_INDEX_OUT); + z80_release_bus(); + } return rc; } -uint8_t z80_memfifo_getc(fifo_t f) +uint8_t z80_memfifo_getc(const fifo_t f) { uint8_t rc, idx; @@ -497,7 +519,7 @@ uint8_t z80_memfifo_getc(fifo_t f) idx = fifo_dsc[f].idx_out; rc = z80_read(fifo_dsc[f].base+idx); fifo_dsc[f].idx_out = ++idx & fifo_dsc[f].mask; - z80_write(fifo_dsc[f].base+fifo_index_out, fifo_dsc[f].idx_out); + z80_write(fifo_dsc[f].base+FIFO_INDEX_OUT, fifo_dsc[f].idx_out); z80_release_bus(); return rc; @@ -515,23 +537,23 @@ void z80_memfifo_putc(fifo_t f, uint8_t val) idx = fifo_dsc[f].idx_in; z80_write(fifo_dsc[f].base+idx, val); fifo_dsc[f].idx_in = ++idx & fifo_dsc[f].mask; - z80_write(fifo_dsc[f].base+fifo_index_in, fifo_dsc[f].idx_in); + z80_write(fifo_dsc[f].base+FIFO_INDEX_IN, fifo_dsc[f].idx_in); z80_release_bus(); } /*--------------------------------------------------------------------------*/ -//volatile uint8_t io_infifo[256]; - static struct { - uint8_t idx_out, - idx_in; + uint32_t base; + //uint8_t idx_out, idx_in; uint16_t count; uint8_t buf[256]; - } io_infifo; + } msg_fifo; /*--------------------------------------------------------------------------*/ +#if 0 + static void tim1_setup(void) { RCC_APB2RSTR |= RCC_APB2RSTR_TIM1RST; @@ -556,6 +578,8 @@ static void tim1_setup(void) TIM1_SMCR |= TIM_SMCR_SMS_TM; } +#endif + /*--------------------------------------------------------------------------*/ static void tim1_ch4_setup(void) @@ -588,7 +612,7 @@ static void dma1_ch4_setup(void) | DMA_CCR_MINC | DMA_CCR_CIRC; - DMA1_CMAR4 = (uint32_t) io_infifo.buf; + DMA1_CMAR4 = (uint32_t) msg_fifo.buf; #if (DB_SHIFT == 0) || (DB_SHIFT == 8) DMA1_CPAR4 = DB_PORT + IDR + DB_SHIFT/8; @@ -596,14 +620,17 @@ static void dma1_ch4_setup(void) #error "Databus not byte aligned!" #endif - DMA1_CNDTR4 = io_infifo.count = NELEMS(io_infifo.buf); + DMA1_CNDTR4 = NELEMS(msg_fifo.buf); +// msg_fifo.count = NELEMS(msg_fifo.buf); + msg_fifo.count = 0; + msg_fifo.base = 0; DMA1_CCR4 |= DMA_CCR_EN; } /*--------------------------------------------------------------------------*/ -void z80_setup_io_infifo(void) +void z80_setup_msg_fifo(void) { gpio_set_mode(P_BUSACK, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_BUSACK | GPIO_IOCS1); @@ -613,16 +640,33 @@ void z80_setup_io_infifo(void) } -int z80_io_infifo_getc(void) +void z80_init_msg_fifo(uint32_t addr) +{ + +DBG_P(1, "z80_init_msg_fifo: %lx\n", addr); + + z80_request_bus(); + z80_write(addr+FIFO_INDEX_OUT, z80_read(addr+FIFO_INDEX_IN)); + z80_release_bus(); + msg_fifo.base = addr; +} + + +int z80_msg_fifo_getc(void) { int c = -1; - if (io_infifo.count != DMA1_CNDTR4) { - c = io_infifo.buf[NELEMS(io_infifo.buf) - io_infifo.count--]; - if (io_infifo.count == 0) - io_infifo.count = NELEMS(io_infifo.buf); + if (msg_fifo.count != (NELEMS(msg_fifo.buf) - DMA1_CNDTR4)) { + c = msg_fifo.buf[msg_fifo.count]; + if (++msg_fifo.count == NELEMS(msg_fifo.buf)) + msg_fifo.count = 0; + + if (msg_fifo.base != 0) { + z80_request_bus(); + z80_write(msg_fifo.base+FIFO_INDEX_OUT, msg_fifo.count); + z80_release_bus(); + } } return c; } - |