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page 255
.z80
;
; FIFO channels for communication with avr
;
global ff.init,ff.in,ff.out,ff.i.st,ff.o.st
extrn bufinit
include config.inc
if CPU_Z180
include z180reg.inc
endif
;--------------------------------------------------------------
dseg
mkbuf ci.fifo_id, ci.fifo, ci.fifo_len
mkbuf co.fifo_id, co.fifo, co.fifo_len
;--------------------------------------------------------------
cseg
; Init Serial I/O for console input and output
;
ff.init:
ld ix,ci.fifo
call bufinit
ld ix,co.fifo
jp bufinit
ff.i.st:
push ix
ld ix,ci.fifo ;
buf.empty:
ld a,(ix+o.in_idx) ;
sub (ix+o.out_idx) ;
pop ix
ret z
or 0ffh
ret
ff.in:
push ix
ld ix,ci.fifo ;
buf.get:
ld a,(ix+o.out_idx) ;
bg.wait:
cp (ix+o.in_idx) ;
jr z,bg.wait
push hl ;
push ix
pop hl
add a,l
ld l,a
jr nc,bg.nc
inc h
bg.nc:
ld l,(hl)
ld a,(ix+o.out_idx) ;
inc a
and (ix+o.mask)
ld (ix+o.out_idx),a
ld a,l
pop hl
pop ix
ret
ff.o.st:
push ix
ld ix,co.fifo ;
buf.full:
ld a,(ix+o.in_idx) ;
inc a
and (ix+o.mask)
sub (ix+o.out_idx) ;
pop ix
ret z
or 0ffh
ret
if 1
ff.out:
push ix ;15
ld ix,co.fifo ;14
buf.put:
push hl ;11
push bc ;11
push ix ;15
pop hl ;10
ld a,c ;4
ld c,(ix+o.in_idx) ;19
ld b,0 ;7
add hl,bc ;11
ld (hl),a ;7
ld b,a ;4
ld a,c ;4
inc a ;4
and (ix+o.mask) ;19
bp.wait:
cp (ix+o.out_idx) ;19
jr z,bp.wait ;12/7
ld (ix+o.in_idx),a ;19
out (AVRINT6),a ;11
ld a,b ;4
pop bc ;10
pop hl ;10
pop ix ;14
ret ;10
else
ff.out:
push ix ;15
ld ix,co.fifo ;14
buf.put:
push hl ;11
push ix ;15
pop hl ;10
ld a,(ix+o.in_idx) ;19
add a,l ;4
ld l,a ;4
jr nc,bp.1 ;12/7
inc l ;4
ld (hl),c ;7
ld a,(ix+o.in_idx) ;19
inc a ;4
and (ix+o.mask) ;19
bp.wait:
cp (ix+o.out_idx) ;19
jr z,bp.wait ;12/7
ld (ix+o.in_idx),a ;19
out (AVRINT6),a ;11
ld a,c ;4
pop hl ;10
pop ix ;14
ret ;10 |
endif
end
|
