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1; 8080 Interpreter.
2; This is part of the Z80-CP/M emulator written by Sprite_tm.
3;
4
5; Copyright (C) 2010 Sprite_tm
6; Copyright (C) 2010 Leo C.
7; Copyright (C) 2010 Horst S.
8
9; This file is part of avrcpm.
10;
11; avrcpm is free software: you can redistribute it and/or modify it
12; under the terms of the GNU General Public License as published by
13; the Free Software Foundation, either version 3 of the License, or
14; (at your option) any later version.
15;
16; avrcpm is distributed in the hope that it will be useful,
17; but WITHOUT ANY WARRANTY; without even the implied warranty of
18; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19; GNU General Public License for more details.
20;
21; You should have received a copy of the GNU General Public License
22; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23;
24; $Id$
25;
26
27 .dseg
28
29z_b: .byte 1
30z_c: .byte 1
31z_d: .byte 1
32z_e: .byte 1
33z_h: .byte 1
34z_l: .byte 1
35
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36 .cseg
37
38;Init z80
39z80_init:
40 ldi z_pcl,low (IPLADDR)
41 ldi z_pch,high(IPLADDR)
42
43 cbi flags,trace
44 printnewline
45 printstring "Ok, CPU is live!"
46 printnewline
47
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48main:
49.if INS_DEBUG
50 cbi flags,trace
51 cpi z_pch,DBG_TRACE_BOTTOM
52 brlo notraceon
53 cpi z_pch,DBG_TRACE_TOP
54 brsh notraceon
55 sbi flags,trace
56notraceon:
57.endif
58
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59.if PRINT_PC
60 cpi z_pch,DBG_TRACE_BOTTOM
61 brlo noprintpc
62 cpi z_pch,DBG_TRACE_TOP
63 brsh noprintpc
64
65 printnewline
66 printstring "PC="
67 movw temp,z_pcl
68 rcall printhexw
69 printstring " "
70noprintpc:
71.endif
72
73.if INS_DEBUG
74 sbic flags,trace
75 rcall printregs
76.endif
77
78 ;hier kommt die Interruptbehandlung rein
79
80 mem_read_s z_pc ;temp=memReadByte(z_pc)
81 adiw z_pcl,1 ;++z_pc
82 ldi zl,low(todo_table*2) ;zhl=todo_table
83 ldi zh,high(todo_table*2) ;
84 ldi temp2,3 ;1
85 mul temp,temp2 ;2
86 add zl,r0 ;1
87 adc zh,r1 ;1
88 lpm insdecl,Z+ ;do_store
89 lpm insdech,Z+ ;do_op
90 lpm zl,Z ;do_fetch
91 ldi zh,high(fetch_ops)
92 ijmp ;direkt
93
94
95; .listmac
96;-----------------------------------------------------
97; Generate jump to target and position in table
98; gen_opjmp target
99;
100.macro gen_opjmp
101 .ifndef opjmp_table_pos_
102 .set opjmp_table_page_ = high(PC)
103 .set opjmp_table_pos_ = PC
104 .endif
105 .equ @0 = low(opjmp_table_pos_)
106 .set opjmp_table_pos_ = opjmp_table_pos_ + 1
107 .if high(opjmp_table_pos_) != opjmp_table_page_
108 .warning "Table 'opjump' crosses page boarder."
109 .message "Program will not work, unless the opjump table is relocated."
110 .endif
111 rjmp do_@0
112 .endm
113
114;--------------------------------------------------
115; Generate a table entry for one instruction
116;
117; instr fetch, op, store
118;
119.macro instr
120 .ifndef inst_table_odd_
121 .set inst_table_odd_ = 0
122 .endif
123
124 .if inst_table_odd_
125 .db inst_table_next_, low(@2), @1, low(@0)
126 .set inst_table_odd_ = 0
127 .else
128 .set inst_table_next_ = low(@0)
129 .db low(@2), @1
130 .set inst_table_odd_ = 1
131 .endif
132.endm
133
134;-----------------------------------
135; go to op.
136;
137.macro fetch_end
138 ldi zh,high(opjumps)
139 mov zl,insdech
140 ijmp
141.endm
142
143;-----------------------------------
144; go to store.
145;
146.macro op_end
147 ldi zh,high(store_ops) ;
148 mov zl,insdecl
149 ijmp
150.endm
151
152;-----------------------------------
153; go back to main
154;
155.macro store_end
156 rjmp main
157.endm
158
159;-----------------------------------
160; go back to main directly
161;
162.macro op_end_nojmp
163 rjmp main
164.endm
165
166
167; ------------ Fetch phase stuff -----------------
168
169.org (PC+255) & 0xff00
170fetch_ops:
171do_fetch_nop:
172 fetch_end
173
174do_fetch_a:
175 mov opl,z_a
176 fetch_end
177
178do_fetch_b:
179 lds opl,z_b
180 fetch_end
181
182do_fetch_c:
183 lds opl,z_c
184 fetch_end
185
186do_fetch_d:
187 lds opl,z_d
188 fetch_end
189
190do_fetch_e:
191 lds opl,z_e
192 fetch_end
193
194do_fetch_h:
195 lds opl,z_h
196 fetch_end
197
198do_fetch_l:
199 lds opl,z_l
200 fetch_end
201
202do_fetch_af:
203 mov opl,z_flags
204 mov oph,z_a
205 fetch_end
206
207do_fetch_bc:
208 lds opl,z_c
209 lds oph,z_b
210 fetch_end
211
212do_fetch_de:
213 lds opl,z_e
214 lds oph,z_d
215 fetch_end
216
217do_fetch_hl:
218 lds opl,z_l
219 lds oph,z_h
220 fetch_end
221
222do_fetch_sp:
223 movw opl,z_spl
224 fetch_end
225
226do_fetch_mbc:
227 lds xh,z_b
228 lds xl,z_c
f24b3c79 229 mem_read_d z_a
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230 fetch_end
231
232do_fetch_mde:
233 lds xh,z_d
234 lds xl,z_e
f24b3c79 235 mem_read_d z_a
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236 fetch_end
237
238do_fetch_mhl:
239 lds xh,z_h
240 lds xl,z_l
241 mem_read_d opl
242 fetch_end
243
244do_fetch_msp:
245 movw x,z_spl
246 mem_read_d opl
247 adiw x,1
248 mem_read_d oph
249 fetch_end
250
251do_fetch_dir8:
252 mem_read_ds opl, z_pc
253 adiw z_pcl,1
254 fetch_end
255
256do_fetch_dir16:
257 mem_read_ds opl, z_pc
258 adiw z_pcl,1
259 mem_read_ds oph, z_pc
260 adiw z_pcl,1
261 fetch_end
262
263do_fetch_rst:
264 movw x,z_pcl
265 sbiw x,1
266 mem_read_d opl
267 andi opl,0x38
268 ldi oph,0
269 fetch_end
270
271; ------------ Store phase stuff -----------------
272
273.org (PC+255) & 0xff00
274store_ops:
275do_store_nop:
276 store_end
277
278do_store_a:
279 mov z_a,opl
280 store_end
281
282do_store_b:
283 sts z_b,opl
284 store_end
285
286do_store_c:
287 sts z_c,opl
288 store_end
289
290do_store_d:
291 sts z_d,opl
292 store_end
293
294do_store_e:
295 sts z_e,opl
296 store_end
297
298do_store_h:
299 sts z_h,opl
300 store_end
301
302do_store_l:
303 sts z_l,opl
304 store_end
305
306do_store_af:
307 mov z_a,oph
308 mov z_flags,opl
309 store_end
310
311do_store_bc:
312 sts z_b,oph
313 sts z_c,opl
314 store_end
315
316do_store_de:
317 sts z_d,oph
318 sts z_e,opl
319 store_end
320
321do_store_hl:
322 sts z_h,oph
323 sts z_l,opl
324 store_end
325
326do_store_mbc:
327 lds xh,z_b
328 lds xl,z_c
f24b3c79 329 mem_write_s z_a
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330 store_end
331
332do_store_mde:
333 lds xh,z_d
334 lds xl,z_e
f24b3c79 335 mem_write_s z_a
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336 store_end
337
338do_store_mhl:
339 lds xh,z_h
340 lds xl,z_l
341 mem_write_s opl
342 store_end
343
344do_store_msp:
345 movw xl,z_spl
346 mem_write_s opl
347 adiw xl,1
348 mem_write_s oph
349 store_end
350
351do_store_sp:
352 movw z_spl,opl
353 store_end
354
355do_store_pc:
356 movw z_pcl,opl
357 store_end
358
359do_store_ret:
360 movw x,z_spl
361 mem_read_d z_pcl
362 adiw x,1
363 mem_read_d z_pch
364 adiw x,1
365 movw z_spl,x
366
367.if STACK_DBG
368 printnewline
369 printstring "Stack pop "
370 movw temp,z_pcl
371 rcall printhexw
372 printstring ", SP is now "
373 movw temp,z_spl
374 rcall printhexw
375 printstring ". "
376.endif
377 store_end
378
379do_store_call:
380 movw xl,z_spl
381 sbiw x,1
382 mem_write_s z_pch
383 sbiw x,1
384 mem_write_s z_pcl
385 movw z_spl,xl
386
387.if STACK_DBG
388 printnewline
389 printstring "Stack push "
390 movw temp,z_pcl
391 rcall printhexw
392 printstring ", SP is now "
393 movw temp,z_spl
394 rcall printhexw
395 printstring ". "
396.endif
397 movw z_pcl,opl
398 store_end
399
400
401do_store_am:
402 mem_write_ds op, z_a
403 store_end
404
405
406
407; ------------ Operation phase stuff -----------------
408
409;.org (PC+255) & 0xff00
410
411opjumps:
412 gen_opjmp op_nop
413 gen_opjmp op_inc
414 gen_opjmp op_dec
415 gen_opjmp op_inc16
416 gen_opjmp op_dec16
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417 gen_opjmp op_rlca
418 gen_opjmp op_rrca
419 gen_opjmp op_rra
420 gen_opjmp op_rla
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421 gen_opjmp op_adda
422 gen_opjmp op_adca
423 gen_opjmp op_subfa
424 gen_opjmp op_sbcfa
425 gen_opjmp op_anda
426 gen_opjmp op_ora
427 gen_opjmp op_xora
428 gen_opjmp op_addhl
429 gen_opjmp op_sthl
430 gen_opjmp op_rmem16
431 gen_opjmp op_rmem8
432 gen_opjmp op_da
433 gen_opjmp op_scf
434 gen_opjmp op_cpl
435 gen_opjmp op_ccf
436 gen_opjmp op_pop16
437 gen_opjmp op_push16
438 gen_opjmp op_ifnz
439 gen_opjmp op_ifz
440 gen_opjmp op_ifnc
441 gen_opjmp op_ifc
442 gen_opjmp op_ifpo
443 gen_opjmp op_ifpe
444 gen_opjmp op_ifp
445 gen_opjmp op_ifm
446 gen_opjmp op_outa
447 gen_opjmp op_in
448 gen_opjmp op_exhl
449 gen_opjmp op_di
450 gen_opjmp op_ei
451 gen_opjmp op_inv
452 gen_opjmp op_cpfa
453 gen_opjmp op_inca
454 gen_opjmp op_deca
455
456
457
458;----------------------------------------------------------------
459;| |
460;| Zilog |
461;| |
462;| ZZZZZZZ 88888 000 |
463;| Z 8 8 0 0 |
464;| Z 8 8 0 0 0 |
465;| Z 88888 0 0 0 |
466;| Z 8 8 0 0 0 |
467;| Z 8 8 0 0 |
468;| ZZZZZZZ 88888 000 |
469;| |
470;| Z80 MICROPROCESSOR Instruction Set Summary |
471;| |
472;----------------------------------------------------------------
473;----------------------------------------------------------------
474;|Mnemonic |SZHPNC|Description |Notes |
475;|----------+------+---------------------+----------------------|
476;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
477;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
478;|ADD A,s |***V0*|Add |A=A+s |
479;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
480;|ADD IX,pp |--?-0*|Add |IX=IX+pp |
481;|ADD IY,rr |--?-0*|Add |IY=IY+rr |
482;|AND s |**1P00|Logical AND |A=A&s |
483;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
484;|CALL cc,nn|------|Conditional Call |If cc CALL |
485;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
486;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
487;|CP s |***V1*|Compare |A-s |
488;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
489;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
490;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
491;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
492;|CPL |--1-1-|Complement |A=~A |
493;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
494;|DEC s |***V1-|Decrement |s=s-1 |
495;|DEC xx |------|Decrement |xx=xx-1 |
496;|DEC ss |------|Decrement |ss=ss-1 |
497;|DI |------|Disable Interrupts | |
498;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
499;|EI |------|Enable Interrupts | |
500;|EX [SP],HL|------|Exchange |[SP]<->HL |
501;|EX [SP],xx|------|Exchange |[SP]<->xx |
502;|EX AF,AF' |------|Exchange |AF<->AF' |
503;|EX DE,HL |------|Exchange |DE<->HL |
504;|EXX |------|Exchange |qq<->qq' (except AF)|
505;|HALT |------|Halt | |
506;|IM n |------|Interrupt Mode | (n=0,1,2)|
507;|IN A,[n] |------|Input |A=[n] |
508;|IN r,[C] |***P0-|Input |r=[C] |
509;|INC r |***V0-|Increment |r=r+1 |
510;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
511;|INC xx |------|Increment |xx=xx+1 |
512;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
513;|INC ss |------|Increment |ss=ss+1 |
514;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
515;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
516;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
517;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
518;|JP [HL] |------|Unconditional Jump |PC=[HL] |
519;|JP [xx] |------|Unconditional Jump |PC=[xx] |
520;|JP nn |------|Unconditional Jump |PC=nn |
521;|JP cc,nn |------|Conditional Jump |If cc JP |
522;|JR e |------|Unconditional Jump |PC=PC+e |
523;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
524;|LD dst,src|------|Load |dst=src |
525;|LD A,i |**0*0-|Load |A=i (i=I,R)|
526;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
527;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
528;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
529;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
530;|NEG |***V1*|Negate |A=-A |
531;|NOP |------|No Operation | |
532;|OR s |**0P00|Logical inclusive OR |A=Avs |
533;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
534;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
535;|OUT [C],r |------|Output |[C]=r |
536;|OUT [n],A |------|Output |[n]=A |
537;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
538;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
539;|POP xx |------|Pop |xx=[SP]+ |
540;|POP qq |------|Pop |qq=[SP]+ |
541;|PUSH xx |------|Push |-[SP]=xx |
542;|PUSH qq |------|Push |-[SP]=qq |
543;|RES b,m |------|Reset bit |m=m&{~2^b} |
544;|RET |------|Return |PC=[SP]+ |
545;|RET cc |------|Conditional Return |If cc RET |
546;|RETI |------|Return from Interrupt|PC=[SP]+ |
547;|RETN |------|Return from NMI |PC=[SP]+ |
548;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
549;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
550;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
551;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
552;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
553;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
554;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
555;|RRC m |**0P0*|Rotate Right Circular|m=->m |
556;|RRCA |--0-0*|Rotate Right Circular|A=->A |
557;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
558;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
559;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
560;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY |
561;|SCF |--0-01|Set Carry Flag |CY=1 |
562;|SET b,m |------|Set bit |m=mv{2^b} |
563;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
564;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
565;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
566;|SUB s |***V1*|Subtract |A=A-s |
567;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
568;|----------+------+--------------------------------------------|
569;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
570;| S |S |Sign flag (Bit 7) |
571;| Z | Z |Zero flag (Bit 6) |
572;| HC | H |Half Carry flag (Bit 4) |
573;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
574;| N | N |Add/Subtract flag (Bit 1) |
575;| CY | C|Carry flag (Bit 0) |
576;|-----------------+--------------------------------------------|
577;| n |Immediate addressing |
578;| nn |Immediate extended addressing |
579;| e |Relative addressing (PC=PC+2+offset) |
580;| [nn] |Extended addressing |
581;| [xx+d] |Indexed addressing |
582;| r |Register addressing |
583;| [rr] |Register indirect addressing |
584;| |Implied addressing |
585;| b |Bit addressing |
586;| p |Modified page zero addressing (see RST) |
587;|-----------------+--------------------------------------------|
588;|DEFB n(,...) |Define Byte(s) |
589;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
590;|DEFS nn |Define Storage Block |
591;|DEFW nn(,...) |Define Word(s) |
592;|-----------------+--------------------------------------------|
593;| A B C D E |Registers (8-bit) |
594;| AF BC DE HL |Register pairs (16-bit) |
595;| F |Flag register (8-bit) |
596;| I |Interrupt page address register (8-bit) |
597;| IX IY |Index registers (16-bit) |
598;| PC |Program Counter register (16-bit) |
599;| R |Memory Refresh register |
600;| SP |Stack Pointer register (16-bit) |
601;|-----------------+--------------------------------------------|
602;| b |One bit (0 to 7) |
603;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
604;| d |One-byte expression (-128 to +127) |
605;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
606;| e |One-byte expression (-126 to +129) |
607;| m |Any register r, [HL] or [xx+d] |
608;| n |One-byte expression (0 to 255) |
609;| nn |Two-byte expression (0 to 65535) |
610;| pp |Register pair BC, DE, IX or SP |
611;| qq |Register pair AF, BC, DE or HL |
612;| qq' |Alternative register pair AF, BC, DE or HL |
613;| r |Register A, B, C, D, E, H or L |
614;| rr |Register pair BC, DE, IY or SP |
615;| s |Any register r, value n, [HL] or [xx+d] |
616;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
617;| ss |Register pair BC, DE, HL or SP |
618;| xx |Index register IX or IY |
619;|-----------------+--------------------------------------------|
620;| + - * / ^ |Add/subtract/multiply/divide/exponent |
621;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
622;| <- -> |Rotate left/right |
623;| [ ] |Indirect addressing |
624;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
625;| { } |Combination of operands |
626;| # |Also BC=BC-1,DE=DE-1 |
627;| ## |Only lower 4 bits of accumulator A used |
628;----------------------------------------------------------------
629
630;How the flags are supposed to work:
631;7 ZFL_S - Sign flag (=MSBit of result)
632;6 ZFL_Z - Zero flag. Is 1 when the result is 0
633;4 ZFL_H - Half-carry (carry from bit 3 to 4)
634;2 ZFL_P - Parity/2-complement Overflow
635;1 ZFL_N - Subtract - set if last op was a subtract
636;0 ZFL_C - Carry
637;
638;I sure hope I got the mapping between flags and instructions correct...
639
640.equ ZFL_S = 7
641.equ ZFL_Z = 6
642.equ ZFL_H = 4
643.equ ZFL_P = 2
644.equ ZFL_N = 1
645.equ ZFL_C = 0
646
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647.equ AVR_T = SREG_T
648.equ AVR_H = SREG_H
649.equ AVR_S = SREG_S
650.equ AVR_V = SREG_V
651.equ AVR_N = SREG_N
652.equ AVR_Z = SREG_Z
653.equ AVR_C = SREG_C
654
655;------------------------------------------------;
656; Load table value from flash indexed by source reg.
657;
658; ldpmx dstreg,tablebase,indexreg
659;
660; (6 words, 8 cycles)
661
662.macro ldpmx
663 ldi zh,high(@1*2) ; table must be page aligned
664 mov zl,@2
665 lpm @0,z
666.endm
667
f24b3c79 668.macro do_z80_flags_V
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669#if EM_Z80
670 bmov z_flags, ZFL_P, temp, AVR_V
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671#endif
672.endm
673
674.macro do_z80_flags_set_N
675#if EM_Z80
676 ori z_flags, (1<<ZFL_N) ; Negation auf 1
677#endif
678.endm
679
680.macro do_z80_flags_set_HN
681#if EM_Z80
682 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
683#endif
684.endm
685
686.macro do_z80_flags_clear_N
687#if EM_Z80
688 andi z_flags,~(1<<ZFL_N)
689#endif
690.endm
691
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692.macro do_z80_flags_clear_HN
693#if EM_Z80
694 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
695#endif
696.endm
697
698
699.macro do_z80_flags_copy_HC
700#if EM_Z80
701 bmov z_flags, ZFL_H, z_flags, ZFL_H
702#endif
703.endm
704
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705.macro do_z80_flags_op_rotate
706 ; must not change avr carry flag!
707#if EM_Z80
708 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
709#else
710 andi z_flags, ~( (1<<ZFL_C) )
711#endif
712.endm
713
714.macro do_z80_flags_op_and
715#if EM_Z80
716 ori z_flags,(1<<ZFL_H)
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717#endif
718.endm
719
720.macro do_z80_flags_op_or
721#if EM_Z80
f24b3c79 722 ;nothing to do
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723#endif
724.endm
725
726
727;----------------------------------------------------------------
728
729do_op_inv:
f24b3c79
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730 sbiw z_pcl,1
731 lcall printregs
732 printstring "Invalid opcode! "
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733
734haltinv:
735 rjmp haltinv
736
737do_op_nop:
738 op_end
739
740;----------------------------------------------------------------
741;|Mnemonic |SZHPNC|Description |Notes |
742;----------------------------------------------------------------
743;|OUT [n],A |------|Output |[n]=A |
744;
745;
746;Interface with peripherials goes here :)
747do_op_outa: ; out (opl),a
748.if PORT_DEBUG
749 printnewline
750 printstring "Port write: "
751 mov temp,z_a
752 rcall printhex
753 printstring " -> ("
754 mov temp,opl
755 rcall printhex
756 printstring ") "
757.endif
758 mov temp,z_a
759 mov temp2,opl
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760 lcall portWrite
761 ret
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762
763;----------------------------------------------------------------
764;|Mnemonic |SZHPNC|Description |Notes |
765;----------------------------------------------------------------
766;|IN A,[n] |------|Input |A=[n] |
767;
768;
769do_op_in: ; in a,(opl)
770.if PORT_DEBUG
771 printnewline
772 printstring "Port read: ("
773 mov temp,opl
774 rcall printhex
775 printstring ") -> "
776.endif
777
778 mov temp2,opl
f24b3c79 779 lcall portRead
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780 mov opl,temp
781
782.if PORT_DEBUG
783 rcall printhex
784 printstring " "
785.endif
786 op_end
787
788;----------------------------------------------------------------
789;|Mnemonic |SZHPNC|Description |Notes |
790;----------------------------------------------------------------
791;|INC r |***V0-|Increment |r=r+1 |
792;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
793;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
794;|----------|SZHP C|---------- 8080 ----------------------------|
795;|INC r |**-P0-|Increment |r=r+1 |
796;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
797;
798;
799do_op_inc:
f24b3c79
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800 ldi temp,1
801 add opl,temp
9c15f366 802 in temp, sreg
f24b3c79 803 andi z_flags,(1<<ZFL_C) ; preserve C-flag
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804 ldpmx temp2, sz53p_tab, opl
805 or z_flags,temp2 ;
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806 bmov z_flags, ZFL_H, temp, AVR_H
807 do_z80_flags_V
808op_end
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809
810do_op_inca:
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811 ldi temp,1
812 add z_a,temp
9c15f366 813 in temp, sreg
f24b3c79 814 andi z_flags,(1<<ZFL_C) ; preserve C-flag
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815 ldpmx temp2, sz53p_tab, z_a
816 or z_flags,temp2 ;
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817 bmov z_flags, ZFL_H, temp, AVR_H
818 do_z80_flags_V
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819 op_end
820
821;----------------------------------------------------------------
822;|Mnemonic |SZHPNC|Description |Notes |
823;----------------------------------------------------------------
824;|DEC r |***V1-|Decrement |s=s-1 |
825;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
826;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
827;|----------|SZHP C|---------- 8080 ----------------------------|
828;|DEC r |**-P -|Increment |r=r+1 |
829;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
830;
831;
832do_op_dec:
f24b3c79 833 subi opl,1
9c15f366 834 in temp, sreg
f24b3c79 835 andi z_flags,(1<<ZFL_C) ; preserve C-flag
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836 ldpmx temp2, sz53p_tab, opl
837 or z_flags,temp2 ;
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838 bmov z_flags, ZFL_H, temp, AVR_H
839 do_z80_flags_V
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840 do_z80_flags_set_N
841 op_end
842
843do_op_deca:
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844 ldi opl,1
845 sub z_a,opl
9c15f366 846 in temp, sreg
f24b3c79 847 andi z_flags,(1<<ZFL_C) ; preserve C-flag
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848 ldpmx temp2, sz53p_tab, z_a
849 or z_flags,temp2 ;
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850 bmov z_flags, ZFL_H, temp, AVR_H
851 do_z80_flags_V
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852 do_z80_flags_set_N
853 op_end
854
855;----------------------------------------------------------------
856;|Mnemonic |SZHPNC|Description |Notes |
857;----------------------------------------------------------------
858;|INC xx |------|Increment |xx=xx+1 |
859;|INC ss |------|Increment |ss=ss+1 |
860;
861;
862do_op_inc16:
863 subi opl,low(-1)
864 sbci oph,high(-1)
865 op_end
866
867;----------------------------------------------------------------
868;|Mnemonic |SZHPNC|Description |Notes |
869;----------------------------------------------------------------
870;|DEC xx |------|Decrement |xx=xx-1 |
871;|DEC ss |------|Decrement |ss=ss-1 |
872;
873;
874do_op_dec16:
875 subi opl, 1
876 sbci oph, 0
877 op_end
878
879;----------------------------------------------------------------
880;|Mnemonic |SZHPNC|Description |Notes |
881;----------------------------------------------------------------
882;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
883;|----------|SZHP C|---------- 8080 ----------------------------|
884;|RLCA |---- *|Rotate Left Circular |A=A<- |
885;
886;
f24b3c79 887do_op_rlca:
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888 ;Rotate Left Cyclical. All bits move 1 to the
889 ;left, the msb becomes c and lsb.
890 do_z80_flags_op_rotate
f24b3c79 891 lsl z_a
9c15f366 892 brcc do_op_rlc_noc
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893 ldi temp,1
894 or z_a,temp
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895 ori z_flags, (1<<ZFL_C)
896do_op_rlc_noc:
897 op_end
898
899;----------------------------------------------------------------
900;|Mnemonic |SZHPNC|Description |Notes |
901;----------------------------------------------------------------
902;|RRCA |--0-0*|Rotate Right Circular|A=->A |
903;|----------|SZHP C|---------- 8080 ----------------------------|
904;|RRCA |---- *|Rotate Right Circular|A=->A |
905;
906;
f24b3c79 907do_op_rrca:
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908 ;Rotate Right Cyclical. All bits move 1 to the
909 ;right, the lsb becomes c and msb.
910 do_z80_flags_op_rotate
f24b3c79 911 lsr z_a
9c15f366 912 brcc do_op_rrc_noc
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913 ldi temp,0x80
914 or z_a,temp
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915 ori z_flags, (1<<ZFL_C)
916do_op_rrc_noc:
917 op_end
918
919;----------------------------------------------------------------
920;|Mnemonic |SZHPNC|Description |Notes |
921;----------------------------------------------------------------
922;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
923;|----------|SZHP C|---------- 8080 ----------------------------|
924;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
925;
926;
f24b3c79 927do_op_rra:
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928 ;Rotate Right. All bits move 1 to the right, the lsb
929 ;becomes c, c becomes msb.
930 clc ; get z80 carry to avr carry
931 sbrc z_flags,ZFL_C
932 sec
933 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
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934 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
935 ror z_a
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936 op_end
937
938;----------------------------------------------------------------
939;|Mnemonic |SZHPNC|Description |Notes |
940;----------------------------------------------------------------
941;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
942;|----------|SZHP C|---------- 8080 ----------------------------|
943;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
944;
945;
f24b3c79 946do_op_rla:
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947 ;Rotate Left. All bits move 1 to the left, the msb
948 ;becomes c, c becomes lsb.
949 clc
950 sbrc z_flags,ZFL_C
951 sec
952 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
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953 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
954 rol z_a
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955 op_end
956
957;----------------------------------------------------------------
958;|Mnemonic |SZHPNC|Description |Notes |
959;----------------------------------------------------------------
960;|ADD A,s |***V0*|Add |A=A+s |
961;|----------|SZHP C|---------- 8080 ----------------------------|
962;|ADD A,s |***P *|Add |A=A+s |
963;
964;
965do_op_adda:
966 add z_a,opl
967 in temp,sreg
968 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
969 bmov z_flags,ZFL_C, temp,AVR_C
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970 bmov z_flags,ZFL_H, temp,AVR_H
971 do_z80_flags_V
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972 op_end
973
974;----------------------------------------------------------------
975;|Mnemonic |SZHPNC|Description |Notes |
976;----------------------------------------------------------------
977;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
978;|----------|SZHP C|---------- 8080 ----------------------------|
979;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
980;
981;
982do_op_adca:
983 clc
984 sbrc z_flags,ZFL_C
985 sec
986 adc z_a,opl
987 in temp,sreg
988 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
989 bmov z_flags,ZFL_C, temp,AVR_C
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990 bmov z_flags,ZFL_H, temp,AVR_H
991 do_z80_flags_V
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992 op_end
993
994;----------------------------------------------------------------
995;|Mnemonic |SZHPNC|Description |Notes |
996;----------------------------------------------------------------
997;|SUB s |***V1*|Subtract |A=A-s |
998;|----------|SZHP C|---------- 8080 ----------------------------|
999;|SUB s |***P *|Subtract |A=A-s |
1000
1001;
1002do_op_subfa:
1003 sub z_a,opl
1004 in temp,sreg
1005 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1006 bmov z_flags,ZFL_C, temp,AVR_C
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1007 bmov z_flags,ZFL_H, temp,AVR_H
1008 do_z80_flags_V
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1009 do_z80_flags_set_N
1010 op_end
1011
1012;----------------------------------------------------------------
1013;|Mnemonic |SZHPNC|Description |Notes |
1014;----------------------------------------------------------------
1015;|CP s |***V1*|Compare |A-s |
1016;|----------|SZHP C|---------- 8080 ----------------------------|
1017;|CP s |***P *|Compare |A-s |
1018
1019;
1020do_op_cpfa:
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1021 mov temp2,z_a
1022 sub temp2,opl
9c15f366 1023 in temp,sreg
f24b3c79 1024 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
9c15f366 1025 bmov z_flags,ZFL_C, temp,AVR_C
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1026 bmov z_flags,ZFL_H, temp,AVR_H
1027 do_z80_flags_V
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1028 do_z80_flags_set_N
1029 op_end
1030
1031;----------------------------------------------------------------
1032;|Mnemonic |SZHPNC|Description |Notes |
1033;----------------------------------------------------------------
1034;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1035;|----------|SZHP C|---------- 8080 ----------------------------|
1036;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1037;
1038;
1039do_op_sbcfa:
1040 clc
1041 sbrc z_flags,ZFL_C
1042 sec
1043 sbc z_a,opl
1044 in temp,sreg
1045 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1046 bmov z_flags,ZFL_C, temp,AVR_C
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1047 bmov z_flags,ZFL_H, temp,AVR_H
1048 do_z80_flags_V
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1049 do_z80_flags_set_N
1050 op_end
1051
1052;----------------------------------------------------------------
1053;|Mnemonic |SZHPNC|Description |Notes |
1054;----------------------------------------------------------------
1055;|AND s |**1P00|Logical AND |A=A&s |
1056;|----------|SZHP C|---------- 8080 ----------------------------|
1057;|AND s |**-P 0|Logical AND |A=A&s |
1058;
f24b3c79 1059;
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1060do_op_anda:
1061 and z_a,opl ;
1062 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1063 do_z80_flags_op_and
1064 op_end
1065
1066
1067;----------------------------------------------------------------
1068;|Mnemonic |SZHPNC|Description |Notes |
1069;----------------------------------------------------------------
1070;|OR s |**0P00|Logical inclusive OR |A=Avs |
1071;|----------|SZHP C|---------- 8080 ----------------------------|
1072;|OR s |**-P00|Logical inclusive OR |A=Avs |
1073;
f24b3c79 1074;
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1075do_op_ora:
1076 or z_a,opl
1077 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1078 do_z80_flags_op_or
1079 op_end
1080
1081;----------------------------------------------------------------
1082;|Mnemonic |SZHPNC|Description |Notes |
1083;----------------------------------------------------------------
1084;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1085;|----------|SZHP C|---------- 8080 ----------------------------|
1086;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1087;
f24b3c79 1088;
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1089do_op_xora:
1090 eor z_a,opl
1091 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1092 do_z80_flags_op_or
1093 op_end
1094
1095;----------------------------------------------------------------
1096;|Mnemonic |SZHPNC|Description |Notes |
1097;----------------------------------------------------------------
1098;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1099;|----------|SZHP C|---------- 8080 ----------------------------|
1100;|ADD HL,ss |---- *|Add |HL=HL+ss |
1101;
1102;
1103do_op_addhl:
1104 lds temp,z_l
1105 lds temp2,z_h
1106 add opl,temp
1107 adc oph,temp2
1108 in temp,sreg
1109 bmov z_flags,ZFL_H, temp,AVR_H
1110 bmov z_flags,ZFL_C, temp,AVR_C
1111 do_z80_flags_clear_N
1112 op_end
1113
1114;----------------------------------------------------------------
1115;|Mnemonic |SZHPNC|Description |Notes |
1116;----------------------------------------------------------------
1117;|LD dst,src|------|Load |dst=src |
1118;
1119;
1120do_op_sthl: ;store hl to mem loc in opl:h
1121 movw xl,opl
1122 lds temp,z_l
1123 mem_write
1124 adiw xl,1
1125 lds temp,z_h
1126 mem_write
1127 op_end
1128
1129;----------------------------------------------------------------
1130;|Mnemonic |SZHPNC|Description |Notes |
1131;----------------------------------------------------------------
1132;|LD dst,src|------|Load |dst=src |
1133;
1134;
1135do_op_rmem16:
1136 movw xl,opl
1137 mem_read_d opl
1138 adiw x,1
1139 mem_read_d oph
1140 op_end
1141
1142;----------------------------------------------------------------
1143;|Mnemonic |SZHPNC|Description |Notes |
1144;----------------------------------------------------------------
1145;|LD dst,src|------|Load |dst=src |
1146;
1147;
1148do_op_rmem8:
1149 mem_read_ds opl, op
1150 op_end
1151
1152;----------------------------------------------------------------
1153;|Mnemonic |SZHPNC|Description |Notes |
1154;----------------------------------------------------------------
1155;|DAA |***P-*|Decimal Adjust Acc. | |
1156;|----------|SZHP C|---------- 8080 ----------------------------|
1157;
1158; Not yet checked
1159
1160; Description (http://www.z80.info/z80syntx.htm#DAA):
1161; This instruction conditionally adjusts the accumulator for BCD addition
1162; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1163; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1164;
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1165; -------------------------------------------------------------------
1166; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1167; | Oper |Before |upper digit |Before |lower digit| added |After |
1168; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1169; |-------+-------+------------+-------+-----------+--------+-------|
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1170; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1171; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1172; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1173; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1174; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1175; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1176; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1177; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1178; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
f24b3c79 1179; |-------+-------+------------+-------+-----------+--------+-------|
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1180; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1181; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1182; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1183; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
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1184; -------------------------------------------------------------------
1185;
1186; The H flag is affected as follows:
1187;
1188; ---------------------
1189; | N | H | low |H' |
1190; | | |nibble | |
1191; |---+---+-------+---|
1192; | 0 | * | 0-9 | 0 |
1193; | 0 | * | a-f | 1 |
1194; | 1 | 0 | * | 0 |
1195; | 1 | 1 | 6-f | 0 |
1196; | 1 | 1 | 0-5 | 1 |
1197; ---------------------
1198;
1199; Ohter flags:
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1200; N: Unaffected.
1201; P/V: Set if Acc. is even parity after operation, reset otherwise.
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1202; Z: Set if Acc. is Zero after operation, reset otherwise.
1203; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1204
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1205#if 1
1206
1207do_op_da:
1208
1209#if EM_Z80
1210 sbrc z_flags,ZFL_N ;if add-op
1211 rjmp op_da_sub ;then
1212#endif
1213
1214op_da_add:
1215 ldi temp2,0 ; new C and H flag
1216 sbrc z_flags,ZFL_H ; |
1217 rjmp op_da_a01 ; if (H flag ...
1218 mov temp,opl ; |
1219 andi temp,0x0f ; |
1220 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1221 brlo op_da_a10 ; |
1222op_da_a01: ; then
1223 ldi oph,0x06 ; add 6 to lower nibble
1224 add opl,oph ;
1225 brhc op_da_02 ; if
1226 ori temp2,(1<<ZFL_H) ; set new H flag
1227op_da_02: ;
1228 brcc op_da_a10 ; if
1229 ori temp2,(1<<ZFL_C) ; set new H flag
1230op_da_a10: ; endif
1231 sbrc z_flags,ZFL_C ; |
1232 rjmp op_da_a12 ; if (C flag ...
1233 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1234 brlo op_da_a13 ;
1235op_da_a12: ;
1236 ldi oph,0x60 ; add 6 to lower nibble
1237 add opl,oph ;
1238 ori temp2,(1<<ZFL_C) ; set new C flag
1239op_da_a13: ;
1240 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1241 or z_flags,temp2 ; merge new C and H flag
1242 op_end
1243
1244#if EM_Z80
1245
1246op_da_sub: ;else (sub-op)
1247 rcall do_op_inv ; TODO: !
1248 op_end ;endif
1249#endif
1250
1251#else
9c15f366 1252
9c15f366 1253do_op_da:
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1254 ldi temp2,0 ;new C and H flag
1255 ldi oph,0 ;oph: what to add
1256
1257 sbrc z_flags,ZFL_N ;if add-op
1258 rjmp op_da_sub ;then
1259op_da_add:
1260 mov temp,opl ; |
1261 andi temp,0x0f ; |
1262 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1263 brlo op_da_a10 ; |
1264 ori oph,0x06 ; add 6
1265 ori temp2,(1<<ZFL_H) ; set new H flag
1266
1267 sbrc z_flags,ZFL_C ; |
1268 rjmp op_da_a02 ; if (C flag ...
1269 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1270 brlo op_da_a03 ; |
1271op_da_a02:
1272 ori oph,0x60 ; add 0x60
1273 ori temp2,(1<<ZFL_C) ; set new C flag
1274op_da_a03: ; endif
1275 rjmp op_da_ae
1276op_da_a10: ; else (lower nibble is 0x09 or lower)
1277 sbrc z_flags,ZFL_C ; |
1278 rjmp op_da_a12 ; if (C flag ...
1279 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1280 brlo op_da_a13 ;
1281op_da_a12:
1282 ori oph,0x60 ; add 0x60
1283 ori temp2,(1<<ZFL_C) ; set new C flag
1284op_da_a13:
1285 sbrs z_flags,ZFL_H ; if (H flag)
1286 rjmp op_da_ae ; |
1287 ori oph,0x06 ; add 0x06
1288 mov temp,opl ; |
1289 andi temp,0x0f ; |
1290 cpi temp,0x06 ; if (lower nibble >= 0x0A)
1291 brsh op_da_ae ; |
1292 ori temp2,(1<<ZFL_H) ; set new H flag
1293 ; endif
1294 ; endif
1295op_da_ae:
9c15f366 1296 add opl,oph
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1297 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1298 or z_flags,temp2 ; merge new C and H flag
9c15f366 1299 op_end
9c15f366 1300
f24b3c79
L
1301op_da_sub: ;else (sub-op)
1302 rcall do_op_inv ; TODO: !
f1deeee3
L
1303 op_end ;endif
1304#endif
1305
9c15f366
L
1306
1307;----------------------------------------------------------------
1308;|Mnemonic |SZHPNC|Description |Notes |
1309;----------------------------------------------------------------
1310;|SCF |--0-01|Set Carry Flag |CY=1 |
1311;|----------|SZHP C|---------- 8080 ----------------------------|
1312;
1313;
1314do_op_scf:
f24b3c79 1315 do_z80_flags_clear_HN
9c15f366
L
1316 ori z_flags,(1<<ZFL_C)
1317 op_end
1318
1319;----------------------------------------------------------------
1320;|Mnemonic |SZHPNC|Description |Notes |
1321;----------------------------------------------------------------
f24b3c79 1322;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
9c15f366 1323;|----------|SZHP C|---------- 8080 ----------------------------|
f24b3c79 1324;|CCF |---- 1|Set Carry Flag |CY=1 |
9c15f366 1325;
9c15f366
L
1326do_op_ccf:
1327 do_z80_flags_clear_N
f24b3c79 1328 do_z80_flags_copy_HC
9c15f366
L
1329 ldi temp,(1<<ZFL_C)
1330 eor z_flags,temp
1331 op_end
1332
1333;----------------------------------------------------------------
1334;|Mnemonic |SZHPNC|Description |Notes |
1335;----------------------------------------------------------------
1336;|CPL |--1-1-|Complement |A=~A |
1337;|----------|SZHP C|---------- 8080 ----------------------------|
1338;|CPL |---- -|Complement |A=~A |
1339;
1340;
1341do_op_cpl:
1342 com z_a
1343 do_z80_flags_set_HN
1344 op_end
1345
1346
1347;----------------------------------------------------------------
1348;|Mnemonic |SZHPNC|Description |Notes |
1349;----------------------------------------------------------------
1350;|PUSH xx |------|Push |-[SP]=xx |
1351;|PUSH qq |------|Push |-[SP]=qq |
1352;
1353;
1354do_op_push16:
1355 movw xl,z_spl
1356 sbiw x,1
1357 mem_write_s oph
1358 sbiw x,1
1359 mem_write_s opl
1360 movw z_spl,xl
1361
1362.if STACK_DBG
1363 printnewline
1364 printstring "Stack push "
1365 movw temp,opl
1366 rcall printhexw
1367 printstring ", SP is now "
1368 movw temp,z_spl
1369 rcall printhexw
1370 printstring ". "
1371.endif
1372
1373 op_end
1374
1375;----------------------------------------------------------------
1376;|Mnemonic |SZHPNC|Description |Notes |
1377;----------------------------------------------------------------
1378;|POP xx |------|Pop |xx=[SP]+ |
1379;|POP qq |------|Pop |qq=[SP]+ |
1380;
1381;
1382do_op_pop16:
1383 movw x,z_spl
1384 mem_read_d opl
1385 adiw x,1
1386 mem_read_d oph
1387 adiw x,1
1388 movw z_spl,x
1389
1390.if STACK_DBG
1391 printnewline
1392 printstring "Stack pop "
1393 movw temp,opl
1394 rcall printhexw
1395 printstring ", SP is now "
1396 movw temp,z_spl
1397 rcall printhexw
1398 printstring ". "
1399.endif
1400 op_end
1401
1402;----------------------------------------------------------------
1403;|Mnemonic |SZHPNC|Description |Notes |
1404;----------------------------------------------------------------
1405;|EX [SP],HL|------|Exchange |[SP]<->HL |
1406;|EX DE,HL |------|Exchange |DE<->HL |
1407;-----------------------------Z80--------------------------------
1408;
1409do_op_exhl:
1410 lds temp,z_l
1411 lds temp2,z_h
1412 sts z_l,opl
1413 sts z_h,oph
1414 movw opl,temp
1415 op_end
1416
1417;----------------------------------------------------------------
1418;|Mnemonic |SZHPNC|Description |Notes |
1419;----------------------------------------------------------------
1420;
1421; TODO: Implement IFF1, IFF2
1422do_op_di:
1423 op_end
1424
1425;----------------------------------------------------------------
1426;|Mnemonic |SZHPNC|Description |Notes |
1427;----------------------------------------------------------------
1428;
1429; TODO: Implement IFF1, IFF2
1430do_op_ei:
1431 op_end
1432
1433;----------------------------------------------------------------
1434;|Mnemonic |SZHPNC|Description |Notes |
1435;----------------------------------------------------------------
1436;|CALL cc,nn|------|Conditional Call |If cc CALL |
1437;|JP cc,nn |------|Conditional Jump |If cc JP |
1438;|RET cc |------|Conditional Return |If cc RET |
1439;
1440;
1441do_op_ifnz:
1442 sbrc z_flags, ZFL_Z
1443 op_end_nojmp
1444 op_end
1445
1446;----------------------------------------------------------------
1447;|Mnemonic |SZHPNC|Description |Notes |
1448;----------------------------------------------------------------
1449;|CALL cc,nn|------|Conditional Call |If cc CALL |
1450;|JP cc,nn |------|Conditional Jump |If cc JP |
1451;|RET cc |------|Conditional Return |If cc RET |
1452;
1453;
1454do_op_ifz:
1455 sbrs z_flags, ZFL_Z
1456 op_end_nojmp
1457 op_end
1458
1459;----------------------------------------------------------------
1460;|Mnemonic |SZHPNC|Description |Notes |
1461;----------------------------------------------------------------
1462;|CALL cc,nn|------|Conditional Call |If cc CALL |
1463;|JP cc,nn |------|Conditional Jump |If cc JP |
1464;|RET cc |------|Conditional Return |If cc RET |
1465;
1466;
1467do_op_ifnc:
1468 sbrc z_flags, ZFL_C
1469 op_end_nojmp
1470 op_end
1471
1472;----------------------------------------------------------------
1473;|Mnemonic |SZHPNC|Description |Notes |
1474;----------------------------------------------------------------
1475;|CALL cc,nn|------|Conditional Call |If cc CALL |
1476;|JP cc,nn |------|Conditional Jump |If cc JP |
1477;|RET cc |------|Conditional Return |If cc RET |
1478;
1479;
1480do_op_ifc:
1481 sbrs z_flags, ZFL_C
1482 op_end_nojmp
1483 op_end
1484
1485;----------------------------------------------------------------
1486;|Mnemonic |SZHPNC|Description |Notes |
1487;----------------------------------------------------------------
1488;|CALL cc,nn|------|Conditional Call |If cc CALL |
1489;|JP cc,nn |------|Conditional Jump |If cc JP |
1490;|RET cc |------|Conditional Return |If cc RET |
1491;
1492;
1493do_op_ifpo:
1494 sbrc z_flags, ZFL_P
1495 op_end_nojmp
1496 op_end
1497
1498;----------------------------------------------------------------
1499;|Mnemonic |SZHPNC|Description |Notes |
1500;----------------------------------------------------------------
1501;|CALL cc,nn|------|Conditional Call |If cc CALL |
1502;|JP cc,nn |------|Conditional Jump |If cc JP |
1503;|RET cc |------|Conditional Return |If cc RET |
1504;
1505;
1506do_op_ifpe:
1507 sbrs z_flags, ZFL_P
1508 op_end_nojmp
1509 op_end
1510
1511;----------------------------------------------------------------
1512;|Mnemonic |SZHPNC|Description |Notes |
1513;----------------------------------------------------------------
1514;|CALL cc,nn|------|Conditional Call |If cc CALL |
1515;|JP cc,nn |------|Conditional Jump |If cc JP |
1516;|RET cc |------|Conditional Return |If cc RET |
1517;
1518;
1519do_op_ifp: ;sign positive, aka s=0
1520 sbrc z_flags, ZFL_S
1521 op_end_nojmp
1522 op_end
1523
1524;----------------------------------------------------------------
1525;|Mnemonic |SZHPNC|Description |Notes |
1526;----------------------------------------------------------------
1527;|CALL cc,nn|------|Conditional Call |If cc CALL |
1528;|JP cc,nn |------|Conditional Jump |If cc JP |
1529;|RET cc |------|Conditional Return |If cc RET |
1530;
1531;
1532do_op_ifm: ;sign negative, aka s=1
1533 sbrs z_flags, ZFL_S
1534 op_end_nojmp
1535 op_end
1536
1537
1538; ----------------------- Opcode decoding -------------------------
1539
1540; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1541; operations: fetch, do something, store.
1542; The table is made of 256 words.
1543
1544;.org (PC+255) & 0xff00
1545todo_table:
1546instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1547instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
f24b3c79 1548instr do_fetch_nop, op_nop, do_store_MBC ;02 ;LD (BC),A
9c15f366
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1549instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1550instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1551instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1552instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
f24b3c79 1553instr do_fetch_nop, op_RLCA, do_store_nop ;07 ;RLCA
9c15f366
L
1554instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1555instr do_fetch_BC, op_ADDHL, do_store_HL ;09 ;ADD HL,BC
f24b3c79 1556instr do_fetch_MBC, op_nop, do_store_nop ;0A ;LD A,(BC)
9c15f366
L
1557instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1558instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1559instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1560instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
f24b3c79 1561instr do_fetch_nop, op_RRCA, do_store_nop ;0F ;RRCA
9c15f366
L
1562instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1563instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
f24b3c79 1564instr do_fetch_nop, op_nop, do_store_MDE ;12 ;LD (DE),A
9c15f366
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1565instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1566instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1567instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1568instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
f24b3c79 1569instr do_fetch_nop, op_RLA, do_store_nop ;17 ;RLA
9c15f366
L
1570instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1571instr do_fetch_DE, op_ADDHL, do_store_HL ;19 ;ADD HL,DE
f24b3c79 1572instr do_fetch_MDE, op_nop, do_store_nop ;1A ;LD A,(DE)
9c15f366
L
1573instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1574instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1575instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1576instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
f24b3c79 1577instr do_fetch_nop, op_RRA, do_store_nop ;1F ;RRA
9c15f366
L
1578instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1579instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1580instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1581instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1582instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1583instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1584instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1585instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1586instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1587instr do_fetch_HL, op_ADDHL, do_store_HL ;29 ;ADD HL,HL
1588instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1589instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1590instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1591instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1592instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1593instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1594instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1595instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1596instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1597instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1598instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1599instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1600instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1601instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1602instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1603instr do_fetch_SP, op_ADDHL, do_store_HL ;39 ;ADD HL,SP
1604instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1605instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1606instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1607instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1608instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1609instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
f24b3c79 1610instr do_fetch_nop, op_nop, do_store_nop ;40 ;LD B,B
9c15f366
L
1611instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1612instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1613instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1614instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1615instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1616instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1617instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1618instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
f24b3c79 1619instr do_fetch_nop, op_nop, do_store_nop ;49 ;LD C,C
9c15f366
L
1620instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1621instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1622instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1623instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1624instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1625instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1626instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1627instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
f24b3c79 1628instr do_fetch_nop, op_nop, do_store_nop ;52 ;LD D,D
9c15f366
L
1629instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1630instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1631instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1632instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1633instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1634instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1635instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1636instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
f24b3c79 1637instr do_fetch_nop, op_nop, do_store_nop ;5B ;LD E,E
9c15f366
L
1638instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1639instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1640instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1641instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1642instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1643instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1644instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1645instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
f24b3c79 1646instr do_fetch_nop, op_nop, do_store_nop ;64 ;LD H,H
9c15f366
L
1647instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1648instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1649instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1650instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1651instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1652instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1653instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1654instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
f24b3c79 1655instr do_fetch_nop, op_nop, do_store_nop ;6D ;LD L,L
9c15f366
L
1656instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1657instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1658instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1659instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1660instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1661instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1662instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1663instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1664instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1665instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
1666instr do_fetch_B, op_nop, do_store_A ;78 ;LD A,B
1667instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1668instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1669instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1670instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1671instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1672instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
f24b3c79 1673instr do_fetch_nop, op_nop, do_store_nop ;7F ;LD A,A
9c15f366
L
1674instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1675instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1676instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1677instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1678instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1679instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1680instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1681instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1682instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1683instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1684instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1685instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1686instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1687instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1688instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1689instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1690instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1691instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1692instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1693instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1694instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1695instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1696instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1697instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1698instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1699instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1700instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1701instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1702instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1703instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1704instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1705instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1706instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1707instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1708instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1709instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1710instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1711instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1712instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1713instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1714instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1715instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1716instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1717instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1718instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1719instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1720instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1721instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1722instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1723instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1724instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1725instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1726instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1727instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1728instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1729instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1730instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1731instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1732instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1733instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1734instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1735instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1736instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1737instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1738instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1739instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1740instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1741instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1742instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1743instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1744instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1745instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1746instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1747instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1748instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1749instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1750instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1751instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1752instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1753instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1754instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1755instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1756instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1757instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1758instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1759instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1760instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1761instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1762instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1763instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1764instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1765instr do_fetch_DIR8, op_IN, do_store_A ;DB nn ;IN A,(n)
1766instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1767instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1768instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1769instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1770instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1771instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1772instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1773instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1774instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1775instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1776instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1777instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1778instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1779instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1780instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1781instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1782instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1783instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1784instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1785instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1786instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1787instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1788instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1789instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1790instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1791instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1792instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1793instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1794instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1795instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1796instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1797instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1798instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1799instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1800instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1801instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1802
f24b3c79 1803
9c15f366
L
1804;----------------------------------------------------------------
1805; Lookup table, stolen from z80ex, Z80 emulation library.
1806; http://z80ex.sourceforge.net/
1807
1808; The S, Z, 5 and 3 bits and the parity of the lookup value
1809
1810 .org (PC+255) & 0xff00
1811sz53p_tab:
1812 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1813 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1814 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1815 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1816 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1817 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1818 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1819 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1820 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1821 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1822 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1823 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1824 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1825 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1826 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1827 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1828 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1829 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1830 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1831 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1832 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1833 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1834 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1835 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1836 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1837 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1838 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1839 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1840 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1841 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1842 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1843 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1844
1845; vim:set ts=8 noet nowrap
1846