2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010 Leo C.
7 ; Copyright (C) 2010 Horst S.
9 ; This file is part of avrcpm.
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
40 ldi z_pcl,low (IPLADDR)
41 ldi z_pch,high(IPLADDR)
45 printstring "Ok, CPU is live!"
51 cpi z_pch,DBG_TRACE_BOTTOM
53 cpi z_pch,DBG_TRACE_TOP
60 cpi z_pch,DBG_TRACE_BOTTOM
62 cpi z_pch,DBG_TRACE_TOP
78 ;hier kommt die Interruptbehandlung rein
80 mem_read_s z_pc ;temp=memReadByte(z_pc)
82 ldi zl,low(todo_table*2) ;zhl=todo_table
83 ldi zh,high(todo_table*2) ;
88 lpm insdecl,Z+ ;do_store
91 ldi zh,high(fetch_ops)
96 ;-----------------------------------------------------
97 ; Generate jump to target and position in table
101 .ifndef opjmp_table_pos_
102 .set opjmp_table_page_ = high(PC)
103 .set opjmp_table_pos_ = PC
105 .equ @0 = low(opjmp_table_pos_)
106 .set opjmp_table_pos_ = opjmp_table_pos_ + 1
107 .if high(opjmp_table_pos_) != opjmp_table_page_
108 .warning "Table 'opjump' crosses page boarder."
109 .message "Program will not work, unless the opjump table is relocated."
114 ;--------------------------------------------------
115 ; Generate a table entry for one instruction
117 ; instr fetch, op, store
120 .ifndef inst_table_odd_
121 .set inst_table_odd_ = 0
125 .db inst_table_next_, low(@2), @1, low(@0)
126 .set inst_table_odd_ = 0
128 .set inst_table_next_ = low(@0)
130 .set inst_table_odd_ = 1
134 ;-----------------------------------
143 ;-----------------------------------
147 ldi zh,high(store_ops) ;
152 ;-----------------------------------
159 ;-----------------------------------
160 ; go back to main directly
167 ; ------------ Fetch phase stuff -----------------
169 .org (PC+255) & 0xff00
252 mem_read_ds opl, z_pc
257 mem_read_ds opl, z_pc
259 mem_read_ds oph, z_pc
271 ; ------------ Store phase stuff -----------------
273 .org (PC+255) & 0xff00
369 printstring "Stack pop "
372 printstring ", SP is now "
389 printstring "Stack push "
392 printstring ", SP is now "
407 ; ------------ Operation phase stuff -----------------
409 ;.org (PC+255) & 0xff00
458 ;----------------------------------------------------------------
462 ;| ZZZZZZZ 88888 000 |
468 ;| ZZZZZZZ 88888 000 |
470 ;| Z80 MICROPROCESSOR Instruction Set Summary |
472 ;----------------------------------------------------------------
473 ;----------------------------------------------------------------
474 ;|Mnemonic |SZHPNC|Description |Notes |
475 ;|----------+------+---------------------+----------------------|
476 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
477 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
478 ;|ADD A,s |***V0*|Add |A=A+s |
479 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
480 ;|ADD IX,pp |--?-0*|Add |IX=IX+pp |
481 ;|ADD IY,rr |--?-0*|Add |IY=IY+rr |
482 ;|AND s |**1P00|Logical AND |A=A&s |
483 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
484 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
485 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
486 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
487 ;|CP s |***V1*|Compare |A-s |
488 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
489 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
490 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
491 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
492 ;|CPL |--1-1-|Complement |A=~A |
493 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
494 ;|DEC s |***V1-|Decrement |s=s-1 |
495 ;|DEC xx |------|Decrement |xx=xx-1 |
496 ;|DEC ss |------|Decrement |ss=ss-1 |
497 ;|DI |------|Disable Interrupts | |
498 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
499 ;|EI |------|Enable Interrupts | |
500 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
501 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
502 ;|EX AF,AF' |------|Exchange |AF<->AF' |
503 ;|EX DE,HL |------|Exchange |DE<->HL |
504 ;|EXX |------|Exchange |qq<->qq' (except AF)|
505 ;|HALT |------|Halt | |
506 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
507 ;|IN A,[n] |------|Input |A=[n] |
508 ;|IN r,[C] |***P0-|Input |r=[C] |
509 ;|INC r |***V0-|Increment |r=r+1 |
510 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
511 ;|INC xx |------|Increment |xx=xx+1 |
512 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
513 ;|INC ss |------|Increment |ss=ss+1 |
514 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
515 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
516 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
517 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
518 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
519 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
520 ;|JP nn |------|Unconditional Jump |PC=nn |
521 ;|JP cc,nn |------|Conditional Jump |If cc JP |
522 ;|JR e |------|Unconditional Jump |PC=PC+e |
523 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
524 ;|LD dst,src|------|Load |dst=src |
525 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
526 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
527 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
528 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
529 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
530 ;|NEG |***V1*|Negate |A=-A |
531 ;|NOP |------|No Operation | |
532 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
533 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
534 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
535 ;|OUT [C],r |------|Output |[C]=r |
536 ;|OUT [n],A |------|Output |[n]=A |
537 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
538 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
539 ;|POP xx |------|Pop |xx=[SP]+ |
540 ;|POP qq |------|Pop |qq=[SP]+ |
541 ;|PUSH xx |------|Push |-[SP]=xx |
542 ;|PUSH qq |------|Push |-[SP]=qq |
543 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
544 ;|RET |------|Return |PC=[SP]+ |
545 ;|RET cc |------|Conditional Return |If cc RET |
546 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
547 ;|RETN |------|Return from NMI |PC=[SP]+ |
548 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
549 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
550 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
551 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
552 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
553 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
554 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
555 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
556 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
557 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
558 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
559 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
560 ;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY |
561 ;|SCF |--0-01|Set Carry Flag |CY=1 |
562 ;|SET b,m |------|Set bit |m=mv{2^b} |
563 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
564 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
565 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
566 ;|SUB s |***V1*|Subtract |A=A-s |
567 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
568 ;|----------+------+--------------------------------------------|
569 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
570 ;| S |S |Sign flag (Bit 7) |
571 ;| Z | Z |Zero flag (Bit 6) |
572 ;| HC | H |Half Carry flag (Bit 4) |
573 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
574 ;| N | N |Add/Subtract flag (Bit 1) |
575 ;| CY | C|Carry flag (Bit 0) |
576 ;|-----------------+--------------------------------------------|
577 ;| n |Immediate addressing |
578 ;| nn |Immediate extended addressing |
579 ;| e |Relative addressing (PC=PC+2+offset) |
580 ;| [nn] |Extended addressing |
581 ;| [xx+d] |Indexed addressing |
582 ;| r |Register addressing |
583 ;| [rr] |Register indirect addressing |
584 ;| |Implied addressing |
585 ;| b |Bit addressing |
586 ;| p |Modified page zero addressing (see RST) |
587 ;|-----------------+--------------------------------------------|
588 ;|DEFB n(,...) |Define Byte(s) |
589 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
590 ;|DEFS nn |Define Storage Block |
591 ;|DEFW nn(,...) |Define Word(s) |
592 ;|-----------------+--------------------------------------------|
593 ;| A B C D E |Registers (8-bit) |
594 ;| AF BC DE HL |Register pairs (16-bit) |
595 ;| F |Flag register (8-bit) |
596 ;| I |Interrupt page address register (8-bit) |
597 ;| IX IY |Index registers (16-bit) |
598 ;| PC |Program Counter register (16-bit) |
599 ;| R |Memory Refresh register |
600 ;| SP |Stack Pointer register (16-bit) |
601 ;|-----------------+--------------------------------------------|
602 ;| b |One bit (0 to 7) |
603 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
604 ;| d |One-byte expression (-128 to +127) |
605 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
606 ;| e |One-byte expression (-126 to +129) |
607 ;| m |Any register r, [HL] or [xx+d] |
608 ;| n |One-byte expression (0 to 255) |
609 ;| nn |Two-byte expression (0 to 65535) |
610 ;| pp |Register pair BC, DE, IX or SP |
611 ;| qq |Register pair AF, BC, DE or HL |
612 ;| qq' |Alternative register pair AF, BC, DE or HL |
613 ;| r |Register A, B, C, D, E, H or L |
614 ;| rr |Register pair BC, DE, IY or SP |
615 ;| s |Any register r, value n, [HL] or [xx+d] |
616 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
617 ;| ss |Register pair BC, DE, HL or SP |
618 ;| xx |Index register IX or IY |
619 ;|-----------------+--------------------------------------------|
620 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
621 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
622 ;| <- -> |Rotate left/right |
623 ;| [ ] |Indirect addressing |
624 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
625 ;| { } |Combination of operands |
626 ;| # |Also BC=BC-1,DE=DE-1 |
627 ;| ## |Only lower 4 bits of accumulator A used |
628 ;----------------------------------------------------------------
630 ;How the flags are supposed to work:
631 ;7 ZFL_S - Sign flag (=MSBit of result)
632 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
633 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
634 ;2 ZFL_P - Parity/2-complement Overflow
635 ;1 ZFL_N - Subtract - set if last op was a subtract
638 ;I sure hope I got the mapping between flags and instructions correct...
655 ;------------------------------------------------;
656 ; Load table value from flash indexed by source reg.
658 ; ldpmx dstreg,tablebase,indexreg
660 ; (6 words, 8 cycles)
663 ldi zh,high(@1*2) ; table must be page aligned
668 .macro do_z80_flags_V
670 bmov z_flags, ZFL_P, temp, AVR_V
674 .macro do_z80_flags_set_N
676 ori z_flags, (1<<ZFL_N) ; Negation auf 1
680 .macro do_z80_flags_set_HN
682 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
686 .macro do_z80_flags_clear_N
688 andi z_flags,~(1<<ZFL_N)
692 .macro do_z80_flags_clear_HN
694 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
699 .macro do_z80_flags_copy_HC
701 bmov z_flags, ZFL_H, z_flags, ZFL_H
705 .macro do_z80_flags_op_rotate
706 ; must not change avr carry flag!
708 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
710 andi z_flags, ~( (1<<ZFL_C) )
714 .macro do_z80_flags_op_and
716 ori z_flags,(1<<ZFL_H)
720 .macro do_z80_flags_op_or
727 ;----------------------------------------------------------------
732 printstring "Invalid opcode! "
740 ;----------------------------------------------------------------
741 ;|Mnemonic |SZHPNC|Description |Notes |
742 ;----------------------------------------------------------------
743 ;|OUT [n],A |------|Output |[n]=A |
746 ;Interface with peripherials goes here :)
747 do_op_outa: ; out (opl),a
750 printstring "Port write: "
763 ;----------------------------------------------------------------
764 ;|Mnemonic |SZHPNC|Description |Notes |
765 ;----------------------------------------------------------------
766 ;|IN A,[n] |------|Input |A=[n] |
769 do_op_in: ; in a,(opl)
772 printstring "Port read: ("
788 ;----------------------------------------------------------------
789 ;|Mnemonic |SZHPNC|Description |Notes |
790 ;----------------------------------------------------------------
791 ;|INC r |***V0-|Increment |r=r+1 |
792 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
793 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
794 ;|----------|SZHP C|---------- 8080 ----------------------------|
795 ;|INC r |**-P0-|Increment |r=r+1 |
796 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
803 andi z_flags,(1<<ZFL_C) ; preserve C-flag
804 ldpmx temp2, sz53p_tab, opl
806 bmov z_flags, ZFL_H, temp, AVR_H
814 andi z_flags,(1<<ZFL_C) ; preserve C-flag
815 ldpmx temp2, sz53p_tab, z_a
817 bmov z_flags, ZFL_H, temp, AVR_H
821 ;----------------------------------------------------------------
822 ;|Mnemonic |SZHPNC|Description |Notes |
823 ;----------------------------------------------------------------
824 ;|DEC r |***V1-|Decrement |s=s-1 |
825 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
826 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
827 ;|----------|SZHP C|---------- 8080 ----------------------------|
828 ;|DEC r |**-P -|Increment |r=r+1 |
829 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
835 andi z_flags,(1<<ZFL_C) ; preserve C-flag
836 ldpmx temp2, sz53p_tab, opl
838 bmov z_flags, ZFL_H, temp, AVR_H
847 andi z_flags,(1<<ZFL_C) ; preserve C-flag
848 ldpmx temp2, sz53p_tab, z_a
850 bmov z_flags, ZFL_H, temp, AVR_H
855 ;----------------------------------------------------------------
856 ;|Mnemonic |SZHPNC|Description |Notes |
857 ;----------------------------------------------------------------
858 ;|INC xx |------|Increment |xx=xx+1 |
859 ;|INC ss |------|Increment |ss=ss+1 |
867 ;----------------------------------------------------------------
868 ;|Mnemonic |SZHPNC|Description |Notes |
869 ;----------------------------------------------------------------
870 ;|DEC xx |------|Decrement |xx=xx-1 |
871 ;|DEC ss |------|Decrement |ss=ss-1 |
879 ;----------------------------------------------------------------
880 ;|Mnemonic |SZHPNC|Description |Notes |
881 ;----------------------------------------------------------------
882 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
883 ;|----------|SZHP C|---------- 8080 ----------------------------|
884 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
888 ;Rotate Left Cyclical. All bits move 1 to the
889 ;left, the msb becomes c and lsb.
890 do_z80_flags_op_rotate
895 ori z_flags, (1<<ZFL_C)
899 ;----------------------------------------------------------------
900 ;|Mnemonic |SZHPNC|Description |Notes |
901 ;----------------------------------------------------------------
902 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
903 ;|----------|SZHP C|---------- 8080 ----------------------------|
904 ;|RRCA |---- *|Rotate Right Circular|A=->A |
908 ;Rotate Right Cyclical. All bits move 1 to the
909 ;right, the lsb becomes c and msb.
910 do_z80_flags_op_rotate
915 ori z_flags, (1<<ZFL_C)
919 ;----------------------------------------------------------------
920 ;|Mnemonic |SZHPNC|Description |Notes |
921 ;----------------------------------------------------------------
922 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
923 ;|----------|SZHP C|---------- 8080 ----------------------------|
924 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
928 ;Rotate Right. All bits move 1 to the right, the lsb
929 ;becomes c, c becomes msb.
930 clc ; get z80 carry to avr carry
933 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
934 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
938 ;----------------------------------------------------------------
939 ;|Mnemonic |SZHPNC|Description |Notes |
940 ;----------------------------------------------------------------
941 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
942 ;|----------|SZHP C|---------- 8080 ----------------------------|
943 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
947 ;Rotate Left. All bits move 1 to the left, the msb
948 ;becomes c, c becomes lsb.
952 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
953 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
957 ;----------------------------------------------------------------
958 ;|Mnemonic |SZHPNC|Description |Notes |
959 ;----------------------------------------------------------------
960 ;|ADD A,s |***V0*|Add |A=A+s |
961 ;|----------|SZHP C|---------- 8080 ----------------------------|
962 ;|ADD A,s |***P *|Add |A=A+s |
968 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
969 bmov z_flags,ZFL_C, temp,AVR_C
970 bmov z_flags,ZFL_H, temp,AVR_H
974 ;----------------------------------------------------------------
975 ;|Mnemonic |SZHPNC|Description |Notes |
976 ;----------------------------------------------------------------
977 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
978 ;|----------|SZHP C|---------- 8080 ----------------------------|
979 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
988 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
989 bmov z_flags,ZFL_C, temp,AVR_C
990 bmov z_flags,ZFL_H, temp,AVR_H
994 ;----------------------------------------------------------------
995 ;|Mnemonic |SZHPNC|Description |Notes |
996 ;----------------------------------------------------------------
997 ;|SUB s |***V1*|Subtract |A=A-s |
998 ;|----------|SZHP C|---------- 8080 ----------------------------|
999 ;|SUB s |***P *|Subtract |A=A-s |
1005 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1006 bmov z_flags,ZFL_C, temp,AVR_C
1007 bmov z_flags,ZFL_H, temp,AVR_H
1012 ;----------------------------------------------------------------
1013 ;|Mnemonic |SZHPNC|Description |Notes |
1014 ;----------------------------------------------------------------
1015 ;|CP s |***V1*|Compare |A-s |
1016 ;|----------|SZHP C|---------- 8080 ----------------------------|
1017 ;|CP s |***P *|Compare |A-s |
1024 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
1025 bmov z_flags,ZFL_C, temp,AVR_C
1026 bmov z_flags,ZFL_H, temp,AVR_H
1031 ;----------------------------------------------------------------
1032 ;|Mnemonic |SZHPNC|Description |Notes |
1033 ;----------------------------------------------------------------
1034 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1035 ;|----------|SZHP C|---------- 8080 ----------------------------|
1036 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1045 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1046 bmov z_flags,ZFL_C, temp,AVR_C
1047 bmov z_flags,ZFL_H, temp,AVR_H
1052 ;----------------------------------------------------------------
1053 ;|Mnemonic |SZHPNC|Description |Notes |
1054 ;----------------------------------------------------------------
1055 ;|AND s |**1P00|Logical AND |A=A&s |
1056 ;|----------|SZHP C|---------- 8080 ----------------------------|
1057 ;|AND s |**-P 0|Logical AND |A=A&s |
1062 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1067 ;----------------------------------------------------------------
1068 ;|Mnemonic |SZHPNC|Description |Notes |
1069 ;----------------------------------------------------------------
1070 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
1071 ;|----------|SZHP C|---------- 8080 ----------------------------|
1072 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
1077 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1081 ;----------------------------------------------------------------
1082 ;|Mnemonic |SZHPNC|Description |Notes |
1083 ;----------------------------------------------------------------
1084 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1085 ;|----------|SZHP C|---------- 8080 ----------------------------|
1086 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1091 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1095 ;----------------------------------------------------------------
1096 ;|Mnemonic |SZHPNC|Description |Notes |
1097 ;----------------------------------------------------------------
1098 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1099 ;|----------|SZHP C|---------- 8080 ----------------------------|
1100 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1109 bmov z_flags,ZFL_H, temp,AVR_H
1110 bmov z_flags,ZFL_C, temp,AVR_C
1111 do_z80_flags_clear_N
1114 ;----------------------------------------------------------------
1115 ;|Mnemonic |SZHPNC|Description |Notes |
1116 ;----------------------------------------------------------------
1117 ;|LD dst,src|------|Load |dst=src |
1120 do_op_sthl: ;store hl to mem loc in opl:h
1129 ;----------------------------------------------------------------
1130 ;|Mnemonic |SZHPNC|Description |Notes |
1131 ;----------------------------------------------------------------
1132 ;|LD dst,src|------|Load |dst=src |
1142 ;----------------------------------------------------------------
1143 ;|Mnemonic |SZHPNC|Description |Notes |
1144 ;----------------------------------------------------------------
1145 ;|LD dst,src|------|Load |dst=src |
1152 ;----------------------------------------------------------------
1153 ;|Mnemonic |SZHPNC|Description |Notes |
1154 ;----------------------------------------------------------------
1155 ;|DAA |***P-*|Decimal Adjust Acc. | |
1156 ;|----------|SZHP C|---------- 8080 ----------------------------|
1160 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1161 ; This instruction conditionally adjusts the accumulator for BCD addition
1162 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1163 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1165 ; -------------------------------------------------------------------
1166 ; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1167 ; | Oper |Before |upper digit |Before |lower digit| added |After |
1168 ; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1169 ; |-------+-------+------------+-------+-----------+--------+-------|
1170 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1171 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1172 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1173 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1174 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1175 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1176 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1177 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1178 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1179 ; |-------+-------+------------+-------+-----------+--------+-------|
1180 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1181 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1182 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1183 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1184 ; -------------------------------------------------------------------
1186 ; The H flag is affected as follows:
1188 ; ---------------------
1189 ; | N | H | low |H' |
1191 ; |---+---+-------+---|
1192 ; | 0 | * | 0-9 | 0 |
1193 ; | 0 | * | a-f | 1 |
1195 ; | 1 | 1 | 6-f | 0 |
1196 ; | 1 | 1 | 0-5 | 1 |
1197 ; ---------------------
1201 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1202 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1203 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1210 sbrc z_flags,ZFL_N ;if add-op
1211 rjmp op_da_sub ;then
1215 ldi temp2,0 ; new C and H flag
1216 sbrc z_flags,ZFL_H ; |
1217 rjmp op_da_a01 ; if (H flag ...
1220 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1223 ldi oph,0x06 ; add 6 to lower nibble
1226 ori temp2,(1<<ZFL_H) ; set new H flag
1229 ori temp2,(1<<ZFL_C) ; set new H flag
1231 sbrc z_flags,ZFL_C ; |
1232 rjmp op_da_a12 ; if (C flag ...
1233 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1236 ldi oph,0x60 ; add 6 to lower nibble
1238 ori temp2,(1<<ZFL_C) ; set new C flag
1240 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1241 or z_flags,temp2 ; merge new C and H flag
1246 op_da_sub: ;else (sub-op)
1247 rcall do_op_inv ; TODO: !
1254 ldi temp2,0 ;new C and H flag
1255 ldi oph,0 ;oph: what to add
1257 sbrc z_flags,ZFL_N ;if add-op
1258 rjmp op_da_sub ;then
1262 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1264 ori oph,0x06 ; add 6
1265 ori temp2,(1<<ZFL_H) ; set new H flag
1267 sbrc z_flags,ZFL_C ; |
1268 rjmp op_da_a02 ; if (C flag ...
1269 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1272 ori oph,0x60 ; add 0x60
1273 ori temp2,(1<<ZFL_C) ; set new C flag
1276 op_da_a10: ; else (lower nibble is 0x09 or lower)
1277 sbrc z_flags,ZFL_C ; |
1278 rjmp op_da_a12 ; if (C flag ...
1279 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1282 ori oph,0x60 ; add 0x60
1283 ori temp2,(1<<ZFL_C) ; set new C flag
1285 sbrs z_flags,ZFL_H ; if (H flag)
1287 ori oph,0x06 ; add 0x06
1290 cpi temp,0x06 ; if (lower nibble >= 0x0A)
1292 ori temp2,(1<<ZFL_H) ; set new H flag
1297 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1298 or z_flags,temp2 ; merge new C and H flag
1301 op_da_sub: ;else (sub-op)
1302 rcall do_op_inv ; TODO: !
1307 ;----------------------------------------------------------------
1308 ;|Mnemonic |SZHPNC|Description |Notes |
1309 ;----------------------------------------------------------------
1310 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1311 ;|----------|SZHP C|---------- 8080 ----------------------------|
1315 do_z80_flags_clear_HN
1316 ori z_flags,(1<<ZFL_C)
1319 ;----------------------------------------------------------------
1320 ;|Mnemonic |SZHPNC|Description |Notes |
1321 ;----------------------------------------------------------------
1322 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
1323 ;|----------|SZHP C|---------- 8080 ----------------------------|
1324 ;|CCF |---- 1|Set Carry Flag |CY=1 |
1327 do_z80_flags_clear_N
1328 do_z80_flags_copy_HC
1333 ;----------------------------------------------------------------
1334 ;|Mnemonic |SZHPNC|Description |Notes |
1335 ;----------------------------------------------------------------
1336 ;|CPL |--1-1-|Complement |A=~A |
1337 ;|----------|SZHP C|---------- 8080 ----------------------------|
1338 ;|CPL |---- -|Complement |A=~A |
1347 ;----------------------------------------------------------------
1348 ;|Mnemonic |SZHPNC|Description |Notes |
1349 ;----------------------------------------------------------------
1350 ;|PUSH xx |------|Push |-[SP]=xx |
1351 ;|PUSH qq |------|Push |-[SP]=qq |
1364 printstring "Stack push "
1367 printstring ", SP is now "
1375 ;----------------------------------------------------------------
1376 ;|Mnemonic |SZHPNC|Description |Notes |
1377 ;----------------------------------------------------------------
1378 ;|POP xx |------|Pop |xx=[SP]+ |
1379 ;|POP qq |------|Pop |qq=[SP]+ |
1392 printstring "Stack pop "
1395 printstring ", SP is now "
1402 ;----------------------------------------------------------------
1403 ;|Mnemonic |SZHPNC|Description |Notes |
1404 ;----------------------------------------------------------------
1405 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1406 ;|EX DE,HL |------|Exchange |DE<->HL |
1407 ;-----------------------------Z80--------------------------------
1417 ;----------------------------------------------------------------
1418 ;|Mnemonic |SZHPNC|Description |Notes |
1419 ;----------------------------------------------------------------
1421 ; TODO: Implement IFF1, IFF2
1425 ;----------------------------------------------------------------
1426 ;|Mnemonic |SZHPNC|Description |Notes |
1427 ;----------------------------------------------------------------
1429 ; TODO: Implement IFF1, IFF2
1433 ;----------------------------------------------------------------
1434 ;|Mnemonic |SZHPNC|Description |Notes |
1435 ;----------------------------------------------------------------
1436 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1437 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1438 ;|RET cc |------|Conditional Return |If cc RET |
1446 ;----------------------------------------------------------------
1447 ;|Mnemonic |SZHPNC|Description |Notes |
1448 ;----------------------------------------------------------------
1449 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1450 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1451 ;|RET cc |------|Conditional Return |If cc RET |
1459 ;----------------------------------------------------------------
1460 ;|Mnemonic |SZHPNC|Description |Notes |
1461 ;----------------------------------------------------------------
1462 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1463 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1464 ;|RET cc |------|Conditional Return |If cc RET |
1472 ;----------------------------------------------------------------
1473 ;|Mnemonic |SZHPNC|Description |Notes |
1474 ;----------------------------------------------------------------
1475 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1476 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1477 ;|RET cc |------|Conditional Return |If cc RET |
1485 ;----------------------------------------------------------------
1486 ;|Mnemonic |SZHPNC|Description |Notes |
1487 ;----------------------------------------------------------------
1488 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1489 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1490 ;|RET cc |------|Conditional Return |If cc RET |
1498 ;----------------------------------------------------------------
1499 ;|Mnemonic |SZHPNC|Description |Notes |
1500 ;----------------------------------------------------------------
1501 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1502 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1503 ;|RET cc |------|Conditional Return |If cc RET |
1511 ;----------------------------------------------------------------
1512 ;|Mnemonic |SZHPNC|Description |Notes |
1513 ;----------------------------------------------------------------
1514 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1515 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1516 ;|RET cc |------|Conditional Return |If cc RET |
1519 do_op_ifp: ;sign positive, aka s=0
1524 ;----------------------------------------------------------------
1525 ;|Mnemonic |SZHPNC|Description |Notes |
1526 ;----------------------------------------------------------------
1527 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1528 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1529 ;|RET cc |------|Conditional Return |If cc RET |
1532 do_op_ifm: ;sign negative, aka s=1
1538 ; ----------------------- Opcode decoding -------------------------
1540 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1541 ; operations: fetch, do something, store.
1542 ; The table is made of 256 words.
1544 ;.org (PC+255) & 0xff00
1546 instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1547 instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
1548 instr do_fetch_nop, op_nop, do_store_MBC ;02 ;LD (BC),A
1549 instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1550 instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1551 instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1552 instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
1553 instr do_fetch_nop, op_RLCA, do_store_nop ;07 ;RLCA
1554 instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1555 instr do_fetch_BC, op_ADDHL, do_store_HL ;09 ;ADD HL,BC
1556 instr do_fetch_MBC, op_nop, do_store_nop ;0A ;LD A,(BC)
1557 instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1558 instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1559 instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1560 instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
1561 instr do_fetch_nop, op_RRCA, do_store_nop ;0F ;RRCA
1562 instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1563 instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
1564 instr do_fetch_nop, op_nop, do_store_MDE ;12 ;LD (DE),A
1565 instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1566 instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1567 instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1568 instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
1569 instr do_fetch_nop, op_RLA, do_store_nop ;17 ;RLA
1570 instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1571 instr do_fetch_DE, op_ADDHL, do_store_HL ;19 ;ADD HL,DE
1572 instr do_fetch_MDE, op_nop, do_store_nop ;1A ;LD A,(DE)
1573 instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1574 instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1575 instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1576 instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
1577 instr do_fetch_nop, op_RRA, do_store_nop ;1F ;RRA
1578 instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1579 instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1580 instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1581 instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1582 instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1583 instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1584 instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1585 instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1586 instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1587 instr do_fetch_HL, op_ADDHL, do_store_HL ;29 ;ADD HL,HL
1588 instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1589 instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1590 instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1591 instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1592 instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1593 instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1594 instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1595 instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1596 instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1597 instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1598 instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1599 instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1600 instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1601 instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1602 instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1603 instr do_fetch_SP, op_ADDHL, do_store_HL ;39 ;ADD HL,SP
1604 instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1605 instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1606 instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1607 instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1608 instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1609 instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
1610 instr do_fetch_nop, op_nop, do_store_nop ;40 ;LD B,B
1611 instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1612 instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1613 instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1614 instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1615 instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1616 instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1617 instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1618 instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
1619 instr do_fetch_nop, op_nop, do_store_nop ;49 ;LD C,C
1620 instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1621 instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1622 instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1623 instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1624 instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1625 instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1626 instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1627 instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
1628 instr do_fetch_nop, op_nop, do_store_nop ;52 ;LD D,D
1629 instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1630 instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1631 instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1632 instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1633 instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1634 instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1635 instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1636 instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
1637 instr do_fetch_nop, op_nop, do_store_nop ;5B ;LD E,E
1638 instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1639 instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1640 instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1641 instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1642 instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1643 instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1644 instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1645 instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
1646 instr do_fetch_nop, op_nop, do_store_nop ;64 ;LD H,H
1647 instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1648 instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1649 instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1650 instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1651 instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1652 instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1653 instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1654 instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
1655 instr do_fetch_nop, op_nop, do_store_nop ;6D ;LD L,L
1656 instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1657 instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1658 instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1659 instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1660 instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1661 instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1662 instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1663 instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1664 instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1665 instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
1666 instr do_fetch_B, op_nop, do_store_A ;78 ;LD A,B
1667 instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1668 instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1669 instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1670 instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1671 instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1672 instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
1673 instr do_fetch_nop, op_nop, do_store_nop ;7F ;LD A,A
1674 instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1675 instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1676 instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1677 instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1678 instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1679 instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1680 instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1681 instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1682 instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1683 instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1684 instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1685 instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1686 instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1687 instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1688 instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1689 instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1690 instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1691 instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1692 instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1693 instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1694 instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1695 instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1696 instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1697 instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1698 instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1699 instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1700 instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1701 instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1702 instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1703 instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1704 instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1705 instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1706 instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1707 instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1708 instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1709 instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1710 instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1711 instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1712 instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1713 instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1714 instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1715 instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1716 instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1717 instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1718 instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1719 instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1720 instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1721 instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1722 instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1723 instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1724 instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1725 instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1726 instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1727 instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1728 instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1729 instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1730 instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1731 instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1732 instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1733 instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1734 instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1735 instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1736 instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1737 instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1738 instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1739 instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1740 instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1741 instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1742 instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1743 instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1744 instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1745 instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1746 instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1747 instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1748 instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1749 instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1750 instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1751 instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1752 instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1753 instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1754 instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1755 instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1756 instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1757 instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1758 instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1759 instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1760 instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1761 instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1762 instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1763 instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1764 instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1765 instr do_fetch_DIR8, op_IN, do_store_A ;DB nn ;IN A,(n)
1766 instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1767 instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1768 instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1769 instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1770 instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1771 instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1772 instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1773 instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1774 instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1775 instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1776 instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1777 instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1778 instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1779 instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1780 instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1781 instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1782 instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1783 instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1784 instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1785 instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1786 instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1787 instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1788 instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1789 instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1790 instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1791 instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1792 instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1793 instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1794 instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1795 instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1796 instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1797 instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1798 instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1799 instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1800 instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1801 instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1804 ;----------------------------------------------------------------
1805 ; Lookup table, stolen from z80ex, Z80 emulation library.
1806 ; http://z80ex.sourceforge.net/
1808 ; The S, Z, 5 and 3 bits and the parity of the lookup value
1810 .org (PC+255) & 0xff00
1812 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1813 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1814 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1815 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1816 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1817 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1818 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1819 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1820 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1821 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1822 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1823 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1824 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1825 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1826 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1827 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1828 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1829 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1830 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1831 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1832 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1833 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1834 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1835 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1836 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1837 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1838 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1839 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1840 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1841 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1842 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1843 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1845 ; vim:set ts=8 noet nowrap