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* Updateted old interpreters
[avrcpm.git] / avr / 8080int-jmp.asm
1 ; 8080 Interpreter.
2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
3 ;
4
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010 Leo C.
7 ; Copyright (C) 2010 Horst S.
8
9 ; This file is part of avrcpm.
10 ;
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
15 ;
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
20 ;
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23 ;
24 ; $Id$
25 ;
26
27 .dseg
28 z_regs:
29 z_b: .byte 1
30 z_c: .byte 1
31 z_d: .byte 1
32 z_e: .byte 1
33 z_h: .byte 1
34 z_l: .byte 1
35
36 .equ oz_b = 0
37 .equ oz_c = 1
38 .equ oz_d = 2
39 .equ oz_e = 3
40 .equ oz_h = 4
41 .equ oz_l = 5
42
43
44 #if EM_Z80
45 z_b2: .byte 1
46 z_c2: .byte 1
47 z_d2: .byte 1
48 z_e2: .byte 1
49 z_h2: .byte 1
50 z_l2: .byte 1
51 z_f2: .byte 1
52 z_a2: .byte 1
53 .equ r2ofs = z_b2-z_b
54 .equ oz_b2 = 6
55 .equ oz_c2 = 7
56 .equ oz_d2 = 8
57 .equ oz_e2 = 9
58 .equ oz_h2 = 10
59 .equ oz_l2 = 11
60 .equ oz_f2 = 12
61 .equ oz_a2 = 13
62
63 z_xh: .byte 1
64 z_xl: .byte 1
65 z_yh: .byte 1
66 z_yl: .byte 1
67
68 z_i: .byte 1
69 z_r: .byte 1
70 .equ oz_xh = 14
71 .equ oz_xl = 15
72 .equ oz_yh = 16
73 .equ oz_yl = 17
74 .equ oz_i = 18
75 .equ oz_r = 19
76
77 z_istat: .byte 1
78 .equ oz_istat = 20
79
80 .equ IM_MASK = 0x03 ;Mask IM 0..2
81 .equ IM0 = 0
82 .equ IM1 = 1
83 .equ IM2 = 2
84
85 .equ IFF1 = 2 ;IFF1 Flag
86 .equ IFF2 = 3 ;IFF2 Flag
87
88 #endif
89
90 .cseg
91
92 ;Init z80
93 z80_init:
94 ldi z_pcl,low (IPLADDR)
95 ldi z_pch,high(IPLADDR)
96
97 cbi flags,trace
98 printnewline
99 printstring "Ok, CPU is live!"
100 printnewline
101
102 main:
103 .if INS_DEBUG
104 cbi flags,trace
105 cpi z_pch,DBG_TRACE_BOTTOM
106 brlo notraceon
107 cpi z_pch,DBG_TRACE_TOP
108 brsh notraceon
109 sbi flags,trace
110 notraceon:
111 .endif
112
113 .if PRINT_PC
114 cpi z_pch,DBG_TRACE_BOTTOM
115 brlo noprintpc
116 cpi z_pch,DBG_TRACE_TOP
117 brsh noprintpc
118
119 printnewline
120 printstring "PC="
121 movw temp,z_pcl
122 lcall printhexw
123 printstring " "
124 noprintpc:
125 .endif
126
127 .if INS_DEBUG
128 sbic flags,trace
129 rcall printregs
130 .endif
131
132 ;hier kommt die Interruptbehandlung rein
133
134 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
135 adiw z_pcl,1 ;++z_pc
136 ldi zh,high(opcjmp) ;
137 icall
138 rjmp main ;
139
140
141 .listmac
142
143 ;--------------------------------------------------
144 ; Generate a table entry for one instruction
145 ;
146 ; instr fetch, op, store
147 ;
148 .macro instr
149 .ifndef opcjmp_table_pos_
150 .set todo_table_pos_ = PC
151 ; Place the opcode jump table on the next available location.
152 .equ opcjmp = (PC+255) & 0xff00
153 .set opcjmp_table_pos_ = opcjmp
154 .endif
155
156 .if todo_table_pos_ < opcjmp + 256 + 128
157 .if todo_table_pos_ + 3 >= opcjmp
158 .set todo_table_pos_ = opcjmp + 256 + 128
159 .endif
160 .endif
161
162 .set fetch_ = (@0 != do_fetch_nop) ; must call or jump to fetch phase
163 .set op_ = (do_@1 != do_op_nop) ; must call or jump to op phase
164 .set store_ = (@2 != do_store_nop) ; must jump to store phase
165 .set cnt_ = fetch_ + op_ + store_
166
167 .set do_@0_@1_@2 = todo_table_pos_ ; make a label
168
169 .org opcjmp_table_pos_
170 .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1
171
172 .if cnt_ == 0 ; nothing to do (nop)
173 ret ; go back to main
174 .endif
175
176 .if cnt_ == 1 ; jump direct to action
177 .if fetch_ ;
178 rjmp @0 ;
179 .endif
180 .if op_
181 rjmp do_@1 ; do op and return to main
182 .endif
183 .if store_ ;
184 rjmp @2 ;
185 .endif
186 .endif
187
188 ; two or tree actions
189 .if cnt_ >= 2 ; jump direct to action
190 rjmp do_@0_@1_@2 ; generate a jump to action table
191
192 .org do_@0_@1_@2
193
194 .if fetch_ ; must fetch
195 .if op_ || store_
196 rcall @0 ; fetch and come back here
197 .else ;
198 rjmp @0 ; fetch and return to main
199 .endif
200 .endif
201 .if op_ ; must exec op
202 .if store_
203 rcall do_@1 ; do op and come back here
204 .else
205 rjmp do_@1 ; do op and return to main
206 .endif
207 .endif
208 .if store_ ; must store
209 rjmp @2 ; store is allways last
210 .endif
211
212 .set todo_table_pos_ = PC
213
214 .endif
215
216 .endm
217
218
219 ; ------------ Fetch phase stuff -----------------
220
221 ;.org (PC+255) & 0xff00
222 fetch_ops:
223 do_fetch_nop:
224 ret
225
226 do_fetch_a:
227 mov opl,z_a
228 ret
229
230 do_fetch_b:
231 lds opl,z_b
232 ret
233
234 do_fetch_c:
235 lds opl,z_c
236 ret
237
238 do_fetch_d:
239 lds opl,z_d
240 ret
241
242 do_fetch_e:
243 lds opl,z_e
244 ret
245
246 do_fetch_h:
247 lds opl,z_h
248 ret
249
250 do_fetch_l:
251 lds opl,z_l
252 ret
253
254 do_fetch_af:
255 mov opl,z_flags
256 mov oph,z_a
257 ret
258
259 do_fetch_bc:
260 lds opl,z_c
261 lds oph,z_b
262 ret
263
264 do_fetch_de:
265 lds opl,z_e
266 lds oph,z_d
267 ret
268
269 do_fetch_hl:
270 lds opl,z_l
271 lds oph,z_h
272 ret
273
274 do_fetch_sp:
275 movw opl,z_spl
276 ret
277
278 do_fetch_mbc:
279 lds xh,z_b
280 lds xl,z_c
281 mem_read_d z_a
282 ret
283
284 do_fetch_mde:
285 lds xh,z_d
286 lds xl,z_e
287 mem_read_d z_a
288 ret
289
290 do_fetch_mhl:
291 lds xh,z_h
292 lds xl,z_l
293 mem_read_d opl
294 ret
295
296 do_fetch_msp:
297 movw x,z_spl
298 mem_read_d opl
299 adiw x,1
300 mem_read_d oph
301 ret
302
303 do_fetch_dir8:
304 mem_read_ds opl, z_pc
305 adiw z_pcl,1
306 ret
307
308 do_fetch_dir16:
309 mem_read_ds opl, z_pc
310 adiw z_pcl,1
311 mem_read_ds oph, z_pc
312 adiw z_pcl,1
313 ret
314
315 do_fetch_rst:
316 movw x,z_pcl
317 sbiw x,1
318 mem_read_d opl
319 andi opl,0x38
320 ldi oph,0
321 ret
322
323 ; ------------ Store phase stuff -----------------
324
325 ;.org (PC+255) & 0xff00
326 store_ops:
327 do_store_nop:
328 ret
329
330 do_store_a:
331 mov z_a,opl
332 ret
333
334 do_store_b:
335 sts z_b,opl
336 ret
337
338 do_store_c:
339 sts z_c,opl
340 ret
341
342 do_store_d:
343 sts z_d,opl
344 ret
345
346 do_store_e:
347 sts z_e,opl
348 ret
349
350 do_store_h:
351 sts z_h,opl
352 ret
353
354 do_store_l:
355 sts z_l,opl
356 ret
357
358 do_store_af:
359 mov z_a,oph
360 mov z_flags,opl
361 ret
362
363 do_store_bc:
364 sts z_b,oph
365 sts z_c,opl
366 ret
367
368 do_store_de:
369 sts z_d,oph
370 sts z_e,opl
371 ret
372
373 do_store_hl:
374 sts z_h,oph
375 sts z_l,opl
376 ret
377
378 do_store_mbc:
379 lds xh,z_b
380 lds xl,z_c
381 mem_write_s z_a
382 ret
383
384 do_store_mde:
385 lds xh,z_d
386 lds xl,z_e
387 mem_write_s z_a
388 ret
389
390 do_store_mhl:
391 lds xh,z_h
392 lds xl,z_l
393 mem_write_s opl
394 ret
395
396 do_store_msp:
397 movw xl,z_spl
398 mem_write_s opl
399 adiw xl,1
400 mem_write_s oph
401 ret
402
403 do_store_sp:
404 movw z_spl,opl
405 ret
406
407 do_store_pc:
408 movw z_pcl,opl
409 ret
410
411 do_store_ret:
412 movw x,z_spl
413 mem_read_d z_pcl
414 adiw x,1
415 mem_read_d z_pch
416 adiw x,1
417 movw z_spl,x
418
419 .if STACK_DBG
420 printnewline
421 printstring "Stack pop "
422 movw temp,z_pcl
423 rcall printhexw
424 printstring ", SP is now "
425 movw temp,z_spl
426 rcall printhexw
427 printstring ". "
428 .endif
429 ret
430
431 do_store_call:
432 movw xl,z_spl
433 sbiw x,1
434 mem_write_s z_pch
435 sbiw x,1
436 mem_write_s z_pcl
437 movw z_spl,xl
438
439 .if STACK_DBG
440 printnewline
441 printstring "Stack push "
442 movw temp,z_pcl
443 rcall printhexw
444 printstring ", SP is now "
445 movw temp,z_spl
446 rcall printhexw
447 printstring ". "
448 .endif
449 movw z_pcl,opl
450 ret
451
452
453 do_store_am:
454 mem_write_ds op, z_a
455 ret
456
457
458
459 ; ------------ Operation phase stuff -----------------
460
461 ;----------------------------------------------------------------
462 ;| |
463 ;| Zilog |
464 ;| |
465 ;| ZZZZZZZ 88888 000 |
466 ;| Z 8 8 0 0 |
467 ;| Z 8 8 0 0 0 |
468 ;| Z 88888 0 0 0 |
469 ;| Z 8 8 0 0 0 |
470 ;| Z 8 8 0 0 |
471 ;| ZZZZZZZ 88888 000 |
472 ;| |
473 ;| Z80 MICROPROCESSOR Instruction Set Summary |
474 ;| |
475 ;----------------------------------------------------------------
476 ;----------------------------------------------------------------
477 ;|Mnemonic |SZHPNC|Description |Notes |
478 ;|----------+------+---------------------+----------------------|
479 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
480 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
481 ;|ADD A,s |***V0*|Add |A=A+s |
482 ;|ADD HL,ss |--*-0*|Add |HL=HL+ss |
483 ;|ADD IX,pp |--*-0*|Add |IX=IX+pp |
484 ;|ADD IY,rr |--*-0*|Add |IY=IY+rr |
485 ;|AND s |**1P00|Logical AND |A=A&s |
486 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
487 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
488 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
489 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
490 ;|CP s |***V1*|Compare |A-s |
491 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
492 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
493 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
494 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
495 ;|CPL |--1-1-|Complement |A=~A |
496 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
497 ;|DEC s |***V1-|Decrement |s=s-1 |
498 ;|DEC xx |------|Decrement |xx=xx-1 |
499 ;|DEC ss |------|Decrement |ss=ss-1 |
500 ;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 |
501 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
502 ;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 |
503 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
504 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
505 ;|EX AF,AF' |------|Exchange |AF<->AF' |
506 ;|EX DE,HL |------|Exchange |DE<->HL |
507 ;|EXX |------|Exchange |qq<->qq' (except AF)|
508 ;|HALT |------|Halt | |
509 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
510 ;|IN A,[n] |------|Input |A=[n] |
511 ;|IN r,[C] |***P0-|Input |r=[C] |
512 ;|INC r |***V0-|Increment |r=r+1 |
513 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
514 ;|INC xx |------|Increment |xx=xx+1 |
515 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
516 ;|INC ss |------|Increment |ss=ss+1 |
517 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
518 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
519 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
520 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
521 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
522 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
523 ;|JP nn |------|Unconditional Jump |PC=nn |
524 ;|JP cc,nn |------|Conditional Jump |If cc JP |
525 ;|JR e |------|Unconditional Jump |PC=PC+e |
526 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
527 ;|LD dst,src|------|Load |dst=src |
528 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
529 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
530 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
531 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
532 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
533 ;|NEG |***V1*|Negate |A=-A |
534 ;|NOP |------|No Operation | |
535 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
536 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
537 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
538 ;|OUT [C],r |------|Output |[C]=r |
539 ;|OUT [n],A |------|Output |[n]=A |
540 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
541 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
542 ;|POP xx |------|Pop |xx=[SP]+ |
543 ;|POP qq |------|Pop |qq=[SP]+ |
544 ;|PUSH xx |------|Push |-[SP]=xx |
545 ;|PUSH qq |------|Push |-[SP]=qq |
546 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
547 ;|RET |------|Return |PC=[SP]+ |
548 ;|RET cc |------|Conditional Return |If cc RET |
549 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
550 ;|RETN |------|Return from NMI |PC=[SP]+ |
551 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
552 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
553 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
554 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
555 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
556 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
557 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
558 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
559 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
560 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
561 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
562 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
563 ;|SBC HL,ss |***V1*|Subtract with Carry |HL=HL-ss-CY |
564 ;|SCF |--0-01|Set Carry Flag |CY=1 |
565 ;|SET b,m |------|Set bit |m=mv{2^b} |
566 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
567 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
568 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
569 ;|SUB s |***V1*|Subtract |A=A-s |
570 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
571 ;|----------+------+--------------------------------------------|
572 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
573 ;| S |S |Sign flag (Bit 7) |
574 ;| Z | Z |Zero flag (Bit 6) |
575 ;| HC | H |Half Carry flag (Bit 4) |
576 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
577 ;| N | N |Add/Subtract flag (Bit 1) |
578 ;| CY | C|Carry flag (Bit 0) |
579 ;|-----------------+--------------------------------------------|
580 ;| n |Immediate addressing |
581 ;| nn |Immediate extended addressing |
582 ;| e |Relative addressing (PC=PC+2+offset) |
583 ;| [nn] |Extended addressing |
584 ;| [xx+d] |Indexed addressing |
585 ;| r |Register addressing |
586 ;| [rr] |Register indirect addressing |
587 ;| |Implied addressing |
588 ;| b |Bit addressing |
589 ;| p |Modified page zero addressing (see RST) |
590 ;|-----------------+--------------------------------------------|
591 ;|DEFB n(,...) |Define Byte(s) |
592 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
593 ;|DEFS nn |Define Storage Block |
594 ;|DEFW nn(,...) |Define Word(s) |
595 ;|-----------------+--------------------------------------------|
596 ;| A B C D E |Registers (8-bit) |
597 ;| AF BC DE HL |Register pairs (16-bit) |
598 ;| F |Flag register (8-bit) |
599 ;| I |Interrupt page address register (8-bit) |
600 ;| IX IY |Index registers (16-bit) |
601 ;| PC |Program Counter register (16-bit) |
602 ;| R |Memory Refresh register |
603 ;| SP |Stack Pointer register (16-bit) |
604 ;|-----------------+--------------------------------------------|
605 ;| b |One bit (0 to 7) |
606 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
607 ;| d |One-byte expression (-128 to +127) |
608 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
609 ;| e |One-byte expression (-126 to +129) |
610 ;| m |Any register r, [HL] or [xx+d] |
611 ;| n |One-byte expression (0 to 255) |
612 ;| nn |Two-byte expression (0 to 65535) |
613 ;| pp |Register pair BC, DE, IX or SP |
614 ;| qq |Register pair AF, BC, DE or HL |
615 ;| qq' |Alternative register pair AF, BC, DE or HL |
616 ;| r |Register A, B, C, D, E, H or L |
617 ;| rr |Register pair BC, DE, IY or SP |
618 ;| s |Any register r, value n, [HL] or [xx+d] |
619 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
620 ;| ss |Register pair BC, DE, HL or SP |
621 ;| xx |Index register IX or IY |
622 ;|-----------------+--------------------------------------------|
623 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
624 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
625 ;| <- -> |Rotate left/right |
626 ;| [ ] |Indirect addressing |
627 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
628 ;| { } |Combination of operands |
629 ;| # |Also BC=BC-1,DE=DE-1 |
630 ;| ## |Only lower 4 bits of accumulator A used |
631 ;----------------------------------------------------------------
632
633 ;How the flags are supposed to work:
634 ;7 ZFL_S - Sign flag (=MSBit of result)
635 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
636 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
637 ;2 ZFL_P - Parity/2-complement Overflow
638 ;1 ZFL_N - Subtract - set if last op was a subtract
639 ;0 ZFL_C - Carry
640 ;
641 ;I sure hope I got the mapping between flags and instructions correct...
642
643 .equ ZFL_S = 7
644 .equ ZFL_Z = 6
645 .equ ZFL_H = 4
646 .equ ZFL_P = 2
647 .equ ZFL_N = 1
648 .equ ZFL_C = 0
649
650 .equ AVR_T = SREG_T
651 .equ AVR_H = SREG_H
652 .equ AVR_S = SREG_S
653 .equ AVR_V = SREG_V
654 .equ AVR_N = SREG_N
655 .equ AVR_Z = SREG_Z
656 .equ AVR_C = SREG_C
657
658 ;------------------------------------------------;
659 ; Load table value from flash indexed by source reg.
660 ;
661 ; ldpmx dstreg,tablebase,indexreg
662 ;
663 ; (6 words, 8 cycles)
664
665 .macro ldpmx
666 ldi zh,high(@1*2) ; table must be page aligned
667 mov zl,@2
668 lpm @0,z
669 .endm
670
671 .macro do_z80_flags_V
672 #if EM_Z80
673 bmov z_flags, ZFL_P, temp, AVR_V
674 #endif
675 .endm
676
677 .macro do_z80_flags_H
678 #if EM_Z80
679 bmov z_flags, ZFL_H, temp, AVR_H
680 #endif
681 .endm
682
683 .macro do_z80_flags_set_N
684 #if EM_Z80
685 ori z_flags, (1<<ZFL_N) ; Negation auf 1
686 #endif
687 .endm
688
689 .macro do_z80_flags_set_HN
690 #if EM_Z80
691 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
692 #endif
693 .endm
694
695 .macro do_z80_flags_clear_N
696 #if EM_Z80
697 andi z_flags,~(1<<ZFL_N)
698 #endif
699 .endm
700
701 .macro do_z80_flags_clear_HN
702 #if EM_Z80
703 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
704 #endif
705 .endm
706
707
708 .macro do_z80_flags_copy_HC
709 #if EM_Z80
710 bmov z_flags, ZFL_H, z_flags, ZFL_H
711 #endif
712 .endm
713
714 .macro do_z80_flags_op_rotate
715 ; must not change avr carry flag!
716 #if EM_Z80
717 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
718 #else
719 andi z_flags, ~( (1<<ZFL_C) )
720 #endif
721 .endm
722
723 .macro do_z80_flags_op_and
724 #if EM_Z80
725 ori z_flags,(1<<ZFL_H)
726 #endif
727 .endm
728
729 .macro do_z80_flags_op_or
730 #if EM_Z80
731 ;nothing to do
732 #endif
733 .endm
734
735
736 ;----------------------------------------------------------------
737
738 do_op_inv:
739 sbiw z_pcl,1
740 lcall printregs
741 printstring "Invalid opcode! "
742
743 haltinv:
744 rjmp haltinv
745
746 do_op_nop:
747 ret
748
749 ;----------------------------------------------------------------
750 ;|Mnemonic |SZHPNC|Description |Notes |
751 ;----------------------------------------------------------------
752 ;|OUT [n],A |------|Output |[n]=A |
753 ;
754 ;
755 ;Interface with peripherials goes here :)
756 do_op_outa: ; out (opl),a
757 .if PORT_DEBUG
758 printnewline
759 printstring "Port write: "
760 mov temp,z_a
761 lcall printhex
762 printstring " -> ("
763 mov temp,opl
764 lcall printhex
765 printstring ") "
766 .endif
767 mov temp,z_a
768 mov temp2,opl
769 lcall portWrite
770 ret
771
772 ;----------------------------------------------------------------
773 ;|Mnemonic |SZHPNC|Description |Notes |
774 ;----------------------------------------------------------------
775 ;|IN A,[n] |------|Input |A=[n] |
776 ;
777 ;
778 do_op_ina: ; in a,(opl)
779 .if PORT_DEBUG
780 printnewline
781 printstring "Port read: ("
782 mov temp,opl
783 lcall printhex
784 printstring ") -> "
785 .endif
786
787 mov temp2,opl
788 lcall portRead
789 mov z_a,temp
790
791 .if PORT_DEBUG
792 lcall printhex
793 printstring " "
794 .endif
795 ret
796
797 ;----------------------------------------------------------------
798 ;|Mnemonic |SZHPNC|Description |Notes |
799 ;----------------------------------------------------------------
800 ;|INC r |***V0-|Increment |r=r+1 |
801 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
802 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
803 ;|----------|SZHP C|---------- 8080 ----------------------------|
804 ;|INC r |**-P0-|Increment |r=r+1 |
805 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
806 ;
807 ;
808 do_op_inc:
809 ldi temp,1
810 add opl,temp
811 in temp, sreg
812 andi z_flags,(1<<ZFL_C) ; preserve C-flag
813 ldpmx temp2, sz53p_tab, opl
814 or z_flags,temp2 ;
815 bmov z_flags, ZFL_H, temp, AVR_H
816 do_z80_flags_V
817 ret
818
819 do_op_inca:
820 ldi temp,1
821 add z_a,temp
822 in temp, sreg
823 andi z_flags,(1<<ZFL_C) ; preserve C-flag
824 ldpmx temp2, sz53p_tab, z_a
825 or z_flags,temp2 ;
826 bmov z_flags, ZFL_H, temp, AVR_H
827 do_z80_flags_V
828 ret
829
830 ;----------------------------------------------------------------
831 ;|Mnemonic |SZHPNC|Description |Notes |
832 ;----------------------------------------------------------------
833 ;|DEC r |***V1-|Decrement |s=s-1 |
834 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
835 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
836 ;|----------|SZHP C|---------- 8080 ----------------------------|
837 ;|DEC r |**-P -|Increment |r=r+1 |
838 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
839 ;
840 ;
841 do_op_dec:
842 subi opl,1
843 in temp, sreg
844 andi z_flags,(1<<ZFL_C) ; preserve C-flag
845 ldpmx temp2, sz53p_tab, opl
846 or z_flags,temp2 ;
847 bmov z_flags, ZFL_H, temp, AVR_H
848 do_z80_flags_V
849 do_z80_flags_set_N
850 ret
851
852 do_op_deca:
853 ldi opl,1
854 sub z_a,opl
855 in temp, sreg
856 andi z_flags,(1<<ZFL_C) ; preserve C-flag
857 ldpmx temp2, sz53p_tab, z_a
858 or z_flags,temp2 ;
859 bmov z_flags, ZFL_H, temp, AVR_H
860 do_z80_flags_V
861 do_z80_flags_set_N
862 ret
863
864 ;----------------------------------------------------------------
865 ;|Mnemonic |SZHPNC|Description |Notes |
866 ;----------------------------------------------------------------
867 ;|INC xx |------|Increment |xx=xx+1 |
868 ;|INC ss |------|Increment |ss=ss+1 |
869 ;
870 ;
871 do_op_inc16:
872 subi opl,low(-1)
873 sbci oph,high(-1)
874 ret
875
876 ;----------------------------------------------------------------
877 ;|Mnemonic |SZHPNC|Description |Notes |
878 ;----------------------------------------------------------------
879 ;|DEC xx |------|Decrement |xx=xx-1 |
880 ;|DEC ss |------|Decrement |ss=ss-1 |
881 ;
882 ;
883 do_op_dec16:
884 subi opl, 1
885 sbci oph, 0
886 ret
887
888 ;----------------------------------------------------------------
889 ;|Mnemonic |SZHPNC|Description |Notes |
890 ;----------------------------------------------------------------
891 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
892 ;|----------|SZHP C|---------- 8080 ----------------------------|
893 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
894 ;
895 ;
896 do_op_rlca:
897 ;Rotate Left Cyclical. All bits move 1 to the
898 ;left, the msb becomes c and lsb.
899 do_z80_flags_op_rotate
900 lsl z_a
901 brcc do_op_rlc_noc
902 ldi temp,1
903 or z_a,temp
904 ori z_flags, (1<<ZFL_C)
905 do_op_rlc_noc:
906 ret
907
908 ;----------------------------------------------------------------
909 ;|Mnemonic |SZHPNC|Description |Notes |
910 ;----------------------------------------------------------------
911 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
912 ;|----------|SZHP C|---------- 8080 ----------------------------|
913 ;|RRCA |---- *|Rotate Right Circular|A=->A |
914 ;
915 ;
916 do_op_rrca:
917 ;Rotate Right Cyclical. All bits move 1 to the
918 ;right, the lsb becomes c and msb.
919 do_z80_flags_op_rotate
920 lsr z_a
921 brcc do_op_rrc_noc
922 ldi temp,0x80
923 or z_a,temp
924 ori z_flags, (1<<ZFL_C)
925 do_op_rrc_noc:
926 ret
927
928 ;----------------------------------------------------------------
929 ;|Mnemonic |SZHPNC|Description |Notes |
930 ;----------------------------------------------------------------
931 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
932 ;|----------|SZHP C|---------- 8080 ----------------------------|
933 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
934 ;
935 ;
936 do_op_rra:
937 ;Rotate Right. All bits move 1 to the right, the lsb
938 ;becomes c, c becomes msb.
939 clc ; get z80 carry to avr carry
940 sbrc z_flags,ZFL_C
941 sec
942 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
943 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
944 ror z_a
945 ret
946
947 ;----------------------------------------------------------------
948 ;|Mnemonic |SZHPNC|Description |Notes |
949 ;----------------------------------------------------------------
950 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
951 ;|----------|SZHP C|---------- 8080 ----------------------------|
952 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
953 ;
954 ;
955 do_op_rla:
956 ;Rotate Left. All bits move 1 to the left, the msb
957 ;becomes c, c becomes lsb.
958 clc
959 sbrc z_flags,ZFL_C
960 sec
961 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
962 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
963 rol z_a
964 ret
965
966 ;----------------------------------------------------------------
967 ;|Mnemonic |SZHPNC|Description |Notes |
968 ;----------------------------------------------------------------
969 ;|ADD A,s |***V0*|Add |A=A+s |
970 ;|----------|SZHP C|---------- 8080 ----------------------------|
971 ;|ADD A,s |***P *|Add |A=A+s |
972 ;
973 ;
974 do_op_adda:
975 add z_a,opl
976 in temp,sreg
977 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
978 bmov z_flags,ZFL_C, temp,AVR_C
979 bmov z_flags,ZFL_H, temp,AVR_H
980 do_z80_flags_V
981 ret
982
983 ;----------------------------------------------------------------
984 ;|Mnemonic |SZHPNC|Description |Notes |
985 ;----------------------------------------------------------------
986 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
987 ;|----------|SZHP C|---------- 8080 ----------------------------|
988 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
989 ;
990 ;
991 do_op_adca:
992 clc
993 sbrc z_flags,ZFL_C
994 sec
995 adc z_a,opl
996 in temp,sreg
997 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
998 bmov z_flags,ZFL_C, temp,AVR_C
999 bmov z_flags,ZFL_H, temp,AVR_H
1000 do_z80_flags_V
1001 ret
1002
1003 ;----------------------------------------------------------------
1004 ;|Mnemonic |SZHPNC|Description |Notes |
1005 ;----------------------------------------------------------------
1006 ;|SUB s |***V1*|Subtract |A=A-s |
1007 ;|----------|SZHP C|---------- 8080 ----------------------------|
1008 ;|SUB s |***P *|Subtract |A=A-s |
1009
1010 ;
1011 do_op_subfa:
1012 sub z_a,opl
1013 in temp,sreg
1014 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1015 bmov z_flags,ZFL_C, temp,AVR_C
1016 bmov z_flags,ZFL_H, temp,AVR_H
1017 do_z80_flags_V
1018 do_z80_flags_set_N
1019 ret
1020
1021 ;----------------------------------------------------------------
1022 ;|Mnemonic |SZHPNC|Description |Notes |
1023 ;----------------------------------------------------------------
1024 ;|CP s |***V1*|Compare |A-s |
1025 ;|----------|SZHP C|---------- 8080 ----------------------------|
1026 ;|CP s |***P *|Compare |A-s |
1027
1028 ;
1029 do_op_cpfa:
1030 mov temp2,z_a
1031 sub temp2,opl
1032 in temp,sreg
1033 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
1034 bmov z_flags,ZFL_C, temp,AVR_C
1035 bmov z_flags,ZFL_H, temp,AVR_H
1036 do_z80_flags_V
1037 do_z80_flags_set_N
1038 ret
1039
1040 ;----------------------------------------------------------------
1041 ;|Mnemonic |SZHPNC|Description |Notes |
1042 ;----------------------------------------------------------------
1043 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1044 ;|----------|SZHP C|---------- 8080 ----------------------------|
1045 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1046 ;
1047 ;
1048 do_op_sbcfa:
1049 clc
1050 sbrc z_flags,ZFL_C
1051 sec
1052 sbc z_a,opl
1053 in temp,sreg
1054 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1055 bmov z_flags,ZFL_C, temp,AVR_C
1056 bmov z_flags,ZFL_H, temp,AVR_H
1057 do_z80_flags_V
1058 do_z80_flags_set_N
1059 ret
1060
1061 ;----------------------------------------------------------------
1062 ;|Mnemonic |SZHPNC|Description |Notes |
1063 ;----------------------------------------------------------------
1064 ;|AND s |**1P00|Logical AND |A=A&s |
1065 ;|----------|SZHP C|---------- 8080 ----------------------------|
1066 ;|AND s |**-P 0|Logical AND |A=A&s |
1067 ;
1068 ;
1069 do_op_anda:
1070 and z_a,opl ;
1071 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1072 do_z80_flags_op_and
1073 ret
1074
1075
1076 ;----------------------------------------------------------------
1077 ;|Mnemonic |SZHPNC|Description |Notes |
1078 ;----------------------------------------------------------------
1079 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
1080 ;|----------|SZHP C|---------- 8080 ----------------------------|
1081 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
1082 ;
1083 ;
1084 do_op_ora:
1085 or z_a,opl
1086 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1087 do_z80_flags_op_or
1088 ret
1089
1090 ;----------------------------------------------------------------
1091 ;|Mnemonic |SZHPNC|Description |Notes |
1092 ;----------------------------------------------------------------
1093 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1094 ;|----------|SZHP C|---------- 8080 ----------------------------|
1095 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1096 ;
1097 ;
1098 do_op_xora:
1099 eor z_a,opl
1100 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1101 do_z80_flags_op_or
1102 ret
1103
1104 ;----------------------------------------------------------------
1105 ;|Mnemonic |SZHPNC|Description |Notes |
1106 ;----------------------------------------------------------------
1107 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1108 ;|----------|SZHP C|---------- 8080 ----------------------------|
1109 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1110 ;
1111 ;
1112 do_op_addhl:
1113 lds temp,z_l
1114 lds temp2,z_h
1115 add opl,temp
1116 adc oph,temp2
1117 sts z_l,opl
1118 sts z_h,oph
1119 in temp,sreg
1120 bmov z_flags,ZFL_C, temp,AVR_C
1121 do_z80_flags_H
1122 do_z80_flags_clear_N
1123 ret
1124
1125 ;----------------------------------------------------------------
1126 ;|Mnemonic |SZHPNC|Description |Notes |
1127 ;----------------------------------------------------------------
1128 ;|LD dst,src|------|Load |dst=src |
1129 ;
1130 ;
1131 do_op_sthl: ;store hl to mem loc in opl:h
1132 movw xl,opl
1133 lds temp,z_l
1134 mem_write
1135 adiw xl,1
1136 lds temp,z_h
1137 mem_write
1138 ret
1139
1140 ;----------------------------------------------------------------
1141 ;|Mnemonic |SZHPNC|Description |Notes |
1142 ;----------------------------------------------------------------
1143 ;|LD dst,src|------|Load |dst=src |
1144 ;
1145 ;
1146 do_op_rmem16:
1147 movw xl,opl
1148 mem_read_d opl
1149 adiw x,1
1150 mem_read_d oph
1151 ret
1152
1153 ;----------------------------------------------------------------
1154 ;|Mnemonic |SZHPNC|Description |Notes |
1155 ;----------------------------------------------------------------
1156 ;|LD dst,src|------|Load |dst=src |
1157 ;
1158 ;
1159 do_op_rmem8:
1160 mem_read_ds opl, op
1161 ret
1162
1163 ;----------------------------------------------------------------
1164 ;|Mnemonic |SZHPNC|Description |Notes |
1165 ;----------------------------------------------------------------
1166 ;|DAA |***P-*|Decimal Adjust Acc. | |
1167 ;|----------|SZHP C|---------- 8080 ----------------------------|
1168 ;
1169 ; Not yet checked
1170
1171 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1172 ; This instruction conditionally adjusts the accumulator for BCD addition
1173 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1174 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1175 ;
1176 ; -------------------------------------------------------------------
1177 ; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1178 ; | Oper |Before |upper digit |Before |lower digit| added |After |
1179 ; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1180 ; |-------+-------+------------+-------+-----------+--------+-------|
1181 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1182 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1183 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1184 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1185 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1186 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1187 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1188 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1189 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1190 ; |-------+-------+------------+-------+-----------+--------+-------|
1191 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1192 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1193 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1194 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1195 ; -------------------------------------------------------------------
1196 ;
1197 ; The H flag is affected as follows:
1198 ;
1199 ; ---------------------
1200 ; | N | H | low |H' |
1201 ; | | |nibble | |
1202 ; |---+---+-------+---|
1203 ; | 0 | * | 0-9 | 0 |
1204 ; | 0 | * | a-f | 1 |
1205 ; | 1 | 0 | * | 0 |
1206 ; | 1 | 1 | 6-f | 0 |
1207 ; | 1 | 1 | 0-5 | 1 |
1208 ; ---------------------
1209 ;
1210 ; Ohter flags:
1211 ; N: Unaffected.
1212 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1213 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1214 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1215
1216 #if 1
1217
1218 do_op_da:
1219
1220 #if EM_Z80
1221 sbrc z_flags,ZFL_N ;if add-op
1222 rjmp op_da_sub ;then
1223 #endif
1224
1225 op_da_add:
1226 ldi temp2,0 ; new C and H flag
1227 sbrc z_flags,ZFL_H ; |
1228 rjmp op_da_a01 ; if (H flag ...
1229 mov temp,opl ; |
1230 andi temp,0x0f ; |
1231 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1232 brlo op_da_a10 ; |
1233 op_da_a01: ; then
1234 ldi oph,0x06 ; add 6 to lower nibble
1235 add opl,oph ;
1236 brhc op_da_02 ; if
1237 ori temp2,(1<<ZFL_H) ; set new H flag
1238 op_da_02: ;
1239 brcc op_da_a10 ; if
1240 ori temp2,(1<<ZFL_C) ; set new H flag
1241 op_da_a10: ; endif
1242 sbrc z_flags,ZFL_C ; |
1243 rjmp op_da_a12 ; if (C flag ...
1244 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1245 brlo op_da_a13 ;
1246 op_da_a12: ;
1247 ldi oph,0x60 ; add 6 to lower nibble
1248 add opl,oph ;
1249 ori temp2,(1<<ZFL_C) ; set new C flag
1250 op_da_a13: ;
1251 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1252 or z_flags,temp2 ; merge new C and H flag
1253 ret
1254
1255 #if EM_Z80
1256
1257 op_da_sub: ;else (sub-op)
1258 rcall do_op_inv ; TODO: !
1259 ret ;endif
1260 #endif
1261
1262 #else
1263
1264 do_op_da:
1265 ldi temp2,0 ;new C and H flag
1266 ldi oph,0 ;oph: what to add
1267
1268 sbrc z_flags,ZFL_N ;if add-op
1269 rjmp op_da_sub ;then
1270 op_da_add:
1271 mov temp,opl ; |
1272 andi temp,0x0f ; |
1273 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1274 brlo op_da_a10 ; |
1275 ori oph,0x06 ; add 6
1276 ori temp2,(1<<ZFL_H) ; set new H flag
1277
1278 sbrc z_flags,ZFL_C ; |
1279 rjmp op_da_a02 ; if (C flag ...
1280 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1281 brlo op_da_a03 ; |
1282 op_da_a02:
1283 ori oph,0x60 ; add 0x60
1284 ori temp2,(1<<ZFL_C) ; set new C flag
1285 op_da_a03: ; endif
1286 rjmp op_da_ae
1287 op_da_a10: ; else (lower nibble is 0x09 or lower)
1288 sbrc z_flags,ZFL_C ; |
1289 rjmp op_da_a12 ; if (C flag ...
1290 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1291 brlo op_da_a13 ;
1292 op_da_a12:
1293 ori oph,0x60 ; add 0x60
1294 ori temp2,(1<<ZFL_C) ; set new C flag
1295 op_da_a13:
1296 sbrs z_flags,ZFL_H ; if (H flag)
1297 rjmp op_da_ae ; |
1298 ori oph,0x06 ; add 0x06
1299 mov temp,opl ; |
1300 andi temp,0x0f ; |
1301 cpi temp,0x06 ; if (lower nibble >= 0x0A)
1302 brsh op_da_ae ; |
1303 ori temp2,(1<<ZFL_H) ; set new H flag
1304 ; endif
1305 ; endif
1306 op_da_ae:
1307 add opl,oph
1308 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1309 or z_flags,temp2 ; merge new C and H flag
1310 ret
1311
1312 op_da_sub: ;else (sub-op)
1313 rcall do_op_inv ; TODO: !
1314 ret ;endif
1315 #endif
1316
1317
1318 ;----------------------------------------------------------------
1319 ;|Mnemonic |SZHPNC|Description |Notes |
1320 ;----------------------------------------------------------------
1321 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1322 ;|----------|SZHP C|---------- 8080 ----------------------------|
1323 ;
1324 ;
1325 do_op_scf:
1326 do_z80_flags_clear_HN
1327 ori z_flags,(1<<ZFL_C)
1328 ret
1329
1330 ;----------------------------------------------------------------
1331 ;|Mnemonic |SZHPNC|Description |Notes |
1332 ;----------------------------------------------------------------
1333 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
1334 ;|----------|SZHP C|---------- 8080 ----------------------------|
1335 ;|CCF |---- 1|Set Carry Flag |CY=1 |
1336 ;
1337 do_op_ccf:
1338 do_z80_flags_clear_N
1339 do_z80_flags_copy_HC
1340 ldi temp,(1<<ZFL_C)
1341 eor z_flags,temp
1342 ret
1343
1344 ;----------------------------------------------------------------
1345 ;|Mnemonic |SZHPNC|Description |Notes |
1346 ;----------------------------------------------------------------
1347 ;|CPL |--1-1-|Complement |A=~A |
1348 ;|----------|SZHP C|---------- 8080 ----------------------------|
1349 ;|CPL |---- -|Complement |A=~A |
1350 ;
1351 ;
1352 do_op_cpl:
1353 com z_a
1354 do_z80_flags_set_HN
1355 ret
1356
1357
1358 ;----------------------------------------------------------------
1359 ;|Mnemonic |SZHPNC|Description |Notes |
1360 ;----------------------------------------------------------------
1361 ;|PUSH xx |------|Push |-[SP]=xx |
1362 ;|PUSH qq |------|Push |-[SP]=qq |
1363 ;
1364 ;
1365 do_op_push16:
1366 movw xl,z_spl
1367 sbiw x,1
1368 mem_write_s oph
1369 sbiw x,1
1370 mem_write_s opl
1371 movw z_spl,xl
1372
1373 .if STACK_DBG
1374 printnewline
1375 printstring "Stack push "
1376 movw temp,opl
1377 rcall printhexw
1378 printstring ", SP is now "
1379 movw temp,z_spl
1380 rcall printhexw
1381 printstring ". "
1382 .endif
1383
1384 ret
1385
1386 ;----------------------------------------------------------------
1387 ;|Mnemonic |SZHPNC|Description |Notes |
1388 ;----------------------------------------------------------------
1389 ;|POP xx |------|Pop |xx=[SP]+ |
1390 ;|POP qq |------|Pop |qq=[SP]+ |
1391 ;
1392 ;
1393 do_op_pop16:
1394 movw x,z_spl
1395 mem_read_d opl
1396 adiw x,1
1397 mem_read_d oph
1398 adiw x,1
1399 movw z_spl,x
1400
1401 .if STACK_DBG
1402 printnewline
1403 printstring "Stack pop "
1404 movw temp,opl
1405 rcall printhexw
1406 printstring ", SP is now "
1407 movw temp,z_spl
1408 rcall printhexw
1409 printstring ". "
1410 .endif
1411 ret
1412
1413 ;----------------------------------------------------------------
1414 ;|Mnemonic |SZHPNC|Description |Notes |
1415 ;----------------------------------------------------------------
1416 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1417 ;|EX DE,HL |------|Exchange |DE<->HL |
1418 ;-----------------------------Z80--------------------------------
1419 ;
1420 do_op_exhl:
1421 lds temp,z_l
1422 lds temp2,z_h
1423 sts z_l,opl
1424 sts z_h,oph
1425 movw opl,temp
1426 ret
1427
1428 ;----------------------------------------------------------------
1429 ;|Mnemonic |SZHPNC|Description |Notes |
1430 ;----------------------------------------------------------------
1431 ;
1432 ; TODO: Implement IFF1, IFF2
1433 do_op_di:
1434 ret
1435
1436 ;----------------------------------------------------------------
1437 ;|Mnemonic |SZHPNC|Description |Notes |
1438 ;----------------------------------------------------------------
1439 ;
1440 ; TODO: Implement IFF1, IFF2
1441 do_op_ei:
1442 ret
1443
1444 ;----------------------------------------------------------------
1445 ;|Mnemonic |SZHPNC|Description |Notes |
1446 ;----------------------------------------------------------------
1447 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1448 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1449 ;|RET cc |------|Conditional Return |If cc RET |
1450 ;
1451 ;
1452 do_op_ifnz:
1453 sbrs z_flags, ZFL_Z
1454 ret
1455 pop temp ; nix tun
1456 pop temp ; direkt zurueck zu main
1457 ret
1458
1459 ;----------------------------------------------------------------
1460 ;|Mnemonic |SZHPNC|Description |Notes |
1461 ;----------------------------------------------------------------
1462 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1463 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1464 ;|RET cc |------|Conditional Return |If cc RET |
1465 ;
1466 ;
1467 do_op_ifz:
1468 sbrc z_flags, ZFL_Z
1469 ret
1470 pop temp ; nix tun
1471 pop temp ; direkt zurueck zu main
1472 ret
1473
1474 ;----------------------------------------------------------------
1475 ;|Mnemonic |SZHPNC|Description |Notes |
1476 ;----------------------------------------------------------------
1477 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1478 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1479 ;|RET cc |------|Conditional Return |If cc RET |
1480 ;
1481 ;
1482 do_op_ifnc:
1483 sbrs z_flags, ZFL_C
1484 ret
1485 pop temp ; nix tun
1486 pop temp ; direkt zuruech zu main
1487 ret
1488
1489 ;----------------------------------------------------------------
1490 ;|Mnemonic |SZHPNC|Description |Notes |
1491 ;----------------------------------------------------------------
1492 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1493 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1494 ;|RET cc |------|Conditional Return |If cc RET |
1495 ;
1496 ;
1497 do_op_ifc:
1498 sbrc z_flags, ZFL_C
1499 ret
1500 pop temp ; nix tun
1501 pop temp ; direkt zuruech zu main
1502 ret
1503
1504 ;----------------------------------------------------------------
1505 ;|Mnemonic |SZHPNC|Description |Notes |
1506 ;----------------------------------------------------------------
1507 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1508 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1509 ;|RET cc |------|Conditional Return |If cc RET |
1510 ;
1511 ;
1512 do_op_ifpo:
1513 sbrs z_flags, ZFL_P
1514 ret
1515 pop temp ; nix tun
1516 pop temp ; direkt zuruech zu main
1517 ret
1518
1519 ;----------------------------------------------------------------
1520 ;|Mnemonic |SZHPNC|Description |Notes |
1521 ;----------------------------------------------------------------
1522 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1523 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1524 ;|RET cc |------|Conditional Return |If cc RET |
1525 ;
1526 ;
1527 do_op_ifpe:
1528 sbrc z_flags, ZFL_P
1529 ret
1530 pop temp ; nix tun
1531 pop temp ; direkt zuruech zu main
1532 ret
1533
1534 ;----------------------------------------------------------------
1535 ;|Mnemonic |SZHPNC|Description |Notes |
1536 ;----------------------------------------------------------------
1537 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1538 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1539 ;|RET cc |------|Conditional Return |If cc RET |
1540 ;
1541 ;
1542 do_op_ifp: ;sign positive, aka s=0
1543 sbrs z_flags, ZFL_S
1544 ret
1545 pop temp ; nix tun
1546 pop temp ; direkt zuruech zu main
1547 ret
1548
1549 ;----------------------------------------------------------------
1550 ;|Mnemonic |SZHPNC|Description |Notes |
1551 ;----------------------------------------------------------------
1552 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1553 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1554 ;|RET cc |------|Conditional Return |If cc RET |
1555 ;
1556 ;
1557 do_op_ifm: ;sign negative, aka s=1
1558 sbrc z_flags, ZFL_S
1559 ret
1560 pop temp ; nix tun
1561 pop temp ; direkt zuruech zu main
1562 ret
1563
1564
1565 ; ----------------------- Opcode decoding -------------------------
1566
1567 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1568 ; operations: fetch, do something, store.
1569 ; The table is made of 256 words.
1570
1571 ; .org (PC+255) & 0xff00
1572
1573 ;todo_table:
1574 ;opcjmp:
1575 instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1576 instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
1577 instr do_fetch_nop, op_nop, do_store_MBC ;02 ;LD (BC),A
1578 instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1579 instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1580 instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1581 instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
1582 instr do_fetch_nop, op_RLCA, do_store_nop ;07 ;RLCA
1583 instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1584 instr do_fetch_BC, op_ADDHL, do_store_nop ;09 ;ADD HL,BC
1585 instr do_fetch_MBC, op_nop, do_store_nop ;0A ;LD A,(BC)
1586 instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1587 instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1588 instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1589 instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
1590 instr do_fetch_nop, op_RRCA, do_store_nop ;0F ;RRCA
1591 instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1592 instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
1593 instr do_fetch_nop, op_nop, do_store_MDE ;12 ;LD (DE),A
1594 instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1595 instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1596 instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1597 instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
1598 instr do_fetch_nop, op_RLA, do_store_nop ;17 ;RLA
1599 instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1600 instr do_fetch_DE, op_ADDHL, do_store_nop ;19 ;ADD HL,DE
1601 instr do_fetch_MDE, op_nop, do_store_nop ;1A ;LD A,(DE)
1602 instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1603 instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1604 instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1605 instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
1606 instr do_fetch_nop, op_RRA, do_store_nop ;1F ;RRA
1607 instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1608 instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1609 instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1610 instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1611 instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1612 instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1613 instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1614 instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1615 instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1616 instr do_fetch_HL, op_ADDHL, do_store_nop ;29 ;ADD HL,HL
1617 instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1618 instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1619 instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1620 instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1621 instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1622 instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1623 instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1624 instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1625 instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1626 instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1627 instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1628 instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1629 instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1630 instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1631 instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1632 instr do_fetch_SP, op_ADDHL, do_store_nop ;39 ;ADD HL,SP
1633 instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1634 instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1635 instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1636 instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1637 instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1638 instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
1639 instr do_fetch_nop, op_nop, do_store_nop ;40 ;LD B,B
1640 instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1641 instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1642 instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1643 instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1644 instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1645 instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1646 instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1647 instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
1648 instr do_fetch_nop, op_nop, do_store_nop ;49 ;LD C,C
1649 instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1650 instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1651 instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1652 instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1653 instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1654 instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1655 instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1656 instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
1657 instr do_fetch_nop, op_nop, do_store_nop ;52 ;LD D,D
1658 instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1659 instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1660 instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1661 instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1662 instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1663 instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1664 instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1665 instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
1666 instr do_fetch_nop, op_nop, do_store_nop ;5B ;LD E,E
1667 instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1668 instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1669 instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1670 instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1671 instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1672 instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1673 instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1674 instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
1675 instr do_fetch_nop, op_nop, do_store_nop ;64 ;LD H,H
1676 instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1677 instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1678 instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1679 instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1680 instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1681 instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1682 instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1683 instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
1684 instr do_fetch_nop, op_nop, do_store_nop ;6D ;LD L,L
1685 instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1686 instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1687 instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1688 instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1689 instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1690 instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1691 instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1692 instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1693 instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1694 instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
1695 instr do_fetch_B, op_nop, do_store_A ;78 ;LD A,B
1696 instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1697 instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1698 instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1699 instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1700 instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1701 instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
1702 instr do_fetch_nop, op_nop, do_store_nop ;7F ;LD A,A
1703 instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1704 instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1705 instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1706 instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1707 instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1708 instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1709 instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1710 instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1711 instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1712 instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1713 instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1714 instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1715 instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1716 instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1717 instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1718 instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1719 instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1720 instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1721 instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1722 instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1723 instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1724 instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1725 instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1726 instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1727 instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1728 instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1729 instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1730 instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1731 instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1732 instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1733 instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1734 instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1735 instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1736 instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1737 instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1738 instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1739 instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1740 instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1741 instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1742 instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1743 instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1744 instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1745 instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1746 instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1747 instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1748 instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1749 instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1750 instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1751 instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1752 instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1753 instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1754 instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1755 instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1756 instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1757 instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1758 instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1759 instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1760 instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1761 instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1762 instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1763 instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1764 instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1765 instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1766 instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1767 instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1768 instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1769 instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1770 instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1771 instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1772 instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1773 instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1774 instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1775 instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1776 instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1777 instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1778 instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1779 instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1780 instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1781 instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1782 instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1783 instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1784 instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1785 instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1786 instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1787 instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1788 instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1789 instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1790 instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1791 instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1792 instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1793 instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1794 instr do_fetch_DIR8, op_INA, do_store_nop ;DB nn ;IN A,(n)
1795 instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1796 instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1797 instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1798 instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1799 instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1800 instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1801 instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1802 instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1803 instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1804 instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1805 instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1806 instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1807 instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1808 instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1809 instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1810 instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1811 instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1812 instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1813 instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1814 instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1815 instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1816 instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1817 instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1818 instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1819 instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1820 instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1821 instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1822 instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1823 instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1824 instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1825 instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1826 instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1827 instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1828 instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1829 instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1830 instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1831
1832
1833 ;----------------------------------------------------------------
1834 ; Lookup table, stolen from z80ex, Z80 emulation library.
1835 ; http://z80ex.sourceforge.net/
1836
1837 ; The S, Z, 5 and 3 bits and the parity of the lookup value
1838
1839 ; .org (PC+255) & 0xff00
1840 .org opcjmp + 256
1841 sz53p_tab:
1842 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1843 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1844 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1845 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1846 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1847 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1848 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1849 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1850 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1851 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1852 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1853 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1854 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1855 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1856 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1857 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1858 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1859 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1860 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1861 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1862 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1863 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1864 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1865 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1866 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1867 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1868 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1869 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1870 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1871 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1872 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1873 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1874
1875 ; vim:set ts=8 noet nowrap
1876
CP/M on an AVR