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[avrcpm.git] / 8080int-t3.asm
1 ; 8080 Interpreter.
2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
3 ;
4
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010 Leo C.
7 ; Copyright (C) 2010 Horst S.
8
9 ; This file is part of avrcpm.
10 ;
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
15 ;
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
20 ;
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23 ;
24 ; $Id$
25 ;
26
27
28 .dseg
29
30 z_b: .byte 1
31 z_c: .byte 1
32 z_d: .byte 1
33 z_e: .byte 1
34 z_h: .byte 1
35 z_l: .byte 1
36
37
38 .cseg
39
40 ;Init z80
41 z80_init:
42 ldi z_pcl,low (IPLADDR)
43 ldi z_pch,high(IPLADDR)
44
45 cbi flags,trace
46 printnewline
47 printstring "Ok, CPU is live!"
48 printnewline
49
50 ;----------------------------------------------------------
51 ; 1 2 3 4
52 ;.db (low)do_store (low)do_op (hihg)do_op (low)do_fetch
53 ;
54 ;das kommt auf den stapel
55 ; main da solls zum schluss weitergehen
56 ;do_store wohin damit beenden mit RET
57 ;do_op was tun beenden mit RET
58 ;
59 ;das wird direkt angesprungen
60 ;do_fetch woher beenden mit RET
61 ;
62 ;
63 main:
64 .if INS_DEBUG
65 cbi flags,trace
66 cpi z_pch,DBG_TRACE_BOTTOM
67 brlo notraceon
68 cpi z_pch,DBG_TRACE_TOP
69 brsh notraceon
70 sbi flags,trace
71 notraceon:
72 .endif
73
74
75 .if PRINT_PC
76 cpi z_pch,DBG_TRACE_BOTTOM
77 brlo noprintpc
78 cpi z_pch,DBG_TRACE_TOP
79 brsh noprintpc
80
81 printnewline
82 printstring "PC="
83 movw temp,z_pcl
84 rcall printhexw
85 printstring " "
86 noprintpc:
87 .endif
88
89 .if INS_DEBUG
90 sbic flags,trace
91 rcall printregs
92 .endif
93
94 ;hier kommt die Interruptbehandlung rein
95
96 ldi zl,low(main) ;da will ich wieder hin.
97 ldi zh,high(main) ;
98 push zl ;
99 push zh ;
100 mem_read_s z_pc ;temp=memReadByte(z_pc)
101 adiw z_pcl,1 ;++z_pc
102 ldi zl,low(todo_table*2) ;zhl=todo_table
103 ldi zh,high(todo_table*2) ;
104 ldi temp2,3 ;1
105 mul temp,temp2 ;2
106 add zl,r0 ;1
107 adc zh,r1 ;1
108
109 ldi temp2,high(store_ops) ;
110 lpm temp,Z+ ;do_store
111 push temp ; low
112 push temp2 ; high
113
114 .if high(opjumps) != high(opjumps)
115 ldi temp2,high(opjumps)
116 .endif
117 lpm temp,Z+ ;do_op
118 push temp ; low
119 push temp2 ; high
120
121 lpm zl,Z ;do_fetch
122 ldi zh,high(fetch_ops)
123 ijmp ;direkt
124
125
126 ; .listmac
127 ;-----------------------------------------------------
128 ; Generate jump to target and position in table
129 ; gen_opjmp target
130 ;
131 .macro gen_opjmp
132 .ifndef opjmp_table_pos_
133 .set opjmp_table_page_ = high(PC)
134 .set opjmp_table_pos_ = PC
135 .endif
136 .equ @0 = low(opjmp_table_pos_)
137 .set opjmp_table_pos_ = opjmp_table_pos_ + 1
138 .if high(opjmp_table_pos_) != opjmp_table_page_
139 .warning "Table 'opjump' crosses page boarder."
140 .message "Program will not work, unless the opjump table is relocated."
141 .endif
142 rjmp do_@0
143 .endm
144
145 ;--------------------------------------------------
146 ; Generate a table entry for one instruction
147 ;
148 ; instr fetch, op, store
149 ;
150 .macro instr
151 .ifndef inst_table_odd_
152 .set inst_table_odd_ = 0
153 .endif
154
155 .if inst_table_odd_
156 .db inst_table_next_, low(@2), @1, low(@0)
157 .set inst_table_odd_ = 0
158 .else
159 .set inst_table_next_ = low(@0)
160 .db low(@2), @1
161 .set inst_table_odd_ = 1
162 .endif
163 .endm
164
165 ;-----------------------------------
166 ; go to op.
167 ;
168 .macro fetch_end
169 ldi zh,high(opjumps)
170 mov zl,insdech
171 ijmp
172 .endm
173
174 ;-----------------------------------
175 ; go to store.
176 ;
177 .macro op_end
178 ldi zh,high(store_ops) ;
179 mov zl,insdecl
180 ijmp
181 .endm
182
183 ;-----------------------------------
184 ; go back to main
185 ;
186 .macro store_end
187 rjmp main
188 .endm
189
190 ;-----------------------------------
191 ; go back to main
192 ;
193 .macro op_end_nojmp
194 rjmp main
195 .endm
196
197
198 ; ------------ Fetch phase stuff -----------------
199
200 .org (PC+255) & 0xff00 ; wichtig !!!fetch und store muessen in einer page liegen
201 fetch_ops:
202 do_fetch_nop:
203 ret
204
205 do_fetch_a:
206 mov opl,z_a
207 ret
208
209 do_fetch_b:
210 lds opl,z_b
211 ret
212
213 do_fetch_c:
214 lds opl,z_c
215 ret
216
217 do_fetch_d:
218 lds opl,z_d
219 ret
220
221 do_fetch_e:
222 lds opl,z_e
223 ret
224
225 do_fetch_h:
226 lds opl,z_h
227 ret
228
229 do_fetch_l:
230 lds opl,z_l
231 ret
232
233 do_fetch_af:
234 mov opl,z_flags
235 mov oph,z_a
236 ret
237
238 do_fetch_bc:
239 lds opl,z_c
240 lds oph,z_b
241 ret
242
243 do_fetch_de:
244 lds opl,z_e
245 lds oph,z_d
246 ret
247
248 do_fetch_hl:
249 lds opl,z_l
250 lds oph,z_h
251 ret
252
253 do_fetch_sp:
254 movw opl,z_spl
255 ret
256
257 do_fetch_mbc:
258 lds xh,z_b
259 lds xl,z_c
260 mem_read_d opl
261 ret
262
263 do_fetch_mde:
264 lds xh,z_d
265 lds xl,z_e
266 mem_read_d opl
267 ret
268
269 do_fetch_mhl:
270 lds xh,z_h
271 lds xl,z_l
272 mem_read_d opl
273 ret
274
275 do_fetch_msp:
276 movw x,z_spl
277 mem_read_d opl
278 adiw x,1
279 mem_read_d oph
280 ret
281
282 do_fetch_dir8:
283 mem_read_ds opl, z_pc
284 adiw z_pcl,1
285 ret
286
287 do_fetch_dir16:
288 mem_read_ds opl, z_pc
289 adiw z_pcl,1
290 mem_read_ds oph, z_pc
291 adiw z_pcl,1
292 ret
293
294 do_fetch_rst:
295 movw x,z_pcl
296 sbiw x,1
297 mem_read_d opl
298 andi opl,0x38
299 ldi oph,0
300 ret
301
302 ; ------------ Store phase stuff -----------------
303
304 .org (PC+255) & 0xff00 ; wichtig !!!fetch und store muessen in einer page liegen
305 store_ops:
306 do_store_nop:
307 ret
308
309 do_store_a:
310 mov z_a,opl
311 ret
312
313 do_store_b:
314 sts z_b,opl
315 ret
316
317 do_store_c:
318 sts z_c,opl
319 ret
320
321 do_store_d:
322 sts z_d,opl
323 ret
324
325 do_store_e:
326 sts z_e,opl
327 ret
328
329 do_store_h:
330 sts z_h,opl
331 ret
332
333 do_store_l:
334 sts z_l,opl
335 ret
336
337 do_store_af:
338 mov z_a,oph
339 mov z_flags,opl
340 ret
341
342 do_store_bc:
343 sts z_b,oph
344 sts z_c,opl
345 ret
346
347 do_store_de:
348 sts z_d,oph
349 sts z_e,opl
350 ret
351
352 do_store_hl:
353 sts z_h,oph
354 sts z_l,opl
355 ret
356
357 do_store_mbc:
358 lds xh,z_b
359 lds xl,z_c
360 mem_write_s opl
361 ret
362
363 do_store_mde:
364 lds xh,z_d
365 lds xl,z_e
366 mem_write_s opl
367 ret
368
369 do_store_mhl:
370 lds xh,z_h
371 lds xl,z_l
372 mem_write_s opl
373 ret
374
375 do_store_msp:
376 movw xl,z_spl
377 mem_write_s opl
378 adiw xl,1
379 mem_write_s oph
380 ret
381
382 do_store_sp:
383 movw z_spl,opl
384 ret
385
386 do_store_pc:
387 movw z_pcl,opl
388 ret
389
390 do_store_ret:
391 movw x,z_spl
392 mem_read_d z_pcl
393 adiw x,1
394 mem_read_d z_pch
395 adiw x,1
396 movw z_spl,x
397
398 .if STACK_DBG
399 printnewline
400 printstring "Stack pop "
401 movw temp,z_pcl
402 rcall printhexw
403 printstring ", SP is now "
404 movw temp,z_spl
405 rcall printhexw
406 printstring ". "
407 .endif
408 ret
409
410 do_store_call:
411 movw xl,z_spl
412 sbiw x,1
413 mem_write_s z_pch
414 sbiw x,1
415 mem_write_s z_pcl
416 movw z_spl,xl
417
418 .if STACK_DBG
419 printnewline
420 printstring "Stack push "
421 movw temp,z_pcl
422 rcall printhexw
423 printstring ", SP is now "
424 movw temp,z_spl
425 rcall printhexw
426 printstring ". "
427 .endif
428 movw z_pcl,opl
429 ret
430
431
432 do_store_am:
433 mem_write_ds op, z_a
434 ret
435
436 ; ------------ Operation phase stuff -----------------
437
438 ;.org (PC+255) & 0xff00
439
440 opjumps:
441 gen_opjmp op_nop
442 gen_opjmp op_inc
443 gen_opjmp op_dec
444 gen_opjmp op_inc16
445 gen_opjmp op_dec16
446 gen_opjmp op_rlc
447 gen_opjmp op_rrc
448 gen_opjmp op_rr
449 gen_opjmp op_rl
450 gen_opjmp op_adda
451 gen_opjmp op_adca
452 gen_opjmp op_subfa
453 gen_opjmp op_sbcfa
454 gen_opjmp op_anda
455 gen_opjmp op_ora
456 gen_opjmp op_xora
457 gen_opjmp op_addhl
458 gen_opjmp op_sthl
459 gen_opjmp op_rmem16
460 gen_opjmp op_rmem8
461 gen_opjmp op_da
462 gen_opjmp op_scf
463 gen_opjmp op_cpl
464 gen_opjmp op_ccf
465 gen_opjmp op_pop16
466 gen_opjmp op_push16
467 gen_opjmp op_ifnz
468 gen_opjmp op_ifz
469 gen_opjmp op_ifnc
470 gen_opjmp op_ifc
471 gen_opjmp op_ifpo
472 gen_opjmp op_ifpe
473 gen_opjmp op_ifp
474 gen_opjmp op_ifm
475 gen_opjmp op_outa
476 gen_opjmp op_in
477 gen_opjmp op_exhl
478 gen_opjmp op_di
479 gen_opjmp op_ei
480 gen_opjmp op_inv
481 gen_opjmp op_cpfa
482 gen_opjmp op_inca
483 gen_opjmp op_deca
484
485
486 ;----------------------------------------------------------------
487 ;| |
488 ;| Zilog |
489 ;| |
490 ;| ZZZZZZZ 88888 000 |
491 ;| Z 8 8 0 0 |
492 ;| Z 8 8 0 0 0 |
493 ;| Z 88888 0 0 0 |
494 ;| Z 8 8 0 0 0 |
495 ;| Z 8 8 0 0 |
496 ;| ZZZZZZZ 88888 000 |
497 ;| |
498 ;| Z80 MICROPROCESSOR Instruction Set Summary |
499 ;| |
500 ;----------------------------------------------------------------
501 ;----------------------------------------------------------------
502 ;|Mnemonic |SZHPNC|Description |Notes |
503 ;|----------+------+---------------------+----------------------|
504 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
505 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
506 ;|ADD A,s |***V0*|Add |A=A+s |
507 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
508 ;|ADD IX,pp |--?-0*|Add |IX=IX+pp |
509 ;|ADD IY,rr |--?-0*|Add |IY=IY+rr |
510 ;|AND s |**1P00|Logical AND |A=A&s |
511 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
512 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
513 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
514 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
515 ;|CP s |***V1*|Compare |A-s |
516 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
517 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
518 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
519 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
520 ;|CPL |--1-1-|Complement |A=~A |
521 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
522 ;|DEC s |***V1-|Decrement |s=s-1 |
523 ;|DEC xx |------|Decrement |xx=xx-1 |
524 ;|DEC ss |------|Decrement |ss=ss-1 |
525 ;|DI |------|Disable Interrupts | |
526 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
527 ;|EI |------|Enable Interrupts | |
528 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
529 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
530 ;|EX AF,AF' |------|Exchange |AF<->AF' |
531 ;|EX DE,HL |------|Exchange |DE<->HL |
532 ;|EXX |------|Exchange |qq<->qq' (except AF)|
533 ;|HALT |------|Halt | |
534 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
535 ;|IN A,[n] |------|Input |A=[n] |
536 ;|IN r,[C] |***P0-|Input |r=[C] |
537 ;|INC r |***V0-|Increment |r=r+1 |
538 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
539 ;|INC xx |------|Increment |xx=xx+1 |
540 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
541 ;|INC ss |------|Increment |ss=ss+1 |
542 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
543 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
544 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
545 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
546 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
547 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
548 ;|JP nn |------|Unconditional Jump |PC=nn |
549 ;|JP cc,nn |------|Conditional Jump |If cc JP |
550 ;|JR e |------|Unconditional Jump |PC=PC+e |
551 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
552 ;|LD dst,src|------|Load |dst=src |
553 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
554 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
555 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
556 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
557 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
558 ;|NEG |***V1*|Negate |A=-A |
559 ;|NOP |------|No Operation | |
560 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
561 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
562 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
563 ;|OUT [C],r |------|Output |[C]=r |
564 ;|OUT [n],A |------|Output |[n]=A |
565 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
566 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
567 ;|POP xx |------|Pop |xx=[SP]+ |
568 ;|POP qq |------|Pop |qq=[SP]+ |
569 ;|PUSH xx |------|Push |-[SP]=xx |
570 ;|PUSH qq |------|Push |-[SP]=qq |
571 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
572 ;|RET |------|Return |PC=[SP]+ |
573 ;|RET cc |------|Conditional Return |If cc RET |
574 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
575 ;|RETN |------|Return from NMI |PC=[SP]+ |
576 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
577 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
578 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
579 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
580 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
581 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
582 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
583 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
584 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
585 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
586 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
587 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
588 ;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY |
589 ;|SCF |--0-01|Set Carry Flag |CY=1 |
590 ;|SET b,m |------|Set bit |m=mv{2^b} |
591 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
592 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
593 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
594 ;|SUB s |***V1*|Subtract |A=A-s |
595 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
596 ;|----------+------+--------------------------------------------|
597 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
598 ;| S |S |Sign flag (Bit 7) |
599 ;| Z | Z |Zero flag (Bit 6) |
600 ;| HC | H |Half Carry flag (Bit 4) |
601 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
602 ;| N | N |Add/Subtract flag (Bit 1) |
603 ;| CY | C|Carry flag (Bit 0) |
604 ;|-----------------+--------------------------------------------|
605 ;| n |Immediate addressing |
606 ;| nn |Immediate extended addressing |
607 ;| e |Relative addressing (PC=PC+2+offset) |
608 ;| [nn] |Extended addressing |
609 ;| [xx+d] |Indexed addressing |
610 ;| r |Register addressing |
611 ;| [rr] |Register indirect addressing |
612 ;| |Implied addressing |
613 ;| b |Bit addressing |
614 ;| p |Modified page zero addressing (see RST) |
615 ;|-----------------+--------------------------------------------|
616 ;|DEFB n(,...) |Define Byte(s) |
617 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
618 ;|DEFS nn |Define Storage Block |
619 ;|DEFW nn(,...) |Define Word(s) |
620 ;|-----------------+--------------------------------------------|
621 ;| A B C D E |Registers (8-bit) |
622 ;| AF BC DE HL |Register pairs (16-bit) |
623 ;| F |Flag register (8-bit) |
624 ;| I |Interrupt page address register (8-bit) |
625 ;| IX IY |Index registers (16-bit) |
626 ;| PC |Program Counter register (16-bit) |
627 ;| R |Memory Refresh register |
628 ;| SP |Stack Pointer register (16-bit) |
629 ;|-----------------+--------------------------------------------|
630 ;| b |One bit (0 to 7) |
631 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
632 ;| d |One-byte expression (-128 to +127) |
633 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
634 ;| e |One-byte expression (-126 to +129) |
635 ;| m |Any register r, [HL] or [xx+d] |
636 ;| n |One-byte expression (0 to 255) |
637 ;| nn |Two-byte expression (0 to 65535) |
638 ;| pp |Register pair BC, DE, IX or SP |
639 ;| qq |Register pair AF, BC, DE or HL |
640 ;| qq' |Alternative register pair AF, BC, DE or HL |
641 ;| r |Register A, B, C, D, E, H or L |
642 ;| rr |Register pair BC, DE, IY or SP |
643 ;| s |Any register r, value n, [HL] or [xx+d] |
644 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
645 ;| ss |Register pair BC, DE, HL or SP |
646 ;| xx |Index register IX or IY |
647 ;|-----------------+--------------------------------------------|
648 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
649 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
650 ;| <- -> |Rotate left/right |
651 ;| [ ] |Indirect addressing |
652 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
653 ;| { } |Combination of operands |
654 ;| # |Also BC=BC-1,DE=DE-1 |
655 ;| ## |Only lower 4 bits of accumulator A used |
656 ;----------------------------------------------------------------
657
658 ;How the flags are supposed to work:
659 ;7 ZFL_S - Sign flag (=MSBit of result)
660 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
661 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
662 ;2 ZFL_P - Parity/2-complement Overflow
663 ;1 ZFL_N - Subtract - set if last op was a subtract
664 ;0 ZFL_C - Carry
665 ;
666 ;I sure hope I got the mapping between flags and instructions correct...
667
668 .equ ZFL_S = 7
669 .equ ZFL_Z = 6
670 .equ ZFL_H = 4
671 .equ ZFL_P = 2
672 .equ ZFL_N = 1
673 .equ ZFL_C = 0
674
675 .equ AVR_T = SREG_T
676 .equ AVR_H = SREG_H
677 .equ AVR_S = SREG_S
678 .equ AVR_V = SREG_V
679 .equ AVR_N = SREG_N
680 .equ AVR_Z = SREG_Z
681 .equ AVR_C = SREG_C
682
683 ;------------------------------------------------;
684 ; Load table value from flash indexed by source reg.
685 ;
686 ;ldpmx dstreg,tablebase,indexreg
687 ;
688 ; (6 words, 8 cycles)
689
690 .macro ldpmx
691 ldi zh,high(@1*2) ; table must be page aligned
692 mov zl,@2
693 lpm @0,z
694 .endm
695
696 .macro do_z80_flags_HP
697 #if EM_Z80
698 bmov z_flags, ZFL_P, temp, AVR_V
699 bmov z_flags, ZFL_H, temp, AVR_H
700 #endif
701 .endm
702
703 .macro do_z80_flags_set_N
704 #if EM_Z80
705 ori z_flags, (1<<ZFL_N) ; Negation auf 1
706 #endif
707 .endm
708
709 .macro do_z80_flags_set_HN
710 #if EM_Z80
711 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
712 #endif
713 .endm
714
715 .macro do_z80_flags_clear_N
716 #if EM_Z80
717 andi z_flags,~(1<<ZFL_N)
718 #endif
719 .endm
720
721 .macro do_z80_flags_op_rotate
722 ; must not change avr carry flag!
723 #if EM_Z80
724 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
725 #else
726 andi z_flags, ~( (1<<ZFL_C) )
727 #endif
728 .endm
729
730 .macro do_z80_flags_op_and
731 #if EM_Z80
732 ori z_flags,(1<<ZFL_H)
733 #else
734 ori z_flags,(1<<ZFL_H)
735 #endif
736 .endm
737
738 .macro do_z80_flags_op_or
739 #if EM_Z80
740 #endif
741 .endm
742
743
744 ;----------------------------------------------------------------
745
746 do_op_inv:
747 printstring "Invalid opcode @ PC="
748 movw temp,z_pcl
749 rcall printhexw
750
751 haltinv:
752 rjmp haltinv
753
754 do_op_nop:
755 ret
756
757 ;----------------------------------------------------------------
758 ;|Mnemonic |SZHPNC|Description |Notes |
759 ;----------------------------------------------------------------
760 ;|OUT [n],A |------|Output |[n]=A |
761 ;
762 ;
763 ;Interface with peripherials goes here :)
764 do_op_outa: ; out (opl),a
765 .if PORT_DEBUG
766 printnewline
767 printstring "Port write: "
768 mov temp,z_a
769 rcall printhex
770 printstring " -> ("
771 mov temp,opl
772 rcall printhex
773 printstring ") "
774 .endif
775 mov temp,z_a
776 mov temp2,opl
777 rcall portWrite
778 ret
779
780 ;----------------------------------------------------------------
781 ;|Mnemonic |SZHPNC|Description |Notes |
782 ;----------------------------------------------------------------
783 ;|IN A,[n] |------|Input |A=[n] |
784 ;
785 ;
786 do_op_in: ; in a,(opl)
787 .if PORT_DEBUG
788 printnewline
789 printstring "Port read: ("
790 mov temp,opl
791 rcall printhex
792 printstring ") -> "
793 .endif
794
795 mov temp2,opl
796 rcall portRead
797 mov opl,temp
798
799 .if PORT_DEBUG
800 rcall printhex
801 printstring " "
802 .endif
803 ret
804
805 ;----------------------------------------------------------------
806 ;|Mnemonic |SZHPNC|Description |Notes |
807 ;----------------------------------------------------------------
808 ;|INC r |***V0-|Increment |r=r+1 |
809 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
810 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
811 ;|----------|SZHP C|---------- 8080 ----------------------------|
812 ;|INC r |**-P0-|Increment |r=r+1 |
813 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
814 ;
815 ;
816 do_op_inc:
817 inc opl
818 #if EM_Z80
819 in temp, sreg
820 #endif
821 andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
822 ldpmx temp2, sz53p_tab, opl
823 or z_flags,temp2 ;
824 do_z80_flags_HP
825 ret
826
827 do_op_inca:
828 inc z_a
829 #if EM_Z80
830 in temp, sreg
831 #endif
832 andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
833 ldpmx temp2, sz53p_tab, z_a
834 or z_flags,temp2 ;
835 do_z80_flags_HP
836 ret
837
838 ;----------------------------------------------------------------
839 ;|Mnemonic |SZHPNC|Description |Notes |
840 ;----------------------------------------------------------------
841 ;|DEC r |***V1-|Decrement |s=s-1 |
842 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
843 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
844 ;|----------|SZHP C|---------- 8080 ----------------------------|
845 ;|DEC r |**-P -|Increment |r=r+1 |
846 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
847 ;
848 ;
849 do_op_dec:
850 dec opl
851 #if EM_Z80
852 in temp, sreg
853 #endif
854 andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
855 ldpmx temp2, sz53p_tab, opl
856 or z_flags,temp2 ;
857 do_z80_flags_HP
858 do_z80_flags_set_N
859 ret
860
861 do_op_deca:
862 dec z_a
863 #if EM_Z80
864 in temp, sreg
865 #endif
866 andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
867 ldpmx temp2, sz53p_tab, z_a
868 or z_flags,temp2 ;
869 do_z80_flags_HP
870 do_z80_flags_set_N
871 ret
872
873 ;----------------------------------------------------------------
874 ;|Mnemonic |SZHPNC|Description |Notes |
875 ;----------------------------------------------------------------
876 ;|INC xx |------|Increment |xx=xx+1 |
877 ;|INC ss |------|Increment |ss=ss+1 |
878 ;
879 ;
880 do_op_inc16:
881 subi opl,low(-1)
882 sbci oph,high(-1)
883 ret
884
885 ;----------------------------------------------------------------
886 ;|Mnemonic |SZHPNC|Description |Notes |
887 ;----------------------------------------------------------------
888 ;|DEC xx |------|Decrement |xx=xx-1 |
889 ;|DEC ss |------|Decrement |ss=ss-1 |
890 ;
891 ;
892 do_op_dec16:
893 subi opl, 1
894 sbci oph, 0
895 ret
896
897 ;----------------------------------------------------------------
898 ;|Mnemonic |SZHPNC|Description |Notes |
899 ;----------------------------------------------------------------
900 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
901 ;|----------|SZHP C|---------- 8080 ----------------------------|
902 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
903 ;
904 ;
905 do_op_rlc:
906 ;Rotate Left Cyclical. All bits move 1 to the
907 ;left, the msb becomes c and lsb.
908 do_z80_flags_op_rotate
909 lsl opl
910 brcc do_op_rlc_noc
911 ori opl, 1
912 ori z_flags, (1<<ZFL_C)
913 do_op_rlc_noc:
914 ret
915
916 ;----------------------------------------------------------------
917 ;|Mnemonic |SZHPNC|Description |Notes |
918 ;----------------------------------------------------------------
919 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
920 ;|----------|SZHP C|---------- 8080 ----------------------------|
921 ;|RRCA |---- *|Rotate Right Circular|A=->A |
922 ;
923 ;
924 do_op_rrc:
925 ;Rotate Right Cyclical. All bits move 1 to the
926 ;right, the lsb becomes c and msb.
927 do_z80_flags_op_rotate
928 lsr opl
929 brcc do_op_rrc_noc
930 ori opl, 0x80
931 ori z_flags, (1<<ZFL_C)
932 do_op_rrc_noc:
933 ret
934
935 ;----------------------------------------------------------------
936 ;|Mnemonic |SZHPNC|Description |Notes |
937 ;----------------------------------------------------------------
938 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
939 ;|----------|SZHP C|---------- 8080 ----------------------------|
940 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
941 ;
942 ;
943 do_op_rr:
944 ;Rotate Right. All bits move 1 to the right, the lsb
945 ;becomes c, c becomes msb.
946 clc ; get z80 carry to avr carry
947 sbrc z_flags,ZFL_C
948 sec
949 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
950 bmov z_flags,ZFL_C, opl,0 ; Bit 0 --> CY
951 ror opl
952 ret
953
954 ;----------------------------------------------------------------
955 ;|Mnemonic |SZHPNC|Description |Notes |
956 ;----------------------------------------------------------------
957 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
958 ;|----------|SZHP C|---------- 8080 ----------------------------|
959 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
960 ;
961 ;
962 do_op_rl:
963 ;Rotate Left. All bits move 1 to the left, the msb
964 ;becomes c, c becomes lsb.
965 clc
966 sbrc z_flags,ZFL_C
967 sec
968 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
969 bmov z_flags,ZFL_C, opl,7 ; Bit 7 --> CY
970 rol opl
971 ret
972
973 ;----------------------------------------------------------------
974 ;|Mnemonic |SZHPNC|Description |Notes |
975 ;----------------------------------------------------------------
976 ;|ADD A,s |***V0*|Add |A=A+s |
977 ;|----------|SZHP C|---------- 8080 ----------------------------|
978 ;|ADD A,s |***P *|Add |A=A+s |
979 ;
980 ;
981 do_op_adda:
982 add z_a,opl
983 in temp,sreg
984 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
985 bmov z_flags,ZFL_C, temp,AVR_C
986 do_z80_flags_HP
987 ret
988
989 ;----------------------------------------------------------------
990 ;|Mnemonic |SZHPNC|Description |Notes |
991 ;----------------------------------------------------------------
992 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
993 ;|----------|SZHP C|---------- 8080 ----------------------------|
994 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
995 ;
996 ;
997 do_op_adca:
998 clc
999 sbrc z_flags,ZFL_C
1000 sec
1001 adc z_a,opl
1002 in temp,sreg
1003 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1004 bmov z_flags,ZFL_C, temp,AVR_C
1005 do_z80_flags_HP
1006 ret
1007
1008 ;----------------------------------------------------------------
1009 ;|Mnemonic |SZHPNC|Description |Notes |
1010 ;----------------------------------------------------------------
1011 ;|SUB s |***V1*|Subtract |A=A-s |
1012 ;|----------|SZHP C|---------- 8080 ----------------------------|
1013 ;|SUB s |***P *|Subtract |A=A-s |
1014
1015 ;
1016 do_op_subfa:
1017 sub z_a,opl
1018 in temp,sreg
1019 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1020 bmov z_flags,ZFL_C, temp,AVR_C
1021 do_z80_flags_HP
1022 do_z80_flags_set_N
1023 ret
1024
1025 ;----------------------------------------------------------------
1026 ;|Mnemonic |SZHPNC|Description |Notes |
1027 ;----------------------------------------------------------------
1028 ;|CP s |***V1*|Compare |A-s |
1029 ;|----------|SZHP C|---------- 8080 ----------------------------|
1030 ;|CP s |***P *|Compare |A-s |
1031
1032 ;
1033 do_op_cpfa:
1034 mov temp,z_a
1035 sub temp,opl
1036 mov opl,temp
1037 in temp,sreg
1038 ldpmx z_flags,sz53p_tab,opl ;S,Z,P
1039 bmov z_flags,ZFL_C, temp,AVR_C
1040 do_z80_flags_HP
1041 do_z80_flags_set_N
1042 ret
1043
1044 ;----------------------------------------------------------------
1045 ;|Mnemonic |SZHPNC|Description |Notes |
1046 ;----------------------------------------------------------------
1047 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1048 ;|----------|SZHP C|---------- 8080 ----------------------------|
1049 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1050 ;
1051 ;
1052 do_op_sbcfa:
1053 clc
1054 sbrc z_flags,ZFL_C
1055 sec
1056 sbc z_a,opl
1057 in temp,sreg
1058 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1059 bmov z_flags,ZFL_C, temp,AVR_C
1060 do_z80_flags_HP
1061 do_z80_flags_set_N
1062 ret
1063
1064 ;----------------------------------------------------------------
1065 ;|Mnemonic |SZHPNC|Description |Notes |
1066 ;----------------------------------------------------------------
1067 ;|AND s |**1P00|Logical AND |A=A&s |
1068 ;|----------|SZHP C|---------- 8080 ----------------------------|
1069 ;|AND s |**-P 0|Logical AND |A=A&s |
1070 ;
1071 ; TODO H-Flag
1072 do_op_anda:
1073 and z_a,opl ;
1074 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1075 do_z80_flags_op_and
1076 ret
1077
1078
1079 ;----------------------------------------------------------------
1080 ;|Mnemonic |SZHPNC|Description |Notes |
1081 ;----------------------------------------------------------------
1082 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
1083 ;|----------|SZHP C|---------- 8080 ----------------------------|
1084 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
1085 ;
1086 ; TODO: H-Flag
1087 do_op_ora:
1088 or z_a,opl
1089 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1090 do_z80_flags_op_or
1091 ret
1092
1093 ;----------------------------------------------------------------
1094 ;|Mnemonic |SZHPNC|Description |Notes |
1095 ;----------------------------------------------------------------
1096 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1097 ;|----------|SZHP C|---------- 8080 ----------------------------|
1098 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1099 ;
1100 ; TODO: H-Flag
1101 do_op_xora:
1102 eor z_a,opl
1103 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1104 do_z80_flags_op_or
1105 ret
1106
1107 ;----------------------------------------------------------------
1108 ;|Mnemonic |SZHPNC|Description |Notes |
1109 ;----------------------------------------------------------------
1110 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1111 ;|----------|SZHP C|---------- 8080 ----------------------------|
1112 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1113 ;
1114 ;
1115 do_op_addhl:
1116 lds temp,z_l
1117 lds temp2,z_h
1118 add opl,temp
1119 adc oph,temp2
1120 in temp,sreg
1121 bmov z_flags,ZFL_H, temp,AVR_H
1122 bmov z_flags,ZFL_C, temp,AVR_C
1123 do_z80_flags_clear_N
1124 ret
1125
1126 ;----------------------------------------------------------------
1127 ;|Mnemonic |SZHPNC|Description |Notes |
1128 ;----------------------------------------------------------------
1129 ;|LD dst,src|------|Load |dst=src |
1130 ;
1131 ;
1132 do_op_sthl: ;store hl to mem loc in opl:h
1133 movw xl,opl
1134 lds temp,z_l
1135 mem_write
1136 adiw xl,1
1137 lds temp,z_h
1138 mem_write
1139 ret
1140
1141 ;----------------------------------------------------------------
1142 ;|Mnemonic |SZHPNC|Description |Notes |
1143 ;----------------------------------------------------------------
1144 ;|LD dst,src|------|Load |dst=src |
1145 ;
1146 ;
1147 do_op_rmem16:
1148 movw xl,opl
1149 mem_read_d opl
1150 adiw x,1
1151 mem_read_d oph
1152 ret
1153
1154 ;----------------------------------------------------------------
1155 ;|Mnemonic |SZHPNC|Description |Notes |
1156 ;----------------------------------------------------------------
1157 ;|LD dst,src|------|Load |dst=src |
1158 ;
1159 ;
1160 do_op_rmem8:
1161 mem_read_ds opl, op
1162 ret
1163
1164 ;----------------------------------------------------------------
1165 ;|Mnemonic |SZHPNC|Description |Notes |
1166 ;----------------------------------------------------------------
1167 ;|DAA |***P-*|Decimal Adjust Acc. | |
1168 ;|----------|SZHP C|---------- 8080 ----------------------------|
1169 ;
1170 ; Not yet checked
1171
1172 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1173 ; This instruction conditionally adjusts the accumulator for BCD addition
1174 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1175 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1176 ;
1177 ; -------------------------------------------------------------------------------
1178 ; | | C Flag | HEX value in | H Flag | HEX value in | Number | C flag|
1179 ; | Operation| Before | upper digit | Before | lower digit | added | After |
1180 ; | | DAA | (bit 7-4) | DAA | (bit 3-0) | to byte | DAA |
1181 ; |-----------------------------------------------------------------------------|
1182 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1183 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1184 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1185 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1186 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1187 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1188 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1189 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1190 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1191 ; |-----------------------------------------------------------------------------|
1192 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1193 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1194 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1195 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1196 ; |-----------------------------------------------------------------------------|
1197 ;
1198 ; Flags:
1199 ; C: See instruction.
1200 ; N: Unaffected.
1201 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1202 ; H: See instruction.
1203 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1204 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1205
1206
1207
1208 #if 1
1209 do_op_da:
1210 ldi oph,0 ; what to add
1211 sbrc z_flags,ZFL_H ; if H-Flag
1212 rjmp op_da_06
1213 mov temp,opl
1214 andi temp,0x0f ; ... or lower digit > 9
1215 cpi temp,0x0a
1216 brlo op_da_06n
1217 op_da_06:
1218 ori oph,0x06
1219 op_da_06n:
1220 sbrc z_flags,(1<<ZFL_C)
1221 rjmp op_da_60
1222 cpi opl,0xa0
1223 brlo op_da_60n
1224 op_da_60:
1225 ori oph,0x60
1226 op_da_60n:
1227 cpi opl,0x9a
1228 brlo op_da_99n
1229 ori z_flags,(1<<ZFL_C); set C
1230 op_da_99n:
1231 sbrs z_flags,ZFL_N ; if sub-op
1232 rjmp op_da_add ; then
1233 sub opl,oph
1234 rjmp op_da_ex
1235 op_da_add: ; else add-op
1236 cpi opl,0x91
1237 brlo op_da_60n2
1238 mov temp,opl
1239 andi temp,0x0f
1240 cpi temp,0x0a
1241 brlo op_da_60n2
1242 ori oph,0x60
1243 op_da_60n2:
1244 add opl,oph
1245 op_da_ex:
1246 in temp,SREG
1247 sbrc temp,AVR_H
1248 ori z_flags,(1<<ZFL_C)
1249 andi z_flags,(1<<ZFL_N)|(1<<ZFL_C) ; preserve C,N
1250 ldpmx temp2, sz53p_tab, opl ; get S,Z,P
1251 or z_flags,temp2
1252 bmov z_flags,ZFL_H, temp,AVR_H ; H (?)
1253 ret
1254 #else
1255
1256 do_op_da:
1257 sbrc z_flags,ZFL_N ; if add-op
1258 rjmp do_op_da_sub ; then
1259 ldi temp2,0 ;
1260 mov temp,opl ;
1261 andi temp,0x0f ;
1262 cpi temp,0x0a ;if lower digit > 9
1263 brlo do_op_da_h ;
1264 ori temp2,0x06 ; add 6 to lower digit
1265 do_op_da_h: ;
1266 sbrc z_flags,ZFL_H ; ... or H-Flag
1267 ori temp2,0x06 ;
1268 add opl,temp2 ;
1269
1270 ldi temp2,0 ;
1271 mov temp,opl ;
1272 andi temp,0xf0 ;
1273 cpi temp,0xa0 ;
1274 brlo do_op_da_c ;
1275 ori temp2,0x60 ;
1276 do_op_da_c: ; else sub-op
1277 sbrc z_flags,ZFL_C ;
1278 ori temp2,0x60 ;
1279 andi z_flags, ~( (1<<ZFL_S) | (1<<ZFL_Z) | (1<<ZFL_H) )
1280 add opl,temp2 ;
1281 in temp,SREG ;
1282 bst temp,AVR_Z ;Z-Flag
1283 bld z_flags,ZFL_Z ;
1284 bst temp,AVR_N ;S-Flag
1285 bst z_flags,ZFL_S ;
1286 sbrc temp2,5 ;C-Flag, set if 0x06 added
1287 ori z_flags,(1<<ZFL_C) ;
1288 ;H-Flag?
1289 ret
1290
1291 do_op_da_sub: ;TODO:
1292 rcall do_op_inv
1293 ret
1294 #endif
1295
1296 ;----------------------------------------------------------------
1297 ;|Mnemonic |SZHPNC|Description |Notes |
1298 ;----------------------------------------------------------------
1299 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1300 ;|----------|SZHP C|---------- 8080 ----------------------------|
1301 ;
1302 ;
1303 do_op_scf:
1304 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
1305 ori z_flags,(1<<ZFL_C)
1306 ret
1307
1308 ;----------------------------------------------------------------
1309 ;|Mnemonic |SZHPNC|Description |Notes |
1310 ;----------------------------------------------------------------
1311 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
1312 ;|----------|SZHP C|---------- 8080 ----------------------------|
1313 ;|SCF |---- 1|Set Carry Flag |CY=1 |
1314 ;
1315 ;TODO: H-Flag
1316 do_op_ccf:
1317 do_z80_flags_clear_N
1318 ldi temp,(1<<ZFL_C)
1319 eor z_flags,temp
1320 ret
1321
1322 ;----------------------------------------------------------------
1323 ;|Mnemonic |SZHPNC|Description |Notes |
1324 ;----------------------------------------------------------------
1325 ;|CPL |--1-1-|Complement |A=~A |
1326 ;|----------|SZHP C|---------- 8080 ----------------------------|
1327 ;|CPL |---- -|Complement |A=~A |
1328 ;
1329 ;
1330 do_op_cpl:
1331 com z_a
1332 do_z80_flags_set_HN
1333 ret
1334
1335
1336 ;----------------------------------------------------------------
1337 ;|Mnemonic |SZHPNC|Description |Notes |
1338 ;----------------------------------------------------------------
1339 ;|PUSH xx |------|Push |-[SP]=xx |
1340 ;|PUSH qq |------|Push |-[SP]=qq |
1341 ;
1342 ;
1343 do_op_push16:
1344 movw xl,z_spl
1345 sbiw x,1
1346 mem_write_s oph
1347 sbiw x,1
1348 mem_write_s opl
1349 movw z_spl,xl
1350
1351 .if STACK_DBG
1352 printnewline
1353 printstring "Stack push "
1354 movw temp,opl
1355 rcall printhexw
1356 printstring ", SP is now "
1357 movw temp,z_spl
1358 rcall printhexw
1359 printstring ". "
1360 .endif
1361
1362 ret
1363
1364 ;----------------------------------------------------------------
1365 ;|Mnemonic |SZHPNC|Description |Notes |
1366 ;----------------------------------------------------------------
1367 ;|POP xx |------|Pop |xx=[SP]+ |
1368 ;|POP qq |------|Pop |qq=[SP]+ |
1369 ;
1370 ;
1371 do_op_pop16:
1372 movw x,z_spl
1373 mem_read_d opl
1374 adiw x,1
1375 mem_read_d oph
1376 adiw x,1
1377 movw z_spl,x
1378
1379 .if STACK_DBG
1380 printnewline
1381 printstring "Stack pop "
1382 movw temp,opl
1383 rcall printhexw
1384 printstring ", SP is now "
1385 movw temp,z_spl
1386 rcall printhexw
1387 printstring ". "
1388 .endif
1389 ret
1390
1391 ;----------------------------------------------------------------
1392 ;|Mnemonic |SZHPNC|Description |Notes |
1393 ;----------------------------------------------------------------
1394 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1395 ;|EX DE,HL |------|Exchange |DE<->HL |
1396 ;-----------------------------Z80--------------------------------
1397 ;
1398 do_op_exhl:
1399 lds temp,z_l
1400 lds temp2,z_h
1401 sts z_l,opl
1402 sts z_h,oph
1403 movw opl,temp
1404 ret
1405
1406 ;----------------------------------------------------------------
1407 ;|Mnemonic |SZHPNC|Description |Notes |
1408 ;----------------------------------------------------------------
1409 ;
1410 ; TODO: Implement IFF1, IFF2
1411 do_op_di:
1412 ret
1413
1414 ;----------------------------------------------------------------
1415 ;|Mnemonic |SZHPNC|Description |Notes |
1416 ;----------------------------------------------------------------
1417 ;
1418 ; TODO: Implement IFF1, IFF2
1419 do_op_ei:
1420 ret
1421
1422 ;----------------------------------------------------------------
1423 ;|Mnemonic |SZHPNC|Description |Notes |
1424 ;----------------------------------------------------------------
1425 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1426 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1427 ;|RET cc |------|Conditional Return |If cc RET |
1428 ;
1429 ;
1430 do_op_ifnz:
1431 sbrs z_flags, ZFL_Z
1432 ret
1433 pop temp ; nix tun
1434 pop temp ; direkt zuruech zu main
1435 ret
1436
1437 ;----------------------------------------------------------------
1438 ;|Mnemonic |SZHPNC|Description |Notes |
1439 ;----------------------------------------------------------------
1440 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1441 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1442 ;|RET cc |------|Conditional Return |If cc RET |
1443 ;
1444 ;
1445 do_op_ifz:
1446 sbrc z_flags, ZFL_Z
1447 ret
1448 pop temp ; nix tun
1449 pop temp ; direkt zuruech zu main
1450 ret
1451
1452 ;----------------------------------------------------------------
1453 ;|Mnemonic |SZHPNC|Description |Notes |
1454 ;----------------------------------------------------------------
1455 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1456 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1457 ;|RET cc |------|Conditional Return |If cc RET |
1458 ;
1459 ;
1460 do_op_ifnc:
1461 sbrs z_flags, ZFL_C
1462 ret
1463 pop temp ; nix tun
1464 pop temp ; direkt zuruech zu main
1465 ret
1466
1467 ;----------------------------------------------------------------
1468 ;|Mnemonic |SZHPNC|Description |Notes |
1469 ;----------------------------------------------------------------
1470 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1471 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1472 ;|RET cc |------|Conditional Return |If cc RET |
1473 ;
1474 ;
1475 do_op_ifc:
1476 sbrc z_flags, ZFL_C
1477 ret
1478 pop temp ; nix tun
1479 pop temp ; direkt zuruech zu main
1480 ret
1481
1482 ;----------------------------------------------------------------
1483 ;|Mnemonic |SZHPNC|Description |Notes |
1484 ;----------------------------------------------------------------
1485 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1486 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1487 ;|RET cc |------|Conditional Return |If cc RET |
1488 ;
1489 ;
1490 do_op_ifpo:
1491 sbrs z_flags, ZFL_P
1492 ret
1493 pop temp ; nix tun
1494 pop temp ; direkt zuruech zu main
1495 ret
1496
1497 ;----------------------------------------------------------------
1498 ;|Mnemonic |SZHPNC|Description |Notes |
1499 ;----------------------------------------------------------------
1500 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1501 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1502 ;|RET cc |------|Conditional Return |If cc RET |
1503 ;
1504 ;
1505 do_op_ifpe:
1506 sbrc z_flags, ZFL_P
1507 ret
1508 pop temp ; nix tun
1509 pop temp ; direkt zuruech zu main
1510 ret
1511
1512 ;----------------------------------------------------------------
1513 ;|Mnemonic |SZHPNC|Description |Notes |
1514 ;----------------------------------------------------------------
1515 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1516 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1517 ;|RET cc |------|Conditional Return |If cc RET |
1518 ;
1519 ;
1520 do_op_ifp: ;sign positive, aka s=0
1521 sbrs z_flags, ZFL_S
1522 ret
1523 pop temp ; nix tun
1524 pop temp ; direkt zuruech zu main
1525 ret
1526
1527 ;----------------------------------------------------------------
1528 ;|Mnemonic |SZHPNC|Description |Notes |
1529 ;----------------------------------------------------------------
1530 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1531 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1532 ;|RET cc |------|Conditional Return |If cc RET |
1533 ;
1534 ;
1535 do_op_ifm: ;sign negative, aka s=1
1536 sbrc z_flags, ZFL_S
1537 ret
1538 pop temp ; nix tun
1539 pop temp ; direkt zuruech zu main
1540 ret
1541
1542
1543 ; ----------------------- Opcode decoding -------------------------
1544
1545 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1546 ; operations: fetch, do something, store.
1547 ; The table is made of 256 words.
1548
1549 ;.org (PC+255) & 0xff00
1550 todo_table:
1551 instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1552 instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
1553 instr do_fetch_A, op_nop, do_store_MBC ;02 ;LD (BC),A
1554 instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1555 instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1556 instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1557 instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
1558 instr do_fetch_A, op_RLC, do_store_A ;07 ;RLCA
1559 instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1560 instr do_fetch_BC, op_ADDHL, do_store_HL ;09 ;ADD HL,BC
1561 instr do_fetch_MBC, op_nop, do_store_A ;0A ;LD A,(BC)
1562 instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1563 instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1564 instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1565 instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
1566 instr do_fetch_A, op_RRC, do_store_A ;0F ;RRCA
1567 instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1568 instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
1569 instr do_fetch_A, op_nop, do_store_MDE ;12 ;LD (DE),A
1570 instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1571 instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1572 instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1573 instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
1574 instr do_fetch_A, op_RL, do_store_A ;17 ;RLA
1575 instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1576 instr do_fetch_DE, op_ADDHL, do_store_HL ;19 ;ADD HL,DE
1577 instr do_fetch_MDE, op_nop, do_store_A ;1A ;LD A,(DE)
1578 instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1579 instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1580 instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1581 instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
1582 instr do_fetch_A, op_RR, do_store_A ;1F ;RRA
1583 instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1584 instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1585 instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1586 instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1587 instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1588 instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1589 instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1590 instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1591 instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1592 instr do_fetch_HL, op_ADDHL, do_store_HL ;29 ;ADD HL,HL
1593 instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1594 instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1595 instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1596 instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1597 instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1598 instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1599 instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1600 instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1601 instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1602 instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1603 instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1604 instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1605 instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1606 instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1607 instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1608 instr do_fetch_SP, op_ADDHL, do_store_HL ;39 ;ADD HL,SP
1609 instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1610 instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1611 instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1612 instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1613 instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1614 instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
1615 instr do_fetch_B, op_nop, do_store_B ;40 ;LD B,B
1616 instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1617 instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1618 instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1619 instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1620 instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1621 instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1622 instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1623 instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
1624 instr do_fetch_C, op_nop, do_store_C ;49 ;LD C,C
1625 instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1626 instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1627 instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1628 instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1629 instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1630 instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1631 instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1632 instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
1633 instr do_fetch_D, op_nop, do_store_D ;52 ;LD D,D
1634 instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1635 instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1636 instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1637 instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1638 instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1639 instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1640 instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1641 instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
1642 instr do_fetch_E, op_nop, do_store_E ;5B ;LD E,E
1643 instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1644 instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1645 instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1646 instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1647 instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1648 instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1649 instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1650 instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
1651 instr do_fetch_H, op_nop, do_store_H ;64 ;LD H,H
1652 instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1653 instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1654 instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1655 instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1656 instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1657 instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1658 instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1659 instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
1660 instr do_fetch_L, op_nop, do_store_L ;6D ;LD L,L
1661 instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1662 instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1663 instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1664 instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1665 instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1666 instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1667 instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1668 instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1669 instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1670 instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
1671 instr do_fetch_B, op_nop, do_store_A ;78 ;LD A,B
1672 instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1673 instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1674 instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1675 instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1676 instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1677 instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
1678 instr do_fetch_A, op_nop, do_store_A ;7F ;LD A,A
1679 instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1680 instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1681 instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1682 instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1683 instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1684 instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1685 instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1686 instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1687 instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1688 instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1689 instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1690 instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1691 instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1692 instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1693 instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1694 instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1695 instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1696 instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1697 instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1698 instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1699 instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1700 instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1701 instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1702 instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1703 instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1704 instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1705 instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1706 instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1707 instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1708 instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1709 instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1710 instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1711 instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1712 instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1713 instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1714 instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1715 instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1716 instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1717 instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1718 instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1719 instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1720 instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1721 instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1722 instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1723 instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1724 instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1725 instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1726 instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1727 instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1728 instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1729 instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1730 instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1731 instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1732 instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1733 instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1734 instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1735 instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1736 instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1737 instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1738 instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1739 instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1740 instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1741 instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1742 instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1743 instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1744 instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1745 instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1746 instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1747 instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1748 instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1749 instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1750 instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1751 instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1752 instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1753 instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1754 instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1755 instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1756 instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1757 instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1758 instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1759 instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1760 instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1761 instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1762 instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1763 instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1764 instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1765 instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1766 instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1767 instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1768 instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1769 instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1770 instr do_fetch_DIR8, op_IN, do_store_A ;DB nn ;IN A,(n)
1771 instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1772 instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1773 instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1774 instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1775 instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1776 instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1777 instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1778 instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1779 instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1780 instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1781 instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1782 instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1783 instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1784 instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1785 instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1786 instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1787 instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1788 instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1789 instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1790 instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1791 instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1792 instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1793 instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1794 instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1795 instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1796 instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1797 instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1798 instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1799 instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1800 instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1801 instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1802 instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1803 instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1804 instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1805 instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1806 instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1807
1808 ;----------------------------------------------------------------
1809 ; Lookup table, stolen from z80ex, Z80 emulation library.
1810 ; http://z80ex.sourceforge.net/
1811
1812 ; The S, Z, 5 and 3 bits and the parity of the lookup value
1813
1814 .org (PC+255) & 0xff00
1815 sz53p_tab:
1816 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1817 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1818 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1819 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1820 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1821 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1822 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1823 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1824 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1825 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1826 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1827 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1828 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1829 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1830 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1831 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1832 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1833 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1834 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1835 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1836 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1837 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1838 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1839 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1840 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1841 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1842 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1843 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1844 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1845 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1846 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1847 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1848
1849 ; vim:set ts=8 noet nowrap
1850
CP/M on an AVR