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* I2C: Don't get stuck, if pullups are missing (timeout error)
[avrcpm.git] / avr / 8080int.asm
1 ; 8080 Interpreter.
2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
3 ;
4
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010 Leo C.
7 ; Copyright (C) 2010 Horst S.
8
9 ; This file is part of avrcpm.
10 ;
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
15 ;
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
20 ;
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23 ;
24 ; $Id$
25 ;
26
27 ;--------------------------------------------------
28 ; Generate a table entry for one instruction
29 ;
30 ; instr fetch, op, store
31 ;
32 .macro instr
33 .db low(@2), low(do_@1), high(do_@1), low(@0)
34 .endm
35
36
37 .dseg
38
39 z_b: .byte 1
40 z_c: .byte 1
41 z_d: .byte 1
42 z_e: .byte 1
43 z_h: .byte 1
44 z_l: .byte 1
45
46 .equ oz_b = 0
47 .equ oz_c = 1
48 .equ oz_d = 2
49 .equ oz_e = 3
50 .equ oz_h = 4
51 .equ oz_l = 5
52
53
54 #if EM_Z80
55 z_b2: .byte 1
56 z_c2: .byte 1
57 z_d2: .byte 1
58 z_e2: .byte 1
59 z_h2: .byte 1
60 z_l2: .byte 1
61 z_f2: .byte 1
62 z_a2: .byte 1
63 .equ r2ofs = z_b2-z_b
64 .equ oz_b2 = 6
65 .equ oz_c2 = 7
66 .equ oz_d2 = 8
67 .equ oz_e2 = 9
68 .equ oz_h2 = 10
69 .equ oz_l2 = 11
70 .equ oz_f2 = 12
71 .equ oz_a2 = 13
72
73 z_xh: .byte 1
74 z_xl: .byte 1
75 z_yh: .byte 1
76 z_yl: .byte 1
77
78 z_i: .byte 1
79 z_r: .byte 1
80 .equ oz_xh = 14
81 .equ oz_xl = 15
82 .equ oz_yh = 16
83 .equ oz_yl = 17
84 .equ oz_i = 18
85 .equ oz_r = 19
86
87 z_istat: .byte 1
88 .equ oz_istat = 20
89
90 .equ IM_MASK = 0x03 ;Mask IM 0..2
91 .equ IM0 = 0
92 .equ IM1 = 1
93 .equ IM2 = 2
94
95 .equ IFF1 = 2 ;IFF1 Flag
96 .equ IFF2 = 3 ;IFF2 Flag
97
98 #endif
99
100 .cseg
101
102 ;Init z80
103 z80_init:
104 ldi z_pcl,low (IPLADDR)
105 ldi z_pch,high(IPLADDR)
106
107 cbi flags,trace
108 printnewline
109 printstring "Ok, CPU is live!"
110 printnewline
111
112 ;----------------------------------------------------------
113 ; 1 2 3 4
114 ;.db (low)do_store (low)do_op (hihg)do_op (low)do_fetch
115 ;
116 ;das kommt auf den stapel
117 ; main da solls zum schluss weitergehen
118 ;do_store wohin damit beenden mit RET
119 ;do_op was tun beenden mit RET
120 ;
121 ;das wird direkt angesprungen
122 ;do_fetch woher beenden mit RET
123 ;
124 ;
125 main:
126 .if INS_DEBUG
127 cbi flags,trace
128 cpi z_pch,DBG_TRACE_BOTTOM
129 brlo notraceon
130 cpi z_pch,DBG_TRACE_TOP
131 brsh notraceon
132 sbi flags,trace
133 notraceon:
134 .endif
135
136 .if PRINT_PC
137 cpi z_pch,DBG_TRACE_BOTTOM
138 brlo noprintpc
139 cpi z_pch,DBG_TRACE_TOP
140 brsh noprintpc
141
142 printnewline
143 printstring "PC="
144 movw temp,z_pcl
145 lcall printhexw
146 printstring " "
147 noprintpc:
148 .endif
149
150 .if INS_DEBUG
151 sbic flags,trace
152 rcall printregs
153 .endif
154
155 ;hier kommt die Interruptbehandlung rein
156
157 ldi zl,low(main) ;da will ich wieder hin.
158 ldi zh,high(main) ;
159 push zl ;
160 push zh ;
161 mem_read_s z_pc ;temp=memReadByte(z_pc)
162 adiw z_pcl,1 ;++z_pc
163 ldi zl,low(todo_table*2) ;zhl=todo_table
164 ldi zh,high(todo_table*2) ;
165 ldi temp2,4 ;1
166 mul temp,temp2 ;2
167 add zl,r0 ;1
168 adc zh,r1 ;1
169 ldi temp2,high(store_ops) ;
170 lpm temp,Z+ ;do_store
171 push temp ; low
172 push temp2 ; high
173
174 lpm temp,Z+ ;do_op
175 push temp ; low
176 lpm temp,Z+ ; high
177 push temp ;
178
179 lpm zl,Z ;do_fetch
180
181 ;mov zh,temp2 ;
182 ldi zh,high(fetch_ops)
183 ijmp ;direkt
184
185
186
187 ; ------------ Fetch phase stuff -----------------
188
189 .org (PC+255) & 0xff00 ; wichtig !!!fetch und store muessen in einer page liegen
190 fetch_ops:
191 do_fetch_nop:
192 ret
193
194 do_fetch_a:
195 mov opl,z_a
196 ret
197
198 do_fetch_b:
199 lds opl,z_b
200 ret
201
202 do_fetch_c:
203 lds opl,z_c
204 ret
205
206 do_fetch_d:
207 lds opl,z_d
208 ret
209
210 do_fetch_e:
211 lds opl,z_e
212 ret
213
214 do_fetch_h:
215 lds opl,z_h
216 ret
217
218 do_fetch_l:
219 lds opl,z_l
220 ret
221
222 do_fetch_af:
223 mov opl,z_flags
224 mov oph,z_a
225 ret
226
227 do_fetch_bc:
228 lds opl,z_c
229 lds oph,z_b
230 ret
231
232 do_fetch_de:
233 lds opl,z_e
234 lds oph,z_d
235 ret
236
237 do_fetch_hl:
238 lds opl,z_l
239 lds oph,z_h
240 ret
241
242 do_fetch_sp:
243 movw opl,z_spl
244 ret
245
246 do_fetch_mbc:
247 lds xh,z_b
248 lds xl,z_c
249 mem_read_d z_a
250 ret
251
252 do_fetch_mde:
253 lds xh,z_d
254 lds xl,z_e
255 mem_read_d z_a
256 ret
257
258 do_fetch_mhl:
259 lds xh,z_h
260 lds xl,z_l
261 mem_read_d opl
262 ret
263
264 do_fetch_msp:
265 movw x,z_spl
266 mem_read_d opl
267 adiw x,1
268 mem_read_d oph
269 ret
270
271 do_fetch_dir8:
272 mem_read_ds opl, z_pc
273 adiw z_pcl,1
274 ret
275
276 do_fetch_dir16:
277 mem_read_ds opl, z_pc
278 adiw z_pcl,1
279 mem_read_ds oph, z_pc
280 adiw z_pcl,1
281 ret
282
283 do_fetch_rst:
284 movw x,z_pcl
285 sbiw x,1
286 mem_read_d opl
287 andi opl,0x38
288 ldi oph,0
289 ret
290
291 ; ------------ Store phase stuff -----------------
292
293 .org (PC+255) & 0xff00 ; wichtig !!!fetch und store muessen in einer page liegen
294 store_ops:
295 do_store_nop:
296 ret
297
298 do_store_a:
299 mov z_a,opl
300 ret
301
302 do_store_b:
303 sts z_b,opl
304 ret
305
306 do_store_c:
307 sts z_c,opl
308 ret
309
310 do_store_d:
311 sts z_d,opl
312 ret
313
314 do_store_e:
315 sts z_e,opl
316 ret
317
318 do_store_h:
319 sts z_h,opl
320 ret
321
322 do_store_l:
323 sts z_l,opl
324 ret
325
326 do_store_af:
327 mov z_a,oph
328 mov z_flags,opl
329 ret
330
331 do_store_bc:
332 sts z_b,oph
333 sts z_c,opl
334 ret
335
336 do_store_de:
337 sts z_d,oph
338 sts z_e,opl
339 ret
340
341 do_store_hl:
342 sts z_h,oph
343 sts z_l,opl
344 ret
345
346 do_store_mbc:
347 lds xh,z_b
348 lds xl,z_c
349 mem_write_s z_a
350 ret
351
352 do_store_mde:
353 lds xh,z_d
354 lds xl,z_e
355 mem_write_s z_a
356 ret
357
358 do_store_mhl:
359 lds xh,z_h
360 lds xl,z_l
361 mem_write_s opl
362 ret
363
364 do_store_msp:
365 movw xl,z_spl
366 mem_write_s opl
367 adiw xl,1
368 mem_write_s oph
369 ret
370
371 do_store_sp:
372 movw z_spl,opl
373 ret
374
375 do_store_pc:
376 movw z_pcl,opl
377 ret
378
379 do_store_ret:
380 movw x,z_spl
381 mem_read_d z_pcl
382 adiw x,1
383 mem_read_d z_pch
384 adiw x,1
385 movw z_spl,x
386
387 .if STACK_DBG
388 printnewline
389 printstring "Stack pop "
390 movw temp,z_pcl
391 rcall printhexw
392 printstring ", SP is now "
393 movw temp,z_spl
394 rcall printhexw
395 printstring ". "
396 .endif
397 ret
398
399 do_store_call:
400 movw xl,z_spl
401 sbiw x,1
402 mem_write_s z_pch
403 sbiw x,1
404 mem_write_s z_pcl
405 movw z_spl,xl
406
407 .if STACK_DBG
408 printnewline
409 printstring "Stack push "
410 movw temp,z_pcl
411 rcall printhexw
412 printstring ", SP is now "
413 movw temp,z_spl
414 rcall printhexw
415 printstring ". "
416 .endif
417 movw z_pcl,opl
418 ret
419
420
421 do_store_am:
422 mem_write_ds op, z_a
423 ret
424
425
426 ; ------------ Operation phase stuff -----------------
427
428 ;----------------------------------------------------------------
429 ;| |
430 ;| Zilog |
431 ;| |
432 ;| ZZZZZZZ 88888 000 |
433 ;| Z 8 8 0 0 |
434 ;| Z 8 8 0 0 0 |
435 ;| Z 88888 0 0 0 |
436 ;| Z 8 8 0 0 0 |
437 ;| Z 8 8 0 0 |
438 ;| ZZZZZZZ 88888 000 |
439 ;| |
440 ;| Z80 MICROPROCESSOR Instruction Set Summary |
441 ;| |
442 ;----------------------------------------------------------------
443 ;----------------------------------------------------------------
444 ;|Mnemonic |SZHPNC|Description |Notes |
445 ;|----------+------+---------------------+----------------------|
446 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
447 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
448 ;|ADD A,s |***V0*|Add |A=A+s |
449 ;|ADD HL,ss |--*-0*|Add |HL=HL+ss |
450 ;|ADD IX,pp |--*-0*|Add |IX=IX+pp |
451 ;|ADD IY,rr |--*-0*|Add |IY=IY+rr |
452 ;|AND s |**1P00|Logical AND |A=A&s |
453 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
454 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
455 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
456 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
457 ;|CP s |***V1*|Compare |A-s |
458 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
459 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
460 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
461 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
462 ;|CPL |--1-1-|Complement |A=~A |
463 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
464 ;|DEC s |***V1-|Decrement |s=s-1 |
465 ;|DEC xx |------|Decrement |xx=xx-1 |
466 ;|DEC ss |------|Decrement |ss=ss-1 |
467 ;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 |
468 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
469 ;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 |
470 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
471 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
472 ;|EX AF,AF' |------|Exchange |AF<->AF' |
473 ;|EX DE,HL |------|Exchange |DE<->HL |
474 ;|EXX |------|Exchange |qq<->qq' (except AF)|
475 ;|HALT |------|Halt | |
476 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
477 ;|IN A,[n] |------|Input |A=[n] |
478 ;|IN r,[C] |***P0-|Input |r=[C] |
479 ;|INC r |***V0-|Increment |r=r+1 |
480 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
481 ;|INC xx |------|Increment |xx=xx+1 |
482 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
483 ;|INC ss |------|Increment |ss=ss+1 |
484 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
485 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
486 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
487 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
488 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
489 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
490 ;|JP nn |------|Unconditional Jump |PC=nn |
491 ;|JP cc,nn |------|Conditional Jump |If cc JP |
492 ;|JR e |------|Unconditional Jump |PC=PC+e |
493 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
494 ;|LD dst,src|------|Load |dst=src |
495 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
496 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
497 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
498 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
499 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
500 ;|NEG |***V1*|Negate |A=-A |
501 ;|NOP |------|No Operation | |
502 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
503 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
504 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
505 ;|OUT [C],r |------|Output |[C]=r |
506 ;|OUT [n],A |------|Output |[n]=A |
507 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
508 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
509 ;|POP xx |------|Pop |xx=[SP]+ |
510 ;|POP qq |------|Pop |qq=[SP]+ |
511 ;|PUSH xx |------|Push |-[SP]=xx |
512 ;|PUSH qq |------|Push |-[SP]=qq |
513 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
514 ;|RET |------|Return |PC=[SP]+ |
515 ;|RET cc |------|Conditional Return |If cc RET |
516 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
517 ;|RETN |------|Return from NMI |PC=[SP]+ |
518 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
519 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
520 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
521 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
522 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
523 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
524 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
525 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
526 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
527 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
528 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
529 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
530 ;|SBC HL,ss |***V1*|Subtract with Carry |HL=HL-ss-CY |
531 ;|SCF |--0-01|Set Carry Flag |CY=1 |
532 ;|SET b,m |------|Set bit |m=mv{2^b} |
533 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
534 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
535 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
536 ;|SUB s |***V1*|Subtract |A=A-s |
537 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
538 ;|----------+------+--------------------------------------------|
539 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
540 ;| S |S |Sign flag (Bit 7) |
541 ;| Z | Z |Zero flag (Bit 6) |
542 ;| HC | H |Half Carry flag (Bit 4) |
543 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
544 ;| N | N |Add/Subtract flag (Bit 1) |
545 ;| CY | C|Carry flag (Bit 0) |
546 ;|-----------------+--------------------------------------------|
547 ;| n |Immediate addressing |
548 ;| nn |Immediate extended addressing |
549 ;| e |Relative addressing (PC=PC+2+offset) |
550 ;| [nn] |Extended addressing |
551 ;| [xx+d] |Indexed addressing |
552 ;| r |Register addressing |
553 ;| [rr] |Register indirect addressing |
554 ;| |Implied addressing |
555 ;| b |Bit addressing |
556 ;| p |Modified page zero addressing (see RST) |
557 ;|-----------------+--------------------------------------------|
558 ;|DEFB n(,...) |Define Byte(s) |
559 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
560 ;|DEFS nn |Define Storage Block |
561 ;|DEFW nn(,...) |Define Word(s) |
562 ;|-----------------+--------------------------------------------|
563 ;| A B C D E |Registers (8-bit) |
564 ;| AF BC DE HL |Register pairs (16-bit) |
565 ;| F |Flag register (8-bit) |
566 ;| I |Interrupt page address register (8-bit) |
567 ;| IX IY |Index registers (16-bit) |
568 ;| PC |Program Counter register (16-bit) |
569 ;| R |Memory Refresh register |
570 ;| SP |Stack Pointer register (16-bit) |
571 ;|-----------------+--------------------------------------------|
572 ;| b |One bit (0 to 7) |
573 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
574 ;| d |One-byte expression (-128 to +127) |
575 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
576 ;| e |One-byte expression (-126 to +129) |
577 ;| m |Any register r, [HL] or [xx+d] |
578 ;| n |One-byte expression (0 to 255) |
579 ;| nn |Two-byte expression (0 to 65535) |
580 ;| pp |Register pair BC, DE, IX or SP |
581 ;| qq |Register pair AF, BC, DE or HL |
582 ;| qq' |Alternative register pair AF, BC, DE or HL |
583 ;| r |Register A, B, C, D, E, H or L |
584 ;| rr |Register pair BC, DE, IY or SP |
585 ;| s |Any register r, value n, [HL] or [xx+d] |
586 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
587 ;| ss |Register pair BC, DE, HL or SP |
588 ;| xx |Index register IX or IY |
589 ;|-----------------+--------------------------------------------|
590 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
591 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
592 ;| <- -> |Rotate left/right |
593 ;| [ ] |Indirect addressing |
594 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
595 ;| { } |Combination of operands |
596 ;| # |Also BC=BC-1,DE=DE-1 |
597 ;| ## |Only lower 4 bits of accumulator A used |
598 ;----------------------------------------------------------------
599
600 ;How the flags are supposed to work:
601 ;7 ZFL_S - Sign flag (=MSBit of result)
602 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
603 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
604 ;2 ZFL_P - Parity/2-complement Overflow
605 ;1 ZFL_N - Subtract - set if last op was a subtract
606 ;0 ZFL_C - Carry
607 ;
608 ;I sure hope I got the mapping between flags and instructions correct...
609
610 .equ ZFL_S = 7
611 .equ ZFL_Z = 6
612 .equ ZFL_H = 4
613 .equ ZFL_P = 2
614 .equ ZFL_N = 1
615 .equ ZFL_C = 0
616
617 .equ AVR_T = SREG_T
618 .equ AVR_H = SREG_H
619 .equ AVR_S = SREG_S
620 .equ AVR_V = SREG_V
621 .equ AVR_N = SREG_N
622 .equ AVR_Z = SREG_Z
623 .equ AVR_C = SREG_C
624
625 ;------------------------------------------------;
626 ; Load table value from flash indexed by source reg.
627 ;
628 ;ldpmx dstreg,tablebase,indexreg
629 ;
630 ; (6 words, 8 cycles)
631
632 .macro ldpmx
633 ldi zh,high(@1*2) ; table must be page aligned
634 mov zl,@2
635 lpm @0,z
636 .endm
637
638 .macro do_z80_flags_V
639 #if EM_Z80
640 bmov z_flags, ZFL_P, temp, AVR_V
641 #endif
642 .endm
643
644 .macro do_z80_flags_H
645 #if EM_Z80
646 bmov z_flags, ZFL_H, temp, AVR_H
647 #endif
648 .endm
649
650 .macro do_z80_flags_set_N
651 #if EM_Z80
652 ori z_flags, (1<<ZFL_N) ; Negation auf 1
653 #endif
654 .endm
655
656 .macro do_z80_flags_set_HN
657 #if EM_Z80
658 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
659 #endif
660 .endm
661
662 .macro do_z80_flags_clear_N
663 #if EM_Z80
664 andi z_flags,~(1<<ZFL_N)
665 #endif
666 .endm
667
668 .macro do_z80_flags_clear_HN
669 #if EM_Z80
670 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
671 #endif
672 .endm
673
674
675 .macro do_z80_flags_copy_HC
676 #if EM_Z80
677 bmov z_flags, ZFL_H, z_flags, ZFL_H
678 #endif
679 .endm
680
681 .macro do_z80_flags_op_rotate
682 ; must not change avr carry flag!
683 #if EM_Z80
684 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
685 #else
686 andi z_flags, ~( (1<<ZFL_C) )
687 #endif
688 .endm
689
690 .macro do_z80_flags_op_and
691 #if EM_Z80
692 ori z_flags,(1<<ZFL_H)
693 #endif
694 .endm
695
696 .macro do_z80_flags_op_or
697 #if EM_Z80
698 ;nothing to do
699 #endif
700 .endm
701
702
703 ;----------------------------------------------------------------
704
705 do_op_inv:
706 sbiw z_pcl,1
707 lcall printregs
708 printstring "Invalid opcode! "
709
710 haltinv:
711 rjmp haltinv
712
713 do_op_nop:
714 ret
715
716 ;----------------------------------------------------------------
717 ;|Mnemonic |SZHPNC|Description |Notes |
718 ;----------------------------------------------------------------
719 ;|OUT [n],A |------|Output |[n]=A |
720 ;
721 ;
722 ;Interface with peripherials goes here :)
723 do_op_outa: ; out (opl),a
724 .if PORT_DEBUG
725 printnewline
726 printstring "Port write: "
727 mov temp,z_a
728 lcall printhex
729 printstring " -> ("
730 mov temp,opl
731 lcall printhex
732 printstring ") "
733 .endif
734 mov temp,z_a
735 mov temp2,opl
736 lcall portWrite
737 ret
738
739 ;----------------------------------------------------------------
740 ;|Mnemonic |SZHPNC|Description |Notes |
741 ;----------------------------------------------------------------
742 ;|IN A,[n] |------|Input |A=[n] |
743 ;
744 ;
745 do_op_ina: ; in a,(opl)
746 .if PORT_DEBUG
747 printnewline
748 printstring "Port read: ("
749 mov temp,opl
750 lcall printhex
751 printstring ") -> "
752 .endif
753
754 mov temp2,opl
755 lcall portRead
756 mov z_a,temp
757
758 .if PORT_DEBUG
759 lcall printhex
760 printstring " "
761 .endif
762 ret
763
764 ;----------------------------------------------------------------
765 ;|Mnemonic |SZHPNC|Description |Notes |
766 ;----------------------------------------------------------------
767 ;|INC r |***V0-|Increment |r=r+1 |
768 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
769 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
770 ;|----------|SZHP C|---------- 8080 ----------------------------|
771 ;|INC r |**-P0-|Increment |r=r+1 |
772 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
773 ;
774 ;
775 do_op_inc:
776 ldi temp,1
777 add opl,temp
778 in temp, sreg
779 andi z_flags,(1<<ZFL_C) ; preserve C-flag
780 ldpmx temp2, sz53p_tab, opl
781 or z_flags,temp2 ;
782 bmov z_flags, ZFL_H, temp, AVR_H
783 do_z80_flags_V
784 ret
785
786 do_op_inca:
787 ldi temp,1
788 add z_a,temp
789 in temp, sreg
790 andi z_flags,(1<<ZFL_C) ; preserve C-flag
791 ldpmx temp2, sz53p_tab, z_a
792 or z_flags,temp2 ;
793 bmov z_flags, ZFL_H, temp, AVR_H
794 do_z80_flags_V
795 ret
796
797 ;----------------------------------------------------------------
798 ;|Mnemonic |SZHPNC|Description |Notes |
799 ;----------------------------------------------------------------
800 ;|DEC r |***V1-|Decrement |s=s-1 |
801 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
802 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
803 ;|----------|SZHP C|---------- 8080 ----------------------------|
804 ;|DEC r |**-P -|Increment |r=r+1 |
805 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
806 ;
807 ;
808 do_op_dec:
809 subi opl,1
810 in temp, sreg
811 andi z_flags,(1<<ZFL_C) ; preserve C-flag
812 ldpmx temp2, sz53p_tab, opl
813 or z_flags,temp2 ;
814 bmov z_flags, ZFL_H, temp, AVR_H
815 do_z80_flags_V
816 do_z80_flags_set_N
817 ret
818
819 do_op_deca:
820 ldi opl,1
821 sub z_a,opl
822 in temp, sreg
823 andi z_flags,(1<<ZFL_C) ; preserve C-flag
824 ldpmx temp2, sz53p_tab, z_a
825 or z_flags,temp2 ;
826 bmov z_flags, ZFL_H, temp, AVR_H
827 do_z80_flags_V
828 do_z80_flags_set_N
829 ret
830
831 ;----------------------------------------------------------------
832 ;|Mnemonic |SZHPNC|Description |Notes |
833 ;----------------------------------------------------------------
834 ;|INC xx |------|Increment |xx=xx+1 |
835 ;|INC ss |------|Increment |ss=ss+1 |
836 ;
837 ;
838 do_op_inc16:
839 subi opl,low(-1)
840 sbci oph,high(-1)
841 ret
842
843 ;----------------------------------------------------------------
844 ;|Mnemonic |SZHPNC|Description |Notes |
845 ;----------------------------------------------------------------
846 ;|DEC xx |------|Decrement |xx=xx-1 |
847 ;|DEC ss |------|Decrement |ss=ss-1 |
848 ;
849 ;
850 do_op_dec16:
851 subi opl, 1
852 sbci oph, 0
853 ret
854
855 ;----------------------------------------------------------------
856 ;|Mnemonic |SZHPNC|Description |Notes |
857 ;----------------------------------------------------------------
858 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
859 ;|----------|SZHP C|---------- 8080 ----------------------------|
860 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
861 ;
862 ;
863 do_op_rlca:
864 ;Rotate Left Cyclical. All bits move 1 to the
865 ;left, the msb becomes c and lsb.
866 do_z80_flags_op_rotate
867 lsl z_a
868 brcc do_op_rlc_noc
869 ldi temp,1
870 or z_a,temp
871 ori z_flags, (1<<ZFL_C)
872 do_op_rlc_noc:
873 ret
874
875 ;----------------------------------------------------------------
876 ;|Mnemonic |SZHPNC|Description |Notes |
877 ;----------------------------------------------------------------
878 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
879 ;|----------|SZHP C|---------- 8080 ----------------------------|
880 ;|RRCA |---- *|Rotate Right Circular|A=->A |
881 ;
882 ;
883 do_op_rrca:
884 ;Rotate Right Cyclical. All bits move 1 to the
885 ;right, the lsb becomes c and msb.
886 do_z80_flags_op_rotate
887 lsr z_a
888 brcc do_op_rrc_noc
889 ldi temp,0x80
890 or z_a,temp
891 ori z_flags, (1<<ZFL_C)
892 do_op_rrc_noc:
893 ret
894
895 ;----------------------------------------------------------------
896 ;|Mnemonic |SZHPNC|Description |Notes |
897 ;----------------------------------------------------------------
898 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
899 ;|----------|SZHP C|---------- 8080 ----------------------------|
900 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
901 ;
902 ;
903 do_op_rra:
904 ;Rotate Right. All bits move 1 to the right, the lsb
905 ;becomes c, c becomes msb.
906 clc ; get z80 carry to avr carry
907 sbrc z_flags,ZFL_C
908 sec
909 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
910 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
911 ror z_a
912 ret
913
914 ;----------------------------------------------------------------
915 ;|Mnemonic |SZHPNC|Description |Notes |
916 ;----------------------------------------------------------------
917 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
918 ;|----------|SZHP C|---------- 8080 ----------------------------|
919 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
920 ;
921 ;
922 do_op_rla:
923 ;Rotate Left. All bits move 1 to the left, the msb
924 ;becomes c, c becomes lsb.
925 clc
926 sbrc z_flags,ZFL_C
927 sec
928 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
929 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
930 rol z_a
931 ret
932
933 ;----------------------------------------------------------------
934 ;|Mnemonic |SZHPNC|Description |Notes |
935 ;----------------------------------------------------------------
936 ;|ADD A,s |***V0*|Add |A=A+s |
937 ;|----------|SZHP C|---------- 8080 ----------------------------|
938 ;|ADD A,s |***P *|Add |A=A+s |
939 ;
940 ;
941 do_op_adda:
942 add z_a,opl
943 in temp,sreg
944 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
945 bmov z_flags,ZFL_C, temp,AVR_C
946 bmov z_flags,ZFL_H, temp,AVR_H
947 do_z80_flags_V
948 ret
949
950 ;----------------------------------------------------------------
951 ;|Mnemonic |SZHPNC|Description |Notes |
952 ;----------------------------------------------------------------
953 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
954 ;|----------|SZHP C|---------- 8080 ----------------------------|
955 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
956 ;
957 ;
958 do_op_adca:
959 clc
960 sbrc z_flags,ZFL_C
961 sec
962 adc z_a,opl
963 in temp,sreg
964 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
965 bmov z_flags,ZFL_C, temp,AVR_C
966 bmov z_flags,ZFL_H, temp,AVR_H
967 do_z80_flags_V
968 ret
969
970 ;----------------------------------------------------------------
971 ;|Mnemonic |SZHPNC|Description |Notes |
972 ;----------------------------------------------------------------
973 ;|SUB s |***V1*|Subtract |A=A-s |
974 ;|----------|SZHP C|---------- 8080 ----------------------------|
975 ;|SUB s |***P *|Subtract |A=A-s |
976
977 ;
978 do_op_subfa:
979 sub z_a,opl
980 in temp,sreg
981 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
982 bmov z_flags,ZFL_C, temp,AVR_C
983 bmov z_flags,ZFL_H, temp,AVR_H
984 do_z80_flags_V
985 do_z80_flags_set_N
986 ret
987
988 ;----------------------------------------------------------------
989 ;|Mnemonic |SZHPNC|Description |Notes |
990 ;----------------------------------------------------------------
991 ;|CP s |***V1*|Compare |A-s |
992 ;|----------|SZHP C|---------- 8080 ----------------------------|
993 ;|CP s |***P *|Compare |A-s |
994
995 ;
996 do_op_cpfa:
997 mov temp2,z_a
998 sub temp2,opl
999 in temp,sreg
1000 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
1001 bmov z_flags,ZFL_C, temp,AVR_C
1002 bmov z_flags,ZFL_H, temp,AVR_H
1003 do_z80_flags_V
1004 do_z80_flags_set_N
1005 ret
1006
1007 ;----------------------------------------------------------------
1008 ;|Mnemonic |SZHPNC|Description |Notes |
1009 ;----------------------------------------------------------------
1010 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1011 ;|----------|SZHP C|---------- 8080 ----------------------------|
1012 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1013 ;
1014 ;
1015 do_op_sbcfa:
1016 clc
1017 sbrc z_flags,ZFL_C
1018 sec
1019 sbc z_a,opl
1020 in temp,sreg
1021 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1022 bmov z_flags,ZFL_C, temp,AVR_C
1023 bmov z_flags,ZFL_H, temp,AVR_H
1024 do_z80_flags_V
1025 do_z80_flags_set_N
1026 ret
1027
1028 ;----------------------------------------------------------------
1029 ;|Mnemonic |SZHPNC|Description |Notes |
1030 ;----------------------------------------------------------------
1031 ;|AND s |**1P00|Logical AND |A=A&s |
1032 ;|----------|SZHP C|---------- 8080 ----------------------------|
1033 ;|AND s |**-P 0|Logical AND |A=A&s |
1034 ;
1035 ;
1036 do_op_anda:
1037 and z_a,opl ;
1038 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1039 do_z80_flags_op_and
1040 ret
1041
1042
1043 ;----------------------------------------------------------------
1044 ;|Mnemonic |SZHPNC|Description |Notes |
1045 ;----------------------------------------------------------------
1046 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
1047 ;|----------|SZHP C|---------- 8080 ----------------------------|
1048 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
1049 ;
1050 ;
1051 do_op_ora:
1052 or z_a,opl
1053 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1054 do_z80_flags_op_or
1055 ret
1056
1057 ;----------------------------------------------------------------
1058 ;|Mnemonic |SZHPNC|Description |Notes |
1059 ;----------------------------------------------------------------
1060 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1061 ;|----------|SZHP C|---------- 8080 ----------------------------|
1062 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1063 ;
1064 ;
1065 do_op_xora:
1066 eor z_a,opl
1067 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1068 do_z80_flags_op_or
1069 ret
1070
1071 ;----------------------------------------------------------------
1072 ;|Mnemonic |SZHPNC|Description |Notes |
1073 ;----------------------------------------------------------------
1074 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1075 ;|----------|SZHP C|---------- 8080 ----------------------------|
1076 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1077 ;
1078 ;
1079 do_op_addhl:
1080 lds temp,z_l
1081 lds temp2,z_h
1082 add opl,temp
1083 adc oph,temp2
1084 sts z_l,opl
1085 sts z_h,oph
1086 in temp,sreg
1087 bmov z_flags,ZFL_C, temp,AVR_C
1088 do_z80_flags_H
1089 do_z80_flags_clear_N
1090 ret
1091
1092 ;----------------------------------------------------------------
1093 ;|Mnemonic |SZHPNC|Description |Notes |
1094 ;----------------------------------------------------------------
1095 ;|LD dst,src|------|Load |dst=src |
1096 ;
1097 ;
1098 do_op_sthl: ;store hl to mem loc in opl:h
1099 movw xl,opl
1100 lds temp,z_l
1101 mem_write
1102 adiw xl,1
1103 lds temp,z_h
1104 mem_write
1105 ret
1106
1107 ;----------------------------------------------------------------
1108 ;|Mnemonic |SZHPNC|Description |Notes |
1109 ;----------------------------------------------------------------
1110 ;|LD dst,src|------|Load |dst=src |
1111 ;
1112 ;
1113 do_op_rmem16:
1114 movw xl,opl
1115 mem_read_d opl
1116 adiw x,1
1117 mem_read_d oph
1118 ret
1119
1120 ;----------------------------------------------------------------
1121 ;|Mnemonic |SZHPNC|Description |Notes |
1122 ;----------------------------------------------------------------
1123 ;|LD dst,src|------|Load |dst=src |
1124 ;
1125 ;
1126 do_op_rmem8:
1127 mem_read_ds opl, op
1128 ret
1129
1130 ;----------------------------------------------------------------
1131 ;|Mnemonic |SZHPNC|Description |Notes |
1132 ;----------------------------------------------------------------
1133 ;|DAA |***P-*|Decimal Adjust Acc. | |
1134 ;|----------|SZHP C|---------- 8080 ----------------------------|
1135 ;
1136 ; Not yet checked
1137
1138 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1139 ; This instruction conditionally adjusts the accumulator for BCD addition
1140 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1141 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1142 ;
1143 ; -------------------------------------------------------------------
1144 ; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1145 ; | Oper |Before |upper digit |Before |lower digit| added |After |
1146 ; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1147 ; |-------+-------+------------+-------+-----------+--------+-------|
1148 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1149 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1150 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1151 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1152 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1153 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1154 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1155 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1156 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1157 ; |-------+-------+------------+-------+-----------+--------+-------|
1158 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1159 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1160 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1161 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1162 ; -------------------------------------------------------------------
1163 ;
1164 ; The H flag is affected as follows:
1165 ;
1166 ; ---------------------
1167 ; | N | H | low |H' |
1168 ; | | |nibble | |
1169 ; |---+---+-------+---|
1170 ; | 0 | * | 0-9 | 0 |
1171 ; | 0 | * | a-f | 1 |
1172 ; | 1 | 0 | * | 0 |
1173 ; | 1 | 1 | 6-f | 0 |
1174 ; | 1 | 1 | 0-5 | 1 |
1175 ; ---------------------
1176 ;
1177 ; Ohter flags:
1178 ; N: Unaffected.
1179 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1180 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1181 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1182
1183 #if 1
1184
1185 do_op_da:
1186
1187 #if EM_Z80
1188 sbrc z_flags,ZFL_N ;if add-op
1189 rjmp op_da_sub ;then
1190 #endif
1191
1192 op_da_add:
1193 ldi temp2,0 ; new C and H flag
1194 sbrc z_flags,ZFL_H ; |
1195 rjmp op_da_a01 ; if (H flag ...
1196 mov temp,opl ; |
1197 andi temp,0x0f ; |
1198 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1199 brlo op_da_a10 ; |
1200 op_da_a01: ; then
1201 ldi oph,0x06 ; add 6 to lower nibble
1202 add opl,oph ;
1203 brhc op_da_02 ; if
1204 ori temp2,(1<<ZFL_H) ; set new H flag
1205 op_da_02: ;
1206 brcc op_da_a10 ; if
1207 ori temp2,(1<<ZFL_C) ; set new H flag
1208 op_da_a10: ; endif
1209 sbrc z_flags,ZFL_C ; |
1210 rjmp op_da_a12 ; if (C flag ...
1211 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1212 brlo op_da_a13 ;
1213 op_da_a12: ;
1214 ldi oph,0x60 ; add 6 to lower nibble
1215 add opl,oph ;
1216 ori temp2,(1<<ZFL_C) ; set new C flag
1217 op_da_a13: ;
1218 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1219 or z_flags,temp2 ; merge new C and H flag
1220 ret
1221
1222 #if EM_Z80
1223
1224 op_da_sub: ;else (sub-op)
1225 rcall do_op_inv ; TODO: !
1226 ret ;endif
1227 #endif
1228
1229 #else
1230
1231 do_op_da:
1232 ldi temp2,0 ;new C and H flag
1233 ldi oph,0 ;oph: what to add
1234
1235 sbrc z_flags,ZFL_N ;if add-op
1236 rjmp op_da_sub ;then
1237 op_da_add:
1238 mov temp,opl ; |
1239 andi temp,0x0f ; |
1240 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1241 brlo op_da_a10 ; |
1242 ori oph,0x06 ; add 6
1243 ori temp2,(1<<ZFL_H) ; set new H flag
1244
1245 sbrc z_flags,ZFL_C ; |
1246 rjmp op_da_a02 ; if (C flag ...
1247 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1248 brlo op_da_a03 ; |
1249 op_da_a02:
1250 ori oph,0x60 ; add 0x60
1251 ori temp2,(1<<ZFL_C) ; set new C flag
1252 op_da_a03: ; endif
1253 rjmp op_da_ae
1254 op_da_a10: ; else (lower nibble is 0x09 or lower)
1255 sbrc z_flags,ZFL_C ; |
1256 rjmp op_da_a12 ; if (C flag ...
1257 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1258 brlo op_da_a13 ;
1259 op_da_a12:
1260 ori oph,0x60 ; add 0x60
1261 ori temp2,(1<<ZFL_C) ; set new C flag
1262 op_da_a13:
1263 sbrs z_flags,ZFL_H ; if (H flag)
1264 rjmp op_da_ae ; |
1265 ori oph,0x06 ; add 0x06
1266 mov temp,opl ; |
1267 andi temp,0x0f ; |
1268 cpi temp,0x06 ; if (lower nibble >= 0x0A)
1269 brsh op_da_ae ; |
1270 ori temp2,(1<<ZFL_H) ; set new H flag
1271 ; endif
1272 ; endif
1273 op_da_ae:
1274 add opl,oph
1275 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1276 or z_flags,temp2 ; merge new C and H flag
1277 ret
1278
1279 op_da_sub: ;else (sub-op)
1280 rcall do_op_inv ; TODO: !
1281 ret ;endif
1282 #endif
1283
1284
1285 ;----------------------------------------------------------------
1286 ;|Mnemonic |SZHPNC|Description |Notes |
1287 ;----------------------------------------------------------------
1288 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1289 ;|----------|SZHP C|---------- 8080 ----------------------------|
1290 ;
1291 ;
1292 do_op_scf:
1293 do_z80_flags_clear_HN
1294 ori z_flags,(1<<ZFL_C)
1295 ret
1296
1297 ;----------------------------------------------------------------
1298 ;|Mnemonic |SZHPNC|Description |Notes |
1299 ;----------------------------------------------------------------
1300 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
1301 ;|----------|SZHP C|---------- 8080 ----------------------------|
1302 ;|CCF |---- 1|Set Carry Flag |CY=1 |
1303 ;
1304 do_op_ccf:
1305 do_z80_flags_clear_N
1306 do_z80_flags_copy_HC
1307 ldi temp,(1<<ZFL_C)
1308 eor z_flags,temp
1309 ret
1310
1311 ;----------------------------------------------------------------
1312 ;|Mnemonic |SZHPNC|Description |Notes |
1313 ;----------------------------------------------------------------
1314 ;|CPL |--1-1-|Complement |A=~A |
1315 ;|----------|SZHP C|---------- 8080 ----------------------------|
1316 ;|CPL |---- -|Complement |A=~A |
1317 ;
1318 ;
1319 do_op_cpl:
1320 com z_a
1321 do_z80_flags_set_HN
1322 ret
1323
1324
1325 ;----------------------------------------------------------------
1326 ;|Mnemonic |SZHPNC|Description |Notes |
1327 ;----------------------------------------------------------------
1328 ;|PUSH xx |------|Push |-[SP]=xx |
1329 ;|PUSH qq |------|Push |-[SP]=qq |
1330 ;
1331 ;
1332 do_op_push16:
1333 movw xl,z_spl
1334 sbiw x,1
1335 mem_write_s oph
1336 sbiw x,1
1337 mem_write_s opl
1338 movw z_spl,xl
1339
1340 .if STACK_DBG
1341 printnewline
1342 printstring "Stack push "
1343 movw temp,opl
1344 rcall printhexw
1345 printstring ", SP is now "
1346 movw temp,z_spl
1347 rcall printhexw
1348 printstring ". "
1349 .endif
1350
1351 ret
1352
1353 ;----------------------------------------------------------------
1354 ;|Mnemonic |SZHPNC|Description |Notes |
1355 ;----------------------------------------------------------------
1356 ;|POP xx |------|Pop |xx=[SP]+ |
1357 ;|POP qq |------|Pop |qq=[SP]+ |
1358 ;
1359 ;
1360 do_op_pop16:
1361 movw x,z_spl
1362 mem_read_d opl
1363 adiw x,1
1364 mem_read_d oph
1365 adiw x,1
1366 movw z_spl,x
1367
1368 .if STACK_DBG
1369 printnewline
1370 printstring "Stack pop "
1371 movw temp,opl
1372 rcall printhexw
1373 printstring ", SP is now "
1374 movw temp,z_spl
1375 rcall printhexw
1376 printstring ". "
1377 .endif
1378 ret
1379
1380 ;----------------------------------------------------------------
1381 ;|Mnemonic |SZHPNC|Description |Notes |
1382 ;----------------------------------------------------------------
1383 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1384 ;|EX DE,HL |------|Exchange |DE<->HL |
1385 ;-----------------------------Z80--------------------------------
1386 ;
1387 do_op_exhl:
1388 lds temp,z_l
1389 lds temp2,z_h
1390 sts z_l,opl
1391 sts z_h,oph
1392 movw opl,temp
1393 ret
1394
1395 ;----------------------------------------------------------------
1396 ;|Mnemonic |SZHPNC|Description |Notes |
1397 ;----------------------------------------------------------------
1398 ;
1399 ; TODO: Implement IFF1, IFF2
1400 do_op_di:
1401 ret
1402
1403 ;----------------------------------------------------------------
1404 ;|Mnemonic |SZHPNC|Description |Notes |
1405 ;----------------------------------------------------------------
1406 ;
1407 ; TODO: Implement IFF1, IFF2
1408 do_op_ei:
1409 ret
1410
1411 ;----------------------------------------------------------------
1412 ;|Mnemonic |SZHPNC|Description |Notes |
1413 ;----------------------------------------------------------------
1414 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1415 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1416 ;|RET cc |------|Conditional Return |If cc RET |
1417 ;
1418 ;
1419 do_op_ifnz:
1420 sbrs z_flags, ZFL_Z
1421 ret
1422 pop temp ; nix tun
1423 pop temp ; direkt zurueck zu main
1424 ret
1425
1426 ;----------------------------------------------------------------
1427 ;|Mnemonic |SZHPNC|Description |Notes |
1428 ;----------------------------------------------------------------
1429 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1430 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1431 ;|RET cc |------|Conditional Return |If cc RET |
1432 ;
1433 ;
1434 do_op_ifz:
1435 sbrc z_flags, ZFL_Z
1436 ret
1437 pop temp ; nix tun
1438 pop temp ; direkt zurueck zu main
1439 ret
1440
1441 ;----------------------------------------------------------------
1442 ;|Mnemonic |SZHPNC|Description |Notes |
1443 ;----------------------------------------------------------------
1444 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1445 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1446 ;|RET cc |------|Conditional Return |If cc RET |
1447 ;
1448 ;
1449 do_op_ifnc:
1450 sbrs z_flags, ZFL_C
1451 ret
1452 pop temp ; nix tun
1453 pop temp ; direkt zuruech zu main
1454 ret
1455
1456 ;----------------------------------------------------------------
1457 ;|Mnemonic |SZHPNC|Description |Notes |
1458 ;----------------------------------------------------------------
1459 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1460 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1461 ;|RET cc |------|Conditional Return |If cc RET |
1462 ;
1463 ;
1464 do_op_ifc:
1465 sbrc z_flags, ZFL_C
1466 ret
1467 pop temp ; nix tun
1468 pop temp ; direkt zuruech zu main
1469 ret
1470
1471 ;----------------------------------------------------------------
1472 ;|Mnemonic |SZHPNC|Description |Notes |
1473 ;----------------------------------------------------------------
1474 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1475 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1476 ;|RET cc |------|Conditional Return |If cc RET |
1477 ;
1478 ;
1479 do_op_ifpo:
1480 sbrs z_flags, ZFL_P
1481 ret
1482 pop temp ; nix tun
1483 pop temp ; direkt zuruech zu main
1484 ret
1485
1486 ;----------------------------------------------------------------
1487 ;|Mnemonic |SZHPNC|Description |Notes |
1488 ;----------------------------------------------------------------
1489 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1490 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1491 ;|RET cc |------|Conditional Return |If cc RET |
1492 ;
1493 ;
1494 do_op_ifpe:
1495 sbrc z_flags, ZFL_P
1496 ret
1497 pop temp ; nix tun
1498 pop temp ; direkt zuruech zu main
1499 ret
1500
1501 ;----------------------------------------------------------------
1502 ;|Mnemonic |SZHPNC|Description |Notes |
1503 ;----------------------------------------------------------------
1504 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1505 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1506 ;|RET cc |------|Conditional Return |If cc RET |
1507 ;
1508 ;
1509 do_op_ifp: ;sign positive, aka s=0
1510 sbrs z_flags, ZFL_S
1511 ret
1512 pop temp ; nix tun
1513 pop temp ; direkt zuruech zu main
1514 ret
1515
1516 ;----------------------------------------------------------------
1517 ;|Mnemonic |SZHPNC|Description |Notes |
1518 ;----------------------------------------------------------------
1519 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1520 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1521 ;|RET cc |------|Conditional Return |If cc RET |
1522 ;
1523 ;
1524 do_op_ifm: ;sign negative, aka s=1
1525 sbrc z_flags, ZFL_S
1526 ret
1527 pop temp ; nix tun
1528 pop temp ; direkt zuruech zu main
1529 ret
1530
1531
1532 ; ----------------------- Opcode decoding -------------------------
1533
1534 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1535 ; operations: fetch, do something, store.
1536 ; The table is made of 256 words.
1537
1538 ;.org (PC+255) & 0xff00
1539 todo_table:
1540 instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1541 instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
1542 instr do_fetch_nop, op_nop, do_store_MBC ;02 ;LD (BC),A
1543 instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1544 instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1545 instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1546 instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
1547 instr do_fetch_nop, op_RLCA, do_store_nop ;07 ;RLCA
1548 instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1549 instr do_fetch_BC, op_ADDHL, do_store_nop ;09 ;ADD HL,BC
1550 instr do_fetch_MBC, op_nop, do_store_nop ;0A ;LD A,(BC)
1551 instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1552 instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1553 instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1554 instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
1555 instr do_fetch_nop, op_RRCA, do_store_nop ;0F ;RRCA
1556 instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1557 instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
1558 instr do_fetch_nop, op_nop, do_store_MDE ;12 ;LD (DE),A
1559 instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1560 instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1561 instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1562 instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
1563 instr do_fetch_nop, op_RLA, do_store_nop ;17 ;RLA
1564 instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1565 instr do_fetch_DE, op_ADDHL, do_store_nop ;19 ;ADD HL,DE
1566 instr do_fetch_MDE, op_nop, do_store_nop ;1A ;LD A,(DE)
1567 instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1568 instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1569 instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1570 instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
1571 instr do_fetch_nop, op_RRA, do_store_nop ;1F ;RRA
1572 instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1573 instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1574 instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1575 instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1576 instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1577 instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1578 instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1579 instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1580 instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1581 instr do_fetch_HL, op_ADDHL, do_store_nop ;29 ;ADD HL,HL
1582 instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1583 instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1584 instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1585 instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1586 instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1587 instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1588 instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1589 instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1590 instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1591 instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1592 instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1593 instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1594 instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1595 instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1596 instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1597 instr do_fetch_SP, op_ADDHL, do_store_nop ;39 ;ADD HL,SP
1598 instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1599 instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1600 instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1601 instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1602 instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1603 instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
1604 instr do_fetch_nop, op_nop, do_store_nop ;40 ;LD B,B
1605 instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1606 instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1607 instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1608 instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1609 instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1610 instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1611 instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1612 instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
1613 instr do_fetch_nop, op_nop, do_store_nop ;49 ;LD C,C
1614 instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1615 instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1616 instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1617 instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1618 instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1619 instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1620 instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1621 instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
1622 instr do_fetch_nop, op_nop, do_store_nop ;52 ;LD D,D
1623 instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1624 instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1625 instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1626 instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1627 instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1628 instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1629 instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1630 instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
1631 instr do_fetch_nop, op_nop, do_store_nop ;5B ;LD E,E
1632 instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1633 instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1634 instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1635 instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1636 instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1637 instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1638 instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1639 instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
1640 instr do_fetch_nop, op_nop, do_store_nop ;64 ;LD H,H
1641 instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1642 instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1643 instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1644 instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1645 instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1646 instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1647 instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1648 instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
1649 instr do_fetch_nop, op_nop, do_store_nop ;6D ;LD L,L
1650 instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1651 instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1652 instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1653 instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1654 instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1655 instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1656 instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1657 instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1658 instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1659 instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
1660 instr do_fetch_B, op_nop, do_store_A ;78 ;LD A,B
1661 instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1662 instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1663 instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1664 instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1665 instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1666 instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
1667 instr do_fetch_nop, op_nop, do_store_nop ;7F ;LD A,A
1668 instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1669 instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1670 instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1671 instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1672 instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1673 instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1674 instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1675 instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1676 instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1677 instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1678 instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1679 instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1680 instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1681 instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1682 instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1683 instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1684 instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1685 instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1686 instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1687 instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1688 instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1689 instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1690 instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1691 instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1692 instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1693 instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1694 instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1695 instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1696 instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1697 instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1698 instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1699 instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1700 instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1701 instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1702 instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1703 instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1704 instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1705 instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1706 instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1707 instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1708 instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1709 instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1710 instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1711 instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1712 instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1713 instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1714 instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1715 instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1716 instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1717 instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1718 instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1719 instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1720 instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1721 instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1722 instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1723 instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1724 instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1725 instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1726 instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1727 instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1728 instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1729 instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1730 instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1731 instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1732 instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1733 instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1734 instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1735 instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1736 instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1737 instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1738 instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1739 instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1740 instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1741 instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1742 instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1743 instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1744 instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1745 instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1746 instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1747 instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1748 instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1749 instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1750 instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1751 instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1752 instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1753 instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1754 instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1755 instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1756 instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1757 instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1758 instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1759 instr do_fetch_DIR8, op_INA, do_store_nop ;DB nn ;IN A,(n)
1760 instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1761 instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1762 instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1763 instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1764 instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1765 instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1766 instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1767 instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1768 instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1769 instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1770 instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1771 instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1772 instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1773 instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1774 instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1775 instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1776 instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1777 instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1778 instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1779 instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1780 instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1781 instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1782 instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1783 instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1784 instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1785 instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1786 instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1787 instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1788 instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1789 instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1790 instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1791 instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1792 instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1793 instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1794 instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1795 instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1796
1797
1798 ;----------------------------------------------------------------
1799 ; Lookup table, stolen from z80ex, Z80 emulation library.
1800 ; http://z80ex.sourceforge.net/
1801
1802 ; The S, Z, 5 and 3 bits and the parity of the lookup value
1803
1804 .org (PC+255) & 0xff00
1805 sz53p_tab:
1806 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1807 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1808 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1809 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1810 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1811 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1812 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1813 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1814 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1815 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1816 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1817 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1818 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1819 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1820 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1821 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1822 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1823 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1824 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1825 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1826 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1827 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1828 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1829 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1830 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1831 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1832 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1833 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1834 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1835 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1836 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1837 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1838
1839 ; vim:set ts=8 noet nowrap
1840
CP/M on an AVR