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* Z80 1-byte opcodes, ED (except blocktransfer and search instructions) and DD/FD...
[avrcpm.git] / avr / 8080int-jmp.asm
1 ; 8080 Interpreter.
2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
3 ;
4
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010 Leo C.
7 ; Copyright (C) 2010 Horst S.
8
9 ; This file is part of avrcpm.
10 ;
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
15 ;
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
20 ;
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23 ;
24 ; $Id$
25 ;
26
27 .dseg
28
29 z_b: .byte 1
30 z_c: .byte 1
31 z_d: .byte 1
32 z_e: .byte 1
33 z_h: .byte 1
34 z_l: .byte 1
35
36 .cseg
37
38 ;Init z80
39 z80_init:
40 ldi z_pcl,low (IPLADDR)
41 ldi z_pch,high(IPLADDR)
42
43 cbi flags,trace
44 printnewline
45 printstring "Ok, CPU is live!"
46 printnewline
47
48 main:
49 .if INS_DEBUG
50 cbi flags,trace
51 cpi z_pch,DBG_TRACE_BOTTOM
52 brlo notraceon
53 cpi z_pch,DBG_TRACE_TOP
54 brsh notraceon
55 sbi flags,trace
56 notraceon:
57 .endif
58
59 .if PRINT_PC
60 cpi z_pch,DBG_TRACE_BOTTOM
61 brlo noprintpc
62 cpi z_pch,DBG_TRACE_TOP
63 brsh noprintpc
64
65 printnewline
66 printstring "PC="
67 movw temp,z_pcl
68 rcall printhexw
69 printstring " "
70 noprintpc:
71 .endif
72
73 .if INS_DEBUG
74 sbic flags,trace
75 rcall printregs
76 .endif
77
78 ;hier kommt die Interruptbehandlung rein
79
80 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
81 adiw z_pcl,1 ;++z_pc
82 ldi zh,high(opcjmp) ;
83 icall
84 rjmp main ;
85
86
87 .listmac
88
89 ;--------------------------------------------------
90 ; Generate a table entry for one instruction
91 ;
92 ; instr fetch, op, store
93 ;
94 .macro instr
95 .ifndef opcjmp_table_pos_
96 .set todo_table_pos_ = PC
97 ; Place the opcode jump table on the next available location.
98 .equ opcjmp = (PC+255) & 0xff00
99 .set opcjmp_table_pos_ = opcjmp
100 .endif
101
102 .if todo_table_pos_ < opcjmp + 256 + 128
103 .if todo_table_pos_ + 3 >= opcjmp
104 .set todo_table_pos_ = opcjmp + 256 + 128
105 .endif
106 .endif
107
108 .set fetch_ = (@0 != do_fetch_nop) ; must call or jump to fetch phase
109 .set op_ = (do_@1 != do_op_nop) ; must call or jump to op phase
110 .set store_ = (@2 != do_store_nop) ; must jump to store phase
111 .set cnt_ = fetch_ + op_ + store_
112
113 .set do_@0_@1_@2 = todo_table_pos_ ; make a label
114
115 .org opcjmp_table_pos_
116 .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1
117
118 .if cnt_ == 0 ; nothing to do (nop)
119 ret ; go back to main
120 .endif
121
122 .if cnt_ == 1 ; jump direct to action
123 .if fetch_ ;
124 rjmp @0 ;
125 .endif
126 .if op_
127 rjmp do_@1 ; do op and return to main
128 .endif
129 .if store_ ;
130 rjmp @2 ;
131 .endif
132 .endif
133
134 ; two or tree actions
135 .if cnt_ >= 2 ; jump direct to action
136 rjmp do_@0_@1_@2 ; generate a jump to action table
137
138 .org do_@0_@1_@2
139
140 .if fetch_ ; must fetch
141 .if op_ || store_
142 rcall @0 ; fetch and come back here
143 .else ;
144 rjmp @0 ; fetch and return to main
145 .endif
146 .endif
147 .if op_ ; must exec op
148 .if store_
149 rcall do_@1 ; do op and come back here
150 .else
151 rjmp do_@1 ; do op and return to main
152 .endif
153 .endif
154 .if store_ ; must store
155 rjmp @2 ; store is allways last
156 .endif
157
158 .set todo_table_pos_ = PC
159
160 .endif
161
162 .endm
163
164
165 ; ------------ Fetch phase stuff -----------------
166
167 ;.org (PC+255) & 0xff00
168 fetch_ops:
169 do_fetch_nop:
170 ret
171
172 do_fetch_a:
173 mov opl,z_a
174 ret
175
176 do_fetch_b:
177 lds opl,z_b
178 ret
179
180 do_fetch_c:
181 lds opl,z_c
182 ret
183
184 do_fetch_d:
185 lds opl,z_d
186 ret
187
188 do_fetch_e:
189 lds opl,z_e
190 ret
191
192 do_fetch_h:
193 lds opl,z_h
194 ret
195
196 do_fetch_l:
197 lds opl,z_l
198 ret
199
200 do_fetch_af:
201 mov opl,z_flags
202 mov oph,z_a
203 ret
204
205 do_fetch_bc:
206 lds opl,z_c
207 lds oph,z_b
208 ret
209
210 do_fetch_de:
211 lds opl,z_e
212 lds oph,z_d
213 ret
214
215 do_fetch_hl:
216 lds opl,z_l
217 lds oph,z_h
218 ret
219
220 do_fetch_sp:
221 movw opl,z_spl
222 ret
223
224 do_fetch_mbc:
225 lds xh,z_b
226 lds xl,z_c
227 mem_read_d z_a
228 ret
229
230 do_fetch_mde:
231 lds xh,z_d
232 lds xl,z_e
233 mem_read_d z_a
234 ret
235
236 do_fetch_mhl:
237 lds xh,z_h
238 lds xl,z_l
239 mem_read_d opl
240 ret
241
242 do_fetch_msp:
243 movw x,z_spl
244 mem_read_d opl
245 adiw x,1
246 mem_read_d oph
247 ret
248
249 do_fetch_dir8:
250 mem_read_ds opl, z_pc
251 adiw z_pcl,1
252 ret
253
254 do_fetch_dir16:
255 mem_read_ds opl, z_pc
256 adiw z_pcl,1
257 mem_read_ds oph, z_pc
258 adiw z_pcl,1
259 ret
260
261 do_fetch_rst:
262 movw x,z_pcl
263 sbiw x,1
264 mem_read_d opl
265 andi opl,0x38
266 ldi oph,0
267 ret
268
269 ; ------------ Store phase stuff -----------------
270
271 ;.org (PC+255) & 0xff00
272 store_ops:
273 do_store_nop:
274 ret
275
276 do_store_a:
277 mov z_a,opl
278 ret
279
280 do_store_b:
281 sts z_b,opl
282 ret
283
284 do_store_c:
285 sts z_c,opl
286 ret
287
288 do_store_d:
289 sts z_d,opl
290 ret
291
292 do_store_e:
293 sts z_e,opl
294 ret
295
296 do_store_h:
297 sts z_h,opl
298 ret
299
300 do_store_l:
301 sts z_l,opl
302 ret
303
304 do_store_af:
305 mov z_a,oph
306 mov z_flags,opl
307 ret
308
309 do_store_bc:
310 sts z_b,oph
311 sts z_c,opl
312 ret
313
314 do_store_de:
315 sts z_d,oph
316 sts z_e,opl
317 ret
318
319 do_store_hl:
320 sts z_h,oph
321 sts z_l,opl
322 ret
323
324 do_store_mbc:
325 lds xh,z_b
326 lds xl,z_c
327 mem_write_s z_a
328 ret
329
330 do_store_mde:
331 lds xh,z_d
332 lds xl,z_e
333 mem_write_s z_a
334 ret
335
336 do_store_mhl:
337 lds xh,z_h
338 lds xl,z_l
339 mem_write_s opl
340 ret
341
342 do_store_msp:
343 movw xl,z_spl
344 mem_write_s opl
345 adiw xl,1
346 mem_write_s oph
347 ret
348
349 do_store_sp:
350 movw z_spl,opl
351 ret
352
353 do_store_pc:
354 movw z_pcl,opl
355 ret
356
357 do_store_ret:
358 movw x,z_spl
359 mem_read_d z_pcl
360 adiw x,1
361 mem_read_d z_pch
362 adiw x,1
363 movw z_spl,x
364
365 .if STACK_DBG
366 printnewline
367 printstring "Stack pop "
368 movw temp,z_pcl
369 rcall printhexw
370 printstring ", SP is now "
371 movw temp,z_spl
372 rcall printhexw
373 printstring ". "
374 .endif
375 ret
376
377 do_store_call:
378 movw xl,z_spl
379 sbiw x,1
380 mem_write_s z_pch
381 sbiw x,1
382 mem_write_s z_pcl
383 movw z_spl,xl
384
385 .if STACK_DBG
386 printnewline
387 printstring "Stack push "
388 movw temp,z_pcl
389 rcall printhexw
390 printstring ", SP is now "
391 movw temp,z_spl
392 rcall printhexw
393 printstring ". "
394 .endif
395 movw z_pcl,opl
396 ret
397
398
399 do_store_am:
400 mem_write_ds op, z_a
401 ret
402
403
404
405 ; ------------ Operation phase stuff -----------------
406
407 ;----------------------------------------------------------------
408 ;| |
409 ;| Zilog |
410 ;| |
411 ;| ZZZZZZZ 88888 000 |
412 ;| Z 8 8 0 0 |
413 ;| Z 8 8 0 0 0 |
414 ;| Z 88888 0 0 0 |
415 ;| Z 8 8 0 0 0 |
416 ;| Z 8 8 0 0 |
417 ;| ZZZZZZZ 88888 000 |
418 ;| |
419 ;| Z80 MICROPROCESSOR Instruction Set Summary |
420 ;| |
421 ;----------------------------------------------------------------
422 ;----------------------------------------------------------------
423 ;|Mnemonic |SZHPNC|Description |Notes |
424 ;|----------+------+---------------------+----------------------|
425 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
426 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
427 ;|ADD A,s |***V0*|Add |A=A+s |
428 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
429 ;|ADD IX,pp |--?-0*|Add |IX=IX+pp |
430 ;|ADD IY,rr |--?-0*|Add |IY=IY+rr |
431 ;|AND s |**1P00|Logical AND |A=A&s |
432 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
433 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
434 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
435 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
436 ;|CP s |***V1*|Compare |A-s |
437 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
438 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
439 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
440 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
441 ;|CPL |--1-1-|Complement |A=~A |
442 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
443 ;|DEC s |***V1-|Decrement |s=s-1 |
444 ;|DEC xx |------|Decrement |xx=xx-1 |
445 ;|DEC ss |------|Decrement |ss=ss-1 |
446 ;|DI |------|Disable Interrupts | |
447 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
448 ;|EI |------|Enable Interrupts | |
449 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
450 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
451 ;|EX AF,AF' |------|Exchange |AF<->AF' |
452 ;|EX DE,HL |------|Exchange |DE<->HL |
453 ;|EXX |------|Exchange |qq<->qq' (except AF)|
454 ;|HALT |------|Halt | |
455 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
456 ;|IN A,[n] |------|Input |A=[n] |
457 ;|IN r,[C] |***P0-|Input |r=[C] |
458 ;|INC r |***V0-|Increment |r=r+1 |
459 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
460 ;|INC xx |------|Increment |xx=xx+1 |
461 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
462 ;|INC ss |------|Increment |ss=ss+1 |
463 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
464 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
465 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
466 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
467 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
468 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
469 ;|JP nn |------|Unconditional Jump |PC=nn |
470 ;|JP cc,nn |------|Conditional Jump |If cc JP |
471 ;|JR e |------|Unconditional Jump |PC=PC+e |
472 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
473 ;|LD dst,src|------|Load |dst=src |
474 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
475 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
476 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
477 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
478 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
479 ;|NEG |***V1*|Negate |A=-A |
480 ;|NOP |------|No Operation | |
481 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
482 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
483 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
484 ;|OUT [C],r |------|Output |[C]=r |
485 ;|OUT [n],A |------|Output |[n]=A |
486 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
487 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
488 ;|POP xx |------|Pop |xx=[SP]+ |
489 ;|POP qq |------|Pop |qq=[SP]+ |
490 ;|PUSH xx |------|Push |-[SP]=xx |
491 ;|PUSH qq |------|Push |-[SP]=qq |
492 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
493 ;|RET |------|Return |PC=[SP]+ |
494 ;|RET cc |------|Conditional Return |If cc RET |
495 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
496 ;|RETN |------|Return from NMI |PC=[SP]+ |
497 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
498 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
499 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
500 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
501 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
502 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
503 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
504 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
505 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
506 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
507 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
508 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
509 ;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY |
510 ;|SCF |--0-01|Set Carry Flag |CY=1 |
511 ;|SET b,m |------|Set bit |m=mv{2^b} |
512 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
513 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
514 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
515 ;|SUB s |***V1*|Subtract |A=A-s |
516 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
517 ;|----------+------+--------------------------------------------|
518 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
519 ;| S |S |Sign flag (Bit 7) |
520 ;| Z | Z |Zero flag (Bit 6) |
521 ;| HC | H |Half Carry flag (Bit 4) |
522 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
523 ;| N | N |Add/Subtract flag (Bit 1) |
524 ;| CY | C|Carry flag (Bit 0) |
525 ;|-----------------+--------------------------------------------|
526 ;| n |Immediate addressing |
527 ;| nn |Immediate extended addressing |
528 ;| e |Relative addressing (PC=PC+2+offset) |
529 ;| [nn] |Extended addressing |
530 ;| [xx+d] |Indexed addressing |
531 ;| r |Register addressing |
532 ;| [rr] |Register indirect addressing |
533 ;| |Implied addressing |
534 ;| b |Bit addressing |
535 ;| p |Modified page zero addressing (see RST) |
536 ;|-----------------+--------------------------------------------|
537 ;|DEFB n(,...) |Define Byte(s) |
538 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
539 ;|DEFS nn |Define Storage Block |
540 ;|DEFW nn(,...) |Define Word(s) |
541 ;|-----------------+--------------------------------------------|
542 ;| A B C D E |Registers (8-bit) |
543 ;| AF BC DE HL |Register pairs (16-bit) |
544 ;| F |Flag register (8-bit) |
545 ;| I |Interrupt page address register (8-bit) |
546 ;| IX IY |Index registers (16-bit) |
547 ;| PC |Program Counter register (16-bit) |
548 ;| R |Memory Refresh register |
549 ;| SP |Stack Pointer register (16-bit) |
550 ;|-----------------+--------------------------------------------|
551 ;| b |One bit (0 to 7) |
552 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
553 ;| d |One-byte expression (-128 to +127) |
554 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
555 ;| e |One-byte expression (-126 to +129) |
556 ;| m |Any register r, [HL] or [xx+d] |
557 ;| n |One-byte expression (0 to 255) |
558 ;| nn |Two-byte expression (0 to 65535) |
559 ;| pp |Register pair BC, DE, IX or SP |
560 ;| qq |Register pair AF, BC, DE or HL |
561 ;| qq' |Alternative register pair AF, BC, DE or HL |
562 ;| r |Register A, B, C, D, E, H or L |
563 ;| rr |Register pair BC, DE, IY or SP |
564 ;| s |Any register r, value n, [HL] or [xx+d] |
565 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
566 ;| ss |Register pair BC, DE, HL or SP |
567 ;| xx |Index register IX or IY |
568 ;|-----------------+--------------------------------------------|
569 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
570 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
571 ;| <- -> |Rotate left/right |
572 ;| [ ] |Indirect addressing |
573 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
574 ;| { } |Combination of operands |
575 ;| # |Also BC=BC-1,DE=DE-1 |
576 ;| ## |Only lower 4 bits of accumulator A used |
577 ;----------------------------------------------------------------
578
579 ;How the flags are supposed to work:
580 ;7 ZFL_S - Sign flag (=MSBit of result)
581 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
582 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
583 ;2 ZFL_P - Parity/2-complement Overflow
584 ;1 ZFL_N - Subtract - set if last op was a subtract
585 ;0 ZFL_C - Carry
586 ;
587 ;I sure hope I got the mapping between flags and instructions correct...
588
589 .equ ZFL_S = 7
590 .equ ZFL_Z = 6
591 .equ ZFL_H = 4
592 .equ ZFL_P = 2
593 .equ ZFL_N = 1
594 .equ ZFL_C = 0
595
596 .equ AVR_T = SREG_T
597 .equ AVR_H = SREG_H
598 .equ AVR_S = SREG_S
599 .equ AVR_V = SREG_V
600 .equ AVR_N = SREG_N
601 .equ AVR_Z = SREG_Z
602 .equ AVR_C = SREG_C
603
604 ;------------------------------------------------;
605 ; Load table value from flash indexed by source reg.
606 ;
607 ; ldpmx dstreg,tablebase,indexreg
608 ;
609 ; (6 words, 8 cycles)
610
611 .macro ldpmx
612 ldi zh,high(@1*2) ; table must be page aligned
613 mov zl,@2
614 lpm @0,z
615 .endm
616
617 .macro do_z80_flags_V
618 #if EM_Z80
619 bmov z_flags, ZFL_P, temp, AVR_V
620 #endif
621 .endm
622
623 .macro do_z80_flags_set_N
624 #if EM_Z80
625 ori z_flags, (1<<ZFL_N) ; Negation auf 1
626 #endif
627 .endm
628
629 .macro do_z80_flags_set_HN
630 #if EM_Z80
631 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
632 #endif
633 .endm
634
635 .macro do_z80_flags_clear_N
636 #if EM_Z80
637 andi z_flags,~(1<<ZFL_N)
638 #endif
639 .endm
640
641 .macro do_z80_flags_clear_HN
642 #if EM_Z80
643 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
644 #endif
645 .endm
646
647
648 .macro do_z80_flags_copy_HC
649 #if EM_Z80
650 bmov z_flags, ZFL_H, z_flags, ZFL_H
651 #endif
652 .endm
653
654 .macro do_z80_flags_op_rotate
655 ; must not change avr carry flag!
656 #if EM_Z80
657 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
658 #else
659 andi z_flags, ~( (1<<ZFL_C) )
660 #endif
661 .endm
662
663 .macro do_z80_flags_op_and
664 #if EM_Z80
665 ori z_flags,(1<<ZFL_H)
666 #endif
667 .endm
668
669 .macro do_z80_flags_op_or
670 #if EM_Z80
671 ;nothing to do
672 #endif
673 .endm
674
675
676 ;----------------------------------------------------------------
677
678 do_op_inv:
679 sbiw z_pcl,1
680 lcall printregs
681 printstring "Invalid opcode! "
682
683 haltinv:
684 rjmp haltinv
685
686 do_op_nop:
687 ret
688
689 ;----------------------------------------------------------------
690 ;|Mnemonic |SZHPNC|Description |Notes |
691 ;----------------------------------------------------------------
692 ;|OUT [n],A |------|Output |[n]=A |
693 ;
694 ;
695 ;Interface with peripherials goes here :)
696 do_op_outa: ; out (opl),a
697 .if PORT_DEBUG
698 printnewline
699 printstring "Port write: "
700 mov temp,z_a
701 rcall printhex
702 printstring " -> ("
703 mov temp,opl
704 rcall printhex
705 printstring ") "
706 .endif
707 mov temp,z_a
708 mov temp2,opl
709 lcall portWrite
710 ret
711
712 ;----------------------------------------------------------------
713 ;|Mnemonic |SZHPNC|Description |Notes |
714 ;----------------------------------------------------------------
715 ;|IN A,[n] |------|Input |A=[n] |
716 ;
717 ;
718 do_op_in: ; in a,(opl)
719 .if PORT_DEBUG
720 printnewline
721 printstring "Port read: ("
722 mov temp,opl
723 rcall printhex
724 printstring ") -> "
725 .endif
726
727 mov temp2,opl
728 lcall portRead
729 mov opl,temp
730
731 .if PORT_DEBUG
732 rcall printhex
733 printstring " "
734 .endif
735 ret
736
737 ;----------------------------------------------------------------
738 ;|Mnemonic |SZHPNC|Description |Notes |
739 ;----------------------------------------------------------------
740 ;|INC r |***V0-|Increment |r=r+1 |
741 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
742 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
743 ;|----------|SZHP C|---------- 8080 ----------------------------|
744 ;|INC r |**-P0-|Increment |r=r+1 |
745 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
746 ;
747 ;
748 do_op_inc:
749 ldi temp,1
750 add opl,temp
751 in temp, sreg
752 andi z_flags,(1<<ZFL_C) ; preserve C-flag
753 ldpmx temp2, sz53p_tab, opl
754 or z_flags,temp2 ;
755 bmov z_flags, ZFL_H, temp, AVR_H
756 do_z80_flags_V
757 ret
758
759 do_op_inca:
760 ldi temp,1
761 add z_a,temp
762 in temp, sreg
763 andi z_flags,(1<<ZFL_C) ; preserve C-flag
764 ldpmx temp2, sz53p_tab, z_a
765 or z_flags,temp2 ;
766 bmov z_flags, ZFL_H, temp, AVR_H
767 do_z80_flags_V
768 ret
769
770 ;----------------------------------------------------------------
771 ;|Mnemonic |SZHPNC|Description |Notes |
772 ;----------------------------------------------------------------
773 ;|DEC r |***V1-|Decrement |s=s-1 |
774 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
775 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
776 ;|----------|SZHP C|---------- 8080 ----------------------------|
777 ;|DEC r |**-P -|Increment |r=r+1 |
778 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
779 ;
780 ;
781 do_op_dec:
782 subi opl,1
783 in temp, sreg
784 andi z_flags,(1<<ZFL_C) ; preserve C-flag
785 ldpmx temp2, sz53p_tab, opl
786 or z_flags,temp2 ;
787 bmov z_flags, ZFL_H, temp, AVR_H
788 do_z80_flags_V
789 do_z80_flags_set_N
790 ret
791
792 do_op_deca:
793 ldi opl,1
794 sub z_a,opl
795 in temp, sreg
796 andi z_flags,(1<<ZFL_C) ; preserve C-flag
797 ldpmx temp2, sz53p_tab, z_a
798 or z_flags,temp2 ;
799 bmov z_flags, ZFL_H, temp, AVR_H
800 do_z80_flags_V
801 do_z80_flags_set_N
802 ret
803
804 ;----------------------------------------------------------------
805 ;|Mnemonic |SZHPNC|Description |Notes |
806 ;----------------------------------------------------------------
807 ;|INC xx |------|Increment |xx=xx+1 |
808 ;|INC ss |------|Increment |ss=ss+1 |
809 ;
810 ;
811 do_op_inc16:
812 subi opl,low(-1)
813 sbci oph,high(-1)
814 ret
815
816 ;----------------------------------------------------------------
817 ;|Mnemonic |SZHPNC|Description |Notes |
818 ;----------------------------------------------------------------
819 ;|DEC xx |------|Decrement |xx=xx-1 |
820 ;|DEC ss |------|Decrement |ss=ss-1 |
821 ;
822 ;
823 do_op_dec16:
824 subi opl, 1
825 sbci oph, 0
826 ret
827
828 ;----------------------------------------------------------------
829 ;|Mnemonic |SZHPNC|Description |Notes |
830 ;----------------------------------------------------------------
831 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
832 ;|----------|SZHP C|---------- 8080 ----------------------------|
833 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
834 ;
835 ;
836 do_op_rlca:
837 ;Rotate Left Cyclical. All bits move 1 to the
838 ;left, the msb becomes c and lsb.
839 do_z80_flags_op_rotate
840 lsl z_a
841 brcc do_op_rlc_noc
842 ldi temp,1
843 or z_a,temp
844 ori z_flags, (1<<ZFL_C)
845 do_op_rlc_noc:
846 ret
847
848 ;----------------------------------------------------------------
849 ;|Mnemonic |SZHPNC|Description |Notes |
850 ;----------------------------------------------------------------
851 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
852 ;|----------|SZHP C|---------- 8080 ----------------------------|
853 ;|RRCA |---- *|Rotate Right Circular|A=->A |
854 ;
855 ;
856 do_op_rrca:
857 ;Rotate Right Cyclical. All bits move 1 to the
858 ;right, the lsb becomes c and msb.
859 do_z80_flags_op_rotate
860 lsr z_a
861 brcc do_op_rrc_noc
862 ldi temp,0x80
863 or z_a,temp
864 ori z_flags, (1<<ZFL_C)
865 do_op_rrc_noc:
866 ret
867
868 ;----------------------------------------------------------------
869 ;|Mnemonic |SZHPNC|Description |Notes |
870 ;----------------------------------------------------------------
871 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
872 ;|----------|SZHP C|---------- 8080 ----------------------------|
873 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
874 ;
875 ;
876 do_op_rra:
877 ;Rotate Right. All bits move 1 to the right, the lsb
878 ;becomes c, c becomes msb.
879 clc ; get z80 carry to avr carry
880 sbrc z_flags,ZFL_C
881 sec
882 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
883 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
884 ror z_a
885 ret
886
887 ;----------------------------------------------------------------
888 ;|Mnemonic |SZHPNC|Description |Notes |
889 ;----------------------------------------------------------------
890 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
891 ;|----------|SZHP C|---------- 8080 ----------------------------|
892 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
893 ;
894 ;
895 do_op_rla:
896 ;Rotate Left. All bits move 1 to the left, the msb
897 ;becomes c, c becomes lsb.
898 clc
899 sbrc z_flags,ZFL_C
900 sec
901 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
902 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
903 rol z_a
904 ret
905
906 ;----------------------------------------------------------------
907 ;|Mnemonic |SZHPNC|Description |Notes |
908 ;----------------------------------------------------------------
909 ;|ADD A,s |***V0*|Add |A=A+s |
910 ;|----------|SZHP C|---------- 8080 ----------------------------|
911 ;|ADD A,s |***P *|Add |A=A+s |
912 ;
913 ;
914 do_op_adda:
915 add z_a,opl
916 in temp,sreg
917 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
918 bmov z_flags,ZFL_C, temp,AVR_C
919 bmov z_flags,ZFL_H, temp,AVR_H
920 do_z80_flags_V
921 ret
922
923 ;----------------------------------------------------------------
924 ;|Mnemonic |SZHPNC|Description |Notes |
925 ;----------------------------------------------------------------
926 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
927 ;|----------|SZHP C|---------- 8080 ----------------------------|
928 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
929 ;
930 ;
931 do_op_adca:
932 clc
933 sbrc z_flags,ZFL_C
934 sec
935 adc z_a,opl
936 in temp,sreg
937 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
938 bmov z_flags,ZFL_C, temp,AVR_C
939 bmov z_flags,ZFL_H, temp,AVR_H
940 do_z80_flags_V
941 ret
942
943 ;----------------------------------------------------------------
944 ;|Mnemonic |SZHPNC|Description |Notes |
945 ;----------------------------------------------------------------
946 ;|SUB s |***V1*|Subtract |A=A-s |
947 ;|----------|SZHP C|---------- 8080 ----------------------------|
948 ;|SUB s |***P *|Subtract |A=A-s |
949
950 ;
951 do_op_subfa:
952 sub z_a,opl
953 in temp,sreg
954 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
955 bmov z_flags,ZFL_C, temp,AVR_C
956 bmov z_flags,ZFL_H, temp,AVR_H
957 do_z80_flags_V
958 do_z80_flags_set_N
959 ret
960
961 ;----------------------------------------------------------------
962 ;|Mnemonic |SZHPNC|Description |Notes |
963 ;----------------------------------------------------------------
964 ;|CP s |***V1*|Compare |A-s |
965 ;|----------|SZHP C|---------- 8080 ----------------------------|
966 ;|CP s |***P *|Compare |A-s |
967
968 ;
969 do_op_cpfa:
970 mov temp2,z_a
971 sub temp2,opl
972 in temp,sreg
973 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
974 bmov z_flags,ZFL_C, temp,AVR_C
975 bmov z_flags,ZFL_H, temp,AVR_H
976 do_z80_flags_V
977 do_z80_flags_set_N
978 ret
979
980 ;----------------------------------------------------------------
981 ;|Mnemonic |SZHPNC|Description |Notes |
982 ;----------------------------------------------------------------
983 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
984 ;|----------|SZHP C|---------- 8080 ----------------------------|
985 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
986 ;
987 ;
988 do_op_sbcfa:
989 clc
990 sbrc z_flags,ZFL_C
991 sec
992 sbc z_a,opl
993 in temp,sreg
994 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
995 bmov z_flags,ZFL_C, temp,AVR_C
996 bmov z_flags,ZFL_H, temp,AVR_H
997 do_z80_flags_V
998 do_z80_flags_set_N
999 ret
1000
1001 ;----------------------------------------------------------------
1002 ;|Mnemonic |SZHPNC|Description |Notes |
1003 ;----------------------------------------------------------------
1004 ;|AND s |**1P00|Logical AND |A=A&s |
1005 ;|----------|SZHP C|---------- 8080 ----------------------------|
1006 ;|AND s |**-P 0|Logical AND |A=A&s |
1007 ;
1008 ;
1009 do_op_anda:
1010 and z_a,opl ;
1011 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1012 do_z80_flags_op_and
1013 ret
1014
1015
1016 ;----------------------------------------------------------------
1017 ;|Mnemonic |SZHPNC|Description |Notes |
1018 ;----------------------------------------------------------------
1019 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
1020 ;|----------|SZHP C|---------- 8080 ----------------------------|
1021 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
1022 ;
1023 ;
1024 do_op_ora:
1025 or z_a,opl
1026 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1027 do_z80_flags_op_or
1028 ret
1029
1030 ;----------------------------------------------------------------
1031 ;|Mnemonic |SZHPNC|Description |Notes |
1032 ;----------------------------------------------------------------
1033 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1034 ;|----------|SZHP C|---------- 8080 ----------------------------|
1035 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1036 ;
1037 ;
1038 do_op_xora:
1039 eor z_a,opl
1040 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1041 do_z80_flags_op_or
1042 ret
1043
1044 ;----------------------------------------------------------------
1045 ;|Mnemonic |SZHPNC|Description |Notes |
1046 ;----------------------------------------------------------------
1047 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1048 ;|----------|SZHP C|---------- 8080 ----------------------------|
1049 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1050 ;
1051 ;
1052 do_op_addhl:
1053 lds temp,z_l
1054 lds temp2,z_h
1055 add opl,temp
1056 adc oph,temp2
1057 in temp,sreg
1058 bmov z_flags,ZFL_H, temp,AVR_H
1059 bmov z_flags,ZFL_C, temp,AVR_C
1060 do_z80_flags_clear_N
1061 ret
1062
1063 ;----------------------------------------------------------------
1064 ;|Mnemonic |SZHPNC|Description |Notes |
1065 ;----------------------------------------------------------------
1066 ;|LD dst,src|------|Load |dst=src |
1067 ;
1068 ;
1069 do_op_sthl: ;store hl to mem loc in opl:h
1070 movw xl,opl
1071 lds temp,z_l
1072 mem_write
1073 adiw xl,1
1074 lds temp,z_h
1075 mem_write
1076 ret
1077
1078 ;----------------------------------------------------------------
1079 ;|Mnemonic |SZHPNC|Description |Notes |
1080 ;----------------------------------------------------------------
1081 ;|LD dst,src|------|Load |dst=src |
1082 ;
1083 ;
1084 do_op_rmem16:
1085 movw xl,opl
1086 mem_read_d opl
1087 adiw x,1
1088 mem_read_d oph
1089 ret
1090
1091 ;----------------------------------------------------------------
1092 ;|Mnemonic |SZHPNC|Description |Notes |
1093 ;----------------------------------------------------------------
1094 ;|LD dst,src|------|Load |dst=src |
1095 ;
1096 ;
1097 do_op_rmem8:
1098 mem_read_ds opl, op
1099 ret
1100
1101 ;----------------------------------------------------------------
1102 ;|Mnemonic |SZHPNC|Description |Notes |
1103 ;----------------------------------------------------------------
1104 ;|DAA |***P-*|Decimal Adjust Acc. | |
1105 ;|----------|SZHP C|---------- 8080 ----------------------------|
1106 ;
1107 ; Not yet checked
1108
1109 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1110 ; This instruction conditionally adjusts the accumulator for BCD addition
1111 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1112 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1113 ;
1114 ; -------------------------------------------------------------------
1115 ; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1116 ; | Oper |Before |upper digit |Before |lower digit| added |After |
1117 ; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1118 ; |-------+-------+------------+-------+-----------+--------+-------|
1119 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1120 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1121 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1122 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1123 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1124 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1125 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1126 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1127 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1128 ; |-------+-------+------------+-------+-----------+--------+-------|
1129 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1130 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1131 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1132 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1133 ; -------------------------------------------------------------------
1134 ;
1135 ; The H flag is affected as follows:
1136 ;
1137 ; ---------------------
1138 ; | N | H | low |H' |
1139 ; | | |nibble | |
1140 ; |---+---+-------+---|
1141 ; | 0 | * | 0-9 | 0 |
1142 ; | 0 | * | a-f | 1 |
1143 ; | 1 | 0 | * | 0 |
1144 ; | 1 | 1 | 6-f | 0 |
1145 ; | 1 | 1 | 0-5 | 1 |
1146 ; ---------------------
1147 ;
1148 ; Ohter flags:
1149 ; N: Unaffected.
1150 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1151 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1152 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1153
1154 #if 1
1155
1156 do_op_da:
1157
1158 #if EM_Z80
1159 sbrc z_flags,ZFL_N ;if add-op
1160 rjmp op_da_sub ;then
1161 #endif
1162
1163 op_da_add:
1164 ldi temp2,0 ; new C and H flag
1165 sbrc z_flags,ZFL_H ; |
1166 rjmp op_da_a01 ; if (H flag ...
1167 mov temp,opl ; |
1168 andi temp,0x0f ; |
1169 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1170 brlo op_da_a10 ; |
1171 op_da_a01: ; then
1172 ldi oph,0x06 ; add 6 to lower nibble
1173 add opl,oph ;
1174 brhc op_da_02 ; if
1175 ori temp2,(1<<ZFL_H) ; set new H flag
1176 op_da_02: ;
1177 brcc op_da_a10 ; if
1178 ori temp2,(1<<ZFL_C) ; set new H flag
1179 op_da_a10: ; endif
1180 sbrc z_flags,ZFL_C ; |
1181 rjmp op_da_a12 ; if (C flag ...
1182 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1183 brlo op_da_a13 ;
1184 op_da_a12: ;
1185 ldi oph,0x60 ; add 6 to lower nibble
1186 add opl,oph ;
1187 ori temp2,(1<<ZFL_C) ; set new C flag
1188 op_da_a13: ;
1189 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1190 or z_flags,temp2 ; merge new C and H flag
1191 ret
1192
1193 #if EM_Z80
1194
1195 op_da_sub: ;else (sub-op)
1196 rcall do_op_inv ; TODO: !
1197 ret ;endif
1198 #endif
1199
1200 #else
1201
1202 do_op_da:
1203 ldi temp2,0 ;new C and H flag
1204 ldi oph,0 ;oph: what to add
1205
1206 sbrc z_flags,ZFL_N ;if add-op
1207 rjmp op_da_sub ;then
1208 op_da_add:
1209 mov temp,opl ; |
1210 andi temp,0x0f ; |
1211 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1212 brlo op_da_a10 ; |
1213 ori oph,0x06 ; add 6
1214 ori temp2,(1<<ZFL_H) ; set new H flag
1215
1216 sbrc z_flags,ZFL_C ; |
1217 rjmp op_da_a02 ; if (C flag ...
1218 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1219 brlo op_da_a03 ; |
1220 op_da_a02:
1221 ori oph,0x60 ; add 0x60
1222 ori temp2,(1<<ZFL_C) ; set new C flag
1223 op_da_a03: ; endif
1224 rjmp op_da_ae
1225 op_da_a10: ; else (lower nibble is 0x09 or lower)
1226 sbrc z_flags,ZFL_C ; |
1227 rjmp op_da_a12 ; if (C flag ...
1228 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1229 brlo op_da_a13 ;
1230 op_da_a12:
1231 ori oph,0x60 ; add 0x60
1232 ori temp2,(1<<ZFL_C) ; set new C flag
1233 op_da_a13:
1234 sbrs z_flags,ZFL_H ; if (H flag)
1235 rjmp op_da_ae ; |
1236 ori oph,0x06 ; add 0x06
1237 mov temp,opl ; |
1238 andi temp,0x0f ; |
1239 cpi temp,0x06 ; if (lower nibble >= 0x0A)
1240 brsh op_da_ae ; |
1241 ori temp2,(1<<ZFL_H) ; set new H flag
1242 ; endif
1243 ; endif
1244 op_da_ae:
1245 add opl,oph
1246 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1247 or z_flags,temp2 ; merge new C and H flag
1248 ret
1249
1250 op_da_sub: ;else (sub-op)
1251 rcall do_op_inv ; TODO: !
1252 ret ;endif
1253 #endif
1254
1255
1256 ;----------------------------------------------------------------
1257 ;|Mnemonic |SZHPNC|Description |Notes |
1258 ;----------------------------------------------------------------
1259 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1260 ;|----------|SZHP C|---------- 8080 ----------------------------|
1261 ;
1262 ;
1263 do_op_scf:
1264 do_z80_flags_clear_HN
1265 ori z_flags,(1<<ZFL_C)
1266 ret
1267
1268 ;----------------------------------------------------------------
1269 ;|Mnemonic |SZHPNC|Description |Notes |
1270 ;----------------------------------------------------------------
1271 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
1272 ;|----------|SZHP C|---------- 8080 ----------------------------|
1273 ;|CCF |---- 1|Set Carry Flag |CY=1 |
1274 ;
1275 do_op_ccf:
1276 do_z80_flags_clear_N
1277 do_z80_flags_copy_HC
1278 ldi temp,(1<<ZFL_C)
1279 eor z_flags,temp
1280 ret
1281
1282 ;----------------------------------------------------------------
1283 ;|Mnemonic |SZHPNC|Description |Notes |
1284 ;----------------------------------------------------------------
1285 ;|CPL |--1-1-|Complement |A=~A |
1286 ;|----------|SZHP C|---------- 8080 ----------------------------|
1287 ;|CPL |---- -|Complement |A=~A |
1288 ;
1289 ;
1290 do_op_cpl:
1291 com z_a
1292 do_z80_flags_set_HN
1293 ret
1294
1295
1296 ;----------------------------------------------------------------
1297 ;|Mnemonic |SZHPNC|Description |Notes |
1298 ;----------------------------------------------------------------
1299 ;|PUSH xx |------|Push |-[SP]=xx |
1300 ;|PUSH qq |------|Push |-[SP]=qq |
1301 ;
1302 ;
1303 do_op_push16:
1304 movw xl,z_spl
1305 sbiw x,1
1306 mem_write_s oph
1307 sbiw x,1
1308 mem_write_s opl
1309 movw z_spl,xl
1310
1311 .if STACK_DBG
1312 printnewline
1313 printstring "Stack push "
1314 movw temp,opl
1315 rcall printhexw
1316 printstring ", SP is now "
1317 movw temp,z_spl
1318 rcall printhexw
1319 printstring ". "
1320 .endif
1321
1322 ret
1323
1324 ;----------------------------------------------------------------
1325 ;|Mnemonic |SZHPNC|Description |Notes |
1326 ;----------------------------------------------------------------
1327 ;|POP xx |------|Pop |xx=[SP]+ |
1328 ;|POP qq |------|Pop |qq=[SP]+ |
1329 ;
1330 ;
1331 do_op_pop16:
1332 movw x,z_spl
1333 mem_read_d opl
1334 adiw x,1
1335 mem_read_d oph
1336 adiw x,1
1337 movw z_spl,x
1338
1339 .if STACK_DBG
1340 printnewline
1341 printstring "Stack pop "
1342 movw temp,opl
1343 rcall printhexw
1344 printstring ", SP is now "
1345 movw temp,z_spl
1346 rcall printhexw
1347 printstring ". "
1348 .endif
1349 ret
1350
1351 ;----------------------------------------------------------------
1352 ;|Mnemonic |SZHPNC|Description |Notes |
1353 ;----------------------------------------------------------------
1354 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1355 ;|EX DE,HL |------|Exchange |DE<->HL |
1356 ;-----------------------------Z80--------------------------------
1357 ;
1358 do_op_exhl:
1359 lds temp,z_l
1360 lds temp2,z_h
1361 sts z_l,opl
1362 sts z_h,oph
1363 movw opl,temp
1364 ret
1365
1366 ;----------------------------------------------------------------
1367 ;|Mnemonic |SZHPNC|Description |Notes |
1368 ;----------------------------------------------------------------
1369 ;
1370 ; TODO: Implement IFF1, IFF2
1371 do_op_di:
1372 ret
1373
1374 ;----------------------------------------------------------------
1375 ;|Mnemonic |SZHPNC|Description |Notes |
1376 ;----------------------------------------------------------------
1377 ;
1378 ; TODO: Implement IFF1, IFF2
1379 do_op_ei:
1380 ret
1381
1382 ;----------------------------------------------------------------
1383 ;|Mnemonic |SZHPNC|Description |Notes |
1384 ;----------------------------------------------------------------
1385 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1386 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1387 ;|RET cc |------|Conditional Return |If cc RET |
1388 ;
1389 ;
1390 do_op_ifnz:
1391 sbrs z_flags, ZFL_Z
1392 ret
1393 pop temp ; nix tun
1394 pop temp ; direkt zuruech zu main
1395 ret
1396
1397 ;----------------------------------------------------------------
1398 ;|Mnemonic |SZHPNC|Description |Notes |
1399 ;----------------------------------------------------------------
1400 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1401 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1402 ;|RET cc |------|Conditional Return |If cc RET |
1403 ;
1404 ;
1405 do_op_ifz:
1406 sbrc z_flags, ZFL_Z
1407 ret
1408 pop temp ; nix tun
1409 pop temp ; direkt zuruech zu main
1410 ret
1411
1412 ;----------------------------------------------------------------
1413 ;|Mnemonic |SZHPNC|Description |Notes |
1414 ;----------------------------------------------------------------
1415 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1416 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1417 ;|RET cc |------|Conditional Return |If cc RET |
1418 ;
1419 ;
1420 do_op_ifnc:
1421 sbrs z_flags, ZFL_C
1422 ret
1423 pop temp ; nix tun
1424 pop temp ; direkt zuruech zu main
1425 ret
1426
1427 ;----------------------------------------------------------------
1428 ;|Mnemonic |SZHPNC|Description |Notes |
1429 ;----------------------------------------------------------------
1430 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1431 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1432 ;|RET cc |------|Conditional Return |If cc RET |
1433 ;
1434 ;
1435 do_op_ifc:
1436 sbrc z_flags, ZFL_C
1437 ret
1438 pop temp ; nix tun
1439 pop temp ; direkt zuruech zu main
1440 ret
1441
1442 ;----------------------------------------------------------------
1443 ;|Mnemonic |SZHPNC|Description |Notes |
1444 ;----------------------------------------------------------------
1445 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1446 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1447 ;|RET cc |------|Conditional Return |If cc RET |
1448 ;
1449 ;
1450 do_op_ifpo:
1451 sbrs z_flags, ZFL_P
1452 ret
1453 pop temp ; nix tun
1454 pop temp ; direkt zuruech zu main
1455 ret
1456
1457 ;----------------------------------------------------------------
1458 ;|Mnemonic |SZHPNC|Description |Notes |
1459 ;----------------------------------------------------------------
1460 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1461 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1462 ;|RET cc |------|Conditional Return |If cc RET |
1463 ;
1464 ;
1465 do_op_ifpe:
1466 sbrc z_flags, ZFL_P
1467 ret
1468 pop temp ; nix tun
1469 pop temp ; direkt zuruech zu main
1470 ret
1471
1472 ;----------------------------------------------------------------
1473 ;|Mnemonic |SZHPNC|Description |Notes |
1474 ;----------------------------------------------------------------
1475 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1476 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1477 ;|RET cc |------|Conditional Return |If cc RET |
1478 ;
1479 ;
1480 do_op_ifp: ;sign positive, aka s=0
1481 sbrs z_flags, ZFL_S
1482 ret
1483 pop temp ; nix tun
1484 pop temp ; direkt zuruech zu main
1485 ret
1486
1487 ;----------------------------------------------------------------
1488 ;|Mnemonic |SZHPNC|Description |Notes |
1489 ;----------------------------------------------------------------
1490 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1491 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1492 ;|RET cc |------|Conditional Return |If cc RET |
1493 ;
1494 ;
1495 do_op_ifm: ;sign negative, aka s=1
1496 sbrc z_flags, ZFL_S
1497 ret
1498 pop temp ; nix tun
1499 pop temp ; direkt zuruech zu main
1500 ret
1501
1502
1503 ; ----------------------- Opcode decoding -------------------------
1504
1505 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1506 ; operations: fetch, do something, store.
1507 ; The table is made of 256 words.
1508
1509 ; .org (PC+255) & 0xff00
1510
1511 ;todo_table:
1512 ;opcjmp:
1513 instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1514 instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
1515 instr do_fetch_nop, op_nop, do_store_MBC ;02 ;LD (BC),A
1516 instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1517 instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1518 instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1519 instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
1520 instr do_fetch_nop, op_RLCA, do_store_nop ;07 ;RLCA
1521 instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1522 instr do_fetch_BC, op_ADDHL, do_store_HL ;09 ;ADD HL,BC
1523 instr do_fetch_MBC, op_nop, do_store_nop ;0A ;LD A,(BC)
1524 instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1525 instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1526 instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1527 instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
1528 instr do_fetch_nop, op_RRCA, do_store_nop ;0F ;RRCA
1529 instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1530 instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
1531 instr do_fetch_nop, op_nop, do_store_MDE ;12 ;LD (DE),A
1532 instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1533 instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1534 instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1535 instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
1536 instr do_fetch_nop, op_RLA, do_store_nop ;17 ;RLA
1537 instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1538 instr do_fetch_DE, op_ADDHL, do_store_HL ;19 ;ADD HL,DE
1539 instr do_fetch_MDE, op_nop, do_store_nop ;1A ;LD A,(DE)
1540 instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1541 instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1542 instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1543 instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
1544 instr do_fetch_nop, op_RRA, do_store_nop ;1F ;RRA
1545 instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1546 instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1547 instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1548 instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1549 instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1550 instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1551 instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1552 instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1553 instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1554 instr do_fetch_HL, op_ADDHL, do_store_HL ;29 ;ADD HL,HL
1555 instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1556 instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1557 instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1558 instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1559 instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1560 instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1561 instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1562 instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1563 instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1564 instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1565 instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1566 instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1567 instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1568 instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1569 instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1570 instr do_fetch_SP, op_ADDHL, do_store_HL ;39 ;ADD HL,SP
1571 instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1572 instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1573 instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1574 instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1575 instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1576 instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
1577 instr do_fetch_nop, op_nop, do_store_nop ;40 ;LD B,B
1578 instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1579 instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1580 instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1581 instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1582 instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1583 instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1584 instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1585 instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
1586 instr do_fetch_nop, op_nop, do_store_nop ;49 ;LD C,C
1587 instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1588 instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1589 instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1590 instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1591 instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1592 instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1593 instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1594 instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
1595 instr do_fetch_nop, op_nop, do_store_nop ;52 ;LD D,D
1596 instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1597 instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1598 instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1599 instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1600 instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1601 instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1602 instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1603 instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
1604 instr do_fetch_nop, op_nop, do_store_nop ;5B ;LD E,E
1605 instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1606 instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1607 instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1608 instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1609 instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1610 instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1611 instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1612 instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
1613 instr do_fetch_nop, op_nop, do_store_nop ;64 ;LD H,H
1614 instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1615 instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1616 instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1617 instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1618 instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1619 instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1620 instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1621 instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
1622 instr do_fetch_nop, op_nop, do_store_nop ;6D ;LD L,L
1623 instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1624 instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1625 instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1626 instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1627 instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1628 instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1629 instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1630 instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1631 instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1632 instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
1633 instr do_fetch_b, op_nop, do_store_A ;78 ;LD A,B
1634 instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1635 instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1636 instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1637 instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1638 instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1639 instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
1640 instr do_fetch_nop, op_nop, do_store_nop ;7F ;LD A,A
1641 instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1642 instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1643 instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1644 instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1645 instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1646 instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1647 instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1648 instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1649 instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1650 instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1651 instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1652 instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1653 instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1654 instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1655 instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1656 instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1657 instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1658 instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1659 instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1660 instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1661 instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1662 instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1663 instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1664 instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1665 instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1666 instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1667 instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1668 instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1669 instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1670 instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1671 instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1672 instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1673 instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1674 instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1675 instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1676 instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1677 instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1678 instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1679 instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1680 instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1681 instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1682 instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1683 instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1684 instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1685 instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1686 instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1687 instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1688 instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1689 instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1690 instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1691 instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1692 instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1693 instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1694 instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1695 instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1696 instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1697 instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1698 instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1699 instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1700 instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1701 instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1702 instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1703 instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1704 instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1705 instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1706 instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1707 instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1708 instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1709 instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1710 instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1711 instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1712 instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1713 instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1714 instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1715 instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1716 instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1717 instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1718 instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1719 instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1720 instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1721 instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1722 instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1723 instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1724 instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1725 instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1726 instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1727 instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1728 instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1729 instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1730 instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1731 instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1732 instr do_fetch_DIR8, op_IN, do_store_A ;DB nn ;IN A,(n)
1733 instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1734 instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1735 instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1736 instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1737 instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1738 instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1739 instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1740 instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1741 instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1742 instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1743 instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1744 instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1745 instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1746 instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1747 instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1748 instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1749 instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1750 instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1751 instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1752 instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1753 instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1754 instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1755 instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1756 instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1757 instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1758 instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1759 instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1760 instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1761 instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1762 instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1763 instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1764 instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1765 instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1766 instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1767 instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1768 instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1769
1770
1771 ;----------------------------------------------------------------
1772 ; Lookup table, stolen from z80ex, Z80 emulation library.
1773 ; http://z80ex.sourceforge.net/
1774
1775 ; The S, Z, 5 and 3 bits and the parity of the lookup value
1776
1777 ; .org (PC+255) & 0xff00
1778 .org opcjmp + 256
1779 sz53p_tab:
1780 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1781 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1782 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1783 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1784 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1785 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1786 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1787 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1788 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1789 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1790 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1791 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1792 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1793 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1794 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1795 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1796 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1797 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1798 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1799 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1800 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1801 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1802 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1803 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1804 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1805 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1806 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1807 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1808 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1809 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1810 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1811 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1812
1813 ; vim:set ts=8 noet nowrap
1814
CP/M on an AVR