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* New config option: SRAM_FILL
[avrcpm.git] / avr / 8080int-t3.asm
1 ; 8080 Interpreter.
2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
3 ;
4
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010 Leo C.
7 ; Copyright (C) 2010 Horst S.
8
9 ; This file is part of avrcpm.
10 ;
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
15 ;
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
20 ;
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23 ;
24 ; $Id$
25 ;
26
27 .dseg
28 z_regs:
29 z_b: .byte 1
30 z_c: .byte 1
31 z_d: .byte 1
32 z_e: .byte 1
33 z_h: .byte 1
34 z_l: .byte 1
35
36 .equ oz_b = 0
37 .equ oz_c = 1
38 .equ oz_d = 2
39 .equ oz_e = 3
40 .equ oz_h = 4
41 .equ oz_l = 5
42
43
44 #if EM_Z80
45 z_b2: .byte 1
46 z_c2: .byte 1
47 z_d2: .byte 1
48 z_e2: .byte 1
49 z_h2: .byte 1
50 z_l2: .byte 1
51 z_f2: .byte 1
52 z_a2: .byte 1
53 .equ r2ofs = z_b2-z_b
54 .equ oz_b2 = 6
55 .equ oz_c2 = 7
56 .equ oz_d2 = 8
57 .equ oz_e2 = 9
58 .equ oz_h2 = 10
59 .equ oz_l2 = 11
60 .equ oz_f2 = 12
61 .equ oz_a2 = 13
62
63 z_xh: .byte 1
64 z_xl: .byte 1
65 z_yh: .byte 1
66 z_yl: .byte 1
67
68 z_i: .byte 1
69 z_r: .byte 1
70 .equ oz_xh = 14
71 .equ oz_xl = 15
72 .equ oz_yh = 16
73 .equ oz_yl = 17
74 .equ oz_i = 18
75 .equ oz_r = 19
76
77 z_istat: .byte 1
78 .equ oz_istat = 20
79
80 .equ IM_MASK = 0x03 ;Mask IM 0..2
81 .equ IM0 = 0
82 .equ IM1 = 1
83 .equ IM2 = 2
84
85 .equ IFF1 = 2 ;IFF1 Flag
86 .equ IFF2 = 3 ;IFF2 Flag
87
88 #endif
89
90 .cseg
91
92 ;Init z80
93 z80_init:
94 ldi z_pcl,low (IPLADDR)
95 ldi z_pch,high(IPLADDR)
96
97 cbi flags,trace
98 printnewline
99 printstring "Ok, CPU is live!"
100 printnewline
101
102 ;----------------------------------------------------------
103 ; 1 2 3 4
104 ;.db (low)do_store (low)do_op (hihg)do_op (low)do_fetch
105 ;
106 ;das kommt auf den stapel
107 ; main da solls zum schluss weitergehen
108 ;do_store wohin damit beenden mit RET
109 ;do_op was tun beenden mit RET
110 ;
111 ;das wird direkt angesprungen
112 ;do_fetch woher beenden mit RET
113 ;
114 ;
115 main:
116 .if INS_DEBUG
117 cbi flags,trace
118 cpi z_pch,DBG_TRACE_BOTTOM
119 brlo notraceon
120 cpi z_pch,DBG_TRACE_TOP
121 brsh notraceon
122 sbi flags,trace
123 notraceon:
124 .endif
125
126 .if PRINT_PC
127 cpi z_pch,DBG_TRACE_BOTTOM
128 brlo noprintpc
129 cpi z_pch,DBG_TRACE_TOP
130 brsh noprintpc
131
132 printnewline
133 printstring "PC="
134 movw temp,z_pcl
135 lcall printhexw
136 printstring " "
137 noprintpc:
138 .endif
139
140 .if INS_DEBUG
141 sbic flags,trace
142 rcall printregs
143 .endif
144
145 ;hier kommt die Interruptbehandlung rein
146
147 ldi zl,low(main) ;da will ich wieder hin.
148 ldi zh,high(main) ;
149 push zl ;
150 push zh ;
151 mem_read_s z_pc ;temp=memReadByte(z_pc)
152 adiw z_pcl,1 ;++z_pc
153 ldi zl,low(todo_table*2) ;zhl=todo_table
154 ldi zh,high(todo_table*2) ;
155 ldi temp2,3 ;1
156 mul temp,temp2 ;2
157 add zl,r0 ;1
158 adc zh,r1 ;1
159
160 ldi temp2,high(store_ops) ;
161 lpm temp,Z+ ;do_store
162 push temp ; low
163 push temp2 ; high
164
165 .if high(opjumps) != high(opjumps)
166 ldi temp2,high(opjumps)
167 .endif
168 lpm temp,Z+ ;do_op
169 push temp ; low
170 push temp2 ; high
171
172 lpm zl,Z ;do_fetch
173 ldi zh,high(fetch_ops)
174 ijmp ;direkt
175
176
177 ; .listmac
178 ;-----------------------------------------------------
179 ; Generate jump to target and position in table
180 ; gen_opjmp target
181 ;
182 .macro gen_opjmp
183 .ifndef opjmp_table_pos_
184 .set opjmp_table_page_ = high(PC)
185 .set opjmp_table_pos_ = PC
186 .endif
187 .equ @0 = low(opjmp_table_pos_)
188 .set opjmp_table_pos_ = opjmp_table_pos_ + 1
189 .if high(opjmp_table_pos_) != opjmp_table_page_
190 .warning "Table 'opjump' crosses page boarder."
191 .message "Program will not work, unless the opjump table is relocated."
192 .endif
193 rjmp do_@0
194 .endm
195
196 ;--------------------------------------------------
197 ; Generate a table entry for one instruction
198 ;
199 ; instr fetch, op, store
200 ;
201 .macro instr
202 .ifndef inst_table_odd_
203 .set inst_table_odd_ = 0
204 .endif
205
206 .if inst_table_odd_
207 .db inst_table_next_, low(@2), @1, low(@0)
208 .set inst_table_odd_ = 0
209 .else
210 .set inst_table_next_ = low(@0)
211 .db low(@2), @1
212 .set inst_table_odd_ = 1
213 .endif
214 .endm
215
216 ;-----------------------------------
217 ; go to op.
218 ;
219 .macro fetch_end
220 ldi zh,high(opjumps)
221 mov zl,insdech
222 ijmp
223 .endm
224
225 ;-----------------------------------
226 ; go to store.
227 ;
228 .macro op_end
229 ldi zh,high(store_ops) ;
230 mov zl,insdecl
231 ijmp
232 .endm
233
234 ;-----------------------------------
235 ; go back to main
236 ;
237 .macro store_end
238 rjmp main
239 .endm
240
241 ;-----------------------------------
242 ; go back to main
243 ;
244 .macro op_end_nojmp
245 rjmp main
246 .endm
247
248
249 ; ------------ Fetch phase stuff -----------------
250
251 .org (PC+255) & 0xff00 ; wichtig !!!fetch und store muessen in einer page liegen
252 fetch_ops:
253 do_fetch_nop:
254 ret
255
256 do_fetch_a:
257 mov opl,z_a
258 ret
259
260 do_fetch_b:
261 lds opl,z_b
262 ret
263
264 do_fetch_c:
265 lds opl,z_c
266 ret
267
268 do_fetch_d:
269 lds opl,z_d
270 ret
271
272 do_fetch_e:
273 lds opl,z_e
274 ret
275
276 do_fetch_h:
277 lds opl,z_h
278 ret
279
280 do_fetch_l:
281 lds opl,z_l
282 ret
283
284 do_fetch_af:
285 mov opl,z_flags
286 mov oph,z_a
287 ret
288
289 do_fetch_bc:
290 lds opl,z_c
291 lds oph,z_b
292 ret
293
294 do_fetch_de:
295 lds opl,z_e
296 lds oph,z_d
297 ret
298
299 do_fetch_hl:
300 lds opl,z_l
301 lds oph,z_h
302 ret
303
304 do_fetch_sp:
305 movw opl,z_spl
306 ret
307
308 do_fetch_mbc:
309 lds xh,z_b
310 lds xl,z_c
311 mem_read_d z_a
312 ret
313
314 do_fetch_mde:
315 lds xh,z_d
316 lds xl,z_e
317 mem_read_d z_a
318 ret
319
320 do_fetch_mhl:
321 lds xh,z_h
322 lds xl,z_l
323 mem_read_d opl
324 ret
325
326 do_fetch_msp:
327 movw x,z_spl
328 mem_read_d opl
329 adiw x,1
330 mem_read_d oph
331 ret
332
333 do_fetch_dir8:
334 mem_read_ds opl, z_pc
335 adiw z_pcl,1
336 ret
337
338 do_fetch_dir16:
339 mem_read_ds opl, z_pc
340 adiw z_pcl,1
341 mem_read_ds oph, z_pc
342 adiw z_pcl,1
343 ret
344
345 do_fetch_rst:
346 movw x,z_pcl
347 sbiw x,1
348 mem_read_d opl
349 andi opl,0x38
350 ldi oph,0
351 ret
352
353 ; ------------ Store phase stuff -----------------
354
355 .org (PC+255) & 0xff00 ; wichtig !!!fetch und store muessen in einer page liegen
356 store_ops:
357 do_store_nop:
358 ret
359
360 do_store_a:
361 mov z_a,opl
362 ret
363
364 do_store_b:
365 sts z_b,opl
366 ret
367
368 do_store_c:
369 sts z_c,opl
370 ret
371
372 do_store_d:
373 sts z_d,opl
374 ret
375
376 do_store_e:
377 sts z_e,opl
378 ret
379
380 do_store_h:
381 sts z_h,opl
382 ret
383
384 do_store_l:
385 sts z_l,opl
386 ret
387
388 do_store_af:
389 mov z_a,oph
390 mov z_flags,opl
391 ret
392
393 do_store_bc:
394 sts z_b,oph
395 sts z_c,opl
396 ret
397
398 do_store_de:
399 sts z_d,oph
400 sts z_e,opl
401 ret
402
403 do_store_hl:
404 sts z_h,oph
405 sts z_l,opl
406 ret
407
408 do_store_mbc:
409 lds xh,z_b
410 lds xl,z_c
411 mem_write_s z_a
412 ret
413
414 do_store_mde:
415 lds xh,z_d
416 lds xl,z_e
417 mem_write_s z_a
418 ret
419
420 do_store_mhl:
421 lds xh,z_h
422 lds xl,z_l
423 mem_write_s opl
424 ret
425
426 do_store_msp:
427 movw xl,z_spl
428 mem_write_s opl
429 adiw xl,1
430 mem_write_s oph
431 ret
432
433 do_store_sp:
434 movw z_spl,opl
435 ret
436
437 do_store_pc:
438 movw z_pcl,opl
439 ret
440
441 do_store_ret:
442 movw x,z_spl
443 mem_read_d z_pcl
444 adiw x,1
445 mem_read_d z_pch
446 adiw x,1
447 movw z_spl,x
448
449 .if STACK_DBG
450 printnewline
451 printstring "Stack pop "
452 movw temp,z_pcl
453 rcall printhexw
454 printstring ", SP is now "
455 movw temp,z_spl
456 rcall printhexw
457 printstring ". "
458 .endif
459 ret
460
461 do_store_call:
462 movw xl,z_spl
463 sbiw x,1
464 mem_write_s z_pch
465 sbiw x,1
466 mem_write_s z_pcl
467 movw z_spl,xl
468
469 .if STACK_DBG
470 printnewline
471 printstring "Stack push "
472 movw temp,z_pcl
473 rcall printhexw
474 printstring ", SP is now "
475 movw temp,z_spl
476 rcall printhexw
477 printstring ". "
478 .endif
479 movw z_pcl,opl
480 ret
481
482
483 do_store_am:
484 mem_write_ds op, z_a
485 ret
486
487
488 ; ------------ Operation phase stuff -----------------
489
490 ;.org (PC+255) & 0xff00
491
492 opjumps:
493 gen_opjmp op_nop
494 gen_opjmp op_inc
495 gen_opjmp op_dec
496 gen_opjmp op_inc16
497 gen_opjmp op_dec16
498 gen_opjmp op_rlca
499 gen_opjmp op_rrca
500 gen_opjmp op_rra
501 gen_opjmp op_rla
502 gen_opjmp op_adda
503 gen_opjmp op_adca
504 gen_opjmp op_subfa
505 gen_opjmp op_sbcfa
506 gen_opjmp op_anda
507 gen_opjmp op_ora
508 gen_opjmp op_xora
509 gen_opjmp op_addhl
510 gen_opjmp op_sthl
511 gen_opjmp op_rmem16
512 gen_opjmp op_rmem8
513 gen_opjmp op_da
514 gen_opjmp op_scf
515 gen_opjmp op_cpl
516 gen_opjmp op_ccf
517 gen_opjmp op_pop16
518 gen_opjmp op_push16
519 gen_opjmp op_ifnz
520 gen_opjmp op_ifz
521 gen_opjmp op_ifnc
522 gen_opjmp op_ifc
523 gen_opjmp op_ifpo
524 gen_opjmp op_ifpe
525 gen_opjmp op_ifp
526 gen_opjmp op_ifm
527 gen_opjmp op_outa
528 gen_opjmp op_ina
529 gen_opjmp op_exhl
530 gen_opjmp op_di
531 gen_opjmp op_ei
532 gen_opjmp op_inv
533 gen_opjmp op_cpfa
534 gen_opjmp op_inca
535 gen_opjmp op_deca
536
537
538 ;----------------------------------------------------------------
539 ;| |
540 ;| Zilog |
541 ;| |
542 ;| ZZZZZZZ 88888 000 |
543 ;| Z 8 8 0 0 |
544 ;| Z 8 8 0 0 0 |
545 ;| Z 88888 0 0 0 |
546 ;| Z 8 8 0 0 0 |
547 ;| Z 8 8 0 0 |
548 ;| ZZZZZZZ 88888 000 |
549 ;| |
550 ;| Z80 MICROPROCESSOR Instruction Set Summary |
551 ;| |
552 ;----------------------------------------------------------------
553 ;----------------------------------------------------------------
554 ;|Mnemonic |SZHPNC|Description |Notes |
555 ;|----------+------+---------------------+----------------------|
556 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
557 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
558 ;|ADD A,s |***V0*|Add |A=A+s |
559 ;|ADD HL,ss |--*-0*|Add |HL=HL+ss |
560 ;|ADD IX,pp |--*-0*|Add |IX=IX+pp |
561 ;|ADD IY,rr |--*-0*|Add |IY=IY+rr |
562 ;|AND s |**1P00|Logical AND |A=A&s |
563 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
564 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
565 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
566 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
567 ;|CP s |***V1*|Compare |A-s |
568 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
569 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
570 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
571 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
572 ;|CPL |--1-1-|Complement |A=~A |
573 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
574 ;|DEC s |***V1-|Decrement |s=s-1 |
575 ;|DEC xx |------|Decrement |xx=xx-1 |
576 ;|DEC ss |------|Decrement |ss=ss-1 |
577 ;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 |
578 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
579 ;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 |
580 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
581 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
582 ;|EX AF,AF' |------|Exchange |AF<->AF' |
583 ;|EX DE,HL |------|Exchange |DE<->HL |
584 ;|EXX |------|Exchange |qq<->qq' (except AF)|
585 ;|HALT |------|Halt | |
586 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
587 ;|IN A,[n] |------|Input |A=[n] |
588 ;|IN r,[C] |***P0-|Input |r=[C] |
589 ;|INC r |***V0-|Increment |r=r+1 |
590 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
591 ;|INC xx |------|Increment |xx=xx+1 |
592 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
593 ;|INC ss |------|Increment |ss=ss+1 |
594 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
595 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
596 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
597 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
598 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
599 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
600 ;|JP nn |------|Unconditional Jump |PC=nn |
601 ;|JP cc,nn |------|Conditional Jump |If cc JP |
602 ;|JR e |------|Unconditional Jump |PC=PC+e |
603 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
604 ;|LD dst,src|------|Load |dst=src |
605 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
606 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
607 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
608 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
609 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
610 ;|NEG |***V1*|Negate |A=-A |
611 ;|NOP |------|No Operation | |
612 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
613 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
614 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
615 ;|OUT [C],r |------|Output |[C]=r |
616 ;|OUT [n],A |------|Output |[n]=A |
617 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
618 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
619 ;|POP xx |------|Pop |xx=[SP]+ |
620 ;|POP qq |------|Pop |qq=[SP]+ |
621 ;|PUSH xx |------|Push |-[SP]=xx |
622 ;|PUSH qq |------|Push |-[SP]=qq |
623 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
624 ;|RET |------|Return |PC=[SP]+ |
625 ;|RET cc |------|Conditional Return |If cc RET |
626 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
627 ;|RETN |------|Return from NMI |PC=[SP]+ |
628 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
629 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
630 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
631 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
632 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
633 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
634 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
635 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
636 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
637 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
638 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
639 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
640 ;|SBC HL,ss |***V1*|Subtract with Carry |HL=HL-ss-CY |
641 ;|SCF |--0-01|Set Carry Flag |CY=1 |
642 ;|SET b,m |------|Set bit |m=mv{2^b} |
643 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
644 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
645 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
646 ;|SUB s |***V1*|Subtract |A=A-s |
647 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
648 ;|----------+------+--------------------------------------------|
649 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
650 ;| S |S |Sign flag (Bit 7) |
651 ;| Z | Z |Zero flag (Bit 6) |
652 ;| HC | H |Half Carry flag (Bit 4) |
653 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
654 ;| N | N |Add/Subtract flag (Bit 1) |
655 ;| CY | C|Carry flag (Bit 0) |
656 ;|-----------------+--------------------------------------------|
657 ;| n |Immediate addressing |
658 ;| nn |Immediate extended addressing |
659 ;| e |Relative addressing (PC=PC+2+offset) |
660 ;| [nn] |Extended addressing |
661 ;| [xx+d] |Indexed addressing |
662 ;| r |Register addressing |
663 ;| [rr] |Register indirect addressing |
664 ;| |Implied addressing |
665 ;| b |Bit addressing |
666 ;| p |Modified page zero addressing (see RST) |
667 ;|-----------------+--------------------------------------------|
668 ;|DEFB n(,...) |Define Byte(s) |
669 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
670 ;|DEFS nn |Define Storage Block |
671 ;|DEFW nn(,...) |Define Word(s) |
672 ;|-----------------+--------------------------------------------|
673 ;| A B C D E |Registers (8-bit) |
674 ;| AF BC DE HL |Register pairs (16-bit) |
675 ;| F |Flag register (8-bit) |
676 ;| I |Interrupt page address register (8-bit) |
677 ;| IX IY |Index registers (16-bit) |
678 ;| PC |Program Counter register (16-bit) |
679 ;| R |Memory Refresh register |
680 ;| SP |Stack Pointer register (16-bit) |
681 ;|-----------------+--------------------------------------------|
682 ;| b |One bit (0 to 7) |
683 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
684 ;| d |One-byte expression (-128 to +127) |
685 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
686 ;| e |One-byte expression (-126 to +129) |
687 ;| m |Any register r, [HL] or [xx+d] |
688 ;| n |One-byte expression (0 to 255) |
689 ;| nn |Two-byte expression (0 to 65535) |
690 ;| pp |Register pair BC, DE, IX or SP |
691 ;| qq |Register pair AF, BC, DE or HL |
692 ;| qq' |Alternative register pair AF, BC, DE or HL |
693 ;| r |Register A, B, C, D, E, H or L |
694 ;| rr |Register pair BC, DE, IY or SP |
695 ;| s |Any register r, value n, [HL] or [xx+d] |
696 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
697 ;| ss |Register pair BC, DE, HL or SP |
698 ;| xx |Index register IX or IY |
699 ;|-----------------+--------------------------------------------|
700 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
701 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
702 ;| <- -> |Rotate left/right |
703 ;| [ ] |Indirect addressing |
704 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
705 ;| { } |Combination of operands |
706 ;| # |Also BC=BC-1,DE=DE-1 |
707 ;| ## |Only lower 4 bits of accumulator A used |
708 ;----------------------------------------------------------------
709
710 ;How the flags are supposed to work:
711 ;7 ZFL_S - Sign flag (=MSBit of result)
712 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
713 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
714 ;2 ZFL_P - Parity/2-complement Overflow
715 ;1 ZFL_N - Subtract - set if last op was a subtract
716 ;0 ZFL_C - Carry
717 ;
718 ;I sure hope I got the mapping between flags and instructions correct...
719
720 .equ ZFL_S = 7
721 .equ ZFL_Z = 6
722 .equ ZFL_H = 4
723 .equ ZFL_P = 2
724 .equ ZFL_N = 1
725 .equ ZFL_C = 0
726
727 .equ AVR_T = SREG_T
728 .equ AVR_H = SREG_H
729 .equ AVR_S = SREG_S
730 .equ AVR_V = SREG_V
731 .equ AVR_N = SREG_N
732 .equ AVR_Z = SREG_Z
733 .equ AVR_C = SREG_C
734
735 ;------------------------------------------------;
736 ; Load table value from flash indexed by source reg.
737 ;
738 ;ldpmx dstreg,tablebase,indexreg
739 ;
740 ; (6 words, 8 cycles)
741
742 .macro ldpmx
743 ldi zh,high(@1*2) ; table must be page aligned
744 mov zl,@2
745 lpm @0,z
746 .endm
747
748 .macro do_z80_flags_V
749 #if EM_Z80
750 bmov z_flags, ZFL_P, temp, AVR_V
751 #endif
752 .endm
753
754 .macro do_z80_flags_H
755 #if EM_Z80
756 bmov z_flags, ZFL_H, temp, AVR_H
757 #endif
758 .endm
759
760 .macro do_z80_flags_set_N
761 #if EM_Z80
762 ori z_flags, (1<<ZFL_N) ; Negation auf 1
763 #endif
764 .endm
765
766 .macro do_z80_flags_set_HN
767 #if EM_Z80
768 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
769 #endif
770 .endm
771
772 .macro do_z80_flags_clear_N
773 #if EM_Z80
774 andi z_flags,~(1<<ZFL_N)
775 #endif
776 .endm
777
778 .macro do_z80_flags_clear_HN
779 #if EM_Z80
780 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
781 #endif
782 .endm
783
784
785 .macro do_z80_flags_copy_HC
786 #if EM_Z80
787 bmov z_flags, ZFL_H, z_flags, ZFL_H
788 #endif
789 .endm
790
791 .macro do_z80_flags_op_rotate
792 ; must not change avr carry flag!
793 #if EM_Z80
794 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
795 #else
796 andi z_flags, ~( (1<<ZFL_C) )
797 #endif
798 .endm
799
800 .macro do_z80_flags_op_and
801 #if EM_Z80
802 ori z_flags,(1<<ZFL_H)
803 #endif
804 .endm
805
806 .macro do_z80_flags_op_or
807 #if EM_Z80
808 ;nothing to do
809 #endif
810 .endm
811
812
813 ;----------------------------------------------------------------
814
815 do_op_inv:
816 sbiw z_pcl,1
817 lcall printregs
818 printstring "Invalid opcode! "
819
820 haltinv:
821 rjmp haltinv
822
823 do_op_nop:
824 ret
825
826 ;----------------------------------------------------------------
827 ;|Mnemonic |SZHPNC|Description |Notes |
828 ;----------------------------------------------------------------
829 ;|OUT [n],A |------|Output |[n]=A |
830 ;
831 ;
832 ;Interface with peripherials goes here :)
833 do_op_outa: ; out (opl),a
834 .if PORT_DEBUG
835 printnewline
836 printstring "Port write: "
837 mov temp,z_a
838 lcall printhex
839 printstring " -> ("
840 mov temp,opl
841 lcall printhex
842 printstring ") "
843 .endif
844 mov temp,z_a
845 mov temp2,opl
846 lcall portWrite
847 ret
848
849 ;----------------------------------------------------------------
850 ;|Mnemonic |SZHPNC|Description |Notes |
851 ;----------------------------------------------------------------
852 ;|IN A,[n] |------|Input |A=[n] |
853 ;
854 ;
855 do_op_ina: ; in a,(opl)
856 .if PORT_DEBUG
857 printnewline
858 printstring "Port read: ("
859 mov temp,opl
860 lcall printhex
861 printstring ") -> "
862 .endif
863
864 mov temp2,opl
865 lcall portRead
866 mov z_a,temp
867
868 .if PORT_DEBUG
869 lcall printhex
870 printstring " "
871 .endif
872 ret
873
874 ;----------------------------------------------------------------
875 ;|Mnemonic |SZHPNC|Description |Notes |
876 ;----------------------------------------------------------------
877 ;|INC r |***V0-|Increment |r=r+1 |
878 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
879 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
880 ;|----------|SZHP C|---------- 8080 ----------------------------|
881 ;|INC r |**-P0-|Increment |r=r+1 |
882 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
883 ;
884 ;
885 do_op_inc:
886 ldi temp,1
887 add opl,temp
888 in temp, sreg
889 andi z_flags,(1<<ZFL_C) ; preserve C-flag
890 ldpmx temp2, sz53p_tab, opl
891 or z_flags,temp2 ;
892 bmov z_flags, ZFL_H, temp, AVR_H
893 do_z80_flags_V
894 ret
895
896 do_op_inca:
897 ldi temp,1
898 add z_a,temp
899 in temp, sreg
900 andi z_flags,(1<<ZFL_C) ; preserve C-flag
901 ldpmx temp2, sz53p_tab, z_a
902 or z_flags,temp2 ;
903 bmov z_flags, ZFL_H, temp, AVR_H
904 do_z80_flags_V
905 ret
906
907 ;----------------------------------------------------------------
908 ;|Mnemonic |SZHPNC|Description |Notes |
909 ;----------------------------------------------------------------
910 ;|DEC r |***V1-|Decrement |s=s-1 |
911 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
912 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
913 ;|----------|SZHP C|---------- 8080 ----------------------------|
914 ;|DEC r |**-P -|Increment |r=r+1 |
915 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
916 ;
917 ;
918 do_op_dec:
919 subi opl,1
920 in temp, sreg
921 andi z_flags,(1<<ZFL_C) ; preserve C-flag
922 ldpmx temp2, sz53p_tab, opl
923 or z_flags,temp2 ;
924 bmov z_flags, ZFL_H, temp, AVR_H
925 do_z80_flags_V
926 do_z80_flags_set_N
927 ret
928
929 do_op_deca:
930 ldi opl,1
931 sub z_a,opl
932 in temp, sreg
933 andi z_flags,(1<<ZFL_C) ; preserve C-flag
934 ldpmx temp2, sz53p_tab, z_a
935 or z_flags,temp2 ;
936 bmov z_flags, ZFL_H, temp, AVR_H
937 do_z80_flags_V
938 do_z80_flags_set_N
939 ret
940
941 ;----------------------------------------------------------------
942 ;|Mnemonic |SZHPNC|Description |Notes |
943 ;----------------------------------------------------------------
944 ;|INC xx |------|Increment |xx=xx+1 |
945 ;|INC ss |------|Increment |ss=ss+1 |
946 ;
947 ;
948 do_op_inc16:
949 subi opl,low(-1)
950 sbci oph,high(-1)
951 ret
952
953 ;----------------------------------------------------------------
954 ;|Mnemonic |SZHPNC|Description |Notes |
955 ;----------------------------------------------------------------
956 ;|DEC xx |------|Decrement |xx=xx-1 |
957 ;|DEC ss |------|Decrement |ss=ss-1 |
958 ;
959 ;
960 do_op_dec16:
961 subi opl, 1
962 sbci oph, 0
963 ret
964
965 ;----------------------------------------------------------------
966 ;|Mnemonic |SZHPNC|Description |Notes |
967 ;----------------------------------------------------------------
968 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
969 ;|----------|SZHP C|---------- 8080 ----------------------------|
970 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
971 ;
972 ;
973 do_op_rlca:
974 ;Rotate Left Cyclical. All bits move 1 to the
975 ;left, the msb becomes c and lsb.
976 do_z80_flags_op_rotate
977 lsl z_a
978 brcc do_op_rlc_noc
979 ldi temp,1
980 or z_a,temp
981 ori z_flags, (1<<ZFL_C)
982 do_op_rlc_noc:
983 ret
984
985 ;----------------------------------------------------------------
986 ;|Mnemonic |SZHPNC|Description |Notes |
987 ;----------------------------------------------------------------
988 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
989 ;|----------|SZHP C|---------- 8080 ----------------------------|
990 ;|RRCA |---- *|Rotate Right Circular|A=->A |
991 ;
992 ;
993 do_op_rrca:
994 ;Rotate Right Cyclical. All bits move 1 to the
995 ;right, the lsb becomes c and msb.
996 do_z80_flags_op_rotate
997 lsr z_a
998 brcc do_op_rrc_noc
999 ldi temp,0x80
1000 or z_a,temp
1001 ori z_flags, (1<<ZFL_C)
1002 do_op_rrc_noc:
1003 ret
1004
1005 ;----------------------------------------------------------------
1006 ;|Mnemonic |SZHPNC|Description |Notes |
1007 ;----------------------------------------------------------------
1008 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
1009 ;|----------|SZHP C|---------- 8080 ----------------------------|
1010 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
1011 ;
1012 ;
1013 do_op_rra:
1014 ;Rotate Right. All bits move 1 to the right, the lsb
1015 ;becomes c, c becomes msb.
1016 clc ; get z80 carry to avr carry
1017 sbrc z_flags,ZFL_C
1018 sec
1019 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
1020 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
1021 ror z_a
1022 ret
1023
1024 ;----------------------------------------------------------------
1025 ;|Mnemonic |SZHPNC|Description |Notes |
1026 ;----------------------------------------------------------------
1027 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
1028 ;|----------|SZHP C|---------- 8080 ----------------------------|
1029 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
1030 ;
1031 ;
1032 do_op_rla:
1033 ;Rotate Left. All bits move 1 to the left, the msb
1034 ;becomes c, c becomes lsb.
1035 clc
1036 sbrc z_flags,ZFL_C
1037 sec
1038 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
1039 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
1040 rol z_a
1041 ret
1042
1043 ;----------------------------------------------------------------
1044 ;|Mnemonic |SZHPNC|Description |Notes |
1045 ;----------------------------------------------------------------
1046 ;|ADD A,s |***V0*|Add |A=A+s |
1047 ;|----------|SZHP C|---------- 8080 ----------------------------|
1048 ;|ADD A,s |***P *|Add |A=A+s |
1049 ;
1050 ;
1051 do_op_adda:
1052 add z_a,opl
1053 in temp,sreg
1054 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
1055 bmov z_flags,ZFL_C, temp,AVR_C
1056 bmov z_flags,ZFL_H, temp,AVR_H
1057 do_z80_flags_V
1058 ret
1059
1060 ;----------------------------------------------------------------
1061 ;|Mnemonic |SZHPNC|Description |Notes |
1062 ;----------------------------------------------------------------
1063 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
1064 ;|----------|SZHP C|---------- 8080 ----------------------------|
1065 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
1066 ;
1067 ;
1068 do_op_adca:
1069 clc
1070 sbrc z_flags,ZFL_C
1071 sec
1072 adc z_a,opl
1073 in temp,sreg
1074 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1075 bmov z_flags,ZFL_C, temp,AVR_C
1076 bmov z_flags,ZFL_H, temp,AVR_H
1077 do_z80_flags_V
1078 ret
1079
1080 ;----------------------------------------------------------------
1081 ;|Mnemonic |SZHPNC|Description |Notes |
1082 ;----------------------------------------------------------------
1083 ;|SUB s |***V1*|Subtract |A=A-s |
1084 ;|----------|SZHP C|---------- 8080 ----------------------------|
1085 ;|SUB s |***P *|Subtract |A=A-s |
1086
1087 ;
1088 do_op_subfa:
1089 sub z_a,opl
1090 in temp,sreg
1091 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1092 bmov z_flags,ZFL_C, temp,AVR_C
1093 bmov z_flags,ZFL_H, temp,AVR_H
1094 do_z80_flags_V
1095 do_z80_flags_set_N
1096 ret
1097
1098 ;----------------------------------------------------------------
1099 ;|Mnemonic |SZHPNC|Description |Notes |
1100 ;----------------------------------------------------------------
1101 ;|CP s |***V1*|Compare |A-s |
1102 ;|----------|SZHP C|---------- 8080 ----------------------------|
1103 ;|CP s |***P *|Compare |A-s |
1104
1105 ;
1106 do_op_cpfa:
1107 mov temp2,z_a
1108 sub temp2,opl
1109 in temp,sreg
1110 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
1111 bmov z_flags,ZFL_C, temp,AVR_C
1112 bmov z_flags,ZFL_H, temp,AVR_H
1113 do_z80_flags_V
1114 do_z80_flags_set_N
1115 ret
1116
1117 ;----------------------------------------------------------------
1118 ;|Mnemonic |SZHPNC|Description |Notes |
1119 ;----------------------------------------------------------------
1120 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1121 ;|----------|SZHP C|---------- 8080 ----------------------------|
1122 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1123 ;
1124 ;
1125 do_op_sbcfa:
1126 clc
1127 sbrc z_flags,ZFL_C
1128 sec
1129 sbc z_a,opl
1130 in temp,sreg
1131 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1132 bmov z_flags,ZFL_C, temp,AVR_C
1133 bmov z_flags,ZFL_H, temp,AVR_H
1134 do_z80_flags_V
1135 do_z80_flags_set_N
1136 ret
1137
1138 ;----------------------------------------------------------------
1139 ;|Mnemonic |SZHPNC|Description |Notes |
1140 ;----------------------------------------------------------------
1141 ;|AND s |**1P00|Logical AND |A=A&s |
1142 ;|----------|SZHP C|---------- 8080 ----------------------------|
1143 ;|AND s |**-P 0|Logical AND |A=A&s |
1144 ;
1145 ;
1146 do_op_anda:
1147 and z_a,opl ;
1148 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1149 do_z80_flags_op_and
1150 ret
1151
1152
1153 ;----------------------------------------------------------------
1154 ;|Mnemonic |SZHPNC|Description |Notes |
1155 ;----------------------------------------------------------------
1156 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
1157 ;|----------|SZHP C|---------- 8080 ----------------------------|
1158 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
1159 ;
1160 ;
1161 do_op_ora:
1162 or z_a,opl
1163 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1164 do_z80_flags_op_or
1165 ret
1166
1167 ;----------------------------------------------------------------
1168 ;|Mnemonic |SZHPNC|Description |Notes |
1169 ;----------------------------------------------------------------
1170 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1171 ;|----------|SZHP C|---------- 8080 ----------------------------|
1172 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1173 ;
1174 ;
1175 do_op_xora:
1176 eor z_a,opl
1177 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1178 do_z80_flags_op_or
1179 ret
1180
1181 ;----------------------------------------------------------------
1182 ;|Mnemonic |SZHPNC|Description |Notes |
1183 ;----------------------------------------------------------------
1184 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1185 ;|----------|SZHP C|---------- 8080 ----------------------------|
1186 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1187 ;
1188 ;
1189 do_op_addhl:
1190 lds temp,z_l
1191 lds temp2,z_h
1192 add opl,temp
1193 adc oph,temp2
1194 sts z_l,opl
1195 sts z_h,oph
1196 in temp,sreg
1197 bmov z_flags,ZFL_C, temp,AVR_C
1198 do_z80_flags_H
1199 do_z80_flags_clear_N
1200 ret
1201
1202 ;----------------------------------------------------------------
1203 ;|Mnemonic |SZHPNC|Description |Notes |
1204 ;----------------------------------------------------------------
1205 ;|LD dst,src|------|Load |dst=src |
1206 ;
1207 ;
1208 do_op_sthl: ;store hl to mem loc in opl:h
1209 movw xl,opl
1210 lds temp,z_l
1211 mem_write
1212 adiw xl,1
1213 lds temp,z_h
1214 mem_write
1215 ret
1216
1217 ;----------------------------------------------------------------
1218 ;|Mnemonic |SZHPNC|Description |Notes |
1219 ;----------------------------------------------------------------
1220 ;|LD dst,src|------|Load |dst=src |
1221 ;
1222 ;
1223 do_op_rmem16:
1224 movw xl,opl
1225 mem_read_d opl
1226 adiw x,1
1227 mem_read_d oph
1228 ret
1229
1230 ;----------------------------------------------------------------
1231 ;|Mnemonic |SZHPNC|Description |Notes |
1232 ;----------------------------------------------------------------
1233 ;|LD dst,src|------|Load |dst=src |
1234 ;
1235 ;
1236 do_op_rmem8:
1237 mem_read_ds opl, op
1238 ret
1239
1240 ;----------------------------------------------------------------
1241 ;|Mnemonic |SZHPNC|Description |Notes |
1242 ;----------------------------------------------------------------
1243 ;|DAA |***P-*|Decimal Adjust Acc. | |
1244 ;|----------|SZHP C|---------- 8080 ----------------------------|
1245 ;
1246 ; Not yet checked
1247
1248 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1249 ; This instruction conditionally adjusts the accumulator for BCD addition
1250 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1251 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1252 ;
1253 ; -------------------------------------------------------------------
1254 ; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1255 ; | Oper |Before |upper digit |Before |lower digit| added |After |
1256 ; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1257 ; |-------+-------+------------+-------+-----------+--------+-------|
1258 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1259 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1260 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1261 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1262 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1263 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1264 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1265 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1266 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1267 ; |-------+-------+------------+-------+-----------+--------+-------|
1268 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1269 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1270 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1271 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1272 ; -------------------------------------------------------------------
1273 ;
1274 ; The H flag is affected as follows:
1275 ;
1276 ; ---------------------
1277 ; | N | H | low |H' |
1278 ; | | |nibble | |
1279 ; |---+---+-------+---|
1280 ; | 0 | * | 0-9 | 0 |
1281 ; | 0 | * | a-f | 1 |
1282 ; | 1 | 0 | * | 0 |
1283 ; | 1 | 1 | 6-f | 0 |
1284 ; | 1 | 1 | 0-5 | 1 |
1285 ; ---------------------
1286 ;
1287 ; Ohter flags:
1288 ; N: Unaffected.
1289 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1290 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1291 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1292
1293 #if 1
1294
1295 do_op_da:
1296
1297 #if EM_Z80
1298 sbrc z_flags,ZFL_N ;if add-op
1299 rjmp op_da_sub ;then
1300 #endif
1301
1302 op_da_add:
1303 ldi temp2,0 ; new C and H flag
1304 sbrc z_flags,ZFL_H ; |
1305 rjmp op_da_a01 ; if (H flag ...
1306 mov temp,opl ; |
1307 andi temp,0x0f ; |
1308 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1309 brlo op_da_a10 ; |
1310 op_da_a01: ; then
1311 ldi oph,0x06 ; add 6 to lower nibble
1312 add opl,oph ;
1313 brhc op_da_02 ; if
1314 ori temp2,(1<<ZFL_H) ; set new H flag
1315 op_da_02: ;
1316 brcc op_da_a10 ; if
1317 ori temp2,(1<<ZFL_C) ; set new H flag
1318 op_da_a10: ; endif
1319 sbrc z_flags,ZFL_C ; |
1320 rjmp op_da_a12 ; if (C flag ...
1321 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1322 brlo op_da_a13 ;
1323 op_da_a12: ;
1324 ldi oph,0x60 ; add 6 to lower nibble
1325 add opl,oph ;
1326 ori temp2,(1<<ZFL_C) ; set new C flag
1327 op_da_a13: ;
1328 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1329 or z_flags,temp2 ; merge new C and H flag
1330 ret
1331
1332 #if EM_Z80
1333
1334 op_da_sub: ;else (sub-op)
1335 rcall do_op_inv ; TODO: !
1336 ret ;endif
1337 #endif
1338
1339 #else
1340
1341 do_op_da:
1342 ldi temp2,0 ;new C and H flag
1343 ldi oph,0 ;oph: what to add
1344
1345 sbrc z_flags,ZFL_N ;if add-op
1346 rjmp op_da_sub ;then
1347 op_da_add:
1348 mov temp,opl ; |
1349 andi temp,0x0f ; |
1350 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1351 brlo op_da_a10 ; |
1352 ori oph,0x06 ; add 6
1353 ori temp2,(1<<ZFL_H) ; set new H flag
1354
1355 sbrc z_flags,ZFL_C ; |
1356 rjmp op_da_a02 ; if (C flag ...
1357 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1358 brlo op_da_a03 ; |
1359 op_da_a02:
1360 ori oph,0x60 ; add 0x60
1361 ori temp2,(1<<ZFL_C) ; set new C flag
1362 op_da_a03: ; endif
1363 rjmp op_da_ae
1364 op_da_a10: ; else (lower nibble is 0x09 or lower)
1365 sbrc z_flags,ZFL_C ; |
1366 rjmp op_da_a12 ; if (C flag ...
1367 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1368 brlo op_da_a13 ;
1369 op_da_a12:
1370 ori oph,0x60 ; add 0x60
1371 ori temp2,(1<<ZFL_C) ; set new C flag
1372 op_da_a13:
1373 sbrs z_flags,ZFL_H ; if (H flag)
1374 rjmp op_da_ae ; |
1375 ori oph,0x06 ; add 0x06
1376 mov temp,opl ; |
1377 andi temp,0x0f ; |
1378 cpi temp,0x06 ; if (lower nibble >= 0x0A)
1379 brsh op_da_ae ; |
1380 ori temp2,(1<<ZFL_H) ; set new H flag
1381 ; endif
1382 ; endif
1383 op_da_ae:
1384 add opl,oph
1385 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1386 or z_flags,temp2 ; merge new C and H flag
1387 ret
1388
1389 op_da_sub: ;else (sub-op)
1390 rcall do_op_inv ; TODO: !
1391 ret ;endif
1392 #endif
1393
1394
1395 ;----------------------------------------------------------------
1396 ;|Mnemonic |SZHPNC|Description |Notes |
1397 ;----------------------------------------------------------------
1398 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1399 ;|----------|SZHP C|---------- 8080 ----------------------------|
1400 ;
1401 ;
1402 do_op_scf:
1403 do_z80_flags_clear_HN
1404 ori z_flags,(1<<ZFL_C)
1405 ret
1406
1407 ;----------------------------------------------------------------
1408 ;|Mnemonic |SZHPNC|Description |Notes |
1409 ;----------------------------------------------------------------
1410 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
1411 ;|----------|SZHP C|---------- 8080 ----------------------------|
1412 ;|CCF |---- 1|Set Carry Flag |CY=1 |
1413 ;
1414 do_op_ccf:
1415 do_z80_flags_clear_N
1416 do_z80_flags_copy_HC
1417 ldi temp,(1<<ZFL_C)
1418 eor z_flags,temp
1419 ret
1420
1421 ;----------------------------------------------------------------
1422 ;|Mnemonic |SZHPNC|Description |Notes |
1423 ;----------------------------------------------------------------
1424 ;|CPL |--1-1-|Complement |A=~A |
1425 ;|----------|SZHP C|---------- 8080 ----------------------------|
1426 ;|CPL |---- -|Complement |A=~A |
1427 ;
1428 ;
1429 do_op_cpl:
1430 com z_a
1431 do_z80_flags_set_HN
1432 ret
1433
1434
1435 ;----------------------------------------------------------------
1436 ;|Mnemonic |SZHPNC|Description |Notes |
1437 ;----------------------------------------------------------------
1438 ;|PUSH xx |------|Push |-[SP]=xx |
1439 ;|PUSH qq |------|Push |-[SP]=qq |
1440 ;
1441 ;
1442 do_op_push16:
1443 movw xl,z_spl
1444 sbiw x,1
1445 mem_write_s oph
1446 sbiw x,1
1447 mem_write_s opl
1448 movw z_spl,xl
1449
1450 .if STACK_DBG
1451 printnewline
1452 printstring "Stack push "
1453 movw temp,opl
1454 rcall printhexw
1455 printstring ", SP is now "
1456 movw temp,z_spl
1457 rcall printhexw
1458 printstring ". "
1459 .endif
1460
1461 ret
1462
1463 ;----------------------------------------------------------------
1464 ;|Mnemonic |SZHPNC|Description |Notes |
1465 ;----------------------------------------------------------------
1466 ;|POP xx |------|Pop |xx=[SP]+ |
1467 ;|POP qq |------|Pop |qq=[SP]+ |
1468 ;
1469 ;
1470 do_op_pop16:
1471 movw x,z_spl
1472 mem_read_d opl
1473 adiw x,1
1474 mem_read_d oph
1475 adiw x,1
1476 movw z_spl,x
1477
1478 .if STACK_DBG
1479 printnewline
1480 printstring "Stack pop "
1481 movw temp,opl
1482 rcall printhexw
1483 printstring ", SP is now "
1484 movw temp,z_spl
1485 rcall printhexw
1486 printstring ". "
1487 .endif
1488 ret
1489
1490 ;----------------------------------------------------------------
1491 ;|Mnemonic |SZHPNC|Description |Notes |
1492 ;----------------------------------------------------------------
1493 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1494 ;|EX DE,HL |------|Exchange |DE<->HL |
1495 ;-----------------------------Z80--------------------------------
1496 ;
1497 do_op_exhl:
1498 lds temp,z_l
1499 lds temp2,z_h
1500 sts z_l,opl
1501 sts z_h,oph
1502 movw opl,temp
1503 ret
1504
1505 ;----------------------------------------------------------------
1506 ;|Mnemonic |SZHPNC|Description |Notes |
1507 ;----------------------------------------------------------------
1508 ;
1509 ; TODO: Implement IFF1, IFF2
1510 do_op_di:
1511 ret
1512
1513 ;----------------------------------------------------------------
1514 ;|Mnemonic |SZHPNC|Description |Notes |
1515 ;----------------------------------------------------------------
1516 ;
1517 ; TODO: Implement IFF1, IFF2
1518 do_op_ei:
1519 ret
1520
1521 ;----------------------------------------------------------------
1522 ;|Mnemonic |SZHPNC|Description |Notes |
1523 ;----------------------------------------------------------------
1524 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1525 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1526 ;|RET cc |------|Conditional Return |If cc RET |
1527 ;
1528 ;
1529 do_op_ifnz:
1530 sbrs z_flags, ZFL_Z
1531 ret
1532 pop temp ; nix tun
1533 pop temp ; direkt zurueck zu main
1534 ret
1535
1536 ;----------------------------------------------------------------
1537 ;|Mnemonic |SZHPNC|Description |Notes |
1538 ;----------------------------------------------------------------
1539 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1540 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1541 ;|RET cc |------|Conditional Return |If cc RET |
1542 ;
1543 ;
1544 do_op_ifz:
1545 sbrc z_flags, ZFL_Z
1546 ret
1547 pop temp ; nix tun
1548 pop temp ; direkt zurueck zu main
1549 ret
1550
1551 ;----------------------------------------------------------------
1552 ;|Mnemonic |SZHPNC|Description |Notes |
1553 ;----------------------------------------------------------------
1554 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1555 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1556 ;|RET cc |------|Conditional Return |If cc RET |
1557 ;
1558 ;
1559 do_op_ifnc:
1560 sbrs z_flags, ZFL_C
1561 ret
1562 pop temp ; nix tun
1563 pop temp ; direkt zuruech zu main
1564 ret
1565
1566 ;----------------------------------------------------------------
1567 ;|Mnemonic |SZHPNC|Description |Notes |
1568 ;----------------------------------------------------------------
1569 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1570 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1571 ;|RET cc |------|Conditional Return |If cc RET |
1572 ;
1573 ;
1574 do_op_ifc:
1575 sbrc z_flags, ZFL_C
1576 ret
1577 pop temp ; nix tun
1578 pop temp ; direkt zuruech zu main
1579 ret
1580
1581 ;----------------------------------------------------------------
1582 ;|Mnemonic |SZHPNC|Description |Notes |
1583 ;----------------------------------------------------------------
1584 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1585 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1586 ;|RET cc |------|Conditional Return |If cc RET |
1587 ;
1588 ;
1589 do_op_ifpo:
1590 sbrs z_flags, ZFL_P
1591 ret
1592 pop temp ; nix tun
1593 pop temp ; direkt zuruech zu main
1594 ret
1595
1596 ;----------------------------------------------------------------
1597 ;|Mnemonic |SZHPNC|Description |Notes |
1598 ;----------------------------------------------------------------
1599 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1600 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1601 ;|RET cc |------|Conditional Return |If cc RET |
1602 ;
1603 ;
1604 do_op_ifpe:
1605 sbrc z_flags, ZFL_P
1606 ret
1607 pop temp ; nix tun
1608 pop temp ; direkt zuruech zu main
1609 ret
1610
1611 ;----------------------------------------------------------------
1612 ;|Mnemonic |SZHPNC|Description |Notes |
1613 ;----------------------------------------------------------------
1614 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1615 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1616 ;|RET cc |------|Conditional Return |If cc RET |
1617 ;
1618 ;
1619 do_op_ifp: ;sign positive, aka s=0
1620 sbrs z_flags, ZFL_S
1621 ret
1622 pop temp ; nix tun
1623 pop temp ; direkt zuruech zu main
1624 ret
1625
1626 ;----------------------------------------------------------------
1627 ;|Mnemonic |SZHPNC|Description |Notes |
1628 ;----------------------------------------------------------------
1629 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1630 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1631 ;|RET cc |------|Conditional Return |If cc RET |
1632 ;
1633 ;
1634 do_op_ifm: ;sign negative, aka s=1
1635 sbrc z_flags, ZFL_S
1636 ret
1637 pop temp ; nix tun
1638 pop temp ; direkt zuruech zu main
1639 ret
1640
1641
1642 ; ----------------------- Opcode decoding -------------------------
1643
1644 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1645 ; operations: fetch, do something, store.
1646 ; The table is made of 256 words.
1647
1648 ;.org (PC+255) & 0xff00
1649 todo_table:
1650 instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1651 instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
1652 instr do_fetch_nop, op_nop, do_store_MBC ;02 ;LD (BC),A
1653 instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1654 instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1655 instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1656 instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
1657 instr do_fetch_nop, op_RLCA, do_store_nop ;07 ;RLCA
1658 instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1659 instr do_fetch_BC, op_ADDHL, do_store_nop ;09 ;ADD HL,BC
1660 instr do_fetch_MBC, op_nop, do_store_nop ;0A ;LD A,(BC)
1661 instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1662 instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1663 instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1664 instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
1665 instr do_fetch_nop, op_RRCA, do_store_nop ;0F ;RRCA
1666 instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1667 instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
1668 instr do_fetch_nop, op_nop, do_store_MDE ;12 ;LD (DE),A
1669 instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1670 instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1671 instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1672 instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
1673 instr do_fetch_nop, op_RLA, do_store_nop ;17 ;RLA
1674 instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1675 instr do_fetch_DE, op_ADDHL, do_store_nop ;19 ;ADD HL,DE
1676 instr do_fetch_MDE, op_nop, do_store_nop ;1A ;LD A,(DE)
1677 instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1678 instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1679 instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1680 instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
1681 instr do_fetch_nop, op_RRA, do_store_nop ;1F ;RRA
1682 instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1683 instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1684 instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1685 instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1686 instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1687 instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1688 instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1689 instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1690 instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1691 instr do_fetch_HL, op_ADDHL, do_store_nop ;29 ;ADD HL,HL
1692 instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1693 instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1694 instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1695 instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1696 instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1697 instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1698 instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1699 instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1700 instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1701 instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1702 instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1703 instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1704 instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1705 instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1706 instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1707 instr do_fetch_SP, op_ADDHL, do_store_nop ;39 ;ADD HL,SP
1708 instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1709 instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1710 instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1711 instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1712 instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1713 instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
1714 instr do_fetch_nop, op_nop, do_store_nop ;40 ;LD B,B
1715 instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1716 instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1717 instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1718 instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1719 instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1720 instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1721 instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1722 instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
1723 instr do_fetch_nop, op_nop, do_store_nop ;49 ;LD C,C
1724 instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1725 instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1726 instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1727 instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1728 instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1729 instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1730 instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1731 instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
1732 instr do_fetch_nop, op_nop, do_store_nop ;52 ;LD D,D
1733 instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1734 instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1735 instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1736 instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1737 instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1738 instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1739 instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1740 instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
1741 instr do_fetch_nop, op_nop, do_store_nop ;5B ;LD E,E
1742 instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1743 instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1744 instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1745 instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1746 instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1747 instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1748 instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1749 instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
1750 instr do_fetch_nop, op_nop, do_store_nop ;64 ;LD H,H
1751 instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1752 instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1753 instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1754 instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1755 instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1756 instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1757 instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1758 instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
1759 instr do_fetch_nop, op_nop, do_store_nop ;6D ;LD L,L
1760 instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1761 instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1762 instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1763 instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1764 instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1765 instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1766 instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1767 instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1768 instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1769 instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
1770 instr do_fetch_B, op_nop, do_store_A ;78 ;LD A,B
1771 instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1772 instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1773 instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1774 instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1775 instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1776 instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
1777 instr do_fetch_nop, op_nop, do_store_nop ;7F ;LD A,A
1778 instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1779 instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1780 instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1781 instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1782 instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1783 instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1784 instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1785 instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1786 instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1787 instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1788 instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1789 instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1790 instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1791 instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1792 instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1793 instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1794 instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1795 instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1796 instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1797 instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1798 instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1799 instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1800 instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1801 instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1802 instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1803 instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1804 instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1805 instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1806 instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1807 instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1808 instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1809 instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1810 instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1811 instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1812 instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1813 instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1814 instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1815 instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1816 instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1817 instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1818 instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1819 instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1820 instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1821 instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1822 instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1823 instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1824 instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1825 instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1826 instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1827 instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1828 instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1829 instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1830 instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1831 instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1832 instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1833 instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1834 instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1835 instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1836 instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1837 instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1838 instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1839 instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1840 instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1841 instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1842 instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1843 instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1844 instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1845 instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1846 instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1847 instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1848 instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1849 instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1850 instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1851 instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1852 instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1853 instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1854 instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1855 instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1856 instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1857 instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1858 instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1859 instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1860 instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1861 instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1862 instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1863 instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1864 instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1865 instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1866 instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1867 instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1868 instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1869 instr do_fetch_DIR8, op_INA, do_store_nop ;DB nn ;IN A,(n)
1870 instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1871 instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1872 instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1873 instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1874 instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1875 instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1876 instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1877 instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1878 instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1879 instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1880 instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1881 instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1882 instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1883 instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1884 instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1885 instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1886 instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1887 instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1888 instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1889 instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1890 instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1891 instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1892 instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1893 instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1894 instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1895 instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1896 instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1897 instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1898 instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1899 instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1900 instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1901 instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1902 instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1903 instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1904 instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1905 instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1906
1907
1908 ;----------------------------------------------------------------
1909 ; Lookup table, stolen from z80ex, Z80 emulation library.
1910 ; http://z80ex.sourceforge.net/
1911
1912 ; The S, Z, 5 and 3 bits and the parity of the lookup value
1913
1914 .org (PC+255) & 0xff00
1915 sz53p_tab:
1916 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1917 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1918 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1919 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1920 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1921 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1922 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1923 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1924 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1925 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1926 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1927 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1928 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1929 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1930 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1931 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1932 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1933 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1934 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1935 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1936 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1937 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1938 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1939 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1940 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1941 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1942 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1943 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1944 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1945 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1946 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1947 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1948
1949 ; vim:set ts=8 noet nowrap
1950
CP/M on an AVR