]> cloudbase.mooo.com Git - avrcpm.git/blob - avr/Z80int-jmp.asm
projects / avrcpm.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
SVN --> GIT
[avrcpm.git] / avr / Z80int-jmp.asm
1 ; 8080/Z80 Interpreter.
2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
3 ;
4
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010-2013 Leo C.
7 ; Copyright (C) 2010 Horst S.
8
9 ; This file is part of avrcpm.
10 ;
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
15 ;
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
20 ;
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23 ;
24 ; $Id: Z80int-jmp.asm 93 2014-01-03 16:32:32Z rapid $
25 ;
26
27 #if EM_Z80
28
29 .dseg
30 z_regs:
31 z_c2:
32 .equ oz_c2 = z_c2 - z_regs
33 .byte 1
34 z_b2:
35 .equ oz_b2 = z_b2 - z_regs
36 .byte 1
37 z_e2:
38 .equ oz_e2 = z_e2 - z_regs
39 .byte 1
40 z_d2:
41 .equ oz_d2 = z_d2 - z_regs
42 .byte 1
43 z_l2:
44 .equ oz_l2 = z_l2 - z_regs
45 .byte 1
46 z_h2:
47 .equ oz_h2 = z_h2 - z_regs
48 .byte 1
49 z_f2:
50 .equ oz_f2 = z_f2 - z_regs
51 .byte 1
52 z_a2:
53 .equ oz_a2 = z_a2 - z_regs
54 .byte 1
55
56 z_xl:
57 .equ oz_xl = z_xl - z_regs
58 .byte 1
59 z_xh:
60 .equ oz_xh = z_xh - z_regs
61 .byte 1
62 z_yl:
63 .equ oz_yl = z_yl - z_regs
64 .byte 1
65 z_yh:
66 .equ oz_yh = z_yh - z_regs
67 .byte 1
68 z_i:
69 .equ oz_i = z_i - z_regs
70 .byte 1
71 z_r:
72 .equ oz_r = z_r - z_regs
73 .byte 1
74
75 z_istat:
76 .equ oz_istat = z_istat - z_regs
77 .byte 1
78
79 .equ IM_MASK = 0x03 ;Mask IM 0..2
80 .equ IM0 = 0
81 .equ IM1 = 1
82 .equ IM2 = 2
83
84 .equ IFF1 = 2 ;IFF1 Flag
85 .equ IFF2 = 3 ;IFF2 Flag
86 #endif
87
88 .cseg
89
90 ;Init z80
91 z80_init:
92 ldiw z_pc,IPLADDR
93 ldiw y,z_regs
94
95 clr intstat
96
97 printnewline
98
99 .if INS_DEBUG
100 sbr intstat,(1<<i_trace)
101 .endif
102
103 printstring "Ok, "CPUSTR"-CPU is live!"
104 printnewline
105
106 main:
107
108 .if PRINT_PC
109 cpi z_pch,DBG_TRACE_BOTTOM
110 brlo noprintpc
111 cpi z_pch,DBG_TRACE_TOP
112 brsh noprintpc
113
114 printnewline
115 printstring "PC="
116 movw temp,z_pcl
117 lcall printhexw
118 printstring " "
119 noprintpc:
120 .endif
121
122 ;TODO: hier kommt die Interruptbehandlung rein
123
124 cpse intstat,_0 ; 2 Fast path if no trace, int, break, ...
125 rjmp int_test
126
127 int_instr:
128 mem_read_ds zl,z_pc ;11 zl = memReadByte(z_pc)
129 adiw z_pcl,1 ; 2 ++z_pc
130 ldi zh,high(opcjmp) ; 1
131 icall ; 3 (+4 ret)
132 rjmp main ; 2
133 ; / 25 cycles minimum (NOP)
134 int_test:
135 sbrs intstat,i_trace
136 rjmp int_notrace
137 sbrc intstat,i_halt
138 rjmp int_notrace
139 cpi z_pch,DBG_TRACE_BOTTOM
140 brlo int_notrace
141 cpi z_pch,DBG_TRACE_TOP
142 brsh int_notrace
143 lcall printregs
144 int_notrace:
145 sbrs intstat,i_break
146 rjmp int_nobreak
147 cbr intstat,(1<<i_break)|(1<<i_halt)
148 printnewline
149 printstring "Break detected! "
150 mov z_pcl,_0
151 mov z_pch,_0
152 int_nobreak:
153
154 rjmp int_instr ;Continue with normal instruction interpretation
155
156
157 ;--------------------------------------------------
158 ; init opcode table
159 ;
160 ; opctable opc_name, pos
161 ;
162
163 .macro opctable
164
165
166 .set opcjmp_table_pos_ = (@1 + 255) & -0x100 ;0xff00
167
168 .ifndef opc_tabnext_
169 .set opc_tabnext_ = opcjmp_table_pos_
170
171 .set opc_tablow_0 = 0
172 .set opc_tablen_0 = 0
173 .set opc_tablow_1 = 0
174 .set opc_tablen_1 = 0
175 .endif
176
177 .if opcjmp_table_pos_ < opc_tabnext_
178 .set opcjmp_table_pos_ = opc_tabnext_
179 .endif
180
181 .if opc_tablow_0 == 0
182 .set opc_tablow_0 = opcjmp_table_pos_
183 .set opc_tablen_0 = 256
184 ;.message "add tab_0"
185 .elif opc_tablow_1 == 0
186 .if (opc_tablow_0 + opc_tablen_0) == opcjmp_table_pos_
187 .set opc_tablen_0 = opc_tablen_0 + 256
188 ;.message " tab_0++"
189 .else
190 .set opc_tablow_1 = opcjmp_table_pos_
191 .set opc_tablen_1 = 256
192 ;.message "add tab_1"
193 .endif
194 .else
195 .if (opc_tablow_1 + opc_tablen_1) == opcjmp_table_pos_
196 .set opc_tablen_1 = opc_tablen_1 + 256
197 ;.message "tab_1++"
198 .else
199 .error "Tab full_"
200 .endif
201 .endif
202
203 .set opc_tabnext_ = opcjmp_table_pos_ + 256
204 .equ @0 = opcjmp_table_pos_
205
206 .endm
207
208 ;--------------------------------------------------
209 ;
210 ; checkspace frompos, size
211 ;
212 .macro checkspace
213
214 .ifdef opc_tablow_0
215 .if @0 <= opc_tablow_0
216 .if (@0 + @1) > opc_tablow_0
217 .org opc_tablow_0 + opc_tablen_0
218 ; .message "skip tab, remove tab_0"
219 .if opc_tablow_1 == 0
220 .set opc_tablow_0 = 0
221 .set opc_tablen_0 = 0
222 .else
223 .set opc_tablow_0 = opc_tablow_1
224 .set opc_tablen_0 = opc_tablen_1
225 .set opc_tablow_1 = 0
226 .set opc_tablen_1 = 0
227 ; .message "remove tab_1"
228 .endif
229 .endif
230 .endif
231 .endif
232 .endm
233
234 ;--------------------------------------------------
235 ; Generate a table entry for one instruction
236 ;
237 ; instr fetch, op, store
238 ;
239 .macro instr
240
241 .set fetch_ = (do_@0 != do_fetch_nop) ; must call or jump to fetch action
242 .set op_ = (do_@1 != do_op_nop) ; must call or jump to op action
243 .set store_ = (do_@2 != do_store_nop) ; must jump to store action
244 .set cnt_ = fetch_ + op_ + store_ ; number of actions for this instruction
245
246
247 .set done_ = 0
248 .set pc_save_ = PC
249
250 .if cnt_ == 0 ; nothing to do (nop)
251 .org opcjmp_table_pos_
252 ret ; go back to main
253 .org pc_save_
254 .set done_ = 1
255 .elif cnt_ == 1 ; jump direct to action
256 .if fetch_
257 .set action_1_ = do_@0
258 .elif op_
259 .set action_1_ = do_@1
260 .else
261 .set action_1_ = do_@2
262 .endif
263 .if (opcjmp_table_pos_ - action_1_) <= 2047
264 .org opcjmp_table_pos_
265 rjmp action_1_ ; do op and return to main
266 .org pc_save_
267 .set done_ = 1
268 .endif
269 .endif
270
271 .if !done_
272
273 .if defined (l_@0_@1_@2)
274
275 .if (opcjmp_table_pos_ - l_@0_@1_@2) <= 2047
276 .org opcjmp_table_pos_
277 rjmp l_@0_@1_@2 ; generate a jump to action table
278 .org pc_save_
279 .else
280 checkspace pc_save_, 2
281 .set pc_save_ = PC
282 .org opcjmp_table_pos_
283 rjmp pc_save_
284 .org pc_save_
285 jmp l_@0_@1_@2
286 .endif
287
288 .else
289
290 checkspace pc_save_, 2*cnt_
291 .set pc_save_ = PC
292
293 .org opcjmp_table_pos_
294 .equ l_@0_@1_@2 = pc_save_ ; make a label
295 rjmp l_@0_@1_@2 ; generate a jump to action table
296
297 .org l_@0_@1_@2
298
299 .if fetch_ ; must fetch
300 .if op_ || store_
301 .if do_@0 == 0
302 m_do_@0
303 .else
304 lcall do_@0 ; fetch and come back here
305 .endif
306 .else
307 .if do_@0 == 0
308 m_do_@0
309 ret
310 .else
311 ljmp do_@0 ; do op and return to main
312 .endif
313 .endif
314 .endif
315 .if op_ ; must exec op
316 .if store_
317 .if do_@1 == 0
318 m_do_@1
319 .else
320 lcall do_@1 ; fetch and come back here
321 .endif
322 .else
323 .if do_@1 == 0
324 m_do_@1
325 ret
326 .else
327 ljmp do_@1 ; do op and return to main
328 .endif
329 .endif
330 .endif
331 .if store_ ; must store
332 .if do_@2 == 0
333 m_do_@2
334 ret
335 .else
336 ljmp do_@2 ; store is allways last
337 .endif
338 .endif
339
340 .endif
341 .endif
342
343 .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1
344
345 .endm
346
347
348 do_x_nop:
349 ret
350
351 ; ------------ Fetch phase stuff -----------------
352
353
354 fetch_ops:
355 .equ do_fetch_nop = do_x_nop
356
357 do_fetch_rst:
358 movw x,z_pcl
359 sbiw x,1
360 mem_read_d opl
361 andi opl,0x38
362 ldi oph,0
363 ret
364
365 .macro m_do_fetch_a
366 mov opl,z_a
367 .endm
368
369 .equ do_fetch_a = 0
370 ; mov opl,z_a
371 ; ret
372
373 .macro m_do_fetch_b
374 mov opl,z_b
375 .endm
376
377 .equ do_fetch_b = 0
378 ; mov opl,z_b
379 ; ldd opl,y+oz_b
380 ; ret
381
382 .macro m_do_fetch_c
383 mov opl,z_c
384 .endm
385
386 .equ do_fetch_c = 0
387 ; mov opl,z_c
388 ; ldd opl,y+oz_c
389 ; ret
390
391 .macro m_do_fetch_d
392 mov opl,z_d
393 .endm
394
395 .equ do_fetch_d = 0
396 ; ldd opl,y+oz_d
397 ; ret
398
399 .macro m_do_fetch_e
400 mov opl,z_e
401 .endm
402
403 .equ do_fetch_e = 0
404 ; ldd opl,y+oz_e
405 ; ret
406
407 .macro m_do_fetch_h
408 mov opl,z_h
409 .endm
410
411 .equ do_fetch_h = 0
412 ; mov opl,z_h
413 ; ret
414
415 .macro m_do_fetch_l
416 mov opl,z_l
417 .endm
418
419 .equ do_fetch_l = 0
420 ; mov opl,z_l
421 ; ret
422
423 .macro m_do_fetch_af
424 movw opl,z_flags
425 .endm
426
427 .equ do_fetch_af = 0
428 ; movw opl,z_flags
429 ; ret
430
431 .macro m_do_fetch_bc
432 movw opl,z_c
433 .endm
434
435 .equ do_fetch_bc = 0
436 ; movw opl,z_c
437 ; ret
438
439 .macro m_do_fetch_de
440 movw opl,z_e
441 .endm
442
443 .equ do_fetch_de = 0
444 ; movw opl,z_e
445 ; ret
446
447 .macro m_do_fetch_hl
448 movw opl,z_l
449 .endm
450
451 .equ do_fetch_hl = 0
452 ; movw opl,z_l
453 ; ret
454
455 .macro m_do_fetch_sp
456 movw opl,z_spl
457 .endm
458
459 .equ do_fetch_sp = 0
460 ; movw opl,z_spl
461 ; ret
462
463 do_fetch_mbc:
464 ; movw x,z_c
465 mem_read_ds z_a, z_bc
466 ret
467
468 do_fetch_mde:
469 ; movw x,z_e
470 mem_read_ds z_a, z_de
471 ret
472
473 do_fetch_mhl:
474 ; movw x,z_l
475 mem_read_ds opl, z_hl
476 ret
477
478 do_fetch_msp:
479 movw x,z_spl
480 mem_read_d opl
481 adiw x,1
482 mem_read_d oph
483 ret
484
485 do_fetch_dir8:
486 mem_read_ds opl, z_pc
487 adiw z_pcl,1
488 ret
489
490 do_fetch_dir16:
491 mem_read_ds opl, z_pc
492 adiw z_pcl,1
493 mem_read_ds oph, z_pc
494 adiw z_pcl,1
495 ret
496
497 ; ------------ Store phase stuff -----------------
498
499 store_ops:
500 .equ do_store_nop = do_x_nop
501
502
503 do_store_a:
504 mov z_a,opl
505 ret
506
507 ;.macro m_do_store_b
508 ; std y+oz_b,opl
509 ;.endm
510 ;.equ do_store_b = 0
511 do_store_b:
512 mov z_b,opl
513 ret
514
515 do_store_c:
516 mov z_c,opl
517 ret
518
519 do_store_d:
520 mov z_d,opl
521 ret
522
523 do_store_e:
524 mov z_e,opl
525 ret
526
527 do_store_h:
528 mov z_h,opl
529 ret
530
531 do_store_l:
532 mov z_l,opl
533 ret
534
535 do_store_af:
536 movw z_flags,opl
537 ret
538
539 do_store_bc:
540 movw z_c,opl
541 ret
542
543 do_store_de:
544 movw z_e,opl
545 ; std y+oz_d,oph
546 ; std y+oz_e,opl
547 ret
548
549 do_store_hl:
550 movw z_l,opl
551 ret
552
553 do_store_mbc:
554 ; movw x,z_c
555 mem_write_ds z_bc, z_a
556 ret
557
558 do_store_mde:
559 ; movw x,z_e
560 mem_write_ds z_de, z_a
561 ret
562
563 do_store_mhl:
564 ; movw x,z_l
565 mem_write_ds z_hl, opl
566 ret
567
568 do_store_msp:
569 movw xl,z_spl
570 mem_write_s opl
571 adiw xl,1
572 mem_write_s oph
573 ret
574
575 do_store_sp:
576 movw z_spl,opl
577 ret
578
579 do_store_pc:
580 movw z_pcl,opl
581 ret
582
583 do_store_pcrel: ;add displacement to PC
584 #if EM_Z80
585 mov oph,opl ;sign extend
586 lsl oph
587 sbc oph,oph
588 add z_pcl,opl
589 adc z_pch,oph
590 ret
591 #else
592 rjmp do_op_inv
593 #endif
594
595 do_store_ret:
596 movw x,z_spl
597 mem_read_d z_pcl
598 adiw x,1
599 mem_read_d z_pch
600 adiw x,1
601 movw z_spl,x
602
603 .if STACK_DBG
604 printnewline
605 printstring "Stack pop "
606 movw temp,z_pcl
607 rcall printhexw
608 printstring ", SP is now "
609 movw temp,z_spl
610 rcall printhexw
611 printstring ". "
612 .endif
613 ret
614
615 do_store_call:
616 movw xl,z_spl
617 sbiw x,1
618 mem_write_s z_pch
619 sbiw x,1
620 mem_write_s z_pcl
621 movw z_spl,xl
622
623 .if STACK_DBG
624 printnewline
625 printstring "Stack push "
626 movw temp,z_pcl
627 rcall printhexw
628 printstring ", SP is now "
629 movw temp,z_spl
630 rcall printhexw
631 printstring ". "
632 .endif
633 movw z_pcl,opl
634 ret
635
636
637 do_store_am:
638 mem_write_ds op, z_a
639 ret
640
641 ; ------------ Operation phase stuff -----------------
642
643 ;----------------------------------------------------------------
644 ;| |
645 ;| Zilog |
646 ;| |
647 ;| ZZZZZZZ 88888 000 |
648 ;| Z 8 8 0 0 |
649 ;| Z 8 8 0 0 0 |
650 ;| Z 88888 0 0 0 |
651 ;| Z 8 8 0 0 0 |
652 ;| Z 8 8 0 0 |
653 ;| ZZZZZZZ 88888 000 |
654 ;| |
655 ;| Z80 MICROPROCESSOR Instruction Set Summary |
656 ;| |
657 ;----------------------------------------------------------------
658 ;----------------------------------------------------------------
659 ;|Mnemonic |SZHPNC|Description |Notes |
660 ;|----------+------+---------------------+----------------------|
661 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
662 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
663 ;|ADD A,s |***V0*|Add |A=A+s |
664 ;|ADD HL,ss |--*-0*|Add |HL=HL+ss |
665 ;|ADD IX,pp |--*-0*|Add |IX=IX+pp |
666 ;|ADD IY,rr |--*-0*|Add |IY=IY+rr |
667 ;|AND s |**1P00|Logical AND |A=A&s |
668 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
669 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
670 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
671 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
672 ;|CP s |***V1*|Compare |A-s |
673 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
674 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
675 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
676 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
677 ;|CPL |--1-1-|Complement |A=~A |
678 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
679 ;|DEC s |***V1-|Decrement |s=s-1 |
680 ;|DEC xx |------|Decrement |xx=xx-1 |
681 ;|DEC ss |------|Decrement |ss=ss-1 |
682 ;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 |
683 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
684 ;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 |
685 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
686 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
687 ;|EX AF,AF' |------|Exchange |AF<->AF' |
688 ;|EX DE,HL |------|Exchange |DE<->HL |
689 ;|EXX |------|Exchange |qq<->qq' (except AF)|
690 ;|HALT |------|Halt | |
691 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
692 ;|IN A,[n] |------|Input |A=[n] |
693 ;|IN r,[C] |***P0-|Input |r=[C] |
694 ;|INC r |***V0-|Increment |r=r+1 |
695 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
696 ;|INC xx |------|Increment |xx=xx+1 |
697 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
698 ;|INC ss |------|Increment |ss=ss+1 |
699 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
700 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
701 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
702 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
703 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
704 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
705 ;|JP nn |------|Unconditional Jump |PC=nn |
706 ;|JP cc,nn |------|Conditional Jump |If cc JP |
707 ;|JR e |------|Unconditional Jump |PC=PC+e |
708 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
709 ;|LD dst,src|------|Load |dst=src |
710 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
711 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
712 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
713 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
714 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
715 ;|NEG |***V1*|Negate |A=-A |
716 ;|NOP |------|No Operation | |
717 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
718 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
719 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
720 ;|OUT [C],r |------|Output |[C]=r |
721 ;|OUT [n],A |------|Output |[n]=A |
722 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
723 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
724 ;|POP xx |------|Pop |xx=[SP]+ |
725 ;|POP qq |------|Pop |qq=[SP]+ |
726 ;|PUSH xx |------|Push |-[SP]=xx |
727 ;|PUSH qq |------|Push |-[SP]=qq |
728 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
729 ;|RET |------|Return |PC=[SP]+ |
730 ;|RET cc |------|Conditional Return |If cc RET |
731 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
732 ;|RETN |------|Return from NMI |PC=[SP]+ |
733 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
734 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
735 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
736 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
737 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
738 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
739 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
740 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
741 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
742 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
743 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
744 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
745 ;|SBC HL,ss |***V1*|Subtract with Carry |HL=HL-ss-CY |
746 ;|SCF |--0-01|Set Carry Flag |CY=1 |
747 ;|SET b,m |------|Set bit |m=mv{2^b} |
748 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
749 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
750 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
751 ;|SUB s |***V1*|Subtract |A=A-s |
752 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
753 ;|----------+------+--------------------------------------------|
754 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
755 ;| S |S |Sign flag (Bit 7) |
756 ;| Z | Z |Zero flag (Bit 6) |
757 ;| HC | H |Half Carry flag (Bit 4) |
758 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
759 ;| N | N |Add/Subtract flag (Bit 1) |
760 ;| CY | C|Carry flag (Bit 0) |
761 ;|-----------------+--------------------------------------------|
762 ;| n |Immediate addressing |
763 ;| nn |Immediate extended addressing |
764 ;| e |Relative addressing (PC=PC+2+offset) |
765 ;| [nn] |Extended addressing |
766 ;| [xx+d] |Indexed addressing |
767 ;| r |Register addressing |
768 ;| [rr] |Register indirect addressing |
769 ;| |Implied addressing |
770 ;| b |Bit addressing |
771 ;| p |Modified page zero addressing (see RST) |
772 ;|-----------------+--------------------------------------------|
773 ;|DEFB n(,...) |Define Byte(s) |
774 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
775 ;|DEFS nn |Define Storage Block |
776 ;|DEFW nn(,...) |Define Word(s) |
777 ;|-----------------+--------------------------------------------|
778 ;| A B C D E |Registers (8-bit) |
779 ;| AF BC DE HL |Register pairs (16-bit) |
780 ;| F |Flag register (8-bit) |
781 ;| I |Interrupt page address register (8-bit) |
782 ;| IX IY |Index registers (16-bit) |
783 ;| PC |Program Counter register (16-bit) |
784 ;| R |Memory Refresh register |
785 ;| SP |Stack Pointer register (16-bit) |
786 ;|-----------------+--------------------------------------------|
787 ;| b |One bit (0 to 7) |
788 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
789 ;| d |One-byte expression (-128 to +127) |
790 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
791 ;| e |One-byte expression (-126 to +129) |
792 ;| m |Any register r, [HL] or [xx+d] |
793 ;| n |One-byte expression (0 to 255) |
794 ;| nn |Two-byte expression (0 to 65535) |
795 ;| pp |Register pair BC, DE, IX or SP |
796 ;| qq |Register pair AF, BC, DE or HL |
797 ;| qq' |Alternative register pair AF, BC, DE or HL |
798 ;| r |Register A, B, C, D, E, H or L |
799 ;| rr |Register pair BC, DE, IY or SP |
800 ;| s |Any register r, value n, [HL] or [xx+d] |
801 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
802 ;| ss |Register pair BC, DE, HL or SP |
803 ;| xx |Index register IX or IY |
804 ;|-----------------+--------------------------------------------|
805 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
806 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
807 ;| <- -> |Rotate left/right |
808 ;| [ ] |Indirect addressing |
809 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
810 ;| { } |Combination of operands |
811 ;| # |Also BC=BC-1,DE=DE-1 |
812 ;| ## |Only lower 4 bits of accumulator A used |
813 ;----------------------------------------------------------------
814
815 ;How the flags are supposed to work:
816 ;7 ZFL_S - Sign flag (=MSBit of result)
817 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
818 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
819 ;2 ZFL_P - Parity/2-complement Overflow
820 ;1 ZFL_N - Subtract - set if last op was a subtract
821 ;0 ZFL_C - Carry
822 ;
823 ;I sure hope I got the mapping between flags and instructions correct...
824
825 .equ ZFL_S = 7
826 .equ ZFL_Z = 6
827 .equ ZFL_H = 4
828 .equ ZFL_P = 2
829 .equ ZFL_N = 1
830 .equ ZFL_C = 0
831
832 .equ AVR_T = SREG_T
833 .equ AVR_H = SREG_H
834 .equ AVR_S = SREG_S
835 .equ AVR_V = SREG_V
836 .equ AVR_N = SREG_N
837 .equ AVR_Z = SREG_Z
838 .equ AVR_C = SREG_C
839
840 ; TODO: check Z80 flag settings
841
842 ;------------------------------------------------;
843 ; Load table value from flash indexed by source reg.
844 ;
845 ; ldpmx dstreg,tablebase,indexreg
846 ;
847 ; (3 words, 5 cycles)
848
849 .macro ldpmx
850 ldi zh,high(@1*2) ; table must be page aligned
851 mov zl,@2
852 lpm @0,z
853 .endm
854
855 .macro do_z80_flags_V
856 #if EM_Z80
857 bmov z_flags, ZFL_P, temp, AVR_V
858 #endif
859 .endm
860
861 .macro do_z80_flags_H
862 #if EM_Z80
863 bmov z_flags, ZFL_H, temp, AVR_H
864 #endif
865 .endm
866
867 .macro do_z80_flags_set_N
868 #if EM_Z80
869 ori z_flags, (1<<ZFL_N) ; Negation auf 1
870 #endif
871 .endm
872
873 .macro do_z80_flags_set_HN
874 #if EM_Z80
875 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
876 #endif
877 .endm
878
879 .macro do_z80_flags_clear_N
880 #if EM_Z80
881 andi z_flags,~(1<<ZFL_N)
882 #endif
883 .endm
884
885 .macro do_z80_flags_clear_HN
886 #if EM_Z80
887 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
888 #endif
889 .endm
890
891
892 .macro do_z80_flags_copy_HC
893 #if EM_Z80
894 bmov z_flags, ZFL_H, z_flags, ZFL_C
895 #endif
896 .endm
897
898 .macro do_z80_flags_op_rotate
899 ; must not change avr carry flag!
900 #if EM_Z80
901 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
902 #else
903 andi z_flags, ~( (1<<ZFL_C) )
904 #endif
905 .endm
906
907 .macro do_z80_flags_op_and
908 #if EM_Z80
909 ori z_flags,(1<<ZFL_H)
910 #endif
911 .endm
912
913 .macro do_z80_flags_op_or
914 #if EM_Z80
915 ;nothing to do
916 #endif
917 .endm
918
919
920 ;----------------------------------------------------------------
921
922 .equ do_op_nop = do_x_nop
923
924 do_op_inv:
925 sbiw z_pcl,1
926 lcall printregs
927 printstring "Invalid opcode! "
928
929 haltinv:
930 rjmp haltinv
931
932
933 ;----------------------------------------------------------------
934 ;|Mnemonic |SZHPNC|Description |Notes |
935 ;----------------------------------------------------------------
936 ;|HALT |------|Halt | |
937
938
939 do_op_HALT:
940 sbiw z_pcl,1
941 sbrc intstat,i_halt
942 ret
943 sbr intstat,(1<<i_halt)
944 lcall printregs
945 printstring "CPU halted! "
946 ret
947
948 ;----------------------------------------------------------------
949 ;|Mnemonic |SZHPNC|Description |Notes |
950 ;----------------------------------------------------------------
951 ;|OUT [n],A |------|Output |[n]=A |
952 ;
953 ;
954 ;Interface with peripherials goes here :)
955 do_op_outa: ; out (opl),a
956 .if PORT_DEBUG
957 printnewline
958 printstring "Port write: "
959 mov temp,z_a
960 lcall printhex
961 printstring " -> ("
962 mov temp,opl
963 lcall printhex
964 printstring ") "
965 .endif
966 mov temp,z_a
967 mov temp2,opl
968 lcall portWrite
969 ret
970
971 ;----------------------------------------------------------------
972 ;|Mnemonic |SZHPNC|Description |Notes |
973 ;----------------------------------------------------------------
974 ;|IN A,[n] |------|Input |A=[n] |
975 ;
976 ;
977 do_op_ina: ; in a,(opl)
978 .if PORT_DEBUG
979 push opl
980 cp opl,_0 ; don't debug port 0 (con stat)
981 breq dbg_op_ina_1
982 printnewline
983 printstring "Port read: ("
984 mov temp,opl
985 lcall printhex
986 printstring ") -> "
987 dbg_op_ina_1:
988 .endif
989
990 mov temp2,opl
991 lcall portRead
992 mov z_a,temp
993
994 .if PORT_DEBUG
995 pop temp
996 cp temp,_0
997 breq dbg_op_ina_2
998 lcall printhex
999 printstring " "
1000 dbg_op_ina_2:
1001 .endif
1002 ret
1003
1004 ;----------------------------------------------------------------
1005 ;|Mnemonic |SZHPNC|Description |Notes |
1006 ;----------------------------------------------------------------
1007 ;|INC r |***V0-|Increment |r=r+1 |
1008 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
1009 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
1010 ;|----------|SZHP C|---------- 8080 ----------------------------|
1011 ;|INC r |**-P0-|Increment |r=r+1 |
1012 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
1013 ;
1014
1015 do_op_inc:
1016 #if EM_Z80
1017 #if 1
1018 andi z_flags,(1<<ZFL_C) ; preserve C-, Clear N-flag
1019 subi opl,-1
1020 in temp,sreg
1021 sbrc temp,AVR_N
1022 sbr z_flags,(1<<ZFL_S)
1023 sbrc temp,AVR_Z
1024 sbr z_flags,(1<<ZFL_Z)
1025 sbrs temp,AVR_H
1026 sbr z_flags,(1<<ZFL_H)
1027 sbrc temp,AVR_V
1028 sbr z_flags,(1<<ZFL_P)
1029 #else
1030 andi z_flags,(1<<ZFL_C) ; preserve C-, Clear N-flag
1031 ldi temp,1
1032 add opl,temp
1033 in temp,sreg
1034 bmov z_flags,ZFL_S, temp,AVR_N
1035 bmov z_flags,ZFL_Z, temp,AVR_Z
1036 bmov z_flags,ZFL_H, temp,AVR_H
1037 bmov z_flags,ZFL_P, temp,AVR_V
1038 #endif
1039 #else /* 8080 */
1040 andi z_flags,(1<<ZFL_C)|(1<<ZFL_H) ; preserve C- and H-flag
1041 inc opl
1042 ldpmx temp,sz53p_tab,opl ;S,Z,P flag
1043 or z_flags,temp
1044 #endif
1045 ret
1046
1047 #if 0
1048 bst z_flags,ZFL_C ; save C flag
1049 subi opl,-1
1050 in temp,sreg
1051 ldpmx z_flags,flagmap_tab,temp
1052 bld z_flags,ZFL_C
1053 ret
1054 #endif
1055
1056 do_op_inca:
1057 #if EM_Z80
1058 andi z_flags,(1<<ZFL_C) ; preserve C-, Clear N-flag
1059 subi z_a,-1
1060 in temp,sreg
1061 bmov z_flags,ZFL_S, temp,AVR_N
1062 bmov z_flags,ZFL_Z, temp,AVR_Z
1063 sbrs temp,AVR_H
1064 sbr z_flags,(1<<ZFL_H)
1065 bmov z_flags,ZFL_P, temp,AVR_V
1066 #else /* 8080 */
1067 andi z_flags,(1<<ZFL_C)|(1<<ZFL_H) ; preserve C- and H-flag
1068 inc z_a
1069 ldpmx temp,sz53p_tab,z_a ; S,Z,P flag
1070 or z_flags,temp
1071 #endif
1072 ret
1073
1074 ;----------------------------------------------------------------
1075 ;|Mnemonic |SZHPNC|Description |Notes |
1076 ;----------------------------------------------------------------
1077 ;|DEC r |***V1-|Decrement |s=s-1 |
1078 ;|DEC [HL] |***V1-|Increment |[HL]=[HL]-1 |
1079 ;|DEC [xx+d]|***V1-|Increment |[xx+d]=[xx+d]-1 |
1080 ;|----------|SZHP C|---------- 8080 ----------------------------|
1081 ;|DEC r |**-P -|Increment |r=r-1 |
1082 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]-1 |
1083 ;
1084
1085 do_op_dec:
1086 subi opl,1
1087 #if EM_Z80
1088 in temp,sreg
1089 bmov z_flags,ZFL_S, temp,AVR_N
1090 bmov z_flags,ZFL_Z, temp,AVR_Z
1091 bmov z_flags,ZFL_H, temp,AVR_H
1092 bmov z_flags,ZFL_P, temp,AVR_V
1093 ori z_flags,(1<<ZFL_N) ; Set N-flag
1094 #else /* 8080 */
1095 andi z_flags,(1<<ZFL_C)|(1<<ZFL_H) ; preserve C- and H-flag
1096 ldpmx temp,sz53p_tab,opl ; S,Z,P flag
1097 or z_flags,temp
1098 #endif
1099 ret
1100
1101
1102 do_op_deca:
1103 #if EM_Z80
1104 subi z_a,1
1105 in temp,sreg
1106 bmov z_flags,ZFL_S, temp,AVR_N
1107 bmov z_flags,ZFL_Z, temp,AVR_Z
1108 bmov z_flags,ZFL_H, temp,AVR_H
1109 bmov z_flags,ZFL_P, temp,AVR_V
1110 ori z_flags,(1<<ZFL_N) ; Set N-flag
1111 #else /* 8080 */
1112 dec z_a
1113 andi z_flags,(1<<ZFL_C)|(1<<ZFL_H) ; preserve C- and H-flag
1114 ldpmx temp,sz53p_tab,z_a ; S,Z,P flag
1115 or z_flags,temp
1116 #endif
1117 ret
1118
1119
1120 ;----------------------------------------------------------------
1121 ;|Mnemonic |SZHPNC|Description |Notes |
1122 ;----------------------------------------------------------------
1123 ;|INC xx |------|Increment |xx=xx+1 |
1124 ;|INC ss |------|Increment |ss=ss+1 |
1125 ;
1126 ;
1127 do_op_inc16:
1128 subi opl,low(-1)
1129 sbci oph,high(-1)
1130 ret
1131
1132 do_op_incHL:
1133 sub z_l,_255
1134 sbc z_h,_255
1135 ret
1136
1137 do_op_incDE:
1138 sub z_e,_255
1139 sbc z_d,_255
1140 ret
1141
1142 do_op_incBC:
1143 sub z_c,_255
1144 sbc z_b,_255
1145 ret
1146
1147 ;----------------------------------------------------------------
1148 ;|Mnemonic |SZHPNC|Description |Notes |
1149 ;----------------------------------------------------------------
1150 ;|DEC xx |------|Decrement |xx=xx-1 |
1151 ;|DEC ss |------|Decrement |ss=ss-1 |
1152 ;
1153 ;
1154 do_op_dec16:
1155 subi opl, 1
1156 sbci oph, 0
1157 ret
1158
1159 do_op_decHL:
1160 add z_l,_255
1161 adc z_h,_255
1162 ret
1163
1164 do_op_decDE:
1165 add z_e,_255
1166 adc z_d,_255
1167 ret
1168
1169 do_op_decBC:
1170 add z_c,_255
1171 adc z_b,_255
1172 ret
1173
1174 ;----------------------------------------------------------------
1175 ;|Mnemonic |SZHPNC|Description |Notes |
1176 ;----------------------------------------------------------------
1177 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
1178 ;|----------|SZHP C|---------- 8080 ----------------------------|
1179 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
1180 ;
1181 ;
1182 do_op_rlca:
1183 ;Rotate Left Cyclical. All bits move 1 to the
1184 ;left, the msb becomes c and lsb.
1185 do_z80_flags_op_rotate
1186 lsl z_a
1187 brcc do_op_rlc_noc
1188 ldi temp,1
1189 or z_a,temp
1190 ori z_flags, (1<<ZFL_C)
1191 do_op_rlc_noc:
1192 ret
1193
1194 ;----------------------------------------------------------------
1195 ;|Mnemonic |SZHPNC|Description |Notes |
1196 ;----------------------------------------------------------------
1197 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
1198 ;|----------|SZHP C|---------- 8080 ----------------------------|
1199 ;|RRCA |---- *|Rotate Right Circular|A=->A |
1200 ;
1201 ;
1202 do_op_rrca:
1203 ;Rotate Right Cyclical. All bits move 1 to the
1204 ;right, the lsb becomes c and msb.
1205 do_z80_flags_op_rotate
1206 lsr z_a
1207 brcc do_op_rrc_noc
1208 ldi temp,0x80
1209 or z_a,temp
1210 ori z_flags, (1<<ZFL_C)
1211 do_op_rrc_noc:
1212 ret
1213
1214 ;----------------------------------------------------------------
1215 ;|Mnemonic |SZHPNC|Description |Notes |
1216 ;----------------------------------------------------------------
1217 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
1218 ;|----------|SZHP C|---------- 8080 ----------------------------|
1219 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
1220 ;
1221 ;
1222 do_op_rra:
1223 ;Rotate Right. All bits move 1 to the right, the lsb
1224 ;becomes c, c becomes msb.
1225 clc ; get z80 carry to avr carry
1226 sbrc z_flags,ZFL_C
1227 sec
1228 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
1229 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
1230 ror z_a
1231 ret
1232
1233 ;----------------------------------------------------------------
1234 ;|Mnemonic |SZHPNC|Description |Notes |
1235 ;----------------------------------------------------------------
1236 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
1237 ;|----------|SZHP C|---------- 8080 ----------------------------|
1238 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
1239 ;
1240 ;
1241 do_op_rla:
1242 ;Rotate Left. All bits move 1 to the left, the msb
1243 ;becomes c, c becomes lsb.
1244 clc
1245 sbrc z_flags,ZFL_C
1246 sec
1247 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
1248 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
1249 rol z_a
1250 ret
1251
1252 ;----------------------------------------------------------------
1253 ;|Mnemonic |SZHPNC|Description |Notes |
1254 ;----------------------------------------------------------------
1255 ;|ADD A,s |***V0*|Add |A=A+s |
1256 ;|----------|SZHP C|---------- 8080 ----------------------------|
1257 ;|ADD A,s |***P *|Add |A=A+s |
1258 ;
1259 ;
1260 do_op_adda:
1261 add z_a,opl
1262 in temp,sreg
1263 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
1264 bmov z_flags,ZFL_C, temp,AVR_C
1265 bmov z_flags,ZFL_H, temp,AVR_H
1266 do_z80_flags_V
1267 ret
1268
1269 ;----------------------------------------------------------------
1270 ;|Mnemonic |SZHPNC|Description |Notes |
1271 ;----------------------------------------------------------------
1272 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
1273 ;|----------|SZHP C|---------- 8080 ----------------------------|
1274 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
1275 ;
1276 ;
1277 do_op_adca:
1278 clc
1279 sbrc z_flags,ZFL_C
1280 sec
1281 adc z_a,opl
1282 in temp,sreg
1283 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1284 bmov z_flags,ZFL_C, temp,AVR_C
1285 bmov z_flags,ZFL_H, temp,AVR_H
1286 do_z80_flags_V
1287 ret
1288
1289 ;----------------------------------------------------------------
1290 ;|Mnemonic |SZHPNC|Description |Notes |
1291 ;----------------------------------------------------------------
1292 ;|SUB s |***V1*|Subtract |A=A-s |
1293 ;|----------|SZHP C|---------- 8080 ----------------------------|
1294 ;|SUB s |***P *|Subtract |A=A-s |
1295
1296 ;
1297 do_op_subfa:
1298 sub z_a,opl
1299 in temp,sreg
1300 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1301 bmov z_flags,ZFL_C, temp,AVR_C
1302 bmov z_flags,ZFL_H, temp,AVR_H
1303 do_z80_flags_V
1304 do_z80_flags_set_N
1305 ret
1306
1307 ;----------------------------------------------------------------
1308 ;|Mnemonic |SZHPNC|Description |Notes |
1309 ;----------------------------------------------------------------
1310 ;|CP s |***V1*|Compare |A-s |
1311 ;|----------|SZHP C|---------- 8080 ----------------------------|
1312 ;|CP s |***P *|Compare |A-s |
1313
1314 ;
1315 do_op_cpfa:
1316 mov temp2,z_a
1317 sub temp2,opl
1318 in temp,sreg
1319 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
1320 bmov z_flags,ZFL_C, temp,AVR_C
1321 bmov z_flags,ZFL_H, temp,AVR_H
1322 do_z80_flags_V
1323 do_z80_flags_set_N
1324 ret
1325
1326 ;----------------------------------------------------------------
1327 ;|Mnemonic |SZHPNC|Description |Notes |
1328 ;----------------------------------------------------------------
1329 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1330 ;|----------|SZHP C|---------- 8080 ----------------------------|
1331 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1332 ;
1333 ;
1334 do_op_sbcfa:
1335 clc
1336 sbrc z_flags,ZFL_C
1337 sec
1338 sbc z_a,opl
1339 in temp,sreg
1340 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1341 bmov z_flags,ZFL_C, temp,AVR_C
1342 bmov z_flags,ZFL_H, temp,AVR_H
1343 do_z80_flags_V
1344 do_z80_flags_set_N
1345 ret
1346
1347 ;----------------------------------------------------------------
1348 ;|Mnemonic |SZHPNC|Description |Notes |
1349 ;----------------------------------------------------------------
1350 ;|AND s |**1P00|Logical AND |A=A&s |
1351 ;|----------|SZHP C|---------- 8080 ----------------------------|
1352 ;|AND s |**-P 0|Logical AND |A=A&s |
1353 ;
1354 ;
1355 do_op_anda:
1356 and z_a,opl ;
1357 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1358 do_z80_flags_op_and
1359 ret
1360
1361
1362 ;----------------------------------------------------------------
1363 ;|Mnemonic |SZHPNC|Description |Notes |
1364 ;----------------------------------------------------------------
1365 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
1366 ;|----------|SZHP C|---------- 8080 ----------------------------|
1367 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
1368 ;
1369 ;
1370 do_op_ora:
1371 or z_a,opl
1372 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1373 do_z80_flags_op_or
1374 ret
1375
1376 ;----------------------------------------------------------------
1377 ;|Mnemonic |SZHPNC|Description |Notes |
1378 ;----------------------------------------------------------------
1379 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1380 ;|----------|SZHP C|---------- 8080 ----------------------------|
1381 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1382 ;
1383 ;
1384 do_op_xora:
1385 eor z_a,opl
1386 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1387 do_z80_flags_op_or
1388 ret
1389
1390 ;----------------------------------------------------------------
1391 ;|Mnemonic |SZHPNC|Description |Notes |
1392 ;----------------------------------------------------------------
1393 ;|ADD HL,ss |--*-0*|Add |HL=HL+ss |
1394 ;|----------|SZHP C|---------- 8080 ----------------------------|
1395 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1396 ;
1397 ;
1398 do_op_addhl:
1399 add z_l,opl
1400 adc z_h,oph
1401 in temp,sreg
1402 bmov z_flags,ZFL_C, temp,AVR_C
1403 do_z80_flags_H
1404 do_z80_flags_clear_N
1405 ret
1406
1407 ;----------------------------------------------------------------
1408 ;|Mnemonic |SZHPNC|Description |Notes |
1409 ;----------------------------------------------------------------
1410 ;|LD dst,src|------|Load |dst=src |
1411 ;
1412 ;
1413 do_op_sthl: ;store hl to mem loc in opl:h
1414 movw xl,opl
1415 mem_write_s z_l
1416 adiw xl,1
1417 mem_write_s z_h
1418 ret
1419
1420 ;----------------------------------------------------------------
1421 ;|Mnemonic |SZHPNC|Description |Notes |
1422 ;----------------------------------------------------------------
1423 ;|LD dst,src|------|Load |dst=src |
1424 ;
1425 ;
1426 do_op_rmem16:
1427 movw xl,opl
1428 mem_read_d opl
1429 adiw x,1
1430 mem_read_d oph
1431 ret
1432
1433 ;----------------------------------------------------------------
1434 ;|Mnemonic |SZHPNC|Description |Notes |
1435 ;----------------------------------------------------------------
1436 ;|LD dst,src|------|Load |dst=src |
1437 ;
1438 ;
1439 do_op_rmem8:
1440 mem_read_ds opl, op
1441 ret
1442
1443 ;----------------------------------------------------------------
1444 ;|Mnemonic |SZHPNC|Description |Notes |
1445 ;----------------------------------------------------------------
1446 ;|DAA |***P-*|Decimal Adjust Acc. | |
1447 ;|----------|SZHP C|---------- 8080 ----------------------------|
1448
1449
1450 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1451 ; This instruction conditionally adjusts the accumulator for BCD addition
1452 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1453 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1454 ;
1455 ; -------------------------------------------------------------------
1456 ; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1457 ; | Oper |Before |upper digit |Before |lower digit| added |After |
1458 ; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1459 ; |-------+-------+------------+-------+-----------+--------+-------|
1460 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1461 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1462 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1463 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1464 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1465 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1466 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1467 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1468 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1469 ; |-------+-------+------------+-------+-----------+--------+-------|
1470 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1471 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1472 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1473 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1474 ; -------------------------------------------------------------------
1475 ;
1476 ; The H flag is affected as follows:
1477 ;
1478 ; ---------------------
1479 ; | N | H | low |H' |
1480 ; | | |nibble | |
1481 ; |---+---+-------+---|
1482 ; | 0 | * | 0-9 | 0 |
1483 ; | 0 | * | a-f | 1 |
1484 ; | 1 | 0 | * | 0 |
1485 ; | 1 | 1 | 6-f | 0 |
1486 ; | 1 | 1 | 0-5 | 1 |
1487 ; ---------------------
1488 ;
1489 ; Ohter flags:
1490 ; N: Unaffected.
1491 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1492 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1493 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1494
1495
1496
1497 #if 0
1498
1499 #if EM_Z80
1500 sbrc z_flags,ZFL_N ;if add-op
1501 rjmp op_da_sub ;then
1502 #endif
1503
1504 do_op_DAA:
1505 op_da_add:
1506 ldi temp2,0 ; new C, H and N flag
1507 sbrc z_flags,ZFL_H ; |
1508 rjmp op_da_a01 ; if (H flag ...
1509 mov temp,opl ; |
1510 andi temp,0x0f ; |
1511 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1512 brlo op_da_a10 ; |
1513 op_da_a01: ; then
1514 ldi oph,0x06 ; add 6 to lower nibble
1515 add opl,oph ;
1516 brhc op_da_02 ; if
1517 ori temp2,(1<<ZFL_H) ; set new H flag
1518 op_da_02: ;
1519 brcc op_da_a10 ; if
1520 ori temp2,(1<<ZFL_C) ; set new H flag
1521 op_da_a10: ; endif
1522 sbrc z_flags,ZFL_C ; |
1523 rjmp op_da_a12 ; if (C flag ...
1524 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1525 brlo op_da_a13 ;
1526 op_da_a12: ;
1527 ldi oph,0x60 ; add 6 to lower nibble
1528 add opl,oph ;
1529 ori temp2,(1<<ZFL_C) ; set new C flag
1530 op_da_a13: ;
1531 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1532 or z_flags,temp2 ; merge new C and H flag
1533 ret
1534
1535 #if EM_Z80
1536
1537 op_da_sub: ;Else (sub-op)
1538 ldi temp2,(1<<ZFL_N) ; new C, H and N flag
1539 sbrc z_flags,ZFL_H ; |
1540 rjmp op_da_s01 ; if (H flag ...
1541 mov temp,opl ; |
1542 andi temp,0x0f ; |
1543 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1544 brlo op_da_s10 ; |
1545 op_da_s01: ; then
1546 ldi oph,0x06 ; add 6 to lower nibble
1547 sub opl,oph ;
1548 brhc PC+2 ; if
1549 ori temp2,(1<<ZFL_H) ; set new H flag
1550 brcc op_da_s10 ; if
1551 ori temp2,(1<<ZFL_C) ; set new C flag
1552 op_da_s10: ; endif
1553 sbrc z_flags,ZFL_C ; |
1554 rjmp op_da_s12 ; if (C flag ...
1555 cpi opl,0x90 ; |... or upper nibble >= 0xA0)
1556 brlo op_da_s13 ;
1557 op_da_s12: ;
1558 ldi oph,0x60 ; add 6 to lower nibble
1559 sub opl,oph ;
1560 ori temp2,(1<<ZFL_C) ; set new C flag
1561 op_da_s13: ;
1562 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1563 or z_flags,temp2 ; merge new C and H flag
1564 ret
1565
1566 #endif
1567
1568 #else
1569
1570 do_op_DAA:
1571 ldi oph,0 ;oph: what to add
1572
1573 #if EM_Z80
1574 sbrc z_flags,ZFL_N ;if add-op
1575 rjmp op_da_sub ;then
1576 #endif
1577
1578 op_da_add:
1579 ldi temp2,0 ; new C, H and N flag
1580 mov temp,opl ; |
1581 andi temp,0x0f ; |
1582 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1583 brlo op_da_a10 ; |
1584 ori oph,0x06 ; add 6
1585 ori temp2,(1<<ZFL_H) ; set new H flag
1586
1587 sbrc z_flags,ZFL_C ; |
1588 rjmp op_da_a02 ; if (C flag ...
1589 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1590 brlo op_da_a03 ; |
1591 op_da_a02:
1592 ori oph,0x60 ; add 0x60
1593 ori temp2,(1<<ZFL_C) ; set new C flag
1594 op_da_a03: ; endif
1595 rjmp op_da_ae
1596 op_da_a10: ; else (lower nibble is 0x09 or lower)
1597 sbrc z_flags,ZFL_C ; |
1598 rjmp op_da_a12 ; if (C flag ...
1599 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1600 brlo op_da_a13 ;
1601 op_da_a12:
1602 ori oph,0x60 ; add 0x60
1603 ori temp2,(1<<ZFL_C) ; set new C flag
1604 op_da_a13:
1605 sbrs z_flags,ZFL_H ; if (H flag)
1606 rjmp op_da_ae ; |
1607 ori oph,0x06 ; add 0x06
1608 mov temp,opl ; |
1609 andi temp,0x0f ; |
1610 cpi temp,0x06 ; if (lower nibble < 0x6)
1611 brsh op_da_ae ; |
1612 ; ori temp2,(1<<ZFL_H) ; set new H flag
1613 ; endif
1614 ; endif
1615 op_da_ae:
1616 add opl,oph
1617 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1618 or z_flags,temp2 ; merge new C and H flag
1619 ret
1620
1621 #if EM_Z80
1622
1623 op_da_sub: ;Else (sub-op)
1624 ldi temp2,(1<<ZFL_N) ; new C, H and N flag
1625 mov temp,opl ; |
1626 andi temp,0x0f ; |
1627 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1628 brlo op_da_s10 ; |
1629 ori oph,0x06 ; sub 6
1630
1631 sbrc z_flags,ZFL_C ; |
1632 rjmp op_da_s02 ; if (C flag ...
1633 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1634 brlo op_da_s03 ; |
1635 op_da_s02:
1636 ori oph,0x60 ; sub 0x60
1637 ori temp2,(1<<ZFL_C) ; set new C flag
1638 op_da_s03: ; endif
1639 rjmp op_da_se
1640 op_da_s10: ; else (lower nibble is 0x09 or lower)
1641 sbrc z_flags,ZFL_C ; |
1642 rjmp op_da_s12 ; if (C flag ...
1643 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1644 brlo op_da_s13 ;
1645 op_da_s12:
1646 ori oph,0x60 ; sub 0x60
1647 ori temp2,(1<<ZFL_C) ; set new C flag
1648 op_da_s13:
1649 sbrs z_flags,ZFL_H ; if (H flag)
1650 rjmp op_da_se ; |
1651 ori oph,0x06 ; sub 0x06
1652 mov temp,opl ; |
1653 andi temp,0x0f ; |
1654 cpi temp,0x06 ; if (lower nibble < 0x06)
1655 brcc op_da_se ; |
1656 ori temp2,(1<<ZFL_H) ; set new H flag
1657 ; endif
1658 ; endif
1659 op_da_se:
1660 sub opl,oph
1661 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1662 or z_flags,temp2 ; merge new C and H flag
1663 ret ;Endif
1664
1665 #endif /* EM_Z80 */
1666 #endif /* alternatives */
1667
1668
1669 ;----------------------------------------------------------------
1670 ;|Mnemonic |SZHPNC|Description |Notes |
1671 ;----------------------------------------------------------------
1672 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1673 ;|----------|SZHP C|---------- 8080 ----------------------------|
1674 ;
1675 ;
1676 do_op_scf:
1677 do_z80_flags_clear_HN
1678 ori z_flags,(1<<ZFL_C)
1679 ret
1680
1681 ;----------------------------------------------------------------
1682 ;|Mnemonic |SZHPNC|Description |Notes |
1683 ;----------------------------------------------------------------
1684 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
1685 ;|----------|SZHP C|---------- 8080 ----------------------------|
1686 ;|CCF |---- 1|Set Carry Flag |CY=1 |
1687 ;
1688 do_op_ccf:
1689 do_z80_flags_clear_N
1690 do_z80_flags_copy_HC
1691 ldi temp,(1<<ZFL_C)
1692 eor z_flags,temp
1693 ret
1694
1695 ;----------------------------------------------------------------
1696 ;|Mnemonic |SZHPNC|Description |Notes |
1697 ;----------------------------------------------------------------
1698 ;|CPL |--1-1-|Complement |A=~A |
1699 ;|----------|SZHP C|---------- 8080 ----------------------------|
1700 ;|CPL |---- -|Complement |A=~A |
1701 ;
1702 ;
1703 do_op_cpl:
1704 com z_a
1705 do_z80_flags_set_HN
1706 ret
1707
1708
1709 ;----------------------------------------------------------------
1710 ;|Mnemonic |SZHPNC|Description |Notes |
1711 ;----------------------------------------------------------------
1712 ;|PUSH xx |------|Push |-[SP]=xx |
1713 ;|PUSH qq |------|Push |-[SP]=qq |
1714 ;
1715 ;
1716 do_op_push16:
1717 movw xl,z_spl
1718 sbiw x,1
1719 mem_write_s oph
1720 sbiw x,1
1721 mem_write_s opl
1722 movw z_spl,xl
1723
1724 .if STACK_DBG
1725 printnewline
1726 printstring "Stack push "
1727 movw temp,opl
1728 rcall printhexw
1729 printstring ", SP is now "
1730 movw temp,z_spl
1731 rcall printhexw
1732 printstring ". "
1733 .endif
1734
1735 ret
1736
1737 ;----------------------------------------------------------------
1738 ;|Mnemonic |SZHPNC|Description |Notes |
1739 ;----------------------------------------------------------------
1740 ;|POP xx |------|Pop |xx=[SP]+ |
1741 ;|POP qq |------|Pop |qq=[SP]+ |
1742 ;
1743 ;
1744 do_op_pop16:
1745 movw x,z_spl
1746 mem_read_d opl
1747 adiw x,1
1748 mem_read_d oph
1749 adiw x,1
1750 movw z_spl,x
1751
1752 .if STACK_DBG
1753 printnewline
1754 printstring "Stack pop "
1755 movw temp,opl
1756 rcall printhexw
1757 printstring ", SP is now "
1758 movw temp,z_spl
1759 rcall printhexw
1760 printstring ". "
1761 .endif
1762 ret
1763
1764 ;----------------------------------------------------------------
1765 ;|Mnemonic |SZHPNC|Description |Notes |
1766 ;----------------------------------------------------------------
1767 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1768 ;|EX DE,HL |------|Exchange |DE<->HL |
1769 ;-----------------------------Z80--------------------------------
1770 ;
1771 do_op_exhl:
1772 movw temp,z_l
1773 movw z_l,opl
1774 movw opl,temp
1775 ret
1776
1777 ;----------------------------------------------------------------
1778 ;|Mnemonic |SZHPNC|Description |Notes |
1779 ;----------------------------------------------------------------
1780 ;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 |
1781 ;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 |
1782 ;
1783
1784 do_op_DI:
1785 #if EM_Z80
1786 ldd temp,y+oz_istat
1787 andi temp,~((1<<IFF2) | (1<<IFF1))
1788 std y+oz_istat,temp
1789 #endif
1790 ret
1791
1792 do_op_EI:
1793 #if EM_Z80
1794 ldd temp,y+oz_istat
1795 ori temp,(1<<IFF2) | (1<<IFF1)
1796 std y+oz_istat,temp
1797 #endif
1798 ret
1799
1800 ;----------------------------------------------------------------
1801 ;|Mnemonic |SZHPNC|Description |Notes |
1802 ;----------------------------------------------------------------
1803 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1804 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1805 ;|RET cc |------|Conditional Return |If cc RET |
1806 ;
1807 ;
1808 do_op_ifnz:
1809 sbrs z_flags, ZFL_Z
1810 ret
1811 pop temp ; nix tun
1812 pop temp ; direkt zurueck zu main
1813 ret
1814
1815 ;----------------------------------------------------------------
1816 ;|Mnemonic |SZHPNC|Description |Notes |
1817 ;----------------------------------------------------------------
1818 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1819 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1820 ;|RET cc |------|Conditional Return |If cc RET |
1821 ;
1822 ;
1823 do_op_ifz:
1824 sbrc z_flags, ZFL_Z
1825 ret
1826 pop temp ; nix tun
1827 pop temp ; direkt zurueck zu main
1828 ret
1829
1830 ;----------------------------------------------------------------
1831 ;|Mnemonic |SZHPNC|Description |Notes |
1832 ;----------------------------------------------------------------
1833 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1834 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1835 ;|RET cc |------|Conditional Return |If cc RET |
1836 ;
1837 ;
1838 do_op_ifnc:
1839 sbrs z_flags, ZFL_C
1840 ret
1841 pop temp ; nix tun
1842 pop temp ; direkt zuruech zu main
1843 ret
1844
1845 ;----------------------------------------------------------------
1846 ;|Mnemonic |SZHPNC|Description |Notes |
1847 ;----------------------------------------------------------------
1848 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1849 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1850 ;|RET cc |------|Conditional Return |If cc RET |
1851 ;
1852 ;
1853 do_op_ifc:
1854 sbrc z_flags, ZFL_C
1855 ret
1856 pop temp ; nix tun
1857 pop temp ; direkt zuruech zu main
1858 ret
1859
1860 ;----------------------------------------------------------------
1861 ;|Mnemonic |SZHPNC|Description |Notes |
1862 ;----------------------------------------------------------------
1863 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1864 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1865 ;|RET cc |------|Conditional Return |If cc RET |
1866 ;
1867 ;
1868 do_op_ifpo:
1869 sbrs z_flags, ZFL_P
1870 ret
1871 pop temp ; nix tun
1872 pop temp ; direkt zuruech zu main
1873 ret
1874
1875 ;----------------------------------------------------------------
1876 ;|Mnemonic |SZHPNC|Description |Notes |
1877 ;----------------------------------------------------------------
1878 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1879 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1880 ;|RET cc |------|Conditional Return |If cc RET |
1881 ;
1882 ;
1883 do_op_ifpe:
1884 sbrc z_flags, ZFL_P
1885 ret
1886 pop temp ; nix tun
1887 pop temp ; direkt zuruech zu main
1888 ret
1889
1890 ;----------------------------------------------------------------
1891 ;|Mnemonic |SZHPNC|Description |Notes |
1892 ;----------------------------------------------------------------
1893 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1894 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1895 ;|RET cc |------|Conditional Return |If cc RET |
1896 ;
1897 ;
1898 do_op_ifp: ;sign positive, aka s=0
1899 sbrs z_flags, ZFL_S
1900 ret
1901 pop temp ; nix tun
1902 pop temp ; direkt zuruech zu main
1903 ret
1904
1905 ;----------------------------------------------------------------
1906 ;|Mnemonic |SZHPNC|Description |Notes |
1907 ;----------------------------------------------------------------
1908 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1909 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1910 ;|RET cc |------|Conditional Return |If cc RET |
1911 ;
1912 ;
1913 do_op_ifm: ;sign negative, aka s=1
1914 sbrc z_flags, ZFL_S
1915 ret
1916 pop temp ; nix tun
1917 pop temp ; direkt zuruech zu main
1918 ret
1919
1920 ;----------------------------------------------------------------
1921
1922 #if EM_Z80
1923
1924 ;----------------------------------------------------------------
1925 ;|Mnemonic |SZHPNC|Description |Notes |
1926 ;----------------------------------------------------------------
1927 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
1928 ;
1929 ;The b register is decremented, and if not zero, the signed value e is added to pc.
1930 ;The jump is measured from the start of the instruction opcode.
1931 ;e = Relative addressing (PC=PC+2+offset)
1932
1933 #if 1
1934
1935 ; (Joe G.)
1936 do_op_DJNZ: ; decremt B, jump B=0
1937 dec z_b ; B decrementieren
1938 breq do_op_DJNZ_Z ; bei B=0
1939 subi opl, 0x80 ; z_pc + e im Zweierkomplement
1940 subi z_pcl,0x80
1941 sbc z_pch,_0
1942 add z_pcl,opl
1943 adc z_pch,_0
1944 do_op_DJNZ_Z:
1945 ret
1946
1947 #else
1948
1949 do_op_djnz:
1950 dec z_b
1951 brne opdjnze
1952 pop temp ; nix tun
1953 pop temp ; direkt zurueck zu main
1954 opdjnze:
1955 ret
1956
1957 #endif
1958
1959 ;----------------------------------------------------------------
1960 ;|Mnemonic |SZHPNC|Description |Notes |
1961 ;----------------------------------------------------------------
1962 ;|EX AF,AF' |------|Exchange |AF<->AF' |
1963
1964 do_op_EXAF:
1965 ldd temp,y+oz_f2
1966 ldd temp2,y+oz_a2
1967 std y+oz_f2,z_flags
1968 std y+oz_a2,z_a
1969 mov z_flags,temp
1970 mov z_a,temp2
1971 ret
1972
1973
1974 ;----------------------------------------------------------------
1975 ;|Mnemonic |SZHPNC|Description |Notes |
1976 ;----------------------------------------------------------------
1977 ;|EXX |------|Exchange |qq<->qq' (except AF)|
1978
1979
1980 #if 1
1981
1982 do_op_EXX:
1983 ldd temp ,y+oz_c2
1984 ldd temp2,y+oz_b2
1985 std y+oz_c2,z_c
1986 std y+oz_b2,z_b
1987 movw z_c,temp
1988
1989 ldd temp ,y+oz_e2
1990 ldd temp2,y+oz_d2
1991 std y+oz_e2,z_e
1992 std y+oz_d2,z_d
1993 movw z_e,temp
1994
1995 ldd temp ,y+oz_l2
1996 ldd temp2,y+oz_h2
1997 std y+oz_l2,z_l
1998 std y+oz_h2,z_h
1999 movw z_l,temp
2000 ret
2001 #else
2002
2003 do_op_EXX:
2004 ldiw z,z_b
2005 ldi temp3,6
2006 opexx_loop:
2007 ld temp,z
2008 ldd temp2,z+r2ofs
2009 std z+r2ofs,temp
2010 st z+,temp2
2011 dec temp3
2012 brne opexx_loop
2013 ret
2014
2015 #endif
2016
2017 #else
2018 do_op_djnz:
2019 do_op_EXAF:
2020 do_op_EXX:
2021 ljmp do_op_inv
2022 ret
2023 #endif
2024
2025 #if EM_Z80
2026
2027 do_op_prefixED:
2028 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
2029 adiw z_pcl,1 ;++z_pc
2030 ldi zh,high(EDjmp) ;
2031 ijmp
2032
2033
2034 do_op_prefixDD:
2035 cbi flags,prefixfd
2036 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
2037 adiw z_pcl,1 ;++z_pc
2038 ldi zh,high(DDFDjmp) ;
2039 ijmp
2040
2041
2042 do_op_prefixFD:
2043 sbi flags,prefixfd
2044 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
2045 adiw z_pcl,1 ;++z_pc
2046 ldi zh,high(DDFDjmp) ;
2047 ijmp
2048
2049 do_op_prefixCB:
2050 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
2051 adiw z_pcl,1 ;++z_pc
2052 ldi zh,high(CBjmp) ;
2053 ijmp
2054
2055
2056 do_op_prefixDDFDCB:
2057 sbic flags,prefixfd
2058 rjmp opprxcb_fd
2059 ldd xh,y+oz_xh
2060 ldd xl,y+oz_xl
2061 rjmp opprxcb_1
2062 opprxcb_fd:
2063 ldd xh,y+oz_yh
2064 ldd xl,y+oz_yl
2065 opprxcb_1:
2066 mem_read_s z_pc ;get displacement
2067 adiw z_pcl,1 ;++z_pc
2068 mov temp2,temp ;sign extend
2069 lsl temp2
2070 sbc temp2,temp2
2071 add xl,temp ;add displacement
2072 adc xh,temp2
2073 mem_read_d opl
2074
2075 mem_read_ds zl,z_pc ;zl = opcode
2076 adiw z_pcl,1 ;++z_pc
2077 ldi zh,high(DDFDCBjmp) ;
2078 icall
2079 mem_write_s opl
2080 ret
2081
2082
2083 #else ; TODO: geht das so?
2084
2085 do_op_prefixED:
2086 do_op_prefixDD:
2087 do_op_prefixFD:
2088 do_op_prefixCB:
2089 ljmp do_op_inv
2090 ret
2091 #endif
2092
2093
2094
2095 ; ----------------------- Opcode decoding -------------------------
2096
2097 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
2098 ; operations: fetch, do something, store.
2099 ; The table is made of 256 words.
2100
2101 opctable opcjmp, PC ;+3*256
2102
2103 instr fetch_nop, op_nop, store_nop ;00 ;NOP
2104 instr fetch_DIR16, op_nop, store_BC ;01 nn nn ;LD BC,nn
2105 instr fetch_nop, op_nop, store_MBC ;02 ;LD (BC),A
2106 ;instr fetch_BC, op_INC16, store_BC ;03 ;INC BC
2107 instr fetch_nop, op_INCBC, store_nop ;03 ;INC BC
2108 instr fetch_B, op_INC, store_B ;04 ;INC B
2109 instr fetch_B, op_DEC, store_B ;05 ;DEC B
2110 instr fetch_DIR8, op_nop, store_B ;06 ;LD B,n
2111 instr fetch_nop, op_RLCA, store_nop ;07 ;RLCA
2112 instr fetch_nop, op_EXAF, store_nop ;08 ;EX AF,AF'
2113 instr fetch_BC, op_ADDHL, store_nop ;09 ;ADD HL,BC
2114 instr fetch_MBC, op_nop, store_nop ;0A ;LD A,(BC)
2115 ;instr fetch_BC, op_DEC16, store_BC ;0B ;DEC BC
2116 instr fetch_nop, op_DECBC, store_nop ;0B ;DEC BC
2117 instr fetch_C, op_INC, store_C ;0C ;INC C
2118 instr fetch_C, op_DEC, store_C ;0D ;DEC C
2119 instr fetch_DIR8, op_nop, store_C ;0E nn ;LD C,n
2120 instr fetch_nop, op_RRCA, store_nop ;0F ;RRCA
2121 instr fetch_DIR8, op_DJNZ, store_nop ;10 oo ;DJNZ o
2122 instr fetch_DIR16, op_nop, store_DE ;11 nn nn ;LD DE,nn
2123 instr fetch_nop, op_nop, store_MDE ;12 ;LD (DE),A
2124 ;instr fetch_DE, op_INC16, store_DE ;13 ;INC DE
2125 instr fetch_nop, op_INCDE, store_nop ;13 ;INC DE
2126 instr fetch_D, op_INC, store_D ;14 ;INC D
2127 instr fetch_D, op_DEC, store_D ;15 ;DEC D
2128 instr fetch_DIR8, op_nop, store_D ;16 nn ;LD D,n
2129 instr fetch_nop, op_RLA, store_nop ;17 ;RLA
2130 instr fetch_DIR8, op_nop, store_pcrel ;18 oo ;JR o
2131 instr fetch_DE, op_ADDHL, store_nop ;19 ;ADD HL,DE
2132 instr fetch_MDE, op_nop, store_nop ;1A ;LD A,(DE)
2133 ;instr fetch_DE, op_DEC16, store_DE ;1B ;DEC DE
2134 instr fetch_nop, op_DECDE, store_nop ;1B ;DEC DE
2135 instr fetch_E, op_INC, store_E ;1C ;INC E
2136 instr fetch_E, op_DEC, store_E ;1D ;DEC E
2137 instr fetch_DIR8, op_nop, store_E ;1E nn ;LD E,n
2138 instr fetch_nop, op_RRA, store_nop ;1F ;RRA
2139 instr fetch_DIR8, op_IFNZ, store_pcrel ;20 oo ;JR NZ,o
2140 instr fetch_DIR16, op_nop, store_HL ;21 nn nn ;LD HL,nn
2141 instr fetch_DIR16, op_STHL, store_nop ;22 nn nn ;LD (nn),HL
2142 ;instr fetch_HL, op_INC16, store_HL ;23 ;INC HL
2143 instr fetch_nop, op_INCHL, store_nop ;23 ;INC HL
2144 instr fetch_H, op_INC, store_H ;24 ;INC H
2145 instr fetch_H, op_DEC, store_H ;25 ;DEC H
2146 instr fetch_DIR8, op_nop, store_H ;26 nn ;LD H,n
2147 instr fetch_A, op_DAA, store_A ;27 ;DAA
2148 instr fetch_DIR8, op_IFZ, store_pcrel ;28 oo ;JR Z,o
2149 instr fetch_HL, op_ADDHL, store_nop ;29 ;ADD HL,HL
2150 instr fetch_DIR16, op_RMEM16, store_HL ;2A nn nn ;LD HL,(nn)
2151 ;instr fetch_HL, op_DEC16, store_HL ;2B ;DEC HL
2152 instr fetch_nop, op_DECHL, store_nop ;2B ;DEC HL
2153 instr fetch_L, op_INC, store_L ;2C ;INC L
2154 instr fetch_L, op_DEC, store_L ;2D ;DEC L
2155 instr fetch_DIR8, op_nop, store_L ;2E nn ;LD L,n
2156 instr fetch_nop, op_CPL, store_nop ;2F ;CPL
2157 instr fetch_DIR8, op_IFNC, store_pcrel ;30 oo ;JR NC,o
2158 instr fetch_DIR16, op_nop, store_SP ;31 nn nn ;LD SP,nn
2159 instr fetch_DIR16, op_nop, store_AM ;32 nn nn ;LD (nn),A
2160 instr fetch_SP, op_INC16, store_SP ;33 ;INC SP
2161 instr fetch_MHL, op_INC, store_MHL ;34 ;INC (HL)
2162 instr fetch_MHL, op_DEC, store_MHL ;35 ;DEC (HL)
2163 instr fetch_DIR8, op_nop, store_MHL ;36 nn ;LD (HL),n
2164 instr fetch_nop, op_SCF, store_nop ;37 ;SCF
2165 instr fetch_DIR8, op_IFC, store_pcrel ;38 oo ;JR C,o
2166 instr fetch_SP, op_ADDHL, store_nop ;39 ;ADD HL,SP
2167 instr fetch_DIR16, op_RMEM8, store_A ;3A nn nn ;LD A,(nn)
2168 instr fetch_SP, op_DEC16, store_SP ;3B ;DEC SP
2169 instr fetch_nop, op_INCA, store_nop ;3C ;INC A
2170 instr fetch_nop, op_DECA, store_nop ;3D ;DEC A
2171 instr fetch_DIR8, op_nop, store_A ;3E nn ;LD A,n
2172 instr fetch_nop, op_CCF, store_nop ;3F ;CCF (Complement Carry Flag, gvd)
2173 instr fetch_nop, op_nop, store_nop ;40 ;LD B,B
2174 instr fetch_C, op_nop, store_B ;41 ;LD B,C
2175 instr fetch_D, op_nop, store_B ;42 ;LD B,D
2176 instr fetch_E, op_nop, store_B ;43 ;LD B,E
2177 instr fetch_H, op_nop, store_B ;44 ;LD B,H
2178 instr fetch_L, op_nop, store_B ;45 ;LD B,L
2179 instr fetch_MHL, op_nop, store_B ;46 ;LD B,(HL)
2180 instr fetch_A, op_nop, store_B ;47 ;LD B,A
2181 instr fetch_B, op_nop, store_C ;48 ;LD C,B
2182 instr fetch_nop, op_nop, store_nop ;49 ;LD C,C
2183 instr fetch_D, op_nop, store_C ;4A ;LD C,D
2184 instr fetch_E, op_nop, store_C ;4B ;LD C,E
2185 instr fetch_H, op_nop, store_C ;4C ;LD C,H
2186 instr fetch_L, op_nop, store_C ;4D ;LD C,L
2187 instr fetch_MHL, op_nop, store_C ;4E ;LD C,(HL)
2188 instr fetch_A, op_nop, store_C ;4F ;LD C,A
2189 instr fetch_B, op_nop, store_D ;50 ;LD D,B
2190 instr fetch_C, op_nop, store_D ;51 ;LD D,C
2191 instr fetch_nop, op_nop, store_nop ;52 ;LD D,D
2192 instr fetch_E, op_nop, store_D ;53 ;LD D,E
2193 instr fetch_H, op_nop, store_D ;54 ;LD D,H
2194 instr fetch_L, op_nop, store_D ;55 ;LD D,L
2195 instr fetch_MHL, op_nop, store_D ;56 ;LD D,(HL)
2196 instr fetch_A, op_nop, store_D ;57 ;LD D,A
2197 instr fetch_B, op_nop, store_E ;58 ;LD E,B
2198 instr fetch_C, op_nop, store_E ;59 ;LD E,C
2199 instr fetch_D, op_nop, store_E ;5A ;LD E,D
2200 instr fetch_nop, op_nop, store_nop ;5B ;LD E,E
2201 instr fetch_H, op_nop, store_E ;5C ;LD E,H
2202 instr fetch_L, op_nop, store_E ;5D ;LD E,L
2203 instr fetch_MHL, op_nop, store_E ;5E ;LD E,(HL)
2204 instr fetch_A, op_nop, store_E ;5F ;LD E,A
2205 instr fetch_B, op_nop, store_H ;60 ;LD H,B
2206 instr fetch_C, op_nop, store_H ;61 ;LD H,C
2207 instr fetch_D, op_nop, store_H ;62 ;LD H,D
2208 instr fetch_E, op_nop, store_H ;63 ;LD H,E
2209 instr fetch_nop, op_nop, store_nop ;64 ;LD H,H
2210 instr fetch_L, op_nop, store_H ;65 ;LD H,L
2211 instr fetch_MHL, op_nop, store_H ;66 ;LD H,(HL)
2212 instr fetch_A, op_nop, store_H ;67 ;LD H,A
2213 instr fetch_B, op_nop, store_L ;68 ;LD L,B
2214 instr fetch_C, op_nop, store_L ;69 ;LD L,C
2215 instr fetch_D, op_nop, store_L ;6A ;LD L,D
2216 instr fetch_E, op_nop, store_L ;6B ;LD L,E
2217 instr fetch_H, op_nop, store_L ;6C ;LD L,H
2218 instr fetch_nop, op_nop, store_nop ;6D ;LD L,L
2219 instr fetch_MHL, op_nop, store_L ;6E ;LD L,(HL)
2220 instr fetch_A, op_nop, store_L ;6F ;LD L,A
2221 instr fetch_B, op_nop, store_MHL ;70 ;LD (HL),B
2222 instr fetch_C, op_nop, store_MHL ;71 ;LD (HL),C
2223 instr fetch_D, op_nop, store_MHL ;72 ;LD (HL),D
2224 instr fetch_E, op_nop, store_MHL ;73 ;LD (HL),E
2225 instr fetch_H, op_nop, store_MHL ;74 ;LD (HL),H
2226 instr fetch_L, op_nop, store_MHL ;75 ;LD (HL),L
2227 instr fetch_nop, op_HALT, store_nop ;76 ;HALT
2228 instr fetch_A, op_nop, store_MHL ;77 ;LD (HL),A
2229 instr fetch_B, op_nop, store_A ;78 ;LD A,B
2230 instr fetch_C, op_nop, store_A ;79 ;LD A,C
2231 instr fetch_D, op_nop, store_A ;7A ;LD A,D
2232 instr fetch_E, op_nop, store_A ;7B ;LD A,E
2233 instr fetch_H, op_nop, store_A ;7C ;LD A,H
2234 instr fetch_L, op_nop, store_A ;7D ;LD A,L
2235 instr fetch_MHL, op_nop, store_A ;7E ;LD A,(HL)
2236 instr fetch_nop, op_nop, store_nop ;7F ;LD A,A
2237 instr fetch_B, op_ADDA, store_nop ;80 ;ADD A,B
2238 instr fetch_C, op_ADDA, store_nop ;81 ;ADD A,C
2239 instr fetch_D, op_ADDA, store_nop ;82 ;ADD A,D
2240 instr fetch_E, op_ADDA, store_nop ;83 ;ADD A,E
2241 instr fetch_H, op_ADDA, store_nop ;84 ;ADD A,H
2242 instr fetch_L, op_ADDA, store_nop ;85 ;ADD A,L
2243 instr fetch_MHL, op_ADDA, store_nop ;86 ;ADD A,(HL)
2244 instr fetch_A, op_ADDA, store_nop ;87 ;ADD A,A
2245 instr fetch_B, op_ADCA, store_nop ;88 ;ADC A,B
2246 instr fetch_C, op_ADCA, store_nop ;89 ;ADC A,C
2247 instr fetch_D, op_ADCA, store_nop ;8A ;ADC A,D
2248 instr fetch_E, op_ADCA, store_nop ;8B ;ADC A,E
2249 instr fetch_H, op_ADCA, store_nop ;8C ;ADC A,H
2250 instr fetch_L, op_ADCA, store_nop ;8D ;ADC A,L
2251 instr fetch_MHL, op_ADCA, store_nop ;8E ;ADC A,(HL)
2252 instr fetch_A, op_ADCA, store_nop ;8F ;ADC A,A
2253 instr fetch_B, op_SUBFA, store_nop ;90 ;SUB A,B
2254 instr fetch_C, op_SUBFA, store_nop ;91 ;SUB A,C
2255 instr fetch_D, op_SUBFA, store_nop ;92 ;SUB A,D
2256 instr fetch_E, op_SUBFA, store_nop ;93 ;SUB A,E
2257 instr fetch_H, op_SUBFA, store_nop ;94 ;SUB A,H
2258 instr fetch_L, op_SUBFA, store_nop ;95 ;SUB A,L
2259 instr fetch_MHL, op_SUBFA, store_nop ;96 ;SUB A,(HL)
2260 instr fetch_A, op_SUBFA, store_nop ;97 ;SUB A,A
2261 instr fetch_B, op_SBCFA, store_nop ;98 ;SBC A,B
2262 instr fetch_C, op_SBCFA, store_nop ;99 ;SBC A,C
2263 instr fetch_D, op_SBCFA, store_nop ;9A ;SBC A,D
2264 instr fetch_E, op_SBCFA, store_nop ;9B ;SBC A,E
2265 instr fetch_H, op_SBCFA, store_nop ;9C ;SBC A,H
2266 instr fetch_L, op_SBCFA, store_nop ;9D ;SBC A,L
2267 instr fetch_MHL, op_SBCFA, store_nop ;9E ;SBC A,(HL)
2268 instr fetch_A, op_SBCFA, store_nop ;9F ;SBC A,A
2269 instr fetch_B, op_ANDA, store_nop ;A0 ;AND A,B
2270 instr fetch_C, op_ANDA, store_nop ;A1 ;AND A,C
2271 instr fetch_D, op_ANDA, store_nop ;A2 ;AND A,D
2272 instr fetch_E, op_ANDA, store_nop ;A3 ;AND A,E
2273 instr fetch_H, op_ANDA, store_nop ;A4 ;AND A,H
2274 instr fetch_L, op_ANDA, store_nop ;A5 ;AND A,L
2275 instr fetch_MHL, op_ANDA, store_nop ;A6 ;AND A,(HL)
2276 instr fetch_A, op_ANDA, store_nop ;A7 ;AND A,A
2277 instr fetch_B, op_XORA, store_nop ;A8 ;XOR A,B
2278 instr fetch_C, op_XORA, store_nop ;A9 ;XOR A,C
2279 instr fetch_D, op_XORA, store_nop ;AA ;XOR A,D
2280 instr fetch_E, op_XORA, store_nop ;AB ;XOR A,E
2281 instr fetch_H, op_XORA, store_nop ;AC ;XOR A,H
2282 instr fetch_L, op_XORA, store_nop ;AD ;XOR A,L
2283 instr fetch_MHL, op_XORA, store_nop ;AE ;XOR A,(HL)
2284 instr fetch_A, op_XORA, store_nop ;AF ;XOR A,A
2285 instr fetch_B, op_ORA, store_nop ;B0 ;OR A,B
2286 instr fetch_C, op_ORA, store_nop ;B1 ;OR A,C
2287 instr fetch_D, op_ORA, store_nop ;B2 ;OR A,D
2288 instr fetch_E, op_ORA, store_nop ;B3 ;OR A,E
2289 instr fetch_H, op_ORA, store_nop ;B4 ;OR A,H
2290 instr fetch_L, op_ORA, store_nop ;B5 ;OR A,L
2291 instr fetch_MHL, op_ORA, store_nop ;B6 ;OR A,(HL)
2292 instr fetch_A, op_ORA, store_nop ;B7 ;OR A,A
2293 instr fetch_B, op_CPFA, store_nop ;B8 ;CP A,B
2294 instr fetch_C, op_CPFA, store_nop ;B9 ;CP A,C
2295 instr fetch_D, op_CPFA, store_nop ;BA ;CP A,D
2296 instr fetch_E, op_CPFA, store_nop ;BB ;CP A,E
2297 instr fetch_H, op_CPFA, store_nop ;BC ;CP A,H
2298 instr fetch_L, op_CPFA, store_nop ;BD ;CP A,L
2299 instr fetch_MHL, op_CPFA, store_nop ;BE ;CP A,(HL)
2300 instr fetch_A, op_CPFA, store_nop ;BF ;CP A,A
2301 instr fetch_nop, op_IFNZ, store_RET ;C0 ;RET NZ
2302 instr fetch_nop, op_POP16, store_BC ;C1 ;POP BC
2303 instr fetch_DIR16, op_IFNZ, store_PC ;C2 nn nn ;JP NZ,nn
2304 instr fetch_DIR16, op_nop, store_PC ;C3 nn nn ;JP nn
2305 instr fetch_DIR16, op_IFNZ, store_CALL ;C4 nn nn ;CALL NZ,nn
2306 instr fetch_BC, op_PUSH16, store_nop ;C5 ;PUSH BC
2307 instr fetch_DIR8, op_ADDA, store_nop ;C6 nn ;ADD A,n
2308 instr fetch_RST, op_nop, store_CALL ;C7 ;RST 0
2309 instr fetch_nop, op_IFZ, store_RET ;C8 ;RET Z
2310 instr fetch_nop, op_nop, store_RET ;C9 ;RET
2311 instr fetch_DIR16, op_IFZ, store_PC ;CA nn nn ;JP Z,nn
2312 instr fetch_nop, op_prefixCB, store_nop ;CB ;(CB opcode prefix)
2313 instr fetch_DIR16, op_IFZ, store_CALL ;CC nn nn ;CALL Z,nn
2314 instr fetch_DIR16, op_nop, store_CALL ;CD nn nn ;CALL nn
2315 instr fetch_DIR8, op_ADCA, store_nop ;CE nn ;ADC A,n
2316 instr fetch_RST, op_nop, store_CALL ;CF ;RST 8H
2317 instr fetch_nop, op_IFNC, store_RET ;D0 ;RET NC
2318 instr fetch_nop, op_POP16, store_DE ;D1 ;POP DE
2319 instr fetch_DIR16, op_IFNC, store_PC ;D2 nn nn ;JP NC,nn
2320 instr fetch_DIR8, op_OUTA, store_nop ;D3 nn ;OUT (n),A
2321 instr fetch_DIR16, op_IFNC, store_CALL ;D4 nn nn ;CALL NC,nn
2322 instr fetch_DE, op_PUSH16, store_nop ;D5 ;PUSH DE
2323 instr fetch_DIR8, op_SUBFA, store_nop ;D6 nn ;SUB n
2324 instr fetch_RST, op_nop, store_CALL ;D7 ;RST 10H
2325 instr fetch_nop, op_IFC, store_RET ;D8 ;RET C
2326 instr fetch_nop, op_EXX, store_nop ;D9 ;EXX
2327 instr fetch_DIR16, op_IFC, store_PC ;DA nn nn ;JP C,nn
2328 instr fetch_DIR8, op_INA, store_nop ;DB nn ;IN A,(n)
2329 instr fetch_DIR16, op_IFC, store_CALL ;DC nn nn ;CALL C,nn
2330 instr fetch_nop, op_prefixDD, store_nop ;DD ;(DD opcode prefix)
2331 instr fetch_DIR8, op_SBCFA, store_nop ;DE nn ;SBC A,n
2332 instr fetch_RST, op_nop, store_CALL ;DF ;RST 18H
2333 instr fetch_nop, op_IFPO, store_RET ;E0 ;RET PO
2334 instr fetch_nop, op_POP16, store_HL ;E1 ;POP HL
2335 instr fetch_DIR16, op_IFPO, store_PC ;E2 nn nn ;JP PO,nn
2336 instr fetch_MSP, op_EXHL, store_MSP ;E3 ;EX (SP),HL
2337 instr fetch_DIR16, op_IFPO, store_CALL ;E4 nn nn ;CALL PO,nn
2338 instr fetch_HL, op_PUSH16, store_nop ;E5 ;PUSH HL
2339 instr fetch_DIR8, op_ANDA, store_nop ;E6 nn ;AND n
2340 instr fetch_RST, op_nop, store_CALL ;E7 ;RST 20H
2341 instr fetch_nop, op_IFPE, store_RET ;E8 ;RET PE
2342 instr fetch_HL, op_nop, store_PC ;E9 ;JP HL
2343 instr fetch_DIR16, op_IFPE, store_PC ;EA nn nn ;JP PE,nn
2344 instr fetch_DE, op_EXHL, store_DE ;EB ;EX DE,HL
2345 instr fetch_DIR16, op_IFPE, store_CALL ;EC nn nn ;CALL PE,nn
2346 instr fetch_nop, op_prefixED, store_nop ;ED ;(ED opcode prefix)
2347 instr fetch_DIR8, op_XORA, store_nop ;EE nn ;XOR n
2348 instr fetch_RST, op_nop, store_CALL ;EF ;RST 28H
2349 instr fetch_nop, op_IFP, store_RET ;F0 ;RET P
2350 instr fetch_nop, op_POP16, store_AF ;F1 ;POP AF
2351 instr fetch_DIR16, op_IFP, store_PC ;F2 nn nn ;JP P,nn
2352 instr fetch_nop, op_DI, store_nop ;F3 ;DI
2353 instr fetch_DIR16, op_IFP, store_CALL ;F4 nn nn ;CALL P,nn
2354 instr fetch_AF, op_PUSH16, store_nop ;F5 ;PUSH AF
2355 instr fetch_DIR8, op_ORA, store_nop ;F6 nn ;OR n
2356 instr fetch_RST, op_nop, store_CALL ;F7 ;RST 30H
2357 instr fetch_nop, op_IFM, store_RET ;F8 ;RET M
2358 instr fetch_HL, op_nop, store_SP ;F9 ;LD SP,HL
2359 instr fetch_DIR16, op_IFM, store_PC ;FA nn nn ;JP M,nn
2360 instr fetch_nop, op_EI, store_nop ;FB ;EI
2361 instr fetch_DIR16, op_IFM, store_CALL ;FC nn nn ;CALL M,nn
2362 instr fetch_nop, op_prefixFD, store_nop ;FD ;(FD opcode prefix)
2363 instr fetch_DIR8, op_CPFA, store_nop ;FE nn ;CP n
2364 instr fetch_RST, op_nop, store_CALL ;FF ;RST 38H
2365
2366
2367 #if EM_Z80
2368
2369
2370
2371 checkspace PC, 2
2372
2373 do_op_noni:
2374 sbiw z_pcl,1 ;--z_pc
2375 ret
2376
2377 checkspace PC, 16
2378
2379 do_fetch_dir8_2:
2380 movw xl,z_pcl
2381 adiw xl,1
2382 mem_read_d opl
2383 ret
2384
2385 checkspace PC, 5
2386
2387 do_fetch_xh:
2388 sbis flags,prefixfd
2389 ldd opl,y+oz_xh
2390 sbic flags,prefixfd
2391 ldd opl,y+oz_yh
2392 ret
2393
2394 checkspace PC, 5
2395
2396 do_fetch_xl:
2397 sbis flags,prefixfd
2398 ldd opl,y+oz_xl
2399 sbic flags,prefixfd
2400 ldd opl,y+oz_yl
2401 ret
2402
2403
2404 checkspace PC, 41
2405
2406 do_fetch_mxx:
2407 sbic flags,prefixfd
2408 rjmp fetchmxx_fd
2409 ldd xh,y+oz_xh
2410 ldd xl,y+oz_xl
2411 rjmp fetchmxx1
2412 fetchmxx_fd:
2413 ldd xh,y+oz_yh
2414 ldd xl,y+oz_yl
2415 fetchmxx1:
2416 mem_read_ds opl, z_pc ;get displacement
2417 adiw z_pcl,1
2418 mov oph,opl ;sign extend
2419 lsl oph
2420 sbc oph,oph
2421 add xl,opl ;add displacement
2422 adc xh,oph
2423 mem_read_d opl ;get operand
2424 ret ;(Ix+d) still in xl,xh
2425
2426
2427 checkspace PC, 8
2428
2429 do_fetch_xx:
2430 sbic flags,prefixfd
2431 rjmp fetchxx_fd
2432 ldd opl,y+oz_xl
2433 ldd oph,y+oz_xh
2434 ret
2435 fetchxx_fd:
2436 ldd opl,y+oz_yl
2437 ldd oph,y+oz_yh
2438 ret
2439
2440 checkspace PC, 5
2441
2442 do_store_xh:
2443 sbis flags,prefixfd
2444 std y+oz_xh,opl
2445 sbic flags,prefixfd
2446 std y+oz_yh,opl
2447 ret
2448
2449 checkspace PC, 5
2450
2451 do_store_xl:
2452 sbis flags,prefixfd
2453 std y+oz_xl,opl
2454 sbic flags,prefixfd
2455 std y+oz_yl,opl
2456 ret
2457
2458 checkspace PC, 37
2459
2460 do_store_mxx:
2461 sbic flags,prefixfd
2462 rjmp storemxx_fd
2463 ldd xh,y+oz_xh
2464 ldd xl,y+oz_xl
2465 rjmp storemxx1
2466 storemxx_fd:
2467 ldd xh,y+oz_yh
2468 ldd xl,y+oz_yl
2469 storemxx1:
2470 mem_read_s z_pc ;get displacement
2471 adiw z_pcl,1
2472 mov temp2,temp ;sign extend
2473 lsl temp2
2474 sbc temp2,temp2
2475 add xl,temp ;add displacement
2476 adc xh,temp2
2477 mem_write_s opl ;store operand
2478 ret
2479
2480 checkspace PC, 10
2481
2482 do_store_mxx_0:
2483 mem_write_s opl ;store operand
2484 ret
2485
2486 checkspace PC, 38
2487
2488 do_store_mxx_2:
2489 sbic flags,prefixfd
2490 rjmp storemxx2_fd
2491 ldd xh,y+oz_xh
2492 ldd xl,y+oz_xl
2493 rjmp storemxx21
2494 storemxx2_fd:
2495 ldd xh,y+oz_yh
2496 ldd xl,y+oz_yl
2497 storemxx21:
2498 mem_read_s z_pc ;get displacement
2499 adiw z_pcl,1
2500 adiw z_pcl,1
2501 mov temp2,temp ;sign extend
2502 lsl temp2
2503 sbc temp2,temp2
2504 add xl,temp ;add displacement
2505 adc xh,temp2
2506 mem_write_s opl ;store operand
2507 ret
2508
2509 checkspace PC, 8
2510
2511 do_store_xx:
2512 sbic flags,prefixfd
2513 rjmp storexx_fd
2514 std y+oz_xl,opl
2515 std y+oz_xh,oph
2516 ret
2517 storexx_fd:
2518 std y+oz_yl,opl
2519 std y+oz_yh,oph
2520 ret
2521
2522 ;----------------------------------------------------------------
2523 ;|Mnemonic |SZHPNC|Description |Notes |
2524 ;----------------------------------------------------------------
2525 ;|LD dst,src|------|Load |dst=src |
2526 ;
2527
2528 checkspace PC, 30
2529
2530 do_op_stxx: ;store xx to mem loc in opl:h
2531
2532 movw xl,opl
2533 sbis flags,prefixfd
2534 ldd temp,y+oz_xl
2535 sbic flags,prefixfd
2536 ldd temp,y+oz_yl
2537 mem_write
2538 adiw xl,1
2539 sbis flags,prefixfd
2540 ldd temp,y+oz_xh
2541 sbic flags,prefixfd
2542 ldd temp,y+oz_yh
2543 mem_write
2544 ret
2545
2546
2547 ;----------------------------------------------------------------
2548 ;|Mnemonic |SZHPNC|Description |Notes |
2549 ;----------------------------------------------------------------
2550 ;|EX [SP],IX|------|Exchange |[SP]<->IX |
2551 ;|EX [SP],IY|------|Exchange |[SP]<->IY |
2552 ;
2553 checkspace PC, 13
2554
2555 do_op_EXxx:
2556 sbic flags,prefixfd
2557 rjmp opexxx_fd
2558 ldd temp,y+oz_xl
2559 ldd temp2,y+oz_xh
2560 std y+oz_xl,opl
2561 std y+oz_xh,oph
2562 rjmp opexxxe
2563 opexxx_fd:
2564 ldd temp,y+oz_yl
2565 ldd temp2,y+oz_yh
2566 std y+oz_yl,opl
2567 std y+oz_yh,oph
2568 opexxxe:
2569 movw opl,temp
2570 ret
2571
2572 ;----------------------------------------------------------------
2573 ;|Mnemonic |SZHPNC|Description |Notes |
2574 ;----------------------------------------------------------------
2575 ;|ADD IX,pp |--*-0*|Add |IX=IX+pp |
2576 ;|ADD IY,rr |--*-0*|Add |IY=IY+rr |
2577 ;
2578
2579 checkspace PC, 25
2580
2581 do_op_addxx:
2582 sbic flags,prefixfd
2583 rjmp opadx_fd
2584 ldd temp,y+oz_xl
2585 ldd temp2,y+oz_xh
2586 add opl,temp
2587 adc oph,temp2
2588 std y+oz_xl,opl
2589 std y+oz_xh,oph
2590 rjmp opadx_e
2591 opadx_fd:
2592 ldd temp,y+oz_yl
2593 ldd temp2,y+oz_yh
2594 add opl,temp
2595 adc oph,temp2
2596 std y+oz_yl,opl
2597 std y+oz_yh,oph
2598 opadx_e:
2599 in temp,sreg
2600 bmov z_flags,ZFL_C, temp,AVR_C
2601 do_z80_flags_H
2602 do_z80_flags_clear_N
2603 ret
2604
2605
2606 opctable DDFDjmp, PC ;+256
2607
2608 instr fetch_nop, op_noni, store_nop ;00 ;
2609 instr fetch_nop, op_noni, store_nop ;01 ;
2610 instr fetch_nop, op_noni, store_nop ;02 ;
2611 instr fetch_nop, op_noni, store_nop ;03 ;
2612 instr fetch_nop, op_noni, store_nop ;04 ;
2613 instr fetch_nop, op_noni, store_nop ;05 ;
2614 instr fetch_nop, op_noni, store_nop ;06 ;
2615 instr fetch_nop, op_noni, store_nop ;07 ;
2616 instr fetch_nop, op_noni, store_nop ;08 ;
2617 instr fetch_BC, op_ADDxx, store_nop ;09 ;ADD xx,BC
2618 instr fetch_nop, op_noni, store_nop ;0A ;
2619 instr fetch_nop, op_noni, store_nop ;0B ;
2620 instr fetch_nop, op_noni, store_nop ;0C ;
2621 instr fetch_nop, op_noni, store_nop ;0D ;
2622 instr fetch_nop, op_noni, store_nop ;0E ;
2623 instr fetch_nop, op_noni, store_nop ;0F ;
2624 instr fetch_nop, op_noni, store_nop ;10 ;
2625 instr fetch_nop, op_noni, store_nop ;11 ;
2626 instr fetch_nop, op_noni, store_nop ;12 ;
2627 instr fetch_nop, op_noni, store_nop ;13 ;
2628 instr fetch_nop, op_noni, store_nop ;14 ;
2629 instr fetch_nop, op_noni, store_nop ;15 ;
2630 instr fetch_nop, op_noni, store_nop ;16 ;
2631 instr fetch_nop, op_noni, store_nop ;17 ;
2632 instr fetch_nop, op_noni, store_nop ;18 ;
2633 instr fetch_DE, op_ADDxx, store_nop ;19 ;ADD xx,DE
2634 instr fetch_nop, op_noni, store_nop ;1A ;
2635 instr fetch_nop, op_noni, store_nop ;1B ;
2636 instr fetch_nop, op_noni, store_nop ;1C ;
2637 instr fetch_nop, op_noni, store_nop ;1D ;
2638 instr fetch_nop, op_noni, store_nop ;1E ;
2639 instr fetch_nop, op_noni, store_nop ;1F ;
2640 instr fetch_nop, op_noni, store_nop ;20 ;
2641 instr fetch_DIR16, op_nop, store_xx ;21 ;LD xx,nn
2642 instr fetch_DIR16, op_STxx, store_nop ;22 ;LD (nn),xx
2643 instr fetch_xx, op_INC16, store_xx ;23 ;INC xx
2644 instr fetch_xH, op_INC, store_xH ;24 ;INC xh
2645 instr fetch_xH, op_DEC, store_xH ;25 ;DEC xh
2646 instr fetch_DIR8, op_nop, store_xH ;26 ;LD xh,n
2647 instr fetch_nop, op_noni, store_nop ;27 ;
2648 instr fetch_nop, op_noni, store_nop ;28 ;
2649 instr fetch_xx, op_ADDxx, store_nop ;29 ;ADD xx,xx
2650 instr fetch_DIR16, op_RMEM16, store_xx ;2A ;LD xx,(nn)
2651 instr fetch_xx, op_DEC16, store_xx ;2B ;DEC xx
2652 instr fetch_xL, op_INC, store_xL ;2C ;INC xl
2653 instr fetch_xL, op_DEC, store_xL ;2D ;DEC xl
2654 instr fetch_DIR8, op_nop, store_xL ;2E ;LD xl,n
2655 instr fetch_nop, op_noni, store_nop ;2F ;
2656 instr fetch_nop, op_noni, store_nop ;30 ;
2657 instr fetch_nop, op_noni, store_nop ;31 ;
2658 instr fetch_nop, op_noni, store_nop ;32 ;
2659 instr fetch_nop, op_noni, store_nop ;33 ;
2660 instr fetch_MXX, op_INC, store_MXX_0 ;34 ;INC (xx+d)
2661 instr fetch_MXX, op_DEC, store_MXX_0 ;35 ;DEC (xx+d)
2662 instr fetch_DIR8_2, op_nop, store_MXX_2 ;36 ;LD (xx+d),n
2663 instr fetch_nop, op_noni, store_nop ;37 ;
2664 instr fetch_nop, op_noni, store_nop ;38 ;
2665 instr fetch_SP, op_ADDxx, store_nop ;39 ;ADD xx,SP
2666 instr fetch_nop, op_noni, store_nop ;3A ;
2667 instr fetch_nop, op_noni, store_nop ;3B ;
2668 instr fetch_nop, op_noni, store_nop ;3C ;
2669 instr fetch_nop, op_noni, store_nop ;3D ;
2670 instr fetch_nop, op_noni, store_nop ;3E ;
2671 instr fetch_nop, op_noni, store_nop ;3F ;
2672 instr fetch_nop, op_noni, store_nop ;40 ;
2673 instr fetch_nop, op_noni, store_nop ;41 ;
2674 instr fetch_nop, op_noni, store_nop ;42 ;
2675 instr fetch_nop, op_noni, store_nop ;43 ;
2676 instr fetch_xH, op_nop, store_B ;44 ;LD B,xh
2677 instr fetch_xL, op_nop, store_B ;45 ;LD B,xl
2678 instr fetch_MXX, op_nop, store_B ;46 ;LD B,(xx+d)
2679 instr fetch_nop, op_noni, store_nop ;47 ;
2680 instr fetch_nop, op_noni, store_nop ;48 ;
2681 instr fetch_nop, op_noni, store_nop ;49 ;
2682 instr fetch_nop, op_noni, store_nop ;4A ;
2683 instr fetch_nop, op_noni, store_nop ;4B ;
2684 instr fetch_xH, op_nop, store_C ;4C ;LD C,xh
2685 instr fetch_xL, op_nop, store_C ;4D ;LD C,xl
2686 instr fetch_MXX, op_nop, store_C ;4E ;LD C,(xx+d)
2687 instr fetch_nop, op_noni, store_nop ;4F ;
2688 instr fetch_nop, op_noni, store_nop ;50 ;
2689 instr fetch_nop, op_noni, store_nop ;51 ;
2690 instr fetch_nop, op_noni, store_nop ;52 ;
2691 instr fetch_nop, op_noni, store_nop ;53 ;
2692 instr fetch_xH, op_nop, store_D ;54 ;LD D,xh
2693 instr fetch_xL, op_nop, store_D ;55 ;LD D,xl
2694 instr fetch_MXX, op_nop, store_D ;56 ;LD D,(xx+d)
2695 instr fetch_nop, op_noni, store_nop ;57 ;
2696 instr fetch_nop, op_noni, store_nop ;58 ;
2697 instr fetch_nop, op_noni, store_nop ;59 ;
2698 instr fetch_nop, op_noni, store_nop ;5A ;
2699 instr fetch_nop, op_noni, store_nop ;5B ;
2700 instr fetch_xH, op_nop, store_E ;5C ;LD E,xh
2701 instr fetch_xL, op_nop, store_E ;5D ;LD E,xl
2702 instr fetch_MXX, op_nop, store_E ;5E ;LD E,(xx+d)
2703 instr fetch_nop, op_noni, store_nop ;5F ;
2704 instr fetch_B, op_nop, store_xH ;60 ;LD xh,B
2705 instr fetch_C, op_nop, store_xH ;61 ;LD xh,C
2706 instr fetch_D, op_nop, store_xH ;62 ;LD xh,D
2707 instr fetch_E, op_nop, store_xH ;63 ;LD xh,E
2708 instr fetch_nop, op_noni, store_nop ;64 ;LD xh,xh
2709 instr fetch_xL, op_nop, store_xH ;65 ;LD xh,xl
2710 instr fetch_MXX, op_nop, store_H ;66 ;LD H,(xx+d)
2711 instr fetch_A, op_nop, store_xH ;67 ;LD xh,A
2712 instr fetch_B, op_nop, store_xL ;68 ;LD xl,B
2713 instr fetch_C, op_nop, store_xL ;69 ;LD xl,C
2714 instr fetch_D, op_nop, store_xL ;6A ;LD xl,D
2715 instr fetch_E, op_nop, store_xL ;6B ;LD xl,E
2716 instr fetch_xH, op_nop, store_xL ;6C ;LD xl,xh
2717 instr fetch_nop, op_noni, store_nop ;6D ;LD xl,xl
2718 instr fetch_MXX, op_nop, store_L ;6E ;LD L,(xx+d)
2719 instr fetch_A, op_nop, store_xL ;6F ;LD xl,A
2720 instr fetch_B, op_nop, store_MXX ;70 ;LD (xx+d),B
2721 instr fetch_C, op_nop, store_MXX ;71 ;LD (xx+d),C
2722 instr fetch_D, op_nop, store_MXX ;72 ;LD (xx+d),D
2723 instr fetch_E, op_nop, store_MXX ;73 ;LD (xx+d),E
2724 instr fetch_H, op_nop, store_MXX ;74 ;LD (xx+d),H
2725 instr fetch_L, op_nop, store_MXX ;75 ;LD (xx+d),L
2726 instr fetch_nop, op_noni, store_nop ;76 ;
2727 instr fetch_A, op_nop, store_MXX ;77 ;LD (xx+d),A
2728 instr fetch_nop, op_noni, store_nop ;78 ;
2729 instr fetch_nop, op_noni, store_nop ;79 ;
2730 instr fetch_nop, op_noni, store_nop ;7A ;
2731 instr fetch_nop, op_noni, store_nop ;7B ;
2732 instr fetch_xH, op_nop, store_A ;7C ;LD A,xh
2733 instr fetch_xL, op_nop, store_A ;7D ;LD A,xl
2734 instr fetch_MXX, op_nop, store_A ;7E ;LD A,(xx+d)
2735 instr fetch_nop, op_noni, store_nop ;7F ;
2736 instr fetch_nop, op_noni, store_nop ;80 ;
2737 instr fetch_nop, op_noni, store_nop ;81 ;
2738 instr fetch_nop, op_noni, store_nop ;82 ;
2739 instr fetch_nop, op_noni, store_nop ;83 ;
2740 instr fetch_xH, op_ADDA, store_nop ;84 ;ADD A,xh
2741 instr fetch_xL, op_ADDA, store_nop ;85 ;ADD A,xl
2742 instr fetch_MXX, op_ADDA, store_nop ;86 ;ADD A,(xx)
2743 instr fetch_nop, op_noni, store_nop ;87 ;
2744 instr fetch_nop, op_noni, store_nop ;88 ;
2745 instr fetch_nop, op_noni, store_nop ;89 ;
2746 instr fetch_nop, op_noni, store_nop ;8A ;
2747 instr fetch_nop, op_noni, store_nop ;8B ;
2748 instr fetch_xH, op_ADCA, store_nop ;8C ;ADC A,xh
2749 instr fetch_xL, op_ADCA, store_nop ;8D ;ADC A,xl
2750 instr fetch_MXX, op_ADCA, store_nop ;8E ;ADC A,(xx)
2751 instr fetch_nop, op_noni, store_nop ;8F ;
2752 instr fetch_nop, op_noni, store_nop ;90 ;
2753 instr fetch_nop, op_noni, store_nop ;91 ;
2754 instr fetch_nop, op_noni, store_nop ;92 ;
2755 instr fetch_nop, op_noni, store_nop ;93 ;
2756 instr fetch_xH, op_SUBFA, store_nop ;94 ;SUB A,xh
2757 instr fetch_xL, op_SUBFA, store_nop ;95 ;SUB A,xl
2758 instr fetch_MXX, op_SUBFA, store_nop ;96 ;SUB A,(xx)
2759 instr fetch_nop, op_noni, store_nop ;97 ;
2760 instr fetch_nop, op_noni, store_nop ;98 ;
2761 instr fetch_nop, op_noni, store_nop ;99 ;
2762 instr fetch_nop, op_noni, store_nop ;9A ;
2763 instr fetch_nop, op_noni, store_nop ;9B ;
2764 instr fetch_xH, op_SBCFA, store_nop ;9C ;SBC A,xh
2765 instr fetch_xL, op_SBCFA, store_nop ;9D ;SBC A,xl
2766 instr fetch_MXX, op_SBCFA, store_nop ;9E ;SBC A,(xx)
2767 instr fetch_nop, op_noni, store_nop ;9F ;
2768 instr fetch_nop, op_noni, store_nop ;A0 ;
2769 instr fetch_nop, op_noni, store_nop ;A1 ;
2770 instr fetch_nop, op_noni, store_nop ;A2 ;
2771 instr fetch_nop, op_noni, store_nop ;A3 ;
2772 instr fetch_xH, op_ANDA, store_nop ;A4 ;AND A,xh
2773 instr fetch_xL, op_ANDA, store_nop ;A5 ;AND A,xl
2774 instr fetch_MXX, op_ANDA, store_nop ;A6 ;AND A,(xx)
2775 instr fetch_nop, op_noni, store_nop ;A7 ;
2776 instr fetch_nop, op_noni, store_nop ;A8 ;
2777 instr fetch_nop, op_noni, store_nop ;A9 ;
2778 instr fetch_nop, op_noni, store_nop ;AA ;
2779 instr fetch_nop, op_noni, store_nop ;AB ;
2780 instr fetch_xH, op_XORA, store_nop ;AC ;XOR A,xh
2781 instr fetch_xL, op_XORA, store_nop ;AD ;XOR A,xl
2782 instr fetch_MXX, op_XORA, store_nop ;AE ;XOR A,(xx)
2783 instr fetch_nop, op_noni, store_nop ;AF ;
2784 instr fetch_nop, op_noni, store_nop ;B0 ;
2785 instr fetch_nop, op_noni, store_nop ;B1 ;
2786 instr fetch_nop, op_noni, store_nop ;B2 ;
2787 instr fetch_nop, op_noni, store_nop ;B3 ;
2788 instr fetch_xH, op_ORA, store_nop ;B4 ;OR A,xh
2789 instr fetch_xL, op_ORA, store_nop ;B5 ;OR A,xl
2790 instr fetch_MXX, op_ORA, store_nop ;B6 ;OR A,(xx)
2791 instr fetch_nop, op_noni, store_nop ;B7 ;
2792 instr fetch_nop, op_noni, store_nop ;B8 ;
2793 instr fetch_nop, op_noni, store_nop ;B9 ;
2794 instr fetch_nop, op_noni, store_nop ;BA ;
2795 instr fetch_nop, op_noni, store_nop ;BB ;
2796 instr fetch_xH, op_CPFA, store_nop ;BC ;CP A,xh
2797 instr fetch_xL, op_CPFA, store_nop ;BD ;CP A,xl
2798 instr fetch_MXX, op_CPFA, store_nop ;BE ;CP A,(xx)
2799 instr fetch_nop, op_noni, store_nop ;BF ;
2800 instr fetch_nop, op_noni, store_nop ;C0 ;
2801 instr fetch_nop, op_noni, store_nop ;C1 ;
2802 instr fetch_nop, op_noni, store_nop ;C2 ;
2803 instr fetch_nop, op_noni, store_nop ;C3 ;
2804 instr fetch_nop, op_noni, store_nop ;C4 ;
2805 instr fetch_nop, op_noni, store_nop ;C5 ;
2806 instr fetch_nop, op_noni, store_nop ;C6 ;
2807 instr fetch_nop, op_noni, store_nop ;C7 ;
2808 instr fetch_nop, op_noni, store_nop ;C8 ;
2809 instr fetch_nop, op_noni, store_nop ;C9 ;
2810 instr fetch_nop, op_noni, store_nop ;CA ;
2811 instr fetch_nop, op_prefixDDFDCB,store_nop ;CB ;
2812 instr fetch_nop, op_noni, store_nop ;CC ;
2813 instr fetch_nop, op_noni, store_nop ;CD ;
2814 instr fetch_nop, op_noni, store_nop ;CE ;
2815 instr fetch_nop, op_noni, store_nop ;CF ;
2816 instr fetch_nop, op_noni, store_nop ;D0 ;
2817 instr fetch_nop, op_noni, store_nop ;D1 ;
2818 instr fetch_nop, op_noni, store_nop ;D2 ;
2819 instr fetch_nop, op_noni, store_nop ;D3 ;
2820 instr fetch_nop, op_noni, store_nop ;D4 ;
2821 instr fetch_nop, op_noni, store_nop ;D5 ;
2822 instr fetch_nop, op_noni, store_nop ;D6 ;
2823 instr fetch_nop, op_noni, store_nop ;D7 ;
2824 instr fetch_nop, op_noni, store_nop ;D8 ;
2825 instr fetch_nop, op_noni, store_nop ;D9 ;
2826 instr fetch_nop, op_noni, store_nop ;DA ;
2827 instr fetch_nop, op_noni, store_nop ;DB ;
2828 instr fetch_nop, op_noni, store_nop ;DC ;
2829 instr fetch_nop, op_noni, store_nop ;DD ;
2830 instr fetch_nop, op_noni, store_nop ;DE ;
2831 instr fetch_nop, op_noni, store_nop ;DF ;
2832 instr fetch_nop, op_noni, store_nop ;E0 ;
2833 instr fetch_nop, op_POP16, store_xx ;E1 ;POP xx
2834 instr fetch_nop, op_noni, store_nop ;E2 ;
2835 instr fetch_MSP, op_EXxx, store_MSP ;E3 ;EX (SP),xx
2836 instr fetch_nop, op_noni, store_nop ;E4 ;
2837 instr fetch_xx, op_PUSH16, store_nop ;E5 ;PUSH xx
2838 instr fetch_nop, op_noni, store_nop ;E6 ;
2839 instr fetch_nop, op_noni, store_nop ;E7 ;
2840 instr fetch_nop, op_noni, store_nop ;E8 ;
2841 instr fetch_xx, op_nop, store_PC ;E9 ;JP xx
2842 instr fetch_nop, op_noni, store_nop ;EA ;
2843 instr fetch_nop, op_noni, store_nop ;EB ;
2844 instr fetch_nop, op_noni, store_nop ;EC ;
2845 instr fetch_nop, op_noni, store_nop ;ED ;
2846 instr fetch_nop, op_noni, store_nop ;EE ;
2847 instr fetch_nop, op_noni, store_nop ;EF ;
2848 instr fetch_nop, op_noni, store_nop ;F0 ;
2849 instr fetch_nop, op_noni, store_nop ;F1 ;
2850 instr fetch_nop, op_noni, store_nop ;F2 ;
2851 instr fetch_nop, op_noni, store_nop ;F3 ;
2852 instr fetch_nop, op_noni, store_nop ;F4 ;
2853 instr fetch_nop, op_noni, store_nop ;F5 ;
2854 instr fetch_nop, op_noni, store_nop ;F6 ;
2855 instr fetch_nop, op_noni, store_nop ;F7 ;
2856 instr fetch_nop, op_noni, store_nop ;F8 ;
2857 instr fetch_xx, op_nop, store_SP ;F9 ;LD SP,xx
2858 instr fetch_nop, op_noni, store_nop ;FA ;
2859 instr fetch_nop, op_noni, store_nop ;FB ;
2860 instr fetch_nop, op_noni, store_nop ;FC ;
2861 instr fetch_nop, op_noni, store_nop ;FD ;
2862 instr fetch_nop, op_noni, store_nop ;FE ;
2863 instr fetch_nop, op_noni, store_nop ;FF ;
2864
2865
2866
2867 ;----------------------------------------------------------------
2868 ;|Mnemonic |SZHPNC|Description |Notes |
2869 ;----------------------------------------------------------------
2870 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
2871 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
2872 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
2873 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
2874 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
2875 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
2876 ;|SLL m |**0P0*|Shift Right Logical |
2877 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
2878
2879
2880 checkspace PC, 9
2881
2882 do_op_rlc:
2883 ;Rotate Left Cyclical. All bits move 1 to the
2884 ;left, the msb becomes c and lsb.
2885 clr temp
2886 lsl opl
2887 adc temp,_0
2888 or opl,temp
2889 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2890 or z_flags,temp
2891 ret
2892
2893 checkspace PC, 9
2894
2895 do_op_rrc:
2896 ;Rotate Right Cyclical. All bits move 1 to the
2897 ;right, the lsb becomes c and msb.
2898 lsr opl
2899 brcc PC+2
2900 ori opl,0x80
2901 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2902 bmov z_flags,ZFL_C, opl,7
2903 ret
2904
2905
2906 checkspace PC, 11
2907
2908 do_op_rl:
2909 ;Rotate Left. All bits move 1 to the left, the msb
2910 ;becomes c, c becomes lsb.
2911 clc
2912 sbrc z_flags,ZFL_C
2913 sec
2914 rol opl
2915 in temp,sreg
2916 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2917 bmov z_flags,ZFL_C, temp,AVR_C
2918 ret
2919
2920
2921 checkspace PC, 10
2922
2923 do_op_rr:
2924 ;Rotate Right. All bits move 1 to the right, the lsb
2925 ;becomes c, c becomes msb.
2926
2927 ror opl
2928 in temp,sreg ;CY
2929 bmov opl,7, z_flags,ZFL_C ;old CY --> Bit 7
2930 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2931 bmov z_flags,ZFL_C, temp,AVR_C ;
2932 ret
2933
2934 checkspace PC, 9
2935
2936 do_op_sla:
2937 lsl opl
2938 in temp,sreg
2939 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2940 bmov z_flags,ZFL_C, temp,AVR_C ;
2941 ret
2942
2943 checkspace PC, 11
2944
2945 do_op_sra:
2946 lsr opl
2947 in temp,sreg
2948 bmov opl,7, opl,6 ;old CY --> Bit 7
2949 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2950 bmov z_flags,ZFL_C, temp,AVR_C ;
2951 ret
2952
2953 checkspace PC, 9
2954
2955 do_op_sll:
2956 sec
2957 rol opl
2958 in temp,sreg
2959 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2960 bmov z_flags,ZFL_C, temp,AVR_C ;
2961 ret
2962
2963 checkspace PC, 8
2964
2965 do_op_srl:
2966 lsr opl
2967 in temp,sreg
2968 ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N
2969 bmov z_flags,ZFL_C, temp,AVR_C ;
2970 ret
2971
2972 ;----------------------------------------------------------------
2973 ;|Mnemonic |SZHPNC|Description |Notes |
2974 ;----------------------------------------------------------------
2975 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
2976 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
2977 ;|SET b,m |------|Set bit |m=mv{2^b} |
2978
2979
2980 checkspace PC, 2
2981 do_op_BIT7:
2982 ldi temp,0x80
2983 rjmp opbit
2984 checkspace PC, 2
2985 do_op_BIT6:
2986 ldi temp,0x40
2987 rjmp opbit
2988 checkspace PC, 2
2989 do_op_BIT5:
2990 ldi temp,0x20
2991 rjmp opbit
2992 checkspace PC, 2
2993 do_op_BIT4:
2994 ldi temp,0x10
2995 rjmp opbit
2996 checkspace PC, 2
2997 do_op_BIT3:
2998 ldi temp,0x08
2999 rjmp opbit
3000 checkspace PC, 2
3001 do_op_BIT2:
3002 ldi temp,0x04
3003 rjmp opbit
3004 checkspace PC, 2
3005 do_op_BIT1:
3006 ldi temp,0x02
3007 rjmp opbit
3008
3009 checkspace PC, 7
3010 do_op_BIT0:
3011 ldi temp,0x01
3012 opbit:
3013 andi z_flags,~((1<<ZFL_N)|(1<<ZFL_Z))
3014 ori z_flags,(1<<ZFL_H)
3015 and temp,opl
3016 brne opbite
3017 ori z_flags,(1<<ZFL_Z)
3018 opbite:
3019 ret
3020
3021
3022 .macro m_do_op_RES7
3023 andi opl,~0x80
3024 .endm
3025 .equ do_op_RES7 = 0
3026 ; andi opl,~0x80
3027 ; ret
3028
3029 .macro m_do_op_RES6
3030 andi opl,~0x40
3031 .endm
3032 .equ do_op_RES6 = 0
3033 ; andi opl,~0x40
3034 ; ret
3035
3036 .macro m_do_op_RES5
3037 andi opl,~0x20
3038 .endm
3039 .equ do_op_RES5 = 0
3040 ; andi opl,~0x20
3041 ; ret
3042
3043 .macro m_do_op_RES4
3044 andi opl,~0x10
3045 .endm
3046 .equ do_op_RES4 = 0
3047 ; andi opl,~0x10
3048 ; ret
3049
3050 .macro m_do_op_RES3
3051 andi opl,~0x08
3052 .endm
3053 .equ do_op_RES3 = 0
3054 ; andi opl,~0x08
3055 ; ret
3056
3057 .macro m_do_op_RES2
3058 andi opl,~0x04
3059 .endm
3060 .equ do_op_RES2 = 0
3061 ; andi opl,~0x04
3062 ; ret
3063
3064 .macro m_do_op_RES1
3065 andi opl,~0x02
3066 .endm
3067 .equ do_op_RES1 = 0
3068 ; andi opl,~0x02
3069 ; ret
3070
3071 .macro m_do_op_RES0
3072 andi opl,~0x01
3073 .endm
3074 .equ do_op_RES0 = 0
3075 ; andi opl,~0x01
3076 ; ret
3077
3078 .macro m_do_op_SET7
3079 ori opl,0x80
3080 .endm
3081 .equ do_op_SET7 = 0
3082 ; ori opl,0x80
3083 ; ret
3084
3085 .macro m_do_op_SET6
3086 ori opl,0x40
3087 .endm
3088 .equ do_op_SET6 = 0
3089 ; ori opl,0x40
3090 ; ret
3091
3092 .macro m_do_op_SET5
3093 ori opl,0x20
3094 .endm
3095 .equ do_op_SET5 = 0
3096 ; ori opl,0x20
3097 ; ret
3098
3099 .macro m_do_op_SET4
3100 ori opl,0x10
3101 .endm
3102 .equ do_op_SET4 = 0
3103 ; ori opl,0x10
3104 ; ret
3105
3106 .macro m_do_op_SET3
3107 ori opl,0x08
3108 .endm
3109 .equ do_op_SET3 = 0
3110 ; ori opl,0x08
3111 ; ret
3112
3113 .macro m_do_op_SET2
3114 ori opl,0x04
3115 .endm
3116 .equ do_op_SET2 = 0
3117 ; ori opl,0x04
3118 ; ret
3119
3120 .macro m_do_op_SET1
3121 ori opl,0x02
3122 .endm
3123 .equ do_op_SET1 = 0
3124 ; ori opl,0x02
3125 ; ret
3126
3127 .macro m_do_op_SET0
3128 ori opl,0x01
3129 .endm
3130 .equ do_op_SET0 = 0
3131 ; ori opl,0x01
3132 ; ret
3133
3134
3135 ;.macro m_do_store_b
3136 ; std y+oz_b,opl
3137 ;.endm
3138 ;.equ do_store_b = 0
3139 checkspace PC, 2
3140 do_store2_b:
3141 mov z_b,opl
3142 ret
3143
3144 checkspace PC, 2
3145 do_store2_c:
3146 mov z_c,opl
3147 ret
3148
3149 checkspace PC, 2
3150 do_store2_d:
3151 mov z_d,opl
3152 ret
3153
3154 checkspace PC, 2
3155 do_store2_e:
3156 mov z_e,opl
3157 ret
3158
3159 checkspace PC, 2
3160 do_store2_h:
3161 mov z_h,opl
3162 ret
3163
3164 checkspace PC, 2
3165 do_store2_l:
3166 mov z_l,opl
3167 ret
3168
3169 checkspace PC, 2
3170 do_store2_a:
3171 mov z_a,opl
3172 ret
3173
3174 checkspace PC, 4
3175 do_fetch2_mhl:
3176 ; movw x,z_l
3177 mem_read_ds opl, z_hl
3178 ret
3179
3180 opctable CBjmp, PC ;+256
3181
3182 instr fetch_B, op_RLC, store2_B ;00 ;RLC B
3183 instr fetch_C, op_RLC, store2_C ;01 ;RLC C
3184 instr fetch_D, op_RLC, store2_D ;02 ;RLC D
3185 instr fetch_E, op_RLC, store2_E ;03 ;RLC E
3186 instr fetch_H, op_RLC, store2_H ;04 ;RLC H
3187 instr fetch_L, op_RLC, store2_L ;05 ;RLC L
3188 instr fetch2_mhl, op_RLC, store_MHL ;06 ;RLC (HL)
3189 instr fetch_A, op_RLC, store2_A ;07 ;RLC A
3190 instr fetch_B, op_RRC, store2_B ;08 ;RRC B
3191 instr fetch_C, op_RRC, store2_C ;09 ;RRC C
3192 instr fetch_D, op_RRC, store2_D ;0A ;RRC D
3193 instr fetch_E, op_RRC, store2_E ;0B ;RRC E
3194 instr fetch_H, op_RRC, store2_H ;0C ;RRC H
3195 instr fetch_L, op_RRC, store2_L ;0D ;RRC L
3196 instr fetch2_mhl, op_RRC, store_MHL ;0E ;RRC (HL)
3197 instr fetch_A, op_RRC, store2_A ;0F ;RRC A
3198 instr fetch_B, op_RL, store2_B ;10 ;RL B
3199 instr fetch_C, op_RL, store2_C ;11 ;RL C
3200 instr fetch_D, op_RL, store2_D ;12 ;RL D
3201 instr fetch_E, op_RL, store2_E ;13 ;RL E
3202 instr fetch_H, op_RL, store2_H ;14 ;RL H
3203 instr fetch_L, op_RL, store2_L ;15 ;RL L
3204 instr fetch2_mhl, op_RL, store_MHL ;16 ;RL (HL)
3205 instr fetch_A, op_RL, store2_A ;17 ;RL A
3206 instr fetch_B, op_RR, store2_B ;18 ;RR B
3207 instr fetch_C, op_RR, store2_C ;19 ;RR C
3208 instr fetch_D, op_RR, store2_D ;1A ;RR D
3209 instr fetch_E, op_RR, store2_E ;1B ;RR E
3210 instr fetch_H, op_RR, store2_H ;1C ;RR H
3211 instr fetch_L, op_RR, store2_L ;1D ;RR L
3212 instr fetch2_mhl, op_RR, store_MHL ;1E ;RR (HL)
3213 instr fetch_A, op_RR, store2_A ;1F ;RR A
3214 instr fetch_B, op_SLA, store2_B ;20 ;SLA B
3215 instr fetch_C, op_SLA, store2_C ;21 ;SLA C
3216 instr fetch_D, op_SLA, store2_D ;22 ;SLA D
3217 instr fetch_E, op_SLA, store2_E ;23 ;SLA E
3218 instr fetch_H, op_SLA, store2_H ;24 ;SLA H
3219 instr fetch_L, op_SLA, store2_L ;25 ;SLA L
3220 instr fetch2_mhl, op_SLA, store_MHL ;26 ;SLA (HL)
3221 instr fetch_A, op_SLA, store2_A ;27 ;SLA A
3222 instr fetch_B, op_SRA, store2_B ;28 ;SRA B
3223 instr fetch_C, op_SRA, store2_C ;29 ;SRA C
3224 instr fetch_D, op_SRA, store2_D ;2A ;SRA D
3225 instr fetch_E, op_SRA, store2_E ;2B ;SRA E
3226 instr fetch_H, op_SRA, store2_H ;2C ;SRA H
3227 instr fetch_L, op_SRA, store2_L ;2D ;SRA L
3228 instr fetch2_mhl, op_SRA, store_MHL ;2E ;SRA (HL)
3229 instr fetch_A, op_SRA, store2_A ;2F ;SRA A
3230 instr fetch_B, op_SLL, store2_B ;30 ;SLL B
3231 instr fetch_C, op_SLL, store2_C ;31 ;SLL C
3232 instr fetch_D, op_SLL, store2_D ;32 ;SLL D
3233 instr fetch_E, op_SLL, store2_E ;33 ;SLL E
3234 instr fetch_H, op_SLL, store2_H ;34 ;SLL H
3235 instr fetch_L, op_SLL, store2_L ;35 ;SLL L
3236 instr fetch2_mhl, op_SLL, store_MHL ;36 ;SLL (HL)
3237 instr fetch_A, op_SLL, store2_A ;37 ;SLL A
3238 instr fetch_B, op_SRL, store2_B ;38 ;SRL B
3239 instr fetch_C, op_SRL, store2_C ;39 ;SRL C
3240 instr fetch_D, op_SRL, store2_D ;3A ;SRL D
3241 instr fetch_E, op_SRL, store2_E ;3B ;SRL E
3242 instr fetch_H, op_SRL, store2_H ;3C ;SRL H
3243 instr fetch_L, op_SRL, store2_L ;3D ;SRL L
3244 instr fetch2_mhl, op_SRL, store_MHL ;3E ;SRL (HL)
3245 instr fetch_A, op_SRL, store2_A ;3F ;SRL A
3246 instr fetch_B, op_BIT0, store_nop ;40 ;BIT 0,B
3247 instr fetch_C, op_BIT0, store_nop ;41 ;BIT 0,C
3248 instr fetch_D, op_BIT0, store_nop ;42 ;BIT 0,D
3249 instr fetch_E, op_BIT0, store_nop ;43 ;BIT 0,E
3250 instr fetch_H, op_BIT0, store_nop ;44 ;BIT 0,H
3251 instr fetch_L, op_BIT0, store_nop ;45 ;BIT 0,L
3252 instr fetch2_mhl, op_BIT0, store_nop ;46 ;BIT 0,(HL)
3253 instr fetch_A, op_BIT0, store_nop ;47 ;BIT 0,A
3254 instr fetch_B, op_BIT1, store_nop ;48 ;BIT 1,B
3255 instr fetch_C, op_BIT1, store_nop ;49 ;BIT 1,C
3256 instr fetch_D, op_BIT1, store_nop ;4A ;BIT 1,D
3257 instr fetch_E, op_BIT1, store_nop ;4B ;BIT 1,E
3258 instr fetch_H, op_BIT1, store_nop ;4C ;BIT 1,H
3259 instr fetch_L, op_BIT1, store_nop ;4D ;BIT 1,L
3260 instr fetch2_mhl, op_BIT1, store_nop ;4E ;BIT 1,(HL)
3261 instr fetch_A, op_BIT1, store_nop ;4F ;BIT 1,A
3262 instr fetch_B, op_BIT2, store_nop ;50 ;BIT 2,B
3263 instr fetch_C, op_BIT2, store_nop ;51 ;BIT 2,C
3264 instr fetch_D, op_BIT2, store_nop ;52 ;BIT 2,D
3265 instr fetch_E, op_BIT2, store_nop ;53 ;BIT 2,E
3266 instr fetch_H, op_BIT2, store_nop ;54 ;BIT 2,H
3267 instr fetch_L, op_BIT2, store_nop ;55 ;BIT 2,L
3268 instr fetch2_mhl, op_BIT2, store_nop ;56 ;BIT 2,(HL)
3269 instr fetch_A, op_BIT2, store_nop ;57 ;BIT 2,A
3270 instr fetch_B, op_BIT3, store_nop ;58 ;BIT 3,B
3271 instr fetch_C, op_BIT3, store_nop ;59 ;BIT 3,C
3272 instr fetch_D, op_BIT3, store_nop ;5A ;BIT 3,D
3273 instr fetch_E, op_BIT3, store_nop ;5B ;BIT 3,E
3274 instr fetch_H, op_BIT3, store_nop ;5C ;BIT 3,H
3275 instr fetch_L, op_BIT3, store_nop ;5D ;BIT 3,L
3276 instr fetch2_mhl, op_BIT3, store_nop ;5E ;BIT 3,(HL)
3277 instr fetch_A, op_BIT3, store_nop ;5F ;BIT 3,A
3278 instr fetch_B, op_BIT4, store_nop ;60 ;BIT 4,B
3279 instr fetch_C, op_BIT4, store_nop ;61 ;BIT 4,C
3280 instr fetch_D, op_BIT4, store_nop ;62 ;BIT 4,D
3281 instr fetch_E, op_BIT4, store_nop ;63 ;BIT 4,E
3282 instr fetch_H, op_BIT4, store_nop ;64 ;BIT 4,H
3283 instr fetch_L, op_BIT4, store_nop ;65 ;BIT 4,L
3284 instr fetch2_mhl, op_BIT4, store_nop ;66 ;BIT 4,(HL)
3285 instr fetch_A, op_BIT4, store_nop ;67 ;BIT 4,A
3286 instr fetch_B, op_BIT5, store_nop ;68 ;BIT 5,B
3287 instr fetch_C, op_BIT5, store_nop ;69 ;BIT 5,C
3288 instr fetch_D, op_BIT5, store_nop ;6A ;BIT 5,D
3289 instr fetch_E, op_BIT5, store_nop ;6B ;BIT 5,E
3290 instr fetch_H, op_BIT5, store_nop ;6C ;BIT 5,H
3291 instr fetch_L, op_BIT5, store_nop ;6D ;BIT 5,L
3292 instr fetch2_mhl, op_BIT5, store_nop ;6E ;BIT 5,(HL)
3293 instr fetch_A, op_BIT5, store_nop ;6F ;BIT 5,A
3294 instr fetch_B, op_BIT6, store_nop ;70 ;BIT 6,B
3295 instr fetch_C, op_BIT6, store_nop ;71 ;BIT 6,C
3296 instr fetch_D, op_BIT6, store_nop ;72 ;BIT 6,D
3297 instr fetch_E, op_BIT6, store_nop ;73 ;BIT 6,E
3298 instr fetch_H, op_BIT6, store_nop ;74 ;BIT 6,H
3299 instr fetch_L, op_BIT6, store_nop ;75 ;BIT 6,L
3300 instr fetch2_mhl, op_BIT6, store_nop ;76 ;BIT 6,(HL)
3301 instr fetch_A, op_BIT6, store_nop ;77 ;BIT 6,A
3302 instr fetch_B, op_BIT7, store_nop ;78 ;BIT 7,B
3303 instr fetch_C, op_BIT7, store_nop ;79 ;BIT 7,C
3304 instr fetch_D, op_BIT7, store_nop ;7A ;BIT 7,D
3305 instr fetch_E, op_BIT7, store_nop ;7B ;BIT 7,E
3306 instr fetch_H, op_BIT7, store_nop ;7C ;BIT 7,H
3307 instr fetch_L, op_BIT7, store_nop ;7D ;BIT 7,L
3308 instr fetch2_mhl, op_BIT7, store_nop ;7E ;BIT 7,(HL)
3309 instr fetch_A, op_BIT7, store_nop ;7F ;BIT 7,A
3310 instr fetch_B, op_RES0, store2_B ;80 ;RES 0,B
3311 instr fetch_C, op_RES0, store2_C ;81 ;RES 0,C
3312 instr fetch_D, op_RES0, store2_D ;82 ;RES 0,D
3313 instr fetch_E, op_RES0, store2_E ;83 ;RES 0,E
3314 instr fetch_H, op_RES0, store2_H ;84 ;RES 0,H
3315 instr fetch_L, op_RES0, store2_L ;85 ;RES 0,L
3316 instr fetch2_mhl, op_RES0, store_MHL ;86 ;RES 0,(HL)
3317 instr fetch_A, op_RES0, store2_A ;87 ;RES 0,A
3318 instr fetch_B, op_RES1, store2_B ;88 ;RES 1,B
3319 instr fetch_C, op_RES1, store2_C ;89 ;RES 1,C
3320 instr fetch_D, op_RES1, store2_D ;8A ;RES 1,D
3321 instr fetch_E, op_RES1, store2_E ;8B ;RES 1,E
3322 instr fetch_H, op_RES1, store2_H ;8C ;RES 1,H
3323 instr fetch_L, op_RES1, store2_L ;8D ;RES 1,L
3324 instr fetch2_mhl, op_RES1, store_MHL ;8E ;RES 1,(HL)
3325 instr fetch_A, op_RES1, store2_A ;8F ;RES 1,A
3326 instr fetch_B, op_RES2, store2_B ;90 ;RES 2,B
3327 instr fetch_C, op_RES2, store2_C ;91 ;RES 2,C
3328 instr fetch_D, op_RES2, store2_D ;92 ;RES 2,D
3329 instr fetch_E, op_RES2, store2_E ;93 ;RES 2,E
3330 instr fetch_H, op_RES2, store2_H ;94 ;RES 2,H
3331 instr fetch_L, op_RES2, store2_L ;95 ;RES 2,L
3332 instr fetch2_mhl, op_RES2, store_MHL ;96 ;RES 2,(HL)
3333 instr fetch_A, op_RES2, store2_A ;97 ;RES 2,A
3334 instr fetch_B, op_RES3, store2_B ;98 ;RES 3,B
3335 instr fetch_C, op_RES3, store2_C ;99 ;RES 3,C
3336 instr fetch_D, op_RES3, store2_D ;9A ;RES 3,D
3337 instr fetch_E, op_RES3, store2_E ;9B ;RES 3,E
3338 instr fetch_H, op_RES3, store2_H ;9C ;RES 3,H
3339 instr fetch_L, op_RES3, store2_L ;9D ;RES 3,L
3340 instr fetch2_mhl, op_RES3, store_MHL ;9E ;RES 3,(HL)
3341 instr fetch_A, op_RES3, store2_A ;9F ;RES 3,A
3342 instr fetch_B, op_RES4, store2_B ;A0 ;RES 4,B
3343 instr fetch_C, op_RES4, store2_C ;A1 ;RES 4,C
3344 instr fetch_D, op_RES4, store2_D ;A2 ;RES 4,D
3345 instr fetch_E, op_RES4, store2_E ;A3 ;RES 4,E
3346 instr fetch_H, op_RES4, store2_H ;A4 ;RES 4,H
3347 instr fetch_L, op_RES4, store2_L ;A5 ;RES 4,L
3348 instr fetch2_mhl, op_RES4, store_MHL ;A6 ;RES 4,(HL)
3349 instr fetch_A, op_RES4, store2_A ;A7 ;RES 4,A
3350 instr fetch_B, op_RES5, store2_B ;A8 ;RES 5,B
3351 instr fetch_C, op_RES5, store2_C ;A9 ;RES 5,C
3352 instr fetch_D, op_RES5, store2_D ;AA ;RES 5,D
3353 instr fetch_E, op_RES5, store2_E ;AB ;RES 5,E
3354 instr fetch_H, op_RES5, store2_H ;AC ;RES 5,H
3355 instr fetch_L, op_RES5, store2_L ;AD ;RES 5,L
3356 instr fetch2_mhl, op_RES5, store_MHL ;AE ;RES 5,(HL)
3357 instr fetch_A, op_RES5, store2_A ;AF ;RES 5,A
3358 instr fetch_B, op_RES6, store2_B ;B0 ;RES 6,B
3359 instr fetch_C, op_RES6, store2_C ;B1 ;RES 6,C
3360 instr fetch_D, op_RES6, store2_D ;B2 ;RES 6,D
3361 instr fetch_E, op_RES6, store2_E ;B3 ;RES 6,E
3362 instr fetch_H, op_RES6, store2_H ;B4 ;RES 6,H
3363 instr fetch_L, op_RES6, store2_L ;B5 ;RES 6,L
3364 instr fetch2_mhl, op_RES6, store_MHL ;B6 ;RES 6,(HL)
3365 instr fetch_A, op_RES6, store2_A ;B7 ;RES 6,A
3366 instr fetch_B, op_RES7, store2_B ;B8 ;RES 7,B
3367 instr fetch_C, op_RES7, store2_C ;B9 ;RES 7,C
3368 instr fetch_D, op_RES7, store2_D ;BA ;RES 7,D
3369 instr fetch_E, op_RES7, store2_E ;BB ;RES 7,E
3370 instr fetch_H, op_RES7, store2_H ;BC ;RES 7,H
3371 instr fetch_L, op_RES7, store2_L ;BD ;RES 7,L
3372 instr fetch2_mhl, op_RES7, store_MHL ;BE ;RES 7,(HL)
3373 instr fetch_A, op_RES7, store2_A ;BF ;RES 7,A
3374 instr fetch_B, op_SET0, store2_B ;C0 ;SET 0,B
3375 instr fetch_C, op_SET0, store2_C ;C1 ;SET 0,C
3376 instr fetch_D, op_SET0, store2_D ;C2 ;SET 0,D
3377 instr fetch_E, op_SET0, store2_E ;C3 ;SET 0,E
3378 instr fetch_H, op_SET0, store2_H ;C4 ;SET 0,H
3379 instr fetch_L, op_SET0, store2_L ;C5 ;SET 0,L
3380 instr fetch2_mhl, op_SET0, store_MHL ;C6 ;SET 0,(HL)
3381 instr fetch_A, op_SET0, store2_A ;C7 ;SET 0,A
3382 instr fetch_B, op_SET1, store2_B ;C8 ;SET 1,B
3383 instr fetch_C, op_SET1, store2_C ;C9 ;SET 1,C
3384 instr fetch_D, op_SET1, store2_D ;CA ;SET 1,D
3385 instr fetch_E, op_SET1, store2_E ;CB ;SET 1,E
3386 instr fetch_H, op_SET1, store2_H ;CC ;SET 1,H
3387 instr fetch_L, op_SET1, store2_L ;CD ;SET 1,L
3388 instr fetch2_mhl, op_SET1, store_MHL ;CE ;SET 1,(HL)
3389 instr fetch_A, op_SET1, store2_A ;CF ;SET 1,A
3390 instr fetch_B, op_SET2, store2_B ;D0 ;SET 2,B
3391 instr fetch_C, op_SET2, store2_C ;D1 ;SET 2,C
3392 instr fetch_D, op_SET2, store2_D ;D2 ;SET 2,D
3393 instr fetch_E, op_SET2, store2_E ;D3 ;SET 2,E
3394 instr fetch_H, op_SET2, store2_H ;D4 ;SET 2,H
3395 instr fetch_L, op_SET2, store2_L ;D5 ;SET 2,L
3396 instr fetch2_mhl, op_SET2, store_MHL ;D6 ;SET 2,(HL)
3397 instr fetch_A, op_SET2, store2_A ;D7 ;SET 2,A
3398 instr fetch_B, op_SET3, store2_B ;D8 ;SET 3,B
3399 instr fetch_C, op_SET3, store2_C ;D9 ;SET 3,C
3400 instr fetch_D, op_SET3, store2_D ;DA ;SET 3,D
3401 instr fetch_E, op_SET3, store2_E ;DB ;SET 3,E
3402 instr fetch_H, op_SET3, store2_H ;DC ;SET 3,H
3403 instr fetch_L, op_SET3, store2_L ;DD ;SET 3,L
3404 instr fetch2_mhl, op_SET3, store_MHL ;DE ;SET 3,(HL)
3405 instr fetch_A, op_SET3, store2_A ;DF ;SET 3,A
3406 instr fetch_B, op_SET4, store2_B ;E0 ;SET 4,B
3407 instr fetch_C, op_SET4, store2_C ;E1 ;SET 4,C
3408 instr fetch_D, op_SET4, store2_D ;E2 ;SET 4,D
3409 instr fetch_E, op_SET4, store2_E ;E3 ;SET 4,E
3410 instr fetch_H, op_SET4, store2_H ;E4 ;SET 4,H
3411 instr fetch_L, op_SET4, store2_L ;E5 ;SET 4,L
3412 instr fetch2_mhl, op_SET4, store_MHL ;E6 ;SET 4,(HL)
3413 instr fetch_A, op_SET4, store2_A ;E7 ;SET 4,A
3414 instr fetch_B, op_SET5, store2_B ;E8 ;SET 5,B
3415 instr fetch_C, op_SET5, store2_C ;E9 ;SET 5,C
3416 instr fetch_D, op_SET5, store2_D ;EA ;SET 5,D
3417 instr fetch_E, op_SET5, store2_E ;EB ;SET 5,E
3418 instr fetch_H, op_SET5, store2_H ;EC ;SET 5,H
3419 instr fetch_L, op_SET5, store2_L ;ED ;SET 5,L
3420 instr fetch2_mhl, op_SET5, store_MHL ;EE ;SET 5,(HL)
3421 instr fetch_A, op_SET5, store2_A ;EF ;SET 5,A
3422 instr fetch_B, op_SET6, store2_B ;F0 ;SET 6,B
3423 instr fetch_C, op_SET6, store2_C ;F1 ;SET 6,C
3424 instr fetch_D, op_SET6, store2_D ;F2 ;SET 6,D
3425 instr fetch_E, op_SET6, store2_E ;F3 ;SET 6,E
3426 instr fetch_H, op_SET6, store2_H ;F4 ;SET 6,H
3427 instr fetch_L, op_SET6, store2_L ;F5 ;SET 6,L
3428 instr fetch2_mhl, op_SET6, store_MHL ;F6 ;SET 6,(HL)
3429 instr fetch_A, op_SET6, store2_A ;F7 ;SET 6,A
3430 instr fetch_B, op_SET7, store2_B ;F8 ;SET 7,B
3431 instr fetch_C, op_SET7, store2_C ;F9 ;SET 7,C
3432 instr fetch_D, op_SET7, store2_D ;FA ;SET 7,D
3433 instr fetch_E, op_SET7, store2_E ;FB ;SET 7,E
3434 instr fetch_H, op_SET7, store2_H ;FC ;SET 7,H
3435 instr fetch_L, op_SET7, store2_L ;FD ;SET 7,L
3436 instr fetch2_mhl, op_SET7, store_MHL ;FE ;SET 7,(HL)
3437 instr fetch_A, op_SET7, store2_A ;FF ;SET 7,A
3438
3439
3440 opctable DDFDCBjmp, PC ;+256
3441
3442 instr fetch_nop, op_RLC, store2_B ;00 ;RLC (Ix+d),B
3443 instr fetch_nop, op_RLC, store2_C ;01 ;RLC (Ix+d),C
3444 instr fetch_nop, op_RLC, store2_D ;02 ;RLC (Ix+d),D
3445 instr fetch_nop, op_RLC, store2_E ;03 ;RLC (Ix+d),E
3446 instr fetch_nop, op_RLC, store2_H ;04 ;RLC (Ix+d),H
3447 instr fetch_nop, op_RLC, store2_L ;05 ;RLC (Ix+d),L
3448 instr fetch_nop, op_RLC, store_nop ;06 ;RLC (Ix+d)
3449 instr fetch_nop, op_RLC, store2_A ;07 ;RLC (Ix+d),A
3450 instr fetch_nop, op_RRC, store2_B ;08 ;RRC (Ix+d),B
3451 instr fetch_nop, op_RRC, store2_C ;09 ;RRC (Ix+d),C
3452 instr fetch_nop, op_RRC, store2_D ;0A ;RRC (Ix+d),D
3453 instr fetch_nop, op_RRC, store2_E ;0B ;RRC (Ix+d),E
3454 instr fetch_nop, op_RRC, store2_H ;0C ;RRC (Ix+d),H
3455 instr fetch_nop, op_RRC, store2_L ;0D ;RRC (Ix+d),L
3456 instr fetch_nop, op_RRC, store_nop ;0E ;RRC (Ix+d)
3457 instr fetch_nop, op_RRC, store2_A ;0F ;RRC (Ix+d),A
3458 instr fetch_nop, op_RL, store2_B ;10 ;RL (Ix+d),B
3459 instr fetch_nop, op_RL, store2_C ;11 ;RL (Ix+d),C
3460 instr fetch_nop, op_RL, store2_D ;12 ;RL (Ix+d),D
3461 instr fetch_nop, op_RL, store2_E ;13 ;RL (Ix+d),E
3462 instr fetch_nop, op_RL, store2_H ;14 ;RL (Ix+d),H
3463 instr fetch_nop, op_RL, store2_L ;15 ;RL (Ix+d),L
3464 instr fetch_nop, op_RL, store_nop ;16 ;RL (Ix+d)
3465 instr fetch_nop, op_RL, store2_A ;17 ;RL (Ix+d),A
3466 instr fetch_nop, op_RR, store2_B ;18 ;RR (Ix+d),B
3467 instr fetch_nop, op_RR, store2_C ;19 ;RR (Ix+d),C
3468 instr fetch_nop, op_RR, store2_D ;1A ;RR (Ix+d),D
3469 instr fetch_nop, op_RR, store2_E ;1B ;RR (Ix+d),E
3470 instr fetch_nop, op_RR, store2_H ;1C ;RR (Ix+d),H
3471 instr fetch_nop, op_RR, store2_L ;1D ;RR (Ix+d),L
3472 instr fetch_nop, op_RR, store_nop ;1E ;RR (Ix+d)
3473 instr fetch_nop, op_RR, store2_A ;1F ;RR (Ix+d),A
3474 instr fetch_nop, op_SLA, store2_B ;20 ;SLA (Ix+d),B
3475 instr fetch_nop, op_SLA, store2_C ;21 ;SLA (Ix+d),C
3476 instr fetch_nop, op_SLA, store2_D ;22 ;SLA (Ix+d),D
3477 instr fetch_nop, op_SLA, store2_E ;23 ;SLA (Ix+d),E
3478 instr fetch_nop, op_SLA, store2_H ;24 ;SLA (Ix+d),H
3479 instr fetch_nop, op_SLA, store2_L ;25 ;SLA (Ix+d),L
3480 instr fetch_nop, op_SLA, store_nop ;26 ;SLA (Ix+d)
3481 instr fetch_nop, op_SLA, store2_A ;27 ;SLA (Ix+d),A
3482 instr fetch_nop, op_SRA, store2_B ;28 ;SRA (Ix+d),B
3483 instr fetch_nop, op_SRA, store2_C ;29 ;SRA (Ix+d),C
3484 instr fetch_nop, op_SRA, store2_D ;2A ;SRA (Ix+d),D
3485 instr fetch_nop, op_SRA, store2_E ;2B ;SRA (Ix+d),E
3486 instr fetch_nop, op_SRA, store2_H ;2C ;SRA (Ix+d),H
3487 instr fetch_nop, op_SRA, store2_L ;2D ;SRA (Ix+d),L
3488 instr fetch_nop, op_SRA, store_nop ;2E ;SRA (Ix+d)
3489 instr fetch_nop, op_SRA, store2_A ;2F ;SRA (Ix+d),A
3490 instr fetch_nop, op_SLL, store2_B ;30 ;SLL (Ix+d),B
3491 instr fetch_nop, op_SLL, store2_C ;31 ;SLL (Ix+d),C
3492 instr fetch_nop, op_SLL, store2_D ;32 ;SLL (Ix+d),D
3493 instr fetch_nop, op_SLL, store2_E ;33 ;SLL (Ix+d),E
3494 instr fetch_nop, op_SLL, store2_H ;34 ;SLL (Ix+d),H
3495 instr fetch_nop, op_SLL, store2_L ;35 ;SLL (Ix+d),L
3496 instr fetch_nop, op_SLL, store_nop ;36 ;SLL (Ix+d)
3497 instr fetch_nop, op_SLL, store2_A ;37 ;SLL (Ix+d),A
3498 instr fetch_nop, op_SRL, store2_B ;38 ;SRL (Ix+d),B
3499 instr fetch_nop, op_SRL, store2_C ;39 ;SRL (Ix+d),C
3500 instr fetch_nop, op_SRL, store2_D ;3A ;SRL (Ix+d),D
3501 instr fetch_nop, op_SRL, store2_E ;3B ;SRL (Ix+d),E
3502 instr fetch_nop, op_SRL, store2_H ;3C ;SRL (Ix+d),H
3503 instr fetch_nop, op_SRL, store2_L ;3D ;SRL (Ix+d),L
3504 instr fetch_nop, op_SRL, store_nop ;3E ;SRL (Ix+d)
3505 instr fetch_nop, op_SRL, store2_A ;3F ;SRL (Ix+d),A
3506 instr fetch_nop, op_BIT0, store_nop ;40 ;BIT 0,(Ix+d),B
3507 instr fetch_nop, op_BIT0, store_nop ;41 ;BIT 0,(Ix+d),C
3508 instr fetch_nop, op_BIT0, store_nop ;42 ;BIT 0,(Ix+d),D
3509 instr fetch_nop, op_BIT0, store_nop ;43 ;BIT 0,(Ix+d),E
3510 instr fetch_nop, op_BIT0, store_nop ;44 ;BIT 0,(Ix+d),H
3511 instr fetch_nop, op_BIT0, store_nop ;45 ;BIT 0,(Ix+d),L
3512 instr fetch_nop, op_BIT0, store_nop ;46 ;BIT 0,(Ix+d)
3513 instr fetch_nop, op_BIT0, store_nop ;47 ;BIT 0,(Ix+d),A
3514 instr fetch_nop, op_BIT1, store_nop ;48 ;BIT 1,(Ix+d),B
3515 instr fetch_nop, op_BIT1, store_nop ;49 ;BIT 1,(Ix+d),C
3516 instr fetch_nop, op_BIT1, store_nop ;4A ;BIT 1,(Ix+d),D
3517 instr fetch_nop, op_BIT1, store_nop ;4B ;BIT 1,(Ix+d),E
3518 instr fetch_nop, op_BIT1, store_nop ;4C ;BIT 1,(Ix+d),H
3519 instr fetch_nop, op_BIT1, store_nop ;4D ;BIT 1,(Ix+d),L
3520 instr fetch_nop, op_BIT1, store_nop ;4E ;BIT 1,(Ix+d)
3521 instr fetch_nop, op_BIT1, store_nop ;4F ;BIT 1,(Ix+d),A
3522 instr fetch_nop, op_BIT2, store_nop ;50 ;BIT 2,(Ix+d),B
3523 instr fetch_nop, op_BIT2, store_nop ;51 ;BIT 2,(Ix+d),C
3524 instr fetch_nop, op_BIT2, store_nop ;52 ;BIT 2,(Ix+d),D
3525 instr fetch_nop, op_BIT2, store_nop ;53 ;BIT 2,(Ix+d),E
3526 instr fetch_nop, op_BIT2, store_nop ;54 ;BIT 2,(Ix+d),H
3527 instr fetch_nop, op_BIT2, store_nop ;55 ;BIT 2,(Ix+d),L
3528 instr fetch_nop, op_BIT2, store_nop ;56 ;BIT 2,(Ix+d)
3529 instr fetch_nop, op_BIT2, store_nop ;57 ;BIT 2,(Ix+d),A
3530 instr fetch_nop, op_BIT3, store_nop ;58 ;BIT 3,(Ix+d),B
3531 instr fetch_nop, op_BIT3, store_nop ;59 ;BIT 3,(Ix+d),C
3532 instr fetch_nop, op_BIT3, store_nop ;5A ;BIT 3,(Ix+d),D
3533 instr fetch_nop, op_BIT3, store_nop ;5B ;BIT 3,(Ix+d),E
3534 instr fetch_nop, op_BIT3, store_nop ;5C ;BIT 3,(Ix+d),H
3535 instr fetch_nop, op_BIT3, store_nop ;5D ;BIT 3,(Ix+d),L
3536 instr fetch_nop, op_BIT3, store_nop ;5E ;BIT 3,(Ix+d)
3537 instr fetch_nop, op_BIT3, store_nop ;5F ;BIT 3,(Ix+d),A
3538 instr fetch_nop, op_BIT4, store_nop ;60 ;BIT 4,(Ix+d),B
3539 instr fetch_nop, op_BIT4, store_nop ;61 ;BIT 4,(Ix+d),C
3540 instr fetch_nop, op_BIT4, store_nop ;62 ;BIT 4,(Ix+d),D
3541 instr fetch_nop, op_BIT4, store_nop ;63 ;BIT 4,(Ix+d),E
3542 instr fetch_nop, op_BIT4, store_nop ;64 ;BIT 4,(Ix+d),H
3543 instr fetch_nop, op_BIT4, store_nop ;65 ;BIT 4,(Ix+d),L
3544 instr fetch_nop, op_BIT4, store_nop ;66 ;BIT 4,(Ix+d)
3545 instr fetch_nop, op_BIT4, store_nop ;67 ;BIT 4,(Ix+d),A
3546 instr fetch_nop, op_BIT5, store_nop ;68 ;BIT 5,(Ix+d),B
3547 instr fetch_nop, op_BIT5, store_nop ;69 ;BIT 5,(Ix+d),C
3548 instr fetch_nop, op_BIT5, store_nop ;6A ;BIT 5,(Ix+d),D
3549 instr fetch_nop, op_BIT5, store_nop ;6B ;BIT 5,(Ix+d),E
3550 instr fetch_nop, op_BIT5, store_nop ;6C ;BIT 5,(Ix+d),H
3551 instr fetch_nop, op_BIT5, store_nop ;6D ;BIT 5,(Ix+d),L
3552 instr fetch_nop, op_BIT5, store_nop ;6E ;BIT 5,(Ix+d)
3553 instr fetch_nop, op_BIT5, store_nop ;6F ;BIT 5,(Ix+d),A
3554 instr fetch_nop, op_BIT6, store_nop ;70 ;BIT 6,(Ix+d),B
3555 instr fetch_nop, op_BIT6, store_nop ;71 ;BIT 6,(Ix+d),C
3556 instr fetch_nop, op_BIT6, store_nop ;72 ;BIT 6,(Ix+d),D
3557 instr fetch_nop, op_BIT6, store_nop ;73 ;BIT 6,(Ix+d),E
3558 instr fetch_nop, op_BIT6, store_nop ;74 ;BIT 6,(Ix+d),H
3559 instr fetch_nop, op_BIT6, store_nop ;75 ;BIT 6,(Ix+d),L
3560 instr fetch_nop, op_BIT6, store_nop ;76 ;BIT 6,(Ix+d)
3561 instr fetch_nop, op_BIT6, store_nop ;77 ;BIT 6,(Ix+d),A
3562 instr fetch_nop, op_BIT7, store_nop ;78 ;BIT 7,(Ix+d),B
3563 instr fetch_nop, op_BIT7, store_nop ;79 ;BIT 7,(Ix+d),C
3564 instr fetch_nop, op_BIT7, store_nop ;7A ;BIT 7,(Ix+d),D
3565 instr fetch_nop, op_BIT7, store_nop ;7B ;BIT 7,(Ix+d),E
3566 instr fetch_nop, op_BIT7, store_nop ;7C ;BIT 7,(Ix+d),H
3567 instr fetch_nop, op_BIT7, store_nop ;7D ;BIT 7,(Ix+d),L
3568 instr fetch_nop, op_BIT7, store_nop ;7E ;BIT 7,(Ix+d)
3569 instr fetch_nop, op_BIT7, store_nop ;7F ;BIT 7,(Ix+d),A
3570 instr fetch_nop, op_RES0, store2_B ;80 ;RES 0,(Ix+d),B
3571 instr fetch_nop, op_RES0, store2_C ;81 ;RES 0,(Ix+d),C
3572 instr fetch_nop, op_RES0, store2_D ;82 ;RES 0,(Ix+d),D
3573 instr fetch_nop, op_RES0, store2_E ;83 ;RES 0,(Ix+d),E
3574 instr fetch_nop, op_RES0, store2_H ;84 ;RES 0,(Ix+d),H
3575 instr fetch_nop, op_RES0, store2_L ;85 ;RES 0,(Ix+d),L
3576 instr fetch_nop, op_RES0, store_nop ;86 ;RES 0,(Ix+d)
3577 instr fetch_nop, op_RES0, store2_A ;87 ;RES 0,(Ix+d),A
3578 instr fetch_nop, op_RES1, store2_B ;88 ;RES 1,(Ix+d),B
3579 instr fetch_nop, op_RES1, store2_C ;89 ;RES 1,(Ix+d),C
3580 instr fetch_nop, op_RES1, store2_D ;8A ;RES 1,(Ix+d),D
3581 instr fetch_nop, op_RES1, store2_E ;8B ;RES 1,(Ix+d),E
3582 instr fetch_nop, op_RES1, store2_H ;8C ;RES 1,(Ix+d),H
3583 instr fetch_nop, op_RES1, store2_L ;8D ;RES 1,(Ix+d),L
3584 instr fetch_nop, op_RES1, store_nop ;8E ;RES 1,(Ix+d)
3585 instr fetch_nop, op_RES1, store2_A ;8F ;RES 1,(Ix+d),A
3586 instr fetch_nop, op_RES2, store2_B ;90 ;RES 2,(Ix+d),B
3587 instr fetch_nop, op_RES2, store2_C ;91 ;RES 2,(Ix+d),C
3588 instr fetch_nop, op_RES2, store2_D ;92 ;RES 2,(Ix+d),D
3589 instr fetch_nop, op_RES2, store2_E ;93 ;RES 2,(Ix+d),E
3590 instr fetch_nop, op_RES2, store2_H ;94 ;RES 2,(Ix+d),H
3591 instr fetch_nop, op_RES2, store2_L ;95 ;RES 2,(Ix+d),L
3592 instr fetch_nop, op_RES2, store_nop ;96 ;RES 2,(Ix+d)
3593 instr fetch_nop, op_RES2, store2_A ;97 ;RES 2,(Ix+d),A
3594 instr fetch_nop, op_RES3, store2_B ;98 ;RES 3,(Ix+d),B
3595 instr fetch_nop, op_RES3, store2_C ;99 ;RES 3,(Ix+d),C
3596 instr fetch_nop, op_RES3, store2_D ;9A ;RES 3,(Ix+d),D
3597 instr fetch_nop, op_RES3, store2_E ;9B ;RES 3,(Ix+d),E
3598 instr fetch_nop, op_RES3, store2_H ;9C ;RES 3,(Ix+d),H
3599 instr fetch_nop, op_RES3, store2_L ;9D ;RES 3,(Ix+d),L
3600 instr fetch_nop, op_RES3, store_nop ;9E ;RES 3,(Ix+d)
3601 instr fetch_nop, op_RES3, store2_A ;9F ;RES 3,(Ix+d),A
3602 instr fetch_nop, op_RES4, store2_B ;A0 ;RES 4,(Ix+d),B
3603 instr fetch_nop, op_RES4, store2_C ;A1 ;RES 4,(Ix+d),C
3604 instr fetch_nop, op_RES4, store2_D ;A2 ;RES 4,(Ix+d),D
3605 instr fetch_nop, op_RES4, store2_E ;A3 ;RES 4,(Ix+d),E
3606 instr fetch_nop, op_RES4, store2_H ;A4 ;RES 4,(Ix+d),H
3607 instr fetch_nop, op_RES4, store2_L ;A5 ;RES 4,(Ix+d),L
3608 instr fetch_nop, op_RES4, store_nop ;A6 ;RES 4,(Ix+d)
3609 instr fetch_nop, op_RES4, store2_A ;A7 ;RES 4,(Ix+d),A
3610 instr fetch_nop, op_RES5, store2_B ;A8 ;RES 5,(Ix+d),B
3611 instr fetch_nop, op_RES5, store2_C ;A9 ;RES 5,(Ix+d),C
3612 instr fetch_nop, op_RES5, store2_D ;AA ;RES 5,(Ix+d),D
3613 instr fetch_nop, op_RES5, store2_E ;AB ;RES 5,(Ix+d),E
3614 instr fetch_nop, op_RES5, store2_H ;AC ;RES 5,(Ix+d),H
3615 instr fetch_nop, op_RES5, store2_L ;AD ;RES 5,(Ix+d),L
3616 instr fetch_nop, op_RES5, store_nop ;AE ;RES 5,(Ix+d)
3617 instr fetch_nop, op_RES5, store2_A ;AF ;RES 5,(Ix+d),A
3618 instr fetch_nop, op_RES6, store2_B ;B0 ;RES 6,(Ix+d),B
3619 instr fetch_nop, op_RES6, store2_C ;B1 ;RES 6,(Ix+d),C
3620 instr fetch_nop, op_RES6, store2_D ;B2 ;RES 6,(Ix+d),D
3621 instr fetch_nop, op_RES6, store2_E ;B3 ;RES 6,(Ix+d),E
3622 instr fetch_nop, op_RES6, store2_H ;B4 ;RES 6,(Ix+d),H
3623 instr fetch_nop, op_RES6, store2_L ;B5 ;RES 6,(Ix+d),L
3624 instr fetch_nop, op_RES6, store_nop ;B6 ;RES 6,(Ix+d)
3625 instr fetch_nop, op_RES6, store2_A ;B7 ;RES 6,(Ix+d),A
3626 instr fetch_nop, op_RES7, store2_B ;B8 ;RES 7,(Ix+d),B
3627 instr fetch_nop, op_RES7, store2_C ;B9 ;RES 7,(Ix+d),C
3628 instr fetch_nop, op_RES7, store2_D ;BA ;RES 7,(Ix+d),D
3629 instr fetch_nop, op_RES7, store2_E ;BB ;RES 7,(Ix+d),E
3630 instr fetch_nop, op_RES7, store2_H ;BC ;RES 7,(Ix+d),H
3631 instr fetch_nop, op_RES7, store2_L ;BD ;RES 7,(Ix+d),L
3632 instr fetch_nop, op_RES7, store_nop ;BE ;RES 7,(Ix+d)
3633 instr fetch_nop, op_RES7, store2_A ;BF ;RES 7,(Ix+d),A
3634 instr fetch_nop, op_SET0, store2_B ;C0 ;SET 0,(Ix+d),B
3635 instr fetch_nop, op_SET0, store2_C ;C1 ;SET 0,(Ix+d),C
3636 instr fetch_nop, op_SET0, store2_D ;C2 ;SET 0,(Ix+d),D
3637 instr fetch_nop, op_SET0, store2_E ;C3 ;SET 0,(Ix+d),E
3638 instr fetch_nop, op_SET0, store2_H ;C4 ;SET 0,(Ix+d),H
3639 instr fetch_nop, op_SET0, store2_L ;C5 ;SET 0,(Ix+d),L
3640 instr fetch_nop, op_SET0, store_nop ;C6 ;SET 0,(Ix+d)
3641 instr fetch_nop, op_SET0, store2_A ;C7 ;SET 0,(Ix+d),A
3642 instr fetch_nop, op_SET1, store2_B ;C8 ;SET 1,(Ix+d),B
3643 instr fetch_nop, op_SET1, store2_C ;C9 ;SET 1,(Ix+d),C
3644 instr fetch_nop, op_SET1, store2_D ;CA ;SET 1,(Ix+d),D
3645 instr fetch_nop, op_SET1, store2_E ;CB ;SET 1,(Ix+d),E
3646 instr fetch_nop, op_SET1, store2_H ;CC ;SET 1,(Ix+d),H
3647 instr fetch_nop, op_SET1, store2_L ;CD ;SET 1,(Ix+d),L
3648 instr fetch_nop, op_SET1, store_nop ;CE ;SET 1,(Ix+d)
3649 instr fetch_nop, op_SET1, store2_A ;CF ;SET 1,(Ix+d),A
3650 instr fetch_nop, op_SET2, store2_B ;D0 ;SET 2,(Ix+d),B
3651 instr fetch_nop, op_SET2, store2_C ;D1 ;SET 2,(Ix+d),C
3652 instr fetch_nop, op_SET2, store2_D ;D2 ;SET 2,(Ix+d),D
3653 instr fetch_nop, op_SET2, store2_E ;D3 ;SET 2,(Ix+d),E
3654 instr fetch_nop, op_SET2, store2_H ;D4 ;SET 2,(Ix+d),H
3655 instr fetch_nop, op_SET2, store2_L ;D5 ;SET 2,(Ix+d),L
3656 instr fetch_nop, op_SET2, store_nop ;D6 ;SET 2,(Ix+d)
3657 instr fetch_nop, op_SET2, store2_A ;D7 ;SET 2,(Ix+d),A
3658 instr fetch_nop, op_SET3, store2_B ;D8 ;SET 3,(Ix+d),B
3659 instr fetch_nop, op_SET3, store2_C ;D9 ;SET 3,(Ix+d),C
3660 instr fetch_nop, op_SET3, store2_D ;DA ;SET 3,(Ix+d),D
3661 instr fetch_nop, op_SET3, store2_E ;DB ;SET 3,(Ix+d),E
3662 instr fetch_nop, op_SET3, store2_H ;DC ;SET 3,(Ix+d),H
3663 instr fetch_nop, op_SET3, store2_L ;DD ;SET 3,(Ix+d),L
3664 instr fetch_nop, op_SET3, store_nop ;DE ;SET 3,(Ix+d)
3665 instr fetch_nop, op_SET3, store2_A ;DF ;SET 3,(Ix+d),A
3666 instr fetch_nop, op_SET4, store2_B ;E0 ;SET 4,(Ix+d),B
3667 instr fetch_nop, op_SET4, store2_C ;E1 ;SET 4,(Ix+d),C
3668 instr fetch_nop, op_SET4, store2_D ;E2 ;SET 4,(Ix+d),D
3669 instr fetch_nop, op_SET4, store2_E ;E3 ;SET 4,(Ix+d),E
3670 instr fetch_nop, op_SET4, store2_H ;E4 ;SET 4,(Ix+d),H
3671 instr fetch_nop, op_SET4, store2_L ;E5 ;SET 4,(Ix+d),L
3672 instr fetch_nop, op_SET4, store_nop ;E6 ;SET 4,(Ix+d)
3673 instr fetch_nop, op_SET4, store2_A ;E7 ;SET 4,(Ix+d),A
3674 instr fetch_nop, op_SET5, store2_B ;E8 ;SET 5,(Ix+d),B
3675 instr fetch_nop, op_SET5, store2_C ;E9 ;SET 5,(Ix+d),C
3676 instr fetch_nop, op_SET5, store2_D ;EA ;SET 5,(Ix+d),D
3677 instr fetch_nop, op_SET5, store2_E ;EB ;SET 5,(Ix+d),E
3678 instr fetch_nop, op_SET5, store2_H ;EC ;SET 5,(Ix+d),H
3679 instr fetch_nop, op_SET5, store2_L ;ED ;SET 5,(Ix+d),L
3680 instr fetch_nop, op_SET5, store_nop ;EE ;SET 5,(Ix+d)
3681 instr fetch_nop, op_SET5, store2_A ;EF ;SET 5,(Ix+d),A
3682 instr fetch_nop, op_SET6, store2_B ;F0 ;SET 6,(Ix+d),B
3683 instr fetch_nop, op_SET6, store2_C ;F1 ;SET 6,(Ix+d),C
3684 instr fetch_nop, op_SET6, store2_D ;F2 ;SET 6,(Ix+d),D
3685 instr fetch_nop, op_SET6, store2_E ;F3 ;SET 6,(Ix+d),E
3686 instr fetch_nop, op_SET6, store2_H ;F4 ;SET 6,(Ix+d),H
3687 instr fetch_nop, op_SET6, store2_L ;F5 ;SET 6,(Ix+d),L
3688 instr fetch_nop, op_SET6, store_nop ;F6 ;SET 6,(Ix+d)
3689 instr fetch_nop, op_SET6, store2_A ;F7 ;SET 6,(Ix+d),A
3690 instr fetch_nop, op_SET7, store2_B ;F8 ;SET 7,(Ix+d),B
3691 instr fetch_nop, op_SET7, store2_C ;F9 ;SET 7,(Ix+d),C
3692 instr fetch_nop, op_SET7, store2_D ;FA ;SET 7,(Ix+d),D
3693 instr fetch_nop, op_SET7, store2_E ;FB ;SET 7,(Ix+d),E
3694 instr fetch_nop, op_SET7, store2_H ;FC ;SET 7,(Ix+d),H
3695 instr fetch_nop, op_SET7, store2_L ;FD ;SET 7,(Ix+d),L
3696 instr fetch_nop, op_SET7, store_nop ;FE ;SET 7,(Ix+d)
3697 instr fetch_nop, op_SET7, store2_A ;FF ;SET 7,(Ix+d),A
3698
3699 .macro m_do_fetch_0
3700 ldi opl,0
3701 .endm
3702 .equ do_fetch_0 = 0
3703 ; ldi opl,0
3704 ; ret
3705
3706 ;----------------------------------------------------------------
3707 ;|Mnemonic |SZHPNC|Description |Notes |
3708 ;----------------------------------------------------------------
3709 ;|IN r,[C] |***P0-|Input |r=[C] |
3710 ;
3711
3712 do_op_in: ; in opl,(opl)
3713 .if PORT_DEBUG
3714 push opl
3715 cp opl,_0 ; don't debug port 0 (con stat)
3716 breq dbg_op_in_1
3717 printnewline
3718 printstring "Port read: ("
3719 mov temp,opl
3720 lcall printhex
3721 printstring ") -> "
3722 dbg_op_in_1:
3723 .endif
3724
3725 mov temp2,opl
3726 lcall portRead
3727 mov opl,temp
3728 bst z_flags,ZFL_C ;save Carry
3729 ldpmx z_flags,sz53p_tab,temp ;S,Z,P
3730 bld z_flags,ZFL_C
3731
3732 .if PORT_DEBUG
3733 pop temp
3734 cp temp,_0
3735 breq dbg_op_in_2
3736 lcall printhex
3737 printstring " "
3738 dbg_op_in_2:
3739 .endif
3740 ret
3741
3742 ;----------------------------------------------------------------
3743 ;|Mnemonic |SZHPNC|Description |Notes |
3744 ;----------------------------------------------------------------
3745 ;|OUT [C],r |------|Output |[C]=r |
3746 ;
3747
3748 do_op_out: ; out (c),opl
3749 .if PORT_DEBUG
3750 printnewline
3751 printstring "Port write: "
3752 mov temp,opl
3753 lcall printhex
3754 printstring " -> ("
3755 mov temp,z_c
3756 lcall printhex
3757 printstring ") "
3758 .endif
3759 mov temp,opl
3760 mov temp2,z_c
3761 lcall portWrite
3762 ret
3763
3764 ;----------------------------------------------------------------
3765 ;|Mnemonic |SZHPNC|Description |Notes |
3766 ;----------------------------------------------------------------
3767 ;|LD dst,src|------|Load |dst=src |
3768 ;
3769
3770 do_op_stbc: ;store bc to mem loc in opl:h
3771 movw xl,opl
3772 mem_write_s z_c
3773 adiw xl,1
3774 mem_write_s z_b
3775 ret
3776
3777 ;----------------------------------------------------------------
3778 ;|Mnemonic |SZHPNC|Description |Notes |
3779 ;----------------------------------------------------------------
3780 ;|LD dst,src|------|Load |dst=src |
3781 ;
3782 ;
3783 do_op_stde: ;store de to mem loc in opl:h
3784 movw xl,opl
3785 mem_write_s z_e
3786 adiw xl,1
3787 mem_write_s z_d
3788 ret
3789
3790 ;----------------------------------------------------------------
3791 ;|Mnemonic |SZHPNC|Description |Notes |
3792 ;----------------------------------------------------------------
3793 ;|LD dst,src|------|Load |dst=src |
3794 ;
3795 ;
3796 do_op_stsp: ;store sp to mem loc in opl:h
3797 movw xl,opl
3798 mem_write_s z_spl
3799 adiw xl,1
3800 mem_write_s z_sph
3801 ret
3802
3803 ;----------------------------------------------------------------
3804 ;|Mnemonic |SZHPNC|Description |Notes |
3805 ;----------------------------------------------------------------
3806 ;|ADC HL,ss |***V0*|Add with Carry |HL=HL+ss+CY |
3807 ;
3808
3809 do_op_ADCHL:
3810 lsr z_flags ; ZFL_C --> Carry
3811 ldi z_flags,0 ; clear N
3812 adc z_l,opl
3813 in temp,sreg ; save lower Z
3814 adc z_h,oph
3815 in temp2,sreg
3816
3817 and temp,temp2 ; 16bit Z
3818 bmov z_flags,ZFL_C, temp2,AVR_C
3819 bmov z_flags,ZFL_P, temp2,AVR_V
3820 bmov z_flags,ZFL_H, temp2,AVR_H
3821 bmov z_flags,ZFL_Z, temp,AVR_Z
3822 bmov z_flags,ZFL_S, temp2,AVR_N
3823 ret
3824
3825 ;----------------------------------------------------------------
3826 ;|Mnemonic |SZHPNC|Description |Notes |
3827 ;----------------------------------------------------------------
3828 ;|SBC HL,ss |***V1*|Subtract with carry |HL=HL-ss-CY |
3829 ;
3830
3831 checkspace PC, 24
3832
3833 do_op_sbchl:
3834 lsr z_flags ; get Z80 carry
3835 sez ; set z
3836 sbc z_l,opl
3837 sbc z_h,oph
3838 in temp,sreg
3839 ldi z_flags,(1<<ZFL_N) ; set N
3840 bmov z_flags,ZFL_C, temp,AVR_C
3841 bmov z_flags,ZFL_P, temp,AVR_V
3842 bmov z_flags,ZFL_H, temp,AVR_H
3843 bmov z_flags,ZFL_Z, temp,AVR_Z
3844 bmov z_flags,ZFL_S, temp,AVR_N
3845 ret
3846
3847 ;----------------------------------------------------------------
3848 ;|Mnemonic |SZHPNC|Description |Notes |
3849 ;----------------------------------------------------------------
3850 ;|NEG |***V1*|Negate A |A=0-A |
3851
3852 ;
3853 do_op_NEG:
3854 ldi temp,0
3855 sub temp,z_a
3856 mov z_a,temp
3857 in temp,sreg
3858 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
3859 bmov z_flags,ZFL_C, temp,AVR_C
3860 bmov z_flags,ZFL_H, temp,AVR_H
3861 do_z80_flags_V
3862 do_z80_flags_set_N
3863 ret
3864
3865 ;----------------------------------------------------------------
3866 ;|Mnemonic |SZHPNC|Description |Notes |
3867 ;----------------------------------------------------------------
3868 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
3869 ;|RETN |------|Return from NMI | Copy IFF2 to IFF1 |
3870
3871
3872 do_op_RETI:
3873 do_op_RETN:
3874 ldd temp,y+oz_istat
3875 bmov temp,IFF1, temp,IFF2
3876 std y+oz_istat,temp
3877 ljmp do_store_ret
3878
3879
3880 ;----------------------------------------------------------------
3881 ;|Mnemonic |SZHPNC|Description |Notes |
3882 ;----------------------------------------------------------------
3883 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
3884
3885 do_op_IM0:
3886 ldd temp,y+oz_istat
3887 andi temp, ~IM_MASK
3888 std y+oz_istat,temp
3889 ret
3890
3891 do_op_IM1:
3892 ldd temp,y+oz_istat
3893 andi temp,~IM_MASK
3894 ori temp,IM1
3895 std y+oz_istat,temp
3896 ret
3897
3898 do_op_IM2:
3899 ldd temp,y+oz_istat
3900 andi temp, ~IM_MASK
3901 ori temp,IM2
3902 std y+oz_istat,temp
3903 ret
3904
3905 ;----------------------------------------------------------------
3906 ;|Mnemonic |SZHPNC|Description |Notes |
3907 ;----------------------------------------------------------------
3908 ;|LD A,i |**0*0-|Load |(i=I,R) IFF2 --> P |
3909 ;|LD i,A |------|Load |(i=I,R) |
3910
3911 do_op_ldai:
3912 ldd z_a,y+oz_i
3913 rjmp op_ldar1
3914
3915 do_op_ldar:
3916 ldd z_a,y+oz_r
3917 op_ldar1:
3918 bst z_flags,ZFL_C ;save C
3919 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
3920 bld z_flags,ZFL_C ;
3921 ldd temp,y+oz_istat
3922 bmov z_flags,ZFL_P, temp,IFF2
3923 ret
3924
3925 do_op_ldia:
3926 std y+oz_i,z_a
3927 ret
3928
3929 do_op_ldra:
3930 std y+oz_r,z_a
3931 ret
3932
3933 ;----------------------------------------------------------------
3934 ;|Mnemonic |SZHPNC|Description |Notes |
3935 ;----------------------------------------------------------------
3936 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
3937 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
3938
3939 do_op_rld:
3940 swap opl
3941 mov oph,opl
3942 andi opl,0xf0
3943 andi oph,0x0f
3944 mov temp,z_a
3945 andi temp,0x0f
3946 or opl,temp
3947 mov temp,z_a
3948 andi temp,0xf0
3949 or temp,oph
3950 mov z_a,temp
3951 bst z_flags,ZFL_C ;save C
3952 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
3953 bld z_flags,ZFL_C ;
3954 ret
3955
3956 do_op_rrd:
3957 mov oph,opl
3958 andi opl,0xf0
3959 andi oph,0x0f
3960 mov temp,z_a
3961 andi temp,0x0f
3962 or opl,temp
3963 swap opl
3964 mov temp,z_a
3965 andi temp,0xf0
3966 or temp,oph
3967 mov z_a,temp
3968 bst z_flags,ZFL_C ;save C
3969 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
3970 bld z_flags,ZFL_C ;
3971 ret
3972
3973
3974 ;----------------------------------------------------------------
3975 ;|Mnemonic |SZHPNC|Description |Notes |
3976 ;----------------------------------------------------------------
3977 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
3978 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
3979 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
3980 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
3981 ;
3982
3983 checkspace PC, 13
3984
3985 op_LDxx_common:
3986 ; movw x,z_l ;
3987 ; lcall dram_read ; temp = (HL)
3988 mem_read_ds temp, z_hl
3989 ; movw x,z_e ;
3990 ; lcall dram_write ; (DE) = temp
3991 mem_write_ds z_de, temp
3992
3993 cbr z_flags,(1<<ZFL_H) | (1<<ZFL_P) | (1<<ZFL_N)
3994
3995 movw x,z_c
3996 sbiw x,1 ;BC--
3997 movw z_c,x
3998 breq PC+2
3999 sbr z_flags,(1<<ZFL_P)
4000 ret
4001
4002 checkspace PC, 6
4003
4004 do_op_LDI:
4005 rcall op_LDxx_common
4006 sub z_e,_255 ;-low(-1) DE++
4007 sbc z_d,_255 ;-high(-1)
4008 sub z_l,_255 ;-low(-1) HL++
4009 sbc z_h,_255 ;-high(-1)
4010 ret
4011
4012 checkspace PC, 6
4013
4014 do_op_LDD:
4015 rcall op_LDxx_common
4016 add z_e,_255 ;+low(-1) DE--
4017 adc z_d,_255 ;+high(-1)
4018 add z_l,_255 ;+low(-1) HL--
4019 adc z_h,_255 ;+high(-1)
4020 ret
4021
4022 checkspace PC, 5
4023
4024 do_op_LDIR:
4025 rcall do_op_LDI
4026 #if 1
4027 sbrc z_flags,ZFL_P
4028 rjmp do_op_LDIR
4029 ret
4030 #else
4031 sbrs z_flags,ZFL_P
4032 ret
4033 sbiw z_pcl,2
4034 ret
4035 #endif
4036
4037 checkspace PC, 5
4038
4039 do_op_LDDR:
4040 rcall do_op_LDD
4041 #if 1
4042 sbrc z_flags,ZFL_P
4043 rjmp do_op_LDDR
4044 ret
4045 #else
4046 sbrs z_flags,ZFL_P
4047 ret
4048 sbiw z_pcl,2
4049 ret
4050 #endif
4051
4052 ;----------------------------------------------------------------
4053 ;|Mnemonic |SZHPNC|Description |Notes |
4054 ;----------------------------------------------------------------
4055 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
4056 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
4057 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
4058 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
4059
4060
4061 checkspace PC, 21
4062
4063 op_CPxx_common:
4064 movw x,z_l ; HL
4065
4066 movw z,z_c ;BC
4067
4068 cbr z_flags,(1<<ZFL_S)|(1<<ZFL_Z)|(1<<ZFL_H)|(1<<ZFL_P)
4069 sbr z_flags,(1<<ZFL_N)
4070 lcall dram_read ; temp = (HL)
4071
4072 cp z_a,temp ; A - (HL)
4073
4074 brpl PC+2
4075 sbr z_flags,(1<<ZFL_S)
4076 brne PC+2
4077 sbr z_flags,(1<<ZFL_Z)
4078 brhc PC+2
4079 sbr z_flags,(1<<ZFL_H)
4080
4081 sbiw z,1 ; BC--
4082 breq PC+2
4083 sbr z_flags,(1<<ZFL_P)
4084 movw z_c,z ;BC
4085 ret
4086
4087 checkspace PC, 5
4088
4089 do_op_CPI:
4090 rcall op_CPxx_common
4091 adiw x,1 ; HL++
4092 movw z_l,x ; HL
4093 ret
4094
4095
4096 checkspace PC, 5
4097
4098 do_op_CPD:
4099 rcall op_CPxx_common
4100 sbiw x,1 ; HL--
4101 movw z_l,x ; HL
4102 ret
4103
4104 checkspace PC, 7
4105
4106 do_op_CPIR:
4107 rcall do_op_CPI
4108 sbrc z_flags,ZFL_Z
4109 ret
4110 sbrs z_flags,ZFL_P
4111 ret
4112 sbiw z_pcl,2
4113 ret
4114
4115 checkspace PC, 7
4116
4117 do_op_CPDR:
4118 rcall do_op_CPD
4119 sbrc z_flags,ZFL_Z
4120 ret
4121 sbrs z_flags,ZFL_P
4122 ret
4123 sbiw z_pcl,2
4124 ret
4125
4126 ;----------------------------------------------------------------
4127 ;|Mnemonic |SZHPNC|Description |Notes |
4128 ;----------------------------------------------------------------
4129 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
4130 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
4131 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
4132 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
4133
4134 checkspace PC, 12
4135
4136 op_INxx_common:
4137 cbr z_flags,(1<<ZFL_Z)
4138 sbr z_flags,(1<<ZFL_N)
4139 mov temp2,z_c ;C
4140 lcall portRead
4141 movw x,z_l ;HL
4142 lcall dram_write
4143 dec z_b ;B
4144 brne PC+2
4145 sbr z_flags,(1<<ZFL_Z)
4146 ret
4147
4148 checkspace PC, 4
4149
4150 do_op_INI:
4151 rcall op_INxx_common
4152 adiw x,1
4153 movw z_l,x ;HL
4154 ret
4155
4156 checkspace PC, 4
4157
4158 do_op_IND:
4159 rcall op_INxx_common
4160 sbiw x,1
4161 movw z_l,x ;HL
4162 ret
4163
4164 checkspace PC, 5
4165
4166 do_op_INIR:
4167 rcall do_op_INI
4168 sbrc z_flags,ZFL_Z
4169 ret
4170 sbiw z_pcl,2
4171 ret
4172
4173 checkspace PC, 5
4174
4175 do_op_INDR:
4176 rcall do_op_IND
4177 sbrc z_flags,ZFL_Z
4178 ret
4179 sbiw z_pcl,2
4180 ret
4181
4182 ;----------------------------------------------------------------
4183 ;|Mnemonic |SZHPNC|Description |Notes |
4184 ;----------------------------------------------------------------
4185 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
4186 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
4187 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
4188 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
4189
4190 checkspace PC, 12
4191
4192 op_OUTxx_common:
4193 movw x,z_l ;HL
4194 lcall dram_read ;temp = (z)
4195 mov temp2,z_c ;C
4196 lcall portWrite
4197 cbr z_flags,(1<<ZFL_Z)
4198 sbr z_flags,(1<<ZFL_N)
4199 dec z_b ;B
4200 brne PC+2
4201 sbr z_flags,(1<<ZFL_Z)
4202 ret
4203
4204 checkspace PC, 4
4205
4206 do_op_OUTI:
4207 rcall op_OUTxx_common
4208 sub z_l,_255 ;-low(-1)
4209 sbc z_h,_255 ;-high(-1)
4210 ret
4211
4212 checkspace PC, 4
4213
4214 do_op_OUTD:
4215 rcall op_OUTxx_common
4216 add z_l,_255 ;+low(-1)
4217 adc z_h,_255 ;+high(-1)
4218 ret
4219
4220 checkspace PC, 5
4221
4222 do_op_OTIR:
4223 rcall do_op_OUTI
4224 sbrc z_flags,ZFL_Z
4225 ret
4226 sbiw z_pcl,2
4227 ret
4228
4229 checkspace PC, 5
4230
4231 do_op_OTDR:
4232 rcall do_op_OUTD
4233 sbrc z_flags,ZFL_Z
4234 ret
4235 sbiw z_pcl,2
4236 ret
4237
4238 #if 1
4239 opctable EDjmp, PC ;+ 2*256
4240
4241 instr fetch_nop, op_nop, store_nop ;00 ;NOP
4242 instr fetch_nop, op_nop, store_nop ;01 ;NOP
4243 instr fetch_nop, op_nop, store_nop ;02 ;NOP
4244 instr fetch_nop, op_nop, store_nop ;03 ;NOP
4245 instr fetch_nop, op_nop, store_nop ;04 ;NOP
4246 instr fetch_nop, op_nop, store_nop ;05 ;NOP
4247 instr fetch_nop, op_nop, store_nop ;06 ;NOP
4248 instr fetch_nop, op_nop, store_nop ;07 ;NOP
4249 instr fetch_nop, op_nop, store_nop ;08 ;NOP
4250 instr fetch_nop, op_nop, store_nop ;09 ;NOP
4251 instr fetch_nop, op_nop, store_nop ;0A ;NOP
4252 instr fetch_nop, op_nop, store_nop ;0B ;NOP
4253 instr fetch_nop, op_nop, store_nop ;0C ;NOP
4254 instr fetch_nop, op_nop, store_nop ;0D ;NOP
4255 instr fetch_nop, op_nop, store_nop ;0E ;NOP
4256 instr fetch_nop, op_nop, store_nop ;0F ;NOP
4257 instr fetch_nop, op_nop, store_nop ;10 ;NOP
4258 instr fetch_nop, op_nop, store_nop ;11 ;NOP
4259 instr fetch_nop, op_nop, store_nop ;12 ;NOP
4260 instr fetch_nop, op_nop, store_nop ;13 ;NOP
4261 instr fetch_nop, op_nop, store_nop ;14 ;NOP
4262 instr fetch_nop, op_nop, store_nop ;15 ;NOP
4263 instr fetch_nop, op_nop, store_nop ;16 ;NOP
4264 instr fetch_nop, op_nop, store_nop ;17 ;NOP
4265 instr fetch_nop, op_nop, store_nop ;18 ;NOP
4266 instr fetch_nop, op_nop, store_nop ;19 ;NOP
4267 instr fetch_nop, op_nop, store_nop ;1A ;NOP
4268 instr fetch_nop, op_nop, store_nop ;1B ;NOP
4269 instr fetch_nop, op_nop, store_nop ;1C ;NOP
4270 instr fetch_nop, op_nop, store_nop ;1D ;NOP
4271 instr fetch_nop, op_nop, store_nop ;1E ;NOP
4272 instr fetch_nop, op_nop, store_nop ;1F ;NOP
4273 instr fetch_nop, op_nop, store_nop ;20 ;NOP
4274 instr fetch_nop, op_nop, store_nop ;21 ;NOP
4275 instr fetch_nop, op_nop, store_nop ;22 ;NOP
4276 instr fetch_nop, op_nop, store_nop ;23 ;NOP
4277 instr fetch_nop, op_nop, store_nop ;24 ;NOP
4278 instr fetch_nop, op_nop, store_nop ;25 ;NOP
4279 instr fetch_nop, op_nop, store_nop ;26 ;NOP
4280 instr fetch_nop, op_nop, store_nop ;27 ;NOP
4281 instr fetch_nop, op_nop, store_nop ;28 ;NOP
4282 instr fetch_nop, op_nop, store_nop ;29 ;NOP
4283 instr fetch_nop, op_nop, store_nop ;2A ;NOP
4284 instr fetch_nop, op_nop, store_nop ;2B ;NOP
4285 instr fetch_nop, op_nop, store_nop ;2C ;NOP
4286 instr fetch_nop, op_nop, store_nop ;2D ;NOP
4287 instr fetch_nop, op_nop, store_nop ;2E ;NOP
4288 instr fetch_nop, op_nop, store_nop ;2F ;NOP
4289 instr fetch_nop, op_nop, store_nop ;30 ;NOP
4290 instr fetch_nop, op_nop, store_nop ;31 ;NOP
4291 instr fetch_nop, op_nop, store_nop ;32 ;NOP
4292 instr fetch_nop, op_nop, store_nop ;33 ;NOP
4293 instr fetch_nop, op_nop, store_nop ;34 ;NOP
4294 instr fetch_nop, op_nop, store_nop ;35 ;NOP
4295 instr fetch_nop, op_nop, store_nop ;36 ;NOP
4296 instr fetch_nop, op_nop, store_nop ;37 ;NOP
4297 instr fetch_nop, op_nop, store_nop ;38 ;NOP
4298 instr fetch_nop, op_nop, store_nop ;39 ;NOP
4299 instr fetch_nop, op_nop, store_nop ;3A ;NOP
4300 instr fetch_nop, op_nop, store_nop ;3B ;NOP
4301 instr fetch_nop, op_nop, store_nop ;3C ;NOP
4302 instr fetch_nop, op_nop, store_nop ;3D ;NOP
4303 instr fetch_nop, op_nop, store_nop ;3E ;NOP
4304 instr fetch_nop, op_nop, store_nop ;3F ;NOP
4305 instr fetch_C, op_IN, store2_B ;40 ;IN B,(C)
4306 instr fetch_B, op_OUT, store_nop ;41 ;OUT (C),B
4307 instr fetch_BC, op_SBCHL, store_nop ;42 ;SBC HL,BC
4308 instr fetch_DIR16, op_STBC, store_nop ;43 ;LD (nn),BC
4309 instr fetch_nop, op_NEG, store_nop ;44 ;NEG
4310 instr fetch_nop, op_RETN, store_nop ;45 ;RETN
4311 instr fetch_nop, op_IM0, store_nop ;46 ;IM 0
4312 instr fetch_nop, op_ldia, store_nop ;47 ;LD I,A
4313 instr fetch_C, op_IN, store2_C ;48 ;IN C,(C)
4314 instr fetch_C, op_OUT, store_nop ;49 ;OUT (C),C
4315 instr fetch_BC, op_ADCHL, store_nop ;4A ;ADC HL,BC
4316 instr fetch_DIR16, op_RMEM16, store_BC ;4B nn nn ;LD BC,(nn)
4317 instr fetch_nop, op_NEG, store_nop ;4C ;NEG
4318 instr fetch_nop, op_RETI, store_nop ;4D ;RETI
4319 instr fetch_nop, op_IM0, store_nop ;4E ;IM 0
4320 instr fetch_nop, op_ldra, store_nop ;4F ;LD R,A
4321 instr fetch_C, op_IN, store2_D ;50 ;IN D,(C)
4322 instr fetch_D, op_OUT, store_nop ;51 ;OUT (C),D
4323 instr fetch_DE, op_SBCHL, store_nop ;52 ;SBC HL,DE
4324 instr fetch_DIR16, op_STDE, store_nop ;53 nn nn ;LD (nn),DE
4325 instr fetch_nop, op_NEG, store_nop ;54 ;NEG
4326 instr fetch_nop, op_RETN, store_nop ;55 ;RETN
4327 instr fetch_nop, op_IM1, store_nop ;56 ;IM 1
4328 instr fetch_nop, op_ldai, store_nop ;57 ;LD A,I
4329 instr fetch_C, op_IN, store2_E ;58 ;IN E,(C)
4330 instr fetch_E, op_OUT, store_nop ;59 ;OUT (C),E
4331 instr fetch_DE, op_ADCHL, store_nop ;5A ;ADC HL,DE
4332 instr fetch_DIR16, op_RMEM16, store_DE ;5B nn nn ;LD DE,(nn)
4333 instr fetch_nop, op_NEG, store_nop ;5C ;NEG
4334 instr fetch_nop, op_RETN, store_nop ;5D ;RETN
4335 instr fetch_nop, op_IM2, store_nop ;5E ;IM 2
4336 instr fetch_nop, op_ldar, store_nop ;5F ;LD A,R
4337 instr fetch_C, op_IN, store2_H ;60 ;IN H,(C)
4338 instr fetch_H, op_OUT, store_nop ;61 ;OUT (C),H
4339 instr fetch_HL, op_SBCHL, store_nop ;62 ;SBC HL,HL
4340 instr fetch_DIR16, op_STHL, store_nop ;63 nn nn ;LD (nn),HL
4341 instr fetch_nop, op_NEG, store_nop ;64 ;NEG
4342 instr fetch_nop, op_RETN, store_nop ;65 ;RETN
4343 instr fetch_nop, op_IM0, store_nop ;66 ;IM 0
4344 instr fetch2_mhl, op_RRD, store_mhl ;67 ;RRD
4345 instr fetch_C, op_IN, store2_L ;68 ;IN L,(C)
4346 instr fetch_L, op_OUT, store_nop ;69 ;OUT (C),L
4347 instr fetch_HL, op_ADCHL, store_nop ;6A ;ADC HL,HL
4348 instr fetch_DIR16, op_RMEM16, store_HL ;6B nn nn ;LD HL,(nn)
4349 instr fetch_nop, op_NEG, store_nop ;6C ;NEG
4350 instr fetch_nop, op_RETN, store_nop ;6D ;RETN
4351 instr fetch_nop, op_IM0, store_nop ;6E ;IM 0
4352 instr fetch2_mhl, op_RLD, store_mhl ;6F ;RLD
4353 instr fetch_C, op_IN, store_nop ;70 ;IN (C)
4354 instr fetch_0, op_OUT, store_nop ;71 ;OUT (C),0
4355 instr fetch_SP, op_SBCHL, store_nop ;72 ;SBC HL,SP
4356 instr fetch_DIR16, op_STSP, store_nop ;73 nn nn ;LD (nn),SP
4357 instr fetch_nop, op_NEG, store_nop ;74 ;NEG
4358 instr fetch_nop, op_RETN, store_nop ;75 ;RETN
4359 instr fetch_nop, op_IM1, store_nop ;76 ;IM 1
4360 instr fetch_nop, op_nop, store_nop ;77 ;NOP
4361 instr fetch_C, op_IN, store2_A ;78 ;IN A,(C)
4362 instr fetch_A, op_OUT, store_nop ;79 ;OUT (C),A
4363 instr fetch_SP, op_ADCHL, store_nop ;7A ;ADC HL,SP
4364 instr fetch_DIR16, op_RMEM16, store_SP ;7B nn nn ;LD SP,(nn)
4365 instr fetch_nop, op_NEG, store_nop ;7C ;NEG
4366 instr fetch_nop, op_RETN, store_nop ;7D ;RETN
4367 instr fetch_nop, op_IM2, store_nop ;7E ;IM 2
4368 instr fetch_nop, op_nop, store_nop ;7F ;NOP
4369 instr fetch_nop, op_nop, store_nop ;80 ;NOP
4370 instr fetch_nop, op_nop, store_nop ;81 ;NOP
4371 instr fetch_nop, op_nop, store_nop ;82 ;NOP
4372 instr fetch_nop, op_nop, store_nop ;83 ;NOP
4373 instr fetch_nop, op_nop, store_nop ;84 ;NOP
4374 instr fetch_nop, op_nop, store_nop ;85 ;NOP
4375 instr fetch_nop, op_nop, store_nop ;86 ;NOP
4376 instr fetch_nop, op_nop, store_nop ;87 ;NOP
4377 instr fetch_nop, op_nop, store_nop ;88 ;NOP
4378 instr fetch_nop, op_nop, store_nop ;89 ;NOP
4379 instr fetch_nop, op_nop, store_nop ;8A ;NOP
4380 instr fetch_nop, op_nop, store_nop ;8B ;NOP
4381 instr fetch_nop, op_nop, store_nop ;8C ;NOP
4382 instr fetch_nop, op_nop, store_nop ;8D ;NOP
4383 instr fetch_nop, op_nop, store_nop ;8E ;NOP
4384 instr fetch_nop, op_nop, store_nop ;8F ;NOP
4385 instr fetch_nop, op_nop, store_nop ;90 ;NOP
4386 instr fetch_nop, op_nop, store_nop ;91 ;NOP
4387 instr fetch_nop, op_nop, store_nop ;92 ;NOP
4388 instr fetch_nop, op_nop, store_nop ;93 ;NOP
4389 instr fetch_nop, op_nop, store_nop ;94 ;NOP
4390 instr fetch_nop, op_nop, store_nop ;95 ;NOP
4391 instr fetch_nop, op_nop, store_nop ;96 ;NOP
4392 instr fetch_nop, op_nop, store_nop ;97 ;NOP
4393 instr fetch_nop, op_nop, store_nop ;98 ;NOP
4394 instr fetch_nop, op_nop, store_nop ;99 ;NOP
4395 instr fetch_nop, op_nop, store_nop ;9A ;NOP
4396 instr fetch_nop, op_nop, store_nop ;9B ;NOP
4397 instr fetch_nop, op_nop, store_nop ;9C ;NOP
4398 instr fetch_nop, op_nop, store_nop ;9D ;NOP
4399 instr fetch_nop, op_nop, store_nop ;9E ;NOP
4400 instr fetch_nop, op_nop, store_nop ;9F ;NOP
4401 instr fetch_nop, op_LDI, store_nop ;A0 ;LDI
4402 instr fetch_nop, op_CPI, store_nop ;A1 ;CPI
4403 instr fetch_nop, op_INI, store_nop ;A2 ;INI
4404 instr fetch_nop, op_OUTI, store_nop ;A3 ;OUTI
4405 instr fetch_nop, op_nop, store_nop ;A4 ;NOP
4406 instr fetch_nop, op_nop, store_nop ;A5 ;NOP
4407 instr fetch_nop, op_nop, store_nop ;A6 ;NOP
4408 instr fetch_nop, op_nop, store_nop ;A7 ;NOP
4409 instr fetch_nop, op_LDD, store_nop ;A8 ;LDD
4410 instr fetch_nop, op_CPD, store_nop ;A9 ;CPD
4411 instr fetch_nop, op_IND, store_nop ;AA ;IND
4412 instr fetch_nop, op_OUTD, store_nop ;AB ;OUTD
4413 instr fetch_nop, op_nop, store_nop ;AC ;NOP
4414 instr fetch_nop, op_nop, store_nop ;AD ;NOP
4415 instr fetch_nop, op_nop, store_nop ;AE ;NOP
4416 instr fetch_nop, op_nop, store_nop ;AF ;NOP
4417 instr fetch_nop, op_LDIR, store_nop ;B0 ;LDIR
4418 instr fetch_nop, op_CPIR, store_nop ;B1 ;CPIR
4419 instr fetch_nop, op_INIR, store_nop ;B2 ;INIR
4420 instr fetch_nop, op_OTIR, store_nop ;B3 ;OTIR
4421 instr fetch_nop, op_nop, store_nop ;B4 ;NOP
4422 instr fetch_nop, op_nop, store_nop ;B5 ;NOP
4423 instr fetch_nop, op_nop, store_nop ;B6 ;NOP
4424 instr fetch_nop, op_nop, store_nop ;B7 ;NOP
4425 instr fetch_nop, op_LDDR, store_nop ;B8 ;LDDR
4426 instr fetch_nop, op_CPDR, store_nop ;B9 ;CPDR
4427 instr fetch_nop, op_INDR, store_nop ;BA ;INDR
4428 instr fetch_nop, op_OTDR, store_nop ;BB ;OTDR
4429 instr fetch_nop, op_nop, store_nop ;BC ;NOP
4430 instr fetch_nop, op_nop, store_nop ;BD ;NOP
4431 instr fetch_nop, op_nop, store_nop ;BE ;NOP
4432 instr fetch_nop, op_nop, store_nop ;BF ;NOP
4433 instr fetch_nop, op_nop, store_nop ;C0 ;NOP
4434 instr fetch_nop, op_nop, store_nop ;C1 ;NOP
4435 instr fetch_nop, op_nop, store_nop ;C2 ;NOP
4436 instr fetch_nop, op_nop, store_nop ;C3 ;NOP
4437 instr fetch_nop, op_nop, store_nop ;C4 ;NOP
4438 instr fetch_nop, op_nop, store_nop ;C5 ;NOP
4439 instr fetch_nop, op_nop, store_nop ;C6 ;NOP
4440 instr fetch_nop, op_nop, store_nop ;C7 ;NOP
4441 instr fetch_nop, op_nop, store_nop ;C8 ;NOP
4442 instr fetch_nop, op_nop, store_nop ;C9 ;NOP
4443 instr fetch_nop, op_nop, store_nop ;CA ;NOP
4444 instr fetch_nop, op_nop, store_nop ;CB ;NOP
4445 instr fetch_nop, op_nop, store_nop ;CC ;NOP
4446 instr fetch_nop, op_nop, store_nop ;CD ;NOP
4447 instr fetch_nop, op_nop, store_nop ;CE ;NOP
4448 instr fetch_nop, op_nop, store_nop ;CF ;NOP
4449 instr fetch_nop, op_nop, store_nop ;D0 ;NOP
4450 instr fetch_nop, op_nop, store_nop ;D1 ;NOP
4451 instr fetch_nop, op_nop, store_nop ;D2 ;NOP
4452 instr fetch_nop, op_nop, store_nop ;D3 ;NOP
4453 instr fetch_nop, op_nop, store_nop ;D4 ;NOP
4454 instr fetch_nop, op_nop, store_nop ;D5 ;NOP
4455 instr fetch_nop, op_nop, store_nop ;D6 ;NOP
4456 instr fetch_nop, op_nop, store_nop ;D7 ;NOP
4457 instr fetch_nop, op_nop, store_nop ;D8 ;NOP
4458 instr fetch_nop, op_nop, store_nop ;D9 ;NOP
4459 instr fetch_nop, op_nop, store_nop ;DA ;NOP
4460 instr fetch_nop, op_nop, store_nop ;DB ;NOP
4461 instr fetch_nop, op_nop, store_nop ;DC ;NOP
4462 instr fetch_nop, op_nop, store_nop ;DD ;NOP
4463 instr fetch_nop, op_nop, store_nop ;DE ;NOP
4464 instr fetch_nop, op_nop, store_nop ;DF ;NOP
4465 instr fetch_nop, op_nop, store_nop ;E0 ;NOP
4466 instr fetch_nop, op_nop, store_nop ;E1 ;NOP
4467 instr fetch_nop, op_nop, store_nop ;E2 ;NOP
4468 instr fetch_nop, op_nop, store_nop ;E3 ;NOP
4469 instr fetch_nop, op_nop, store_nop ;E4 ;NOP
4470 instr fetch_nop, op_nop, store_nop ;E5 ;NOP
4471 instr fetch_nop, op_nop, store_nop ;E6 ;NOP
4472 instr fetch_nop, op_nop, store_nop ;E7 ;NOP
4473 instr fetch_nop, op_nop, store_nop ;E8 ;NOP
4474 instr fetch_nop, op_nop, store_nop ;E9 ;NOP
4475 instr fetch_nop, op_nop, store_nop ;EA ;NOP
4476 instr fetch_nop, op_nop, store_nop ;EB ;NOP
4477 instr fetch_nop, op_nop, store_nop ;EC ;NOP
4478 instr fetch_nop, op_nop, store_nop ;ED ;NOP
4479 instr fetch_nop, op_nop, store_nop ;EE ;NOP
4480 instr fetch_nop, op_nop, store_nop ;EF ;NOP
4481 instr fetch_nop, op_nop, store_nop ;F0 ;NOP
4482 instr fetch_nop, op_nop, store_nop ;F1 ;NOP
4483 instr fetch_nop, op_nop, store_nop ;F2 ;NOP
4484 instr fetch_nop, op_nop, store_nop ;F3 ;NOP
4485 instr fetch_nop, op_nop, store_nop ;F4 ;NOP
4486 instr fetch_nop, op_nop, store_nop ;F5 ;NOP
4487 instr fetch_nop, op_nop, store_nop ;F6 ;NOP
4488 instr fetch_nop, op_nop, store_nop ;F7 ;NOP
4489 instr fetch_nop, op_nop, store_nop ;F8 ;NOP
4490 instr fetch_nop, op_nop, store_nop ;F9 ;NOP
4491 instr fetch_nop, op_nop, store_nop ;FA ;NOP
4492 instr fetch_nop, op_nop, store_nop ;FB ;NOP
4493 instr fetch_nop, op_nop, store_nop ;FC ;NOP
4494 instr fetch_nop, op_nop, store_nop ;FD ;NOP
4495 instr fetch_nop, op_nop, store_nop ;FE ;NOP
4496 instr fetch_nop, op_nop, store_nop ;FF ;NOP
4497 #endif
4498
4499 #endif
4500
4501 ;----------------------------------------------------------------
4502 ; Lookup table, stolen from z80ex, Z80 emulation library.
4503 ; http://z80ex.sourceforge.net/
4504
4505 ; The S, Z, 5 and 3 bits and the parity of the lookup value
4506
4507 checkspace PC, 256
4508
4509 .org (PC+255) & 0xff00
4510 ; .org opcjmp + 256
4511 ; .org FLASHEND & 0xff00
4512
4513 sz53p_tab:
4514 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
4515 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
4516 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
4517 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
4518 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
4519 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
4520 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
4521 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
4522 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
4523 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
4524 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
4525 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
4526 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
4527 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
4528 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
4529 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
4530 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
4531 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
4532 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
4533 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
4534 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
4535 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
4536 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
4537 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
4538 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
4539 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
4540 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
4541 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
4542 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
4543 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
4544 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
4545 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
4546
4547 ; vim:set ts=8 noet nowrap
CP/M on an AVR