]> cloudbase.mooo.com Git - avrcpm.git/blob - cpm/CFGACPM.LIB
SVN --> GIT
[avrcpm.git] / cpm / CFGACPM.LIB
1 ; Configuration and common defs for avrcpm BIOS and IPL
2
3 ; Copyright (C) 2010 Leo C.
4 ;
5 ; This program is free software: you can redistribute it and/or modify
6 ; it under the terms of the GNU General Public License as published by
7 ; the Free Software Foundation, either version 3 of the License, or
8 ; (at your option) any later version.
9 ;
10 ; This program is distributed in the hope that it will be useful,
11 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
12 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 ; GNU General Public License for more details.
14 ;
15 ; You should have received a copy of the GNU General Public License
16 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
17 ;
18 ; $Id:$
19 ;
20
21 msize equ 62 ;size of available RAM in k
22
23 bias equ (msize-20) * 1024
24 ccp equ 3400h+bias ;base of cpm ccp
25 bdos equ ccp+806h ;base of bdos
26 bios equ ccp+1600h ;base of bios
27 cdisk equ 0004h ;current disk number (0 ... 15)
28 iobyte equ 0003h ;intel iobyte
29 buff equ 0080h ;default buffer address
30 retry equ 3 ;max retries on disk i/o before error
31
32
33 ;copy from avr/virt_ports.asm:
34 ;
35 ; Port Direction Function
36 ;hex dez
37 ;-------------------------------------------------------------------------
38 ;00 0 in - Con status. (deprecated)
39 ; Returns 0xFF if the UART has a byte, 0 otherwise.
40 ;01 1 in/out - Console input, aka UDR. / Console Output
41 ;02 2 out - Console Output (deprecated)
42 ;03 3 in - "UART" status: bit 0 = rx (UARTRXRDY)
43 ; bit 1 = tx (UARTTXRDY)
44 ;03 3 out - "UART" control (tbd)
45 ;04 4 in/out - "UART" data register, no wait
46 ;
47 ;------------------------ Virtual I2C interface --------------------------
48 ;05 5 out - Control Port: 1 = Start read operation
49 ; 2 = Start write operation
50 ;05 5 in - Status of last Transfer: 0 = ok, else fail
51 ;06 6 in/out - Number of bytes to transfer, including Slave address
52 ;07,08 7,8 in/out - Read/Write address low/high
53 ;
54 ;------------------------ Disk I/O ---------------------------------------
55 ;0D,0E 13,14 in/out - Set address of Bios Controll Block
56 ;0F 15 in/out - Disk select
57 ;10,11 16,17 in/out - Track select
58 ;12,13 18,19 in/out - Sector select
59 ;14,15 20,21 in/out - Write addr
60 ;
61 ;16 22 out - Trigger disk i/o operations
62 ; Bit 7 = 1: Read sector
63 ; Bit 6 = 1: Write sector
64 ; Bit 5 = 1: BIOS WBOOT
65 ; Bit 4 = 1: BIOS Home
66 ; Only one of bits 4..7 may be set.
67 ; If Write function (bit 6=1):
68 ; Bits 0..2: 0 - write to allocated
69 ; 1 - write to directory
70 ; 2 - write unallocated
71 ; 3 - write to directory
72 ;
73 ;16 22 in - Result of last read/write operation.
74 ; 0x00 = ok, 0xff = error (--> Bad Sector)
75 ;
76 ;
77 ;------------------------ ADC Interface ----------------------------------
78 ;17-19 23,25 in - ADC Channels 6,7 and 8 (Temp-Sensor)
79 ; ADC 6,7 only Devices in 32 pin Case (TQFP/MLF)
80 ; 8 Bit only
81 ; Fixed ADC clock (FCPU/128, 156KHz at 20MHz CPU)
82 ; Vref = VCC
83 ;20,21 in - ADC: Measure VCC
84 ;
85 ;------------------------ Wall Clock and Timers --------------------------
86 ;40 64-71 in/out - Timer/Clock control.
87 ;41-46
88 ;
89 ;47-4D clock - BCD format: ss, mm, hh, DD, MM, YYl, YYh
90 ;
91 ;4F debug - start/stop trace, print stack, ...
92 ;
93 ;------------------------ Ports ------------------------------------------
94 ;80-87 in/out - Port-Expander PCF8574 (max. 8 Chips)
95 ;88-8F in/out - Port-Expander PCF8574A (not implemented yet!)
96
97 ;-----------------------------------------------------------------------
98 ; Z80/8080 Virtual Ports
99
100 UARTDR equ 1 ;UART Data Register
101 UARTCSR equ 3 ;UART Control/Status Register
102 UARTRXRDY equ 01h ;RxReady Status Bit Mask
103 UARTTXRDY equ 02h ;TxReady Status Bit Mask
104
105 READ_FUNC equ 7
106 WRITE_FUNC equ 6
107 BOOT_FUNC equ 5
108 HOME_FUNC equ 4
109
110 TIMERCTL equ 040h
111 TIMER_MSECS equ TIMERCTL+1
112 TIMER_SECS equ TIMER_MSECS+2
113 starttimercmd equ 1
114 quitTimerCmd equ 2
115 printTimerCmd equ 15
116 uptimeCmd equ 16
117
118 CLOCKPORT equ TIMERCTL+7
119
120 DEBUGPORT equ 04FH
121 StartTraceCmd equ 1
122 StopTraceCmd equ 0
123