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[avrcpm.git] / avrcpm / avr / 8080int-jmp.asm
1 ; 8080 Interpreter.
2 ; This is part of the Z80-CP/M emulator written by Sprite_tm.
3 ;
4
5 ; Copyright (C) 2010 Sprite_tm
6 ; Copyright (C) 2010 Leo C.
7 ; Copyright (C) 2010 Horst S.
8
9 ; This file is part of avrcpm.
10 ;
11 ; avrcpm is free software: you can redistribute it and/or modify it
12 ; under the terms of the GNU General Public License as published by
13 ; the Free Software Foundation, either version 3 of the License, or
14 ; (at your option) any later version.
15 ;
16 ; avrcpm is distributed in the hope that it will be useful,
17 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
18 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 ; GNU General Public License for more details.
20 ;
21 ; You should have received a copy of the GNU General Public License
22 ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23 ;
24 ; $Id$
25 ;
26
27 .dseg
28
29 z_b: .byte 1
30 z_c: .byte 1
31 z_d: .byte 1
32 z_e: .byte 1
33 z_h: .byte 1
34 z_l: .byte 1
35
36
37 .cseg
38
39 ;Init z80
40 z80_init:
41 ldi z_pcl,low (IPLADDR)
42 ldi z_pch,high(IPLADDR)
43
44 cbi flags,trace
45 printnewline
46 printstring "Ok, CPU is live!"
47 printnewline
48
49 main:
50 .if INS_DEBUG
51 cbi flags,trace
52 cpi z_pch,DBG_TRACE_BOTTOM
53 brlo notraceon
54 cpi z_pch,DBG_TRACE_TOP
55 brsh notraceon
56 sbi flags,trace
57 notraceon:
58 .endif
59
60
61 .if PRINT_PC
62 cpi z_pch,DBG_TRACE_BOTTOM
63 brlo noprintpc
64 cpi z_pch,DBG_TRACE_TOP
65 brsh noprintpc
66
67 printnewline
68 printstring "PC="
69 movw temp,z_pcl
70 rcall printhexw
71 printstring " "
72 noprintpc:
73 .endif
74
75 .if INS_DEBUG
76 sbic flags,trace
77 rcall printregs
78 .endif
79 ;hier kommt die Interruptbehandlung rein
80
81
82 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
83 adiw z_pcl,1 ;++z_pc
84 ldi zh,high(opcjmp) ;
85 icall
86 rjmp main ;
87
88
89
90 ; .listmac
91
92 ;--------------------------------------------------
93 ; Generate a table entry for one instruction
94 ;
95 ; instr fetch, op, store
96 ;
97 .macro instr
98 .ifndef opcjmp_table_pos_
99 .set todo_table_pos_ = PC
100 ; Place the opcode jump table on the next available location.
101 .equ opcjmp = (PC+255) & 0xff00
102 .set opcjmp_table_pos_ = opcjmp
103 .endif
104
105 .if todo_table_pos_ < opcjmp + 256 + 128
106 .if todo_table_pos_ + 3 >= opcjmp
107 .set todo_table_pos_ = opcjmp + 256 + 128
108 .endif
109 .endif
110 .set do_@0_@1_@2 = todo_table_pos_ ; make a label
111
112 .org opcjmp_table_pos_
113 rjmp do_@0_@1_@2 ; generate a jump to the label
114 .set opcjmp_table_pos_ = PC
115
116 .org do_@0_@1_@2
117
118 .set fetch_ = (@0 != do_fetch_nop) ; must call or jump to fetch phase
119 .set op_ = (do_@1 != do_op_nop) ; must call or jump to op phase
120 .set store_ = (@2 != do_store_nop) ; must jump to store phase
121
122 .if fetch_ || op_ || store_ ; something to do
123 .if fetch_ ; must fetch
124 .if op_ || store_
125 rcall @0 ; fetch and come back here
126 .else ;
127 rjmp @0 ; fetch and return to main
128 .endif
129 .endif
130 .if op_ ; must exec op
131 .if store_
132 rcall do_@1 ; do op and come back here
133 .else
134 rjmp do_@1 ; do op and return to main
135 .endif
136 .endif
137 .if store_ ; must store
138 rjmp @2 ; store is allways last
139 .endif
140 .else
141 ret ; nop, go back to main
142 .endif
143
144 .set todo_table_pos_ = PC
145 .endm
146
147
148 ; ------------ Fetch phase stuff -----------------
149
150 ;.org (PC+255) & 0xff00
151 fetch_ops:
152 do_fetch_nop:
153 ret
154
155 do_fetch_a:
156 mov opl,z_a
157 ret
158
159 do_fetch_b:
160 lds opl,z_b
161 ret
162
163 do_fetch_c:
164 lds opl,z_c
165 ret
166
167 do_fetch_d:
168 lds opl,z_d
169 ret
170
171 do_fetch_e:
172 lds opl,z_e
173 ret
174
175 do_fetch_h:
176 lds opl,z_h
177 ret
178
179 do_fetch_l:
180 lds opl,z_l
181 ret
182
183 do_fetch_af:
184 mov opl,z_flags
185 mov oph,z_a
186 ret
187
188 do_fetch_bc:
189 lds opl,z_c
190 lds oph,z_b
191 ret
192
193 do_fetch_de:
194 lds opl,z_e
195 lds oph,z_d
196 ret
197
198 do_fetch_hl:
199 lds opl,z_l
200 lds oph,z_h
201 ret
202
203 do_fetch_sp:
204 movw opl,z_spl
205 ret
206
207 do_fetch_mbc:
208 lds xh,z_b
209 lds xl,z_c
210 mem_read_d opl
211 ret
212
213 do_fetch_mde:
214 lds xh,z_d
215 lds xl,z_e
216 mem_read_d opl
217 ret
218
219 do_fetch_mhl:
220 lds xh,z_h
221 lds xl,z_l
222 mem_read_d opl
223 ret
224
225 do_fetch_msp:
226 movw x,z_spl
227 mem_read_d opl
228 adiw x,1
229 mem_read_d oph
230 ret
231
232 do_fetch_dir8:
233 mem_read_ds opl, z_pc
234 adiw z_pcl,1
235 ret
236
237 do_fetch_dir16:
238 mem_read_ds opl, z_pc
239 adiw z_pcl,1
240 mem_read_ds oph, z_pc
241 adiw z_pcl,1
242 ret
243
244 do_fetch_rst:
245 movw x,z_pcl
246 sbiw x,1
247 mem_read_d opl
248 andi opl,0x38
249 ldi oph,0
250 ret
251
252 ; ------------ Store phase stuff -----------------
253
254 ;.org (PC+255) & 0xff00
255 store_ops:
256 do_store_nop:
257 ret
258
259 do_store_a:
260 mov z_a,opl
261 ret
262
263 do_store_b:
264 sts z_b,opl
265 ret
266
267 do_store_c:
268 sts z_c,opl
269 ret
270
271 do_store_d:
272 sts z_d,opl
273 ret
274
275 do_store_e:
276 sts z_e,opl
277 ret
278
279 do_store_h:
280 sts z_h,opl
281 ret
282
283 do_store_l:
284 sts z_l,opl
285 ret
286
287 do_store_af:
288 mov z_a,oph
289 mov z_flags,opl
290 ret
291
292 do_store_bc:
293 sts z_b,oph
294 sts z_c,opl
295 ret
296
297 do_store_de:
298 sts z_d,oph
299 sts z_e,opl
300 ret
301
302 do_store_hl:
303 sts z_h,oph
304 sts z_l,opl
305 ret
306
307 do_store_mbc:
308 lds xh,z_b
309 lds xl,z_c
310 mem_write_s opl
311 ret
312
313 do_store_mde:
314 lds xh,z_d
315 lds xl,z_e
316 mem_write_s opl
317 ret
318
319 do_store_mhl:
320 lds xh,z_h
321 lds xl,z_l
322 mem_write_s opl
323 ret
324
325 do_store_msp:
326 movw xl,z_spl
327 mem_write_s opl
328 adiw xl,1
329 mem_write_s oph
330 ret
331
332 do_store_sp:
333 movw z_spl,opl
334 ret
335
336 do_store_pc:
337 movw z_pcl,opl
338 ret
339
340 do_store_ret:
341 movw x,z_spl
342 mem_read_d z_pcl
343 adiw x,1
344 mem_read_d z_pch
345 adiw x,1
346 movw z_spl,x
347
348 .if STACK_DBG
349 printnewline
350 printstring "Stack pop "
351 movw temp,z_pcl
352 rcall printhexw
353 printstring ", SP is now "
354 movw temp,z_spl
355 rcall printhexw
356 printstring ". "
357 .endif
358 ret
359
360 do_store_call:
361 movw xl,z_spl
362 sbiw x,1
363 mem_write_s z_pch
364 sbiw x,1
365 mem_write_s z_pcl
366 movw z_spl,xl
367
368 .if STACK_DBG
369 printnewline
370 printstring "Stack push "
371 movw temp,z_pcl
372 rcall printhexw
373 printstring ", SP is now "
374 movw temp,z_spl
375 rcall printhexw
376 printstring ". "
377 .endif
378 movw z_pcl,opl
379 ret
380
381
382 do_store_am:
383 mem_write_ds op, z_a
384 ret
385
386
387
388
389 ; ------------ Operation phase stuff -----------------
390
391 ;----------------------------------------------------------------
392 ;| |
393 ;| Zilog |
394 ;| |
395 ;| ZZZZZZZ 88888 000 |
396 ;| Z 8 8 0 0 |
397 ;| Z 8 8 0 0 0 |
398 ;| Z 88888 0 0 0 |
399 ;| Z 8 8 0 0 0 |
400 ;| Z 8 8 0 0 |
401 ;| ZZZZZZZ 88888 000 |
402 ;| |
403 ;| Z80 MICROPROCESSOR Instruction Set Summary |
404 ;| |
405 ;----------------------------------------------------------------
406 ;----------------------------------------------------------------
407 ;|Mnemonic |SZHPNC|Description |Notes |
408 ;|----------+------+---------------------+----------------------|
409 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
410 ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
411 ;|ADD A,s |***V0*|Add |A=A+s |
412 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
413 ;|ADD IX,pp |--?-0*|Add |IX=IX+pp |
414 ;|ADD IY,rr |--?-0*|Add |IY=IY+rr |
415 ;|AND s |**1P00|Logical AND |A=A&s |
416 ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
417 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
418 ;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
419 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
420 ;|CP s |***V1*|Compare |A-s |
421 ;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
422 ;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
423 ;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
424 ;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
425 ;|CPL |--1-1-|Complement |A=~A |
426 ;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
427 ;|DEC s |***V1-|Decrement |s=s-1 |
428 ;|DEC xx |------|Decrement |xx=xx-1 |
429 ;|DEC ss |------|Decrement |ss=ss-1 |
430 ;|DI |------|Disable Interrupts | |
431 ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
432 ;|EI |------|Enable Interrupts | |
433 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
434 ;|EX [SP],xx|------|Exchange |[SP]<->xx |
435 ;|EX AF,AF' |------|Exchange |AF<->AF' |
436 ;|EX DE,HL |------|Exchange |DE<->HL |
437 ;|EXX |------|Exchange |qq<->qq' (except AF)|
438 ;|HALT |------|Halt | |
439 ;|IM n |------|Interrupt Mode | (n=0,1,2)|
440 ;|IN A,[n] |------|Input |A=[n] |
441 ;|IN r,[C] |***P0-|Input |r=[C] |
442 ;|INC r |***V0-|Increment |r=r+1 |
443 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
444 ;|INC xx |------|Increment |xx=xx+1 |
445 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
446 ;|INC ss |------|Increment |ss=ss+1 |
447 ;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
448 ;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
449 ;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
450 ;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
451 ;|JP [HL] |------|Unconditional Jump |PC=[HL] |
452 ;|JP [xx] |------|Unconditional Jump |PC=[xx] |
453 ;|JP nn |------|Unconditional Jump |PC=nn |
454 ;|JP cc,nn |------|Conditional Jump |If cc JP |
455 ;|JR e |------|Unconditional Jump |PC=PC+e |
456 ;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
457 ;|LD dst,src|------|Load |dst=src |
458 ;|LD A,i |**0*0-|Load |A=i (i=I,R)|
459 ;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
460 ;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
461 ;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
462 ;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
463 ;|NEG |***V1*|Negate |A=-A |
464 ;|NOP |------|No Operation | |
465 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
466 ;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
467 ;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
468 ;|OUT [C],r |------|Output |[C]=r |
469 ;|OUT [n],A |------|Output |[n]=A |
470 ;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
471 ;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
472 ;|POP xx |------|Pop |xx=[SP]+ |
473 ;|POP qq |------|Pop |qq=[SP]+ |
474 ;|PUSH xx |------|Push |-[SP]=xx |
475 ;|PUSH qq |------|Push |-[SP]=qq |
476 ;|RES b,m |------|Reset bit |m=m&{~2^b} |
477 ;|RET |------|Return |PC=[SP]+ |
478 ;|RET cc |------|Conditional Return |If cc RET |
479 ;|RETI |------|Return from Interrupt|PC=[SP]+ |
480 ;|RETN |------|Return from NMI |PC=[SP]+ |
481 ;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
482 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
483 ;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
484 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
485 ;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
486 ;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
487 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
488 ;|RRC m |**0P0*|Rotate Right Circular|m=->m |
489 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
490 ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
491 ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
492 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
493 ;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY |
494 ;|SCF |--0-01|Set Carry Flag |CY=1 |
495 ;|SET b,m |------|Set bit |m=mv{2^b} |
496 ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
497 ;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
498 ;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
499 ;|SUB s |***V1*|Subtract |A=A-s |
500 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
501 ;|----------+------+--------------------------------------------|
502 ;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
503 ;| S |S |Sign flag (Bit 7) |
504 ;| Z | Z |Zero flag (Bit 6) |
505 ;| HC | H |Half Carry flag (Bit 4) |
506 ;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
507 ;| N | N |Add/Subtract flag (Bit 1) |
508 ;| CY | C|Carry flag (Bit 0) |
509 ;|-----------------+--------------------------------------------|
510 ;| n |Immediate addressing |
511 ;| nn |Immediate extended addressing |
512 ;| e |Relative addressing (PC=PC+2+offset) |
513 ;| [nn] |Extended addressing |
514 ;| [xx+d] |Indexed addressing |
515 ;| r |Register addressing |
516 ;| [rr] |Register indirect addressing |
517 ;| |Implied addressing |
518 ;| b |Bit addressing |
519 ;| p |Modified page zero addressing (see RST) |
520 ;|-----------------+--------------------------------------------|
521 ;|DEFB n(,...) |Define Byte(s) |
522 ;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
523 ;|DEFS nn |Define Storage Block |
524 ;|DEFW nn(,...) |Define Word(s) |
525 ;|-----------------+--------------------------------------------|
526 ;| A B C D E |Registers (8-bit) |
527 ;| AF BC DE HL |Register pairs (16-bit) |
528 ;| F |Flag register (8-bit) |
529 ;| I |Interrupt page address register (8-bit) |
530 ;| IX IY |Index registers (16-bit) |
531 ;| PC |Program Counter register (16-bit) |
532 ;| R |Memory Refresh register |
533 ;| SP |Stack Pointer register (16-bit) |
534 ;|-----------------+--------------------------------------------|
535 ;| b |One bit (0 to 7) |
536 ;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
537 ;| d |One-byte expression (-128 to +127) |
538 ;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
539 ;| e |One-byte expression (-126 to +129) |
540 ;| m |Any register r, [HL] or [xx+d] |
541 ;| n |One-byte expression (0 to 255) |
542 ;| nn |Two-byte expression (0 to 65535) |
543 ;| pp |Register pair BC, DE, IX or SP |
544 ;| qq |Register pair AF, BC, DE or HL |
545 ;| qq' |Alternative register pair AF, BC, DE or HL |
546 ;| r |Register A, B, C, D, E, H or L |
547 ;| rr |Register pair BC, DE, IY or SP |
548 ;| s |Any register r, value n, [HL] or [xx+d] |
549 ;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
550 ;| ss |Register pair BC, DE, HL or SP |
551 ;| xx |Index register IX or IY |
552 ;|-----------------+--------------------------------------------|
553 ;| + - * / ^ |Add/subtract/multiply/divide/exponent |
554 ;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
555 ;| <- -> |Rotate left/right |
556 ;| [ ] |Indirect addressing |
557 ;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
558 ;| { } |Combination of operands |
559 ;| # |Also BC=BC-1,DE=DE-1 |
560 ;| ## |Only lower 4 bits of accumulator A used |
561 ;----------------------------------------------------------------
562
563 ;How the flags are supposed to work:
564 ;7 ZFL_S - Sign flag (=MSBit of result)
565 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
566 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
567 ;2 ZFL_P - Parity/2-complement Overflow
568 ;1 ZFL_N - Subtract - set if last op was a subtract
569 ;0 ZFL_C - Carry
570 ;
571 ;I sure hope I got the mapping between flags and instructions correct...
572
573 .equ ZFL_S = 7
574 .equ ZFL_Z = 6
575 .equ ZFL_H = 4
576 .equ ZFL_P = 2
577 .equ ZFL_N = 1
578 .equ ZFL_C = 0
579
580
581 .equ AVR_T = SREG_T
582 .equ AVR_H = SREG_H
583 .equ AVR_S = SREG_S
584 .equ AVR_V = SREG_V
585 .equ AVR_N = SREG_N
586 .equ AVR_Z = SREG_Z
587 .equ AVR_C = SREG_C
588
589 ;------------------------------------------------;
590 ; Load table value from flash indexed by source reg.
591 ;
592 ; ldpmx dstreg,tablebase,indexreg
593 ;
594 ; (6 words, 8 cycles)
595
596 .macro ldpmx
597 ldi zh,high(@1*2) ; table must be page aligned
598 mov zl,@2
599 lpm @0,z
600 .endm
601
602 .macro do_z80_flags_HP
603 #if EM_Z80
604 bmov z_flags, ZFL_P, temp, AVR_V
605 bmov z_flags, ZFL_H, temp, AVR_H
606 #endif
607 .endm
608
609 .macro do_z80_flags_set_N
610 #if EM_Z80
611 ori z_flags, (1<<ZFL_N) ; Negation auf 1
612 #endif
613 .endm
614
615 .macro do_z80_flags_set_HN
616 #if EM_Z80
617 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
618 #endif
619 .endm
620
621 .macro do_z80_flags_clear_N
622 #if EM_Z80
623 andi z_flags,~(1<<ZFL_N)
624 #endif
625 .endm
626
627 .macro do_z80_flags_op_rotate
628 ; must not change avr carry flag!
629 #if EM_Z80
630 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
631 #else
632 andi z_flags, ~( (1<<ZFL_C) )
633 #endif
634 .endm
635
636 .macro do_z80_flags_op_and
637 #if EM_Z80
638 ori z_flags,(1<<ZFL_H)
639 #else
640 ori z_flags,(1<<ZFL_H)
641 #endif
642 .endm
643
644 .macro do_z80_flags_op_or
645 #if EM_Z80
646 #endif
647 .endm
648
649
650 ;----------------------------------------------------------------
651
652 do_op_inv:
653 sbiw z_pcl,1
654 lcall printregs
655 printstring "Invalid opcode! "
656
657 haltinv:
658 rjmp haltinv
659
660 do_op_nop:
661 ret
662
663 ;----------------------------------------------------------------
664 ;|Mnemonic |SZHPNC|Description |Notes |
665 ;----------------------------------------------------------------
666 ;|OUT [n],A |------|Output |[n]=A |
667 ;
668 ;
669 ;Interface with peripherials goes here :)
670 do_op_outa: ; out (opl),a
671 .if PORT_DEBUG
672 printnewline
673 printstring "Port write: "
674 mov temp,z_a
675 rcall printhex
676 printstring " -> ("
677 mov temp,opl
678 rcall printhex
679 printstring ") "
680 .endif
681 mov temp,z_a
682 mov temp2,opl
683 rcall portWrite
684 ret
685
686 ;----------------------------------------------------------------
687 ;|Mnemonic |SZHPNC|Description |Notes |
688 ;----------------------------------------------------------------
689 ;|IN A,[n] |------|Input |A=[n] |
690 ;
691 ;
692 do_op_in: ; in a,(opl)
693 .if PORT_DEBUG
694 printnewline
695 printstring "Port read: ("
696 mov temp,opl
697 rcall printhex
698 printstring ") -> "
699 .endif
700
701 mov temp2,opl
702 lcall portRead
703 mov opl,temp
704
705 .if PORT_DEBUG
706 rcall printhex
707 printstring " "
708 .endif
709 ret
710
711 ;----------------------------------------------------------------
712 ;|Mnemonic |SZHPNC|Description |Notes |
713 ;----------------------------------------------------------------
714 ;|INC r |***V0-|Increment |r=r+1 |
715 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
716 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
717 ;|----------|SZHP C|---------- 8080 ----------------------------|
718 ;|INC r |**-P0-|Increment |r=r+1 |
719 ;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
720 ;
721 ;
722 do_op_inc:
723 inc opl
724 #if EM_Z80
725 in temp, sreg
726 #endif
727 andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
728 ldpmx temp2, sz53p_tab, opl
729 or z_flags,temp2 ;
730 do_z80_flags_HP
731 ret
732
733 do_op_inca:
734 inc z_a
735 #if EM_Z80
736 in temp, sreg
737 #endif
738 andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
739 ldpmx temp2, sz53p_tab, z_a
740 or z_flags,temp2 ;
741 do_z80_flags_HP
742 ret
743
744 ;----------------------------------------------------------------
745 ;|Mnemonic |SZHPNC|Description |Notes |
746 ;----------------------------------------------------------------
747 ;|DEC r |***V1-|Decrement |s=s-1 |
748 ;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
749 ;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
750 ;|----------|SZHP C|---------- 8080 ----------------------------|
751 ;|DEC r |**-P -|Increment |r=r+1 |
752 ;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
753 ;
754 ;
755 do_op_dec:
756 dec opl
757 #if EM_Z80
758 in temp, sreg
759 #endif
760 andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
761 ldpmx temp2, sz53p_tab, opl
762 or z_flags,temp2 ;
763 do_z80_flags_HP
764 do_z80_flags_set_N
765 ret
766
767 do_op_deca:
768 dec z_a
769 #if EM_Z80
770 in temp, sreg
771 #endif
772 andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
773 ldpmx temp2, sz53p_tab, z_a
774 or z_flags,temp2 ;
775 do_z80_flags_HP
776 do_z80_flags_set_N
777 ret
778
779 ;----------------------------------------------------------------
780 ;|Mnemonic |SZHPNC|Description |Notes |
781 ;----------------------------------------------------------------
782 ;|INC xx |------|Increment |xx=xx+1 |
783 ;|INC ss |------|Increment |ss=ss+1 |
784 ;
785 ;
786 do_op_inc16:
787 subi opl,low(-1)
788 sbci oph,high(-1)
789 ret
790
791 ;----------------------------------------------------------------
792 ;|Mnemonic |SZHPNC|Description |Notes |
793 ;----------------------------------------------------------------
794 ;|DEC xx |------|Decrement |xx=xx-1 |
795 ;|DEC ss |------|Decrement |ss=ss-1 |
796 ;
797 ;
798 do_op_dec16:
799 subi opl, 1
800 sbci oph, 0
801 ret
802
803 ;----------------------------------------------------------------
804 ;|Mnemonic |SZHPNC|Description |Notes |
805 ;----------------------------------------------------------------
806 ;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
807 ;|----------|SZHP C|---------- 8080 ----------------------------|
808 ;|RLCA |---- *|Rotate Left Circular |A=A<- |
809 ;
810 ;
811 do_op_rlc:
812 ;Rotate Left Cyclical. All bits move 1 to the
813 ;left, the msb becomes c and lsb.
814 do_z80_flags_op_rotate
815 lsl opl
816 brcc do_op_rlc_noc
817 ori opl, 1
818 ori z_flags, (1<<ZFL_C)
819 do_op_rlc_noc:
820 ret
821
822 ;----------------------------------------------------------------
823 ;|Mnemonic |SZHPNC|Description |Notes |
824 ;----------------------------------------------------------------
825 ;|RRCA |--0-0*|Rotate Right Circular|A=->A |
826 ;|----------|SZHP C|---------- 8080 ----------------------------|
827 ;|RRCA |---- *|Rotate Right Circular|A=->A |
828 ;
829 ;
830 do_op_rrc:
831 ;Rotate Right Cyclical. All bits move 1 to the
832 ;right, the lsb becomes c and msb.
833 do_z80_flags_op_rotate
834 lsr opl
835 brcc do_op_rrc_noc
836 ori opl, 0x80
837 ori z_flags, (1<<ZFL_C)
838 do_op_rrc_noc:
839 ret
840
841 ;----------------------------------------------------------------
842 ;|Mnemonic |SZHPNC|Description |Notes |
843 ;----------------------------------------------------------------
844 ;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
845 ;|----------|SZHP C|---------- 8080 ----------------------------|
846 ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
847 ;
848 ;
849 do_op_rr:
850 ;Rotate Right. All bits move 1 to the right, the lsb
851 ;becomes c, c becomes msb.
852 clc ; get z80 carry to avr carry
853 sbrc z_flags,ZFL_C
854 sec
855 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
856 bmov z_flags,ZFL_C, opl,0 ; Bit 0 --> CY
857 ror opl
858 ret
859
860 ;----------------------------------------------------------------
861 ;|Mnemonic |SZHPNC|Description |Notes |
862 ;----------------------------------------------------------------
863 ;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
864 ;|----------|SZHP C|---------- 8080 ----------------------------|
865 ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
866 ;
867 ;
868 do_op_rl:
869 ;Rotate Left. All bits move 1 to the left, the msb
870 ;becomes c, c becomes lsb.
871 clc
872 sbrc z_flags,ZFL_C
873 sec
874 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
875 bmov z_flags,ZFL_C, opl,7 ; Bit 7 --> CY
876 rol opl
877 ret
878
879 ;----------------------------------------------------------------
880 ;|Mnemonic |SZHPNC|Description |Notes |
881 ;----------------------------------------------------------------
882 ;|ADD A,s |***V0*|Add |A=A+s |
883 ;|----------|SZHP C|---------- 8080 ----------------------------|
884 ;|ADD A,s |***P *|Add |A=A+s |
885 ;
886 ;
887 do_op_adda:
888 add z_a,opl
889 in temp,sreg
890 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
891 bmov z_flags,ZFL_C, temp,AVR_C
892 do_z80_flags_HP
893 ret
894
895 ;----------------------------------------------------------------
896 ;|Mnemonic |SZHPNC|Description |Notes |
897 ;----------------------------------------------------------------
898 ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
899 ;|----------|SZHP C|---------- 8080 ----------------------------|
900 ;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
901 ;
902 ;
903 do_op_adca:
904 clc
905 sbrc z_flags,ZFL_C
906 sec
907 adc z_a,opl
908 in temp,sreg
909 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
910 bmov z_flags,ZFL_C, temp,AVR_C
911 do_z80_flags_HP
912 ret
913
914 ;----------------------------------------------------------------
915 ;|Mnemonic |SZHPNC|Description |Notes |
916 ;----------------------------------------------------------------
917 ;|SUB s |***V1*|Subtract |A=A-s |
918 ;|----------|SZHP C|---------- 8080 ----------------------------|
919 ;|SUB s |***P *|Subtract |A=A-s |
920
921 ;
922 do_op_subfa:
923 sub z_a,opl
924 in temp,sreg
925 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
926 bmov z_flags,ZFL_C, temp,AVR_C
927 do_z80_flags_HP
928 do_z80_flags_set_N
929 ret
930
931 ;----------------------------------------------------------------
932 ;|Mnemonic |SZHPNC|Description |Notes |
933 ;----------------------------------------------------------------
934 ;|CP s |***V1*|Compare |A-s |
935 ;|----------|SZHP C|---------- 8080 ----------------------------|
936 ;|CP s |***P *|Compare |A-s |
937
938 ;
939 do_op_cpfa:
940 mov temp,z_a
941 sub temp,opl
942 mov opl,temp
943 in temp,sreg
944 ldpmx z_flags,sz53p_tab,opl ;S,Z,P
945 bmov z_flags,ZFL_C, temp,AVR_C
946 do_z80_flags_HP
947 do_z80_flags_set_N
948 ret
949
950 ;----------------------------------------------------------------
951 ;|Mnemonic |SZHPNC|Description |Notes |
952 ;----------------------------------------------------------------
953 ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
954 ;|----------|SZHP C|---------- 8080 ----------------------------|
955 ;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
956 ;
957 ;
958 do_op_sbcfa:
959 clc
960 sbrc z_flags,ZFL_C
961 sec
962 sbc z_a,opl
963 in temp,sreg
964 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
965 bmov z_flags,ZFL_C, temp,AVR_C
966 do_z80_flags_HP
967 do_z80_flags_set_N
968 ret
969
970 ;----------------------------------------------------------------
971 ;|Mnemonic |SZHPNC|Description |Notes |
972 ;----------------------------------------------------------------
973 ;|AND s |**1P00|Logical AND |A=A&s |
974 ;|----------|SZHP C|---------- 8080 ----------------------------|
975 ;|AND s |**-P 0|Logical AND |A=A&s |
976 ;
977 ; TODO H-Flag
978 do_op_anda:
979 and z_a,opl ;
980 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
981 do_z80_flags_op_and
982 ret
983
984
985 ;----------------------------------------------------------------
986 ;|Mnemonic |SZHPNC|Description |Notes |
987 ;----------------------------------------------------------------
988 ;|OR s |**0P00|Logical inclusive OR |A=Avs |
989 ;|----------|SZHP C|---------- 8080 ----------------------------|
990 ;|OR s |**-P00|Logical inclusive OR |A=Avs |
991 ;
992 ; TODO: H-Flag
993 do_op_ora:
994 or z_a,opl
995 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
996 do_z80_flags_op_or
997 ret
998
999 ;----------------------------------------------------------------
1000 ;|Mnemonic |SZHPNC|Description |Notes |
1001 ;----------------------------------------------------------------
1002 ;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1003 ;|----------|SZHP C|---------- 8080 ----------------------------|
1004 ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1005 ;
1006 ; TODO: H-Flag
1007 do_op_xora:
1008 eor z_a,opl
1009 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1010 do_z80_flags_op_or
1011 ret
1012
1013 ;----------------------------------------------------------------
1014 ;|Mnemonic |SZHPNC|Description |Notes |
1015 ;----------------------------------------------------------------
1016 ;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1017 ;|----------|SZHP C|---------- 8080 ----------------------------|
1018 ;|ADD HL,ss |---- *|Add |HL=HL+ss |
1019 ;
1020 ;
1021 do_op_addhl:
1022 lds temp,z_l
1023 lds temp2,z_h
1024 add opl,temp
1025 adc oph,temp2
1026 in temp,sreg
1027 bmov z_flags,ZFL_H, temp,AVR_H
1028 bmov z_flags,ZFL_C, temp,AVR_C
1029 do_z80_flags_clear_N
1030 ret
1031
1032 ;----------------------------------------------------------------
1033 ;|Mnemonic |SZHPNC|Description |Notes |
1034 ;----------------------------------------------------------------
1035 ;|LD dst,src|------|Load |dst=src |
1036 ;
1037 ;
1038 do_op_sthl: ;store hl to mem loc in opl:h
1039 movw xl,opl
1040 lds temp,z_l
1041 mem_write
1042 adiw xl,1
1043 lds temp,z_h
1044 mem_write
1045 ret
1046
1047 ;----------------------------------------------------------------
1048 ;|Mnemonic |SZHPNC|Description |Notes |
1049 ;----------------------------------------------------------------
1050 ;|LD dst,src|------|Load |dst=src |
1051 ;
1052 ;
1053 do_op_rmem16:
1054 movw xl,opl
1055 mem_read_d opl
1056 adiw x,1
1057 mem_read_d oph
1058 ret
1059
1060 ;----------------------------------------------------------------
1061 ;|Mnemonic |SZHPNC|Description |Notes |
1062 ;----------------------------------------------------------------
1063 ;|LD dst,src|------|Load |dst=src |
1064 ;
1065 ;
1066 do_op_rmem8:
1067 mem_read_ds opl, op
1068 ret
1069
1070 ;----------------------------------------------------------------
1071 ;|Mnemonic |SZHPNC|Description |Notes |
1072 ;----------------------------------------------------------------
1073 ;|DAA |***P-*|Decimal Adjust Acc. | |
1074 ;|----------|SZHP C|---------- 8080 ----------------------------|
1075 ;
1076 ; Not yet checked
1077
1078 ; Description (http://www.z80.info/z80syntx.htm#DAA):
1079 ; This instruction conditionally adjusts the accumulator for BCD addition
1080 ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1081 ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1082 ;
1083 ; -------------------------------------------------------------------------------
1084 ; | | C Flag | HEX value in | H Flag | HEX value in | Number | C flag|
1085 ; | Operation| Before | upper digit | Before | lower digit | added | After |
1086 ; | | DAA | (bit 7-4) | DAA | (bit 3-0) | to byte | DAA |
1087 ; |-----------------------------------------------------------------------------|
1088 ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1089 ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1090 ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1091 ; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1092 ; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1093 ; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1094 ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1095 ; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1096 ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1097 ; |-----------------------------------------------------------------------------|
1098 ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1099 ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1100 ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1101 ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1102 ; |-----------------------------------------------------------------------------|
1103 ;
1104 ; Flags:
1105 ; C: See instruction.
1106 ; N: Unaffected.
1107 ; P/V: Set if Acc. is even parity after operation, reset otherwise.
1108 ; H: See instruction.
1109 ; Z: Set if Acc. is Zero after operation, reset otherwise.
1110 ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1111
1112
1113
1114 #if 1
1115 do_op_da:
1116 ldi oph,0 ; what to add
1117 sbrc z_flags,ZFL_H ; if H-Flag
1118 rjmp op_da_06
1119 mov temp,opl
1120 andi temp,0x0f ; ... or lower digit > 9
1121 cpi temp,0x0a
1122 brlo op_da_06n
1123 op_da_06:
1124 ori oph,0x06
1125 op_da_06n:
1126 sbrc z_flags,(1<<ZFL_C)
1127 rjmp op_da_60
1128 cpi opl,0xa0
1129 brlo op_da_60n
1130 op_da_60:
1131 ori oph,0x60
1132 op_da_60n:
1133 cpi opl,0x9a
1134 brlo op_da_99n
1135 ori z_flags,(1<<ZFL_C); set C
1136 op_da_99n:
1137 sbrs z_flags,ZFL_N ; if sub-op
1138 rjmp op_da_add ; then
1139 sub opl,oph
1140 rjmp op_da_ex
1141 op_da_add: ; else add-op
1142 cpi opl,0x91
1143 brlo op_da_60n2
1144 mov temp,opl
1145 andi temp,0x0f
1146 cpi temp,0x0a
1147 brlo op_da_60n2
1148 ori oph,0x60
1149 op_da_60n2:
1150 add opl,oph
1151 op_da_ex:
1152 in temp,SREG
1153 sbrc temp,AVR_H
1154 ori z_flags,(1<<ZFL_C)
1155 andi z_flags,(1<<ZFL_N)|(1<<ZFL_C) ; preserve C,N
1156 ldpmx temp2, sz53p_tab, opl ; get S,Z,P
1157 or z_flags,temp2
1158 bmov z_flags,ZFL_H, temp,AVR_H ; H (?)
1159 ret
1160 #else
1161
1162 do_op_da:
1163 sbrc z_flags,ZFL_N ; if add-op
1164 rjmp do_op_da_sub ; then
1165 ldi temp2,0 ;
1166 mov temp,opl ;
1167 andi temp,0x0f ;
1168 cpi temp,0x0a ; if lower digit > 9
1169 brlo do_op_da_h ;
1170 ori temp2,0x06 ; add 6 to lower digit
1171 do_op_da_h: ;
1172 sbrc z_flags,ZFL_H ; ... or H-Flag
1173 ori temp2,0x06 ;
1174 add opl,temp2 ;
1175
1176 ldi temp2,0 ;
1177 mov temp,opl ;
1178 andi temp,0xf0 ;
1179 cpi temp,0xa0 ;
1180 brlo do_op_da_c ;
1181 ori temp2,0x60 ;
1182 do_op_da_c: ; else sub-op
1183 sbrc z_flags,ZFL_C ;
1184 ori temp2,0x60 ;
1185 andi z_flags, ~( (1<<ZFL_S) | (1<<ZFL_Z) | (1<<ZFL_H) )
1186 add opl,temp2 ;
1187 in temp,SREG ;
1188 bst temp,AVR_Z ;Z-Flag
1189 bld z_flags,ZFL_Z ;
1190 bst temp,AVR_N ;S-Flag
1191 bst z_flags,ZFL_S ;
1192 sbrc temp2,5 ;C-Flag, set if 0x06 added
1193 ori z_flags,(1<<ZFL_C) ;
1194 ;H-Flag?
1195 ret
1196
1197 do_op_da_sub: ;TODO:
1198 rcall do_op_inv
1199 ret
1200 #endif
1201
1202 ;----------------------------------------------------------------
1203 ;|Mnemonic |SZHPNC|Description |Notes |
1204 ;----------------------------------------------------------------
1205 ;|SCF |--0-01|Set Carry Flag |CY=1 |
1206 ;|----------|SZHP C|---------- 8080 ----------------------------|
1207 ;
1208 ;
1209 do_op_scf:
1210 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
1211 ori z_flags,(1<<ZFL_C)
1212 ret
1213
1214 ;----------------------------------------------------------------
1215 ;|Mnemonic |SZHPNC|Description |Notes |
1216 ;----------------------------------------------------------------
1217 ;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
1218 ;|----------|SZHP C|---------- 8080 ----------------------------|
1219 ;|SCF |---- 1|Set Carry Flag |CY=1 |
1220 ;
1221 ;TODO: H-Flag
1222 do_op_ccf:
1223 do_z80_flags_clear_N
1224 ldi temp,(1<<ZFL_C)
1225 eor z_flags,temp
1226 ret
1227
1228 ;----------------------------------------------------------------
1229 ;|Mnemonic |SZHPNC|Description |Notes |
1230 ;----------------------------------------------------------------
1231 ;|CPL |--1-1-|Complement |A=~A |
1232 ;|----------|SZHP C|---------- 8080 ----------------------------|
1233 ;|CPL |---- -|Complement |A=~A |
1234 ;
1235 ;
1236 do_op_cpl:
1237 com z_a
1238 do_z80_flags_set_HN
1239 ret
1240
1241
1242 ;----------------------------------------------------------------
1243 ;|Mnemonic |SZHPNC|Description |Notes |
1244 ;----------------------------------------------------------------
1245 ;|PUSH xx |------|Push |-[SP]=xx |
1246 ;|PUSH qq |------|Push |-[SP]=qq |
1247 ;
1248 ;
1249 do_op_push16:
1250 movw xl,z_spl
1251 sbiw x,1
1252 mem_write_s oph
1253 sbiw x,1
1254 mem_write_s opl
1255 movw z_spl,xl
1256
1257 .if STACK_DBG
1258 printnewline
1259 printstring "Stack push "
1260 movw temp,opl
1261 rcall printhexw
1262 printstring ", SP is now "
1263 movw temp,z_spl
1264 rcall printhexw
1265 printstring ". "
1266 .endif
1267
1268 ret
1269
1270 ;----------------------------------------------------------------
1271 ;|Mnemonic |SZHPNC|Description |Notes |
1272 ;----------------------------------------------------------------
1273 ;|POP xx |------|Pop |xx=[SP]+ |
1274 ;|POP qq |------|Pop |qq=[SP]+ |
1275 ;
1276 ;
1277 do_op_pop16:
1278 movw x,z_spl
1279 mem_read_d opl
1280 adiw x,1
1281 mem_read_d oph
1282 adiw x,1
1283 movw z_spl,x
1284
1285 .if STACK_DBG
1286 printnewline
1287 printstring "Stack pop "
1288 movw temp,opl
1289 rcall printhexw
1290 printstring ", SP is now "
1291 movw temp,z_spl
1292 rcall printhexw
1293 printstring ". "
1294 .endif
1295 ret
1296
1297 ;----------------------------------------------------------------
1298 ;|Mnemonic |SZHPNC|Description |Notes |
1299 ;----------------------------------------------------------------
1300 ;|EX [SP],HL|------|Exchange |[SP]<->HL |
1301 ;|EX DE,HL |------|Exchange |DE<->HL |
1302 ;-----------------------------Z80--------------------------------
1303 ;
1304 do_op_exhl:
1305 lds temp,z_l
1306 lds temp2,z_h
1307 sts z_l,opl
1308 sts z_h,oph
1309 movw opl,temp
1310 ret
1311
1312 ;----------------------------------------------------------------
1313 ;|Mnemonic |SZHPNC|Description |Notes |
1314 ;----------------------------------------------------------------
1315 ;
1316 ; TODO: Implement IFF1, IFF2
1317 do_op_di:
1318 ret
1319
1320 ;----------------------------------------------------------------
1321 ;|Mnemonic |SZHPNC|Description |Notes |
1322 ;----------------------------------------------------------------
1323 ;
1324 ; TODO: Implement IFF1, IFF2
1325 do_op_ei:
1326 ret
1327
1328 ;----------------------------------------------------------------
1329 ;|Mnemonic |SZHPNC|Description |Notes |
1330 ;----------------------------------------------------------------
1331 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1332 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1333 ;|RET cc |------|Conditional Return |If cc RET |
1334 ;
1335 ;
1336 do_op_ifnz:
1337 sbrs z_flags, ZFL_Z
1338 ret
1339 pop temp ; nix tun
1340 pop temp ; direkt zuruech zu main
1341 ret
1342
1343 ;----------------------------------------------------------------
1344 ;|Mnemonic |SZHPNC|Description |Notes |
1345 ;----------------------------------------------------------------
1346 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1347 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1348 ;|RET cc |------|Conditional Return |If cc RET |
1349 ;
1350 ;
1351 do_op_ifz:
1352 sbrc z_flags, ZFL_Z
1353 ret
1354 pop temp ; nix tun
1355 pop temp ; direkt zuruech zu main
1356 ret
1357
1358 ;----------------------------------------------------------------
1359 ;|Mnemonic |SZHPNC|Description |Notes |
1360 ;----------------------------------------------------------------
1361 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1362 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1363 ;|RET cc |------|Conditional Return |If cc RET |
1364 ;
1365 ;
1366 do_op_ifnc:
1367 sbrs z_flags, ZFL_C
1368 ret
1369 pop temp ; nix tun
1370 pop temp ; direkt zuruech zu main
1371 ret
1372
1373 ;----------------------------------------------------------------
1374 ;|Mnemonic |SZHPNC|Description |Notes |
1375 ;----------------------------------------------------------------
1376 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1377 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1378 ;|RET cc |------|Conditional Return |If cc RET |
1379 ;
1380 ;
1381 do_op_ifc:
1382 sbrc z_flags, ZFL_C
1383 ret
1384 pop temp ; nix tun
1385 pop temp ; direkt zuruech zu main
1386 ret
1387
1388 ;----------------------------------------------------------------
1389 ;|Mnemonic |SZHPNC|Description |Notes |
1390 ;----------------------------------------------------------------
1391 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1392 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1393 ;|RET cc |------|Conditional Return |If cc RET |
1394 ;
1395 ;
1396 do_op_ifpo:
1397 sbrs z_flags, ZFL_P
1398 ret
1399 pop temp ; nix tun
1400 pop temp ; direkt zuruech zu main
1401 ret
1402
1403 ;----------------------------------------------------------------
1404 ;|Mnemonic |SZHPNC|Description |Notes |
1405 ;----------------------------------------------------------------
1406 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1407 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1408 ;|RET cc |------|Conditional Return |If cc RET |
1409 ;
1410 ;
1411 do_op_ifpe:
1412 sbrc z_flags, ZFL_P
1413 ret
1414 pop temp ; nix tun
1415 pop temp ; direkt zuruech zu main
1416 ret
1417
1418 ;----------------------------------------------------------------
1419 ;|Mnemonic |SZHPNC|Description |Notes |
1420 ;----------------------------------------------------------------
1421 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1422 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1423 ;|RET cc |------|Conditional Return |If cc RET |
1424 ;
1425 ;
1426 do_op_ifp: ;sign positive, aka s=0
1427 sbrs z_flags, ZFL_S
1428 ret
1429 pop temp ; nix tun
1430 pop temp ; direkt zuruech zu main
1431 ret
1432
1433 ;----------------------------------------------------------------
1434 ;|Mnemonic |SZHPNC|Description |Notes |
1435 ;----------------------------------------------------------------
1436 ;|CALL cc,nn|------|Conditional Call |If cc CALL |
1437 ;|JP cc,nn |------|Conditional Jump |If cc JP |
1438 ;|RET cc |------|Conditional Return |If cc RET |
1439 ;
1440 ;
1441 do_op_ifm: ;sign negative, aka s=1
1442 sbrc z_flags, ZFL_S
1443 ret
1444 pop temp ; nix tun
1445 pop temp ; direkt zuruech zu main
1446 ret
1447
1448
1449 ; ----------------------- Opcode decoding -------------------------
1450
1451 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1452 ; operations: fetch, do something, store.
1453 ; The table is made of 256 words.
1454
1455 ; .org (PC+255) & 0xff00
1456
1457 ;todo_table:
1458 ;opcjmp:
1459 instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1460 instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
1461 instr do_fetch_A, op_nop, do_store_MBC ;02 ;LD (BC),A
1462 instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1463 instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1464 instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1465 instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
1466 instr do_fetch_A, op_RLC, do_store_A ;07 ;RLCA
1467 instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1468 instr do_fetch_BC, op_ADDHL, do_store_HL ;09 ;ADD HL,BC
1469 instr do_fetch_MBC, op_nop, do_store_A ;0A ;LD A,(BC)
1470 instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1471 instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1472 instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1473 instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
1474 instr do_fetch_A, op_RRC, do_store_A ;0F ;RRCA
1475 instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1476 instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
1477 instr do_fetch_A, op_nop, do_store_MDE ;12 ;LD (DE),A
1478 instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1479 instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1480 instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1481 instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
1482 instr do_fetch_A, op_RL, do_store_A ;17 ;RLA
1483 instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1484 instr do_fetch_DE, op_ADDHL, do_store_HL ;19 ;ADD HL,DE
1485 instr do_fetch_MDE, op_nop, do_store_A ;1A ;LD A,(DE)
1486 instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1487 instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1488 instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1489 instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
1490 instr do_fetch_A, op_RR, do_store_A ;1F ;RRA
1491 instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1492 instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1493 instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1494 instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1495 instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1496 instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1497 instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1498 instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1499 instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1500 instr do_fetch_HL, op_ADDHL, do_store_HL ;29 ;ADD HL,HL
1501 instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1502 instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1503 instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1504 instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1505 instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1506 instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1507 instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1508 instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1509 instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1510 instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1511 instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1512 instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1513 instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1514 instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1515 instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1516 instr do_fetch_SP, op_ADDHL, do_store_HL ;39 ;ADD HL,SP
1517 instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1518 instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1519 instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1520 instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1521 instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1522 instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
1523 instr do_fetch_B, op_nop, do_store_B ;40 ;LD B,B
1524 instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1525 instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1526 instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1527 instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1528 instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1529 instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1530 instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1531 instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
1532 instr do_fetch_C, op_nop, do_store_C ;49 ;LD C,C
1533 instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1534 instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1535 instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1536 instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1537 instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1538 instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1539 instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1540 instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
1541 instr do_fetch_D, op_nop, do_store_D ;52 ;LD D,D
1542 instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1543 instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1544 instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1545 instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1546 instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1547 instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1548 instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1549 instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
1550 instr do_fetch_E, op_nop, do_store_E ;5B ;LD E,E
1551 instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1552 instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1553 instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1554 instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1555 instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1556 instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1557 instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1558 instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
1559 instr do_fetch_H, op_nop, do_store_H ;64 ;LD H,H
1560 instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1561 instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1562 instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1563 instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1564 instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1565 instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1566 instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1567 instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
1568 instr do_fetch_L, op_nop, do_store_L ;6D ;LD L,L
1569 instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1570 instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1571 instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1572 instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1573 instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1574 instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1575 instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1576 instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1577 instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1578 instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
1579 instr do_fetch_B, op_nop, do_store_A ;78 ;LD A,B
1580 instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1581 instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1582 instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1583 instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1584 instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1585 instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
1586 instr do_fetch_A, op_nop, do_store_A ;7F ;LD A,A
1587 instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1588 instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1589 instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1590 instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1591 instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1592 instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1593 instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1594 instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1595 instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1596 instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1597 instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1598 instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1599 instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1600 instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1601 instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1602 instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1603 instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1604 instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1605 instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1606 instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1607 instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1608 instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1609 instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1610 instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1611 instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1612 instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1613 instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1614 instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1615 instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1616 instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1617 instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1618 instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1619 instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1620 instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1621 instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1622 instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1623 instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1624 instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1625 instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1626 instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1627 instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1628 instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1629 instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1630 instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1631 instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1632 instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1633 instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1634 instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1635 instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1636 instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1637 instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1638 instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1639 instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1640 instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1641 instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1642 instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1643 instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1644 instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1645 instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1646 instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1647 instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1648 instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1649 instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1650 instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1651 instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1652 instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1653 instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1654 instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1655 instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1656 instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1657 instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1658 instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1659 instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1660 instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1661 instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1662 instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1663 instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1664 instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1665 instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1666 instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1667 instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1668 instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1669 instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1670 instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1671 instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1672 instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1673 instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1674 instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1675 instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1676 instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1677 instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1678 instr do_fetch_DIR8, op_IN, do_store_A ;DB nn ;IN A,(n)
1679 instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1680 instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1681 instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1682 instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1683 instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1684 instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1685 instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1686 instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1687 instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1688 instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1689 instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1690 instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1691 instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1692 instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1693 instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1694 instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1695 instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1696 instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1697 instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1698 instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1699 instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1700 instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1701 instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1702 instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1703 instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1704 instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1705 instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1706 instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1707 instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1708 instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1709 instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1710 instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1711 instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1712 instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1713 instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1714 instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1715
1716
1717 ;----------------------------------------------------------------
1718 ; Lookup table, stolen from z80ex, Z80 emulation library.
1719 ; http://z80ex.sourceforge.net/
1720
1721 ; The S, Z, 5 and 3 bits and the parity of the lookup value
1722
1723 ; .org (PC+255) & 0xff00
1724 .org opcjmp + 256
1725 sz53p_tab:
1726 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1727 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1728 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1729 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1730 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1731 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1732 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1733 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1734 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1735 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1736 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1737 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1738 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1739 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1740 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1741 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1742 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1743 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1744 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1745 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1746 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1747 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1748 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1749 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1750 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1751 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1752 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1753 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1754 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1755 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1756 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1757 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1758
1759 ; vim:set ts=8 noet nowrap
1760
CP/M on an AVR