1 ; Z80 emulator with CP/M support. The Z80-specific instructions themselves actually aren't
2 ; implemented yet, making this more of an i8080 emulator.
4 ; Copyright (C) 2010 Sprite_tm
6 ; This program is free software: you can redistribute it and/or modify
7 ; it under the terms of the GNU General Public License as published by
8 ; the Free Software Foundation, either version 3 of the License, or
9 ; (at your option) any later version.
11 ; This program is distributed in the hope that it will be useful,
12 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ; GNU General Public License for more details.
16 ; You should have received a copy of the GNU General Public License
17 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
93 .def temp = R16 ;The temp register
94 .def temp2 = R17 ;Second temp register
108 ;Sector buffer for 512 byte reads/writes from/to SD-card
109 .equ sectbuff = 0x200
112 rjmp start ; reset vector
119 rjmp refrint ; tim2cmpa
124 ldi temp,low(RAMEND) ; top of memory
125 out SPL,temp ; init stack pointer
126 ldi temp,high(RAMEND) ; top of memory
127 out SPH,temp ; init stack pointer
164 ;Init timer2. Refresh-call should happen every (8ms/512)=312 cycles.
169 ldi temp,39 ;=312 cycles
191 .db "CPM on an AVR, v1.0",13,0
195 .db "Initing mmc...",13,0
201 .db "Testing RAM...",13,0
249 ;Fill ram with cbs, which (for now) will trigger an invalid opcode error.
264 ;Load initial sector from MMC (512 bytes)
269 ;Save to Z80 RAM (only 128 bytes because that's retro)
271 ldi zh,high(sectbuff)
285 cpi zl,low(sectbuff+128)
287 cpi zh,high(sectbuff+128)
300 .db 13,"Ok, CPU is live!",13,0
329 ; *** Stage 1: Fetch next opcode
353 ; *** Stage 2: Decode it using the ins_table.
355 ldi zl,low(inst_table*2)
356 ldi zh,high(inst_table*2)
378 ; *** Stage 3: Fetch operand. Use the fetch jumptable for this.
385 ldi zl,low(fetchjumps*2)
386 ldi zh,high(fetchjumps*2)
411 ; *** Stage 4: Execute operation :) Use the op jumptable for this.
417 ldi zl,low(opjumps*2)
418 ldi zh,high(opjumps*2)
441 ; *** Stage 5: Store operand. Use the store jumptable for this.
450 ldi zl,low(storejumps*2)
451 ldi zh,high(storejumps*2)
483 ; ----------------Virtual peripherial interface ------
485 ;The hw is modelled to make writing a CPM BIOS easier.
487 ;0 - Con status. Returns 0xFF if the UART has a byte, 0 otherwise.
488 ;1 - Console input, aka UDR.
494 ;22 - Trigger - write 1 to read, 2 to write a sector using the above info.
495 ; This will automatically move track, sector and dma addr to the next sector.
497 ;Called with port in temp2. Should return value in temp.
505 ;Called with port in temp2 and value in temp.
567 .db "Disk read: track ",0
585 ;First, convert track/sector to an LBA address (in 128byte blocks)
602 ;Now, see what has to be done.
610 ;Convert from 128-byte LBA blocks to 512-byte LBA blocks
615 ;Read 512-byte sector
619 ;Now, move the correct portion of the sector from AVR ram to Z80 ram
621 ldi zh,high(sectbuff)
649 brne dskDoItReadMemLoop
653 ;The write routines is a bit naive: it'll read the 512-byte sector the 128byte CPM-sector
654 ;resides in into memory, will overwrite the needed 128 byte with the Z80s memory buffer
655 ;and will then write it back to disk. In theory, this would mean that every 512 bytes
656 ;written will take 4 write cycles, while theoretically the writes could be deferred so we
657 ;would only have to do one write cycle.
662 .db "Disk write: track ",0
683 ;Convert from 128-byte LBA blocks to 512-byte LBA blocks
688 ;Read 512-byte sector
696 ;Copy the data from the Z80 DMA buffer in external memory to the right place in the
698 ;Now, move the correct portion of the sector from AVR ram to Z80 ram
700 ldi zh,high(sectbuff)
728 brne dskDoItWriteMemLoop
733 ;Convert from 128-byte LBA blocks to 512-byte LBA blocks
738 ;Write the sector back.
744 ; ----------------- MMC/SD routines ------------------
779 ;Wait till the mmc answers with the response in temp2, or till a timeout happens.
786 brne mmcWaitResploopEnd
799 .db ": Error: MMC resp timeout!",13,0
806 ;Init start: send 80 clocks with cs disabled
847 ldi temp,0xff ;return byte
857 ;Read OCR till card is ready
882 breq mmcInitOcrLoopDone
905 ;Call this with adrh:adrl = sector number
906 ;16bit lba address means a max reach of 32M.
913 ldi temp,0x51 ;cmd (read sector)
928 ldi temp,0xff ;return byte
939 ;Read sector to AVR RAM
941 ldi zh,high(sectbuff)
945 cpi zl,low(sectbuff+512)
947 cpi zh,high(sectbuff+512)
962 ;Call this with adrh:adrl = sector number
963 ;16bit lba address means a max reach of 32M.
971 ldi temp,0x58 ;cmd (write sector)
986 ldi temp,0xff ;return byte
997 ;Write sector from AVR RAM
999 ldi zh,high(sectbuff)
1003 cpi zl,low(sectbuff+512)
1005 cpi zh,high(sectbuff+512)
1012 ;Status. Ignored for now.
1015 ;Wait till the mmc has written everything
1029 ;Set up wdt to time out after 1 sec.
1039 ; ------------------ DRAM routines -------------
1041 ;Sends the address in zh:zl to the ram
1089 ori temp2,(1<<ram_d1)
1091 ori temp2,(1<<ram_d2)
1093 ori temp2,(1<<ram_d3)
1095 ori temp2,(1<<ram_d4)
1102 ;Loads the byte on address adrh:adrl into temp.
1125 rcall dram_getnibble
1140 rcall dram_getnibble
1148 ;Writes the byte in temp to adrh:adrl
1156 rcall dram_sendnibble
1192 rcall dram_sendnibble
1244 ; --------------- Debugging stuff ---------------
1246 ;Prints the lower nibble of temp in hex to the uart
1262 ;Prints temp in hex to the uart
1270 ;Prints the zero-terminated string following the call statement. WARNING: Destroys temp.
1301 ; --------------- AVR HW <-> Z80 periph stuff ------------------
1303 .equ memReadByte = dram_read
1304 .equ memWriteByte = dram_write
1308 ;Fetches a char from the uart to temp. If none available, waits till one is.
1316 ;Sends a char from temp to the uart.
1327 ; ------------ Fetch phase stuff -----------------
1329 .equ FETCH_NOP = (0<<0)
1330 .equ FETCH_A = (1<<0)
1331 .equ FETCH_B = (2<<0)
1332 .equ FETCH_C = (3<<0)
1333 .equ FETCH_D = (4<<0)
1334 .equ FETCH_E = (5<<0)
1335 .equ FETCH_H = (6<<0)
1336 .equ FETCH_L = (7<<0)
1337 .equ FETCH_AF = (8<<0)
1338 .equ FETCH_BC = (9<<0)
1339 .equ FETCH_DE = (10<<0)
1340 .equ FETCH_HL = (11<<0)
1341 .equ FETCH_SP = (12<<0)
1342 .equ FETCH_MBC = (13<<0)
1343 .equ FETCH_MDE = (14<<0)
1344 .equ FETCH_MHL = (15<<0)
1345 .equ FETCH_MSP = (16<<0)
1346 .equ FETCH_DIR8 = (17<<0)
1347 .equ FETCH_DIR16= (18<<0)
1348 .equ FETCH_RST = (19<<0)
1351 ;Jump table for fetch routines. Make sure to keep this in sync with the .equs!
1408 rcall do_op_calcparity
1409 andi opl,~(1<<ZFL_P)
1503 ; ------------ Store phase stuff -----------------
1505 .equ STORE_NOP = (0<<5)
1506 .equ STORE_A = (1<<5)
1507 .equ STORE_B = (2<<5)
1508 .equ STORE_C = (3<<5)
1509 .equ STORE_D = (4<<5)
1510 .equ STORE_E = (5<<5)
1511 .equ STORE_H = (6<<5)
1512 .equ STORE_L = (7<<5)
1513 .equ STORE_AF = (8<<5)
1514 .equ STORE_BC = (9<<5)
1515 .equ STORE_DE = (10<<5)
1516 .equ STORE_HL = (11<<5)
1517 .equ STORE_SP = (12<<5)
1518 .equ STORE_PC = (13<<5)
1519 .equ STORE_MBC = (14<<5)
1520 .equ STORE_MDE = (15<<5)
1521 .equ STORE_MHL = (16<<5)
1522 .equ STORE_MSP = (17<<5)
1523 .equ STORE_RET = (18<<5)
1524 .equ STORE_CALL = (19<<5)
1525 .equ STORE_AM = (20<<5)
1527 ;Jump table for store routines. Make sure to keep this in sync with the .equs!
1679 ; ------------ Operation phase stuff -----------------
1682 .equ OP_NOP = (0<<10)
1683 .equ OP_INC = (1<<10)
1684 .equ OP_DEC = (2<<10)
1685 .equ OP_INC16 = (3<<10)
1686 .equ OP_DEC16 = (4<<10)
1687 .equ OP_RLC = (5<<10)
1688 .equ OP_RRC = (6<<10)
1689 .equ OP_RR = (7<<10)
1690 .equ OP_RL = (8<<10)
1691 .equ OP_ADDA = (9<<10)
1692 .equ OP_ADCA = (10<<10)
1693 .equ OP_SUBFA = (11<<10)
1694 .equ OP_SBCFA = (12<<10)
1695 .equ OP_ANDA = (13<<10)
1696 .equ OP_ORA = (14<<10)
1697 .equ OP_XORA = (15<<10)
1698 .equ OP_ADDHL = (16<<10)
1699 .equ OP_STHL = (17<<10) ;store HL in fetched address
1700 .equ OP_RMEM16 = (18<<10) ;read mem at fetched address
1701 .equ OP_RMEM8 = (19<<10) ;read mem at fetched address
1702 .equ OP_DA = (20<<10)
1703 .equ OP_SCF = (21<<10)
1704 .equ OP_CPL = (22<<10)
1705 .equ OP_CCF = (23<<10)
1706 .equ OP_POP16 = (24<<10)
1707 .equ OP_PUSH16 = (25<<10)
1708 .equ OP_IFNZ = (26<<10)
1709 .equ OP_IFZ = (27<<10)
1710 .equ OP_IFNC = (28<<10)
1711 .equ OP_IFC = (29<<10)
1712 .equ OP_IFPO = (30<<10)
1713 .equ OP_IFPE = (31<<10)
1714 .equ OP_IFP = (32<<10)
1715 .equ OP_IFM = (33<<10)
1716 .equ OP_OUTA = (34<<10)
1717 .equ OP_IN = (35<<10)
1718 .equ OP_EXHL = (36<<10)
1719 .equ OP_DI = (37<<10)
1720 .equ OP_EI = (38<<10)
1721 .equ OP_INV = (39<<10)
1766 ;How the flags are supposed to work:
1767 ;7 ZFL_S - Sign flag (=MSBit of result)
1768 ;6 ZFL_Z - Zero flag. Is 1 when the result is 0
1769 ;4 ZFL_H - Half-carry (carry from bit 3 to 4)
1770 ;2 ZFL_P - Parity/2-complement Overflow
1771 ;1 ZFL_N - Subtract - set if last op was a subtract
1774 ;I sure hope I got the mapping between flags and instructions correct...
1777 ;ToDo: Parity at more instructions...
1798 ori z_flags,(1<<ZFL_S)
1805 ori z_flags,(1<<ZFL_N)
1833 ;Rotate Left Cyclical. All bits move 1 to the
1834 ;left, the msb becomes c and lsb.
1835 andi z_flags,0b11101100
1839 ori z_flags,(1<<ZFL_C)
1844 ;Rotate Right Cyclical. All bits move 1 to the
1845 ;right, the lsb becomes c and msb.
1846 andi z_flags,0b11101100
1850 ori z_flags,(1<<ZFL_C)
1855 ;Rotate Right. All bits move 1 to the right, the lsb
1856 ;becomes c, c becomes msb.
1862 andi z_flags,0b11101100
1868 ;Rotate Left. All bits move 1 to the left, the msb
1869 ;becomes c, c becomes lsb.
1875 andi z_flags,0b11101100
1889 ori z_flags,(1<<ZFL_S)
1909 ori z_flags,(1<<ZFL_S)
1916 andi z_flags,~(1<<ZFL_N)
1934 ori z_flags,(1<<ZFL_N)
1953 cpi opl,0 ;AVR doesn't set Z?
1957 ori z_flags,(1<<ZFL_N)
2005 andi z_flags,~(1<<ZFL_N)
2008 do_op_sthl: ;store hl to mem loc in opl
2055 ori z_flags,(1<<ZFL_C)
2065 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
2097 .db ", SP is now ",0
2131 .db "Stack pop: val ",0
2191 rcall do_op_calcparity
2199 rcall do_op_calcparity
2206 do_op_ifp: ;sign positive, aka s=0
2213 do_op_ifm: ;sign negative, aka s=1
2220 ;Interface with peripherials goes here :)
2221 do_op_outa: ; out (opl),a
2224 .db 13,"Port write: ",0
2239 do_op_in: ; in a,(opl)
2242 .db 13,"Port read: (",0
2283 .db "Invalid opcode @ PC=",0
2292 ; ----------------------- Opcode decoding -------------------------
2294 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
2295 ; operations: fetch, do something, store.
2296 ; The table is made of 256 words. These 16-bit words consist of
2297 ; the fetch operation (bit 0-4), the processing operation (bit 10-16) and the store
2298 ; operation (bit 5-9).
2301 .dw (FETCH_NOP | OP_NOP | STORE_NOP) ; 00 NOP
2302 .dw (FETCH_DIR16| OP_NOP | STORE_BC ) ; 01 nn nn LD BC,nn
2303 .dw (FETCH_A | OP_NOP | STORE_MBC ) ; 02 LD (BC),A
2304 .dw (FETCH_BC | OP_INC16 | STORE_BC ) ; 03 INC BC
2305 .dw (FETCH_B | OP_INC | STORE_B ) ; 04 INC B
2306 .dw (FETCH_B | OP_DEC | STORE_B ) ; 05 DEC B
2307 .dw (FETCH_DIR8 | OP_NOP | STORE_B ) ; 06 nn LD B,n
2308 .dw (FETCH_A | OP_RLC | STORE_A ) ; 07 RLCA
2309 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 08 EX AF,AF' (Z80)
2310 .dw (FETCH_BC | OP_ADDHL | STORE_HL ) ; 09 ADD HL,BC
2311 .dw (FETCH_MBC | OP_NOP | STORE_A ) ; 0A LD A,(BC)
2312 .dw (FETCH_BC | OP_DEC16 | STORE_BC ) ; 0B DEC BC
2313 .dw (FETCH_C | OP_INC | STORE_C ) ; 0C INC C
2314 .dw (FETCH_C | OP_DEC | STORE_C ) ; 0D DEC C
2315 .dw (FETCH_DIR8 | OP_NOP | STORE_C ) ; 0E nn LD C,n
2316 .dw (FETCH_A | OP_RRC | STORE_A ) ; 0F RRCA
2317 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 10 oo DJNZ o (Z80)
2318 .dw (FETCH_DIR16| OP_NOP | STORE_DE ) ; 11 nn nn LD DE,nn
2319 .dw (FETCH_A | OP_NOP | STORE_MDE) ; 12 LD (DE),A
2320 .dw (FETCH_DE | OP_INC16 | STORE_DE ) ; 13 INC DE
2321 .dw (FETCH_D | OP_INC | STORE_D ) ; 14 INC D
2322 .dw (FETCH_D | OP_DEC | STORE_D ) ; 15 DEC D
2323 .dw (FETCH_DIR8 | OP_NOP | STORE_D ) ; 16 nn LD D,n
2324 .dw (FETCH_A | OP_RL | STORE_A ) ; 17 RLA
2325 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 18 oo JR o (Z80)
2326 .dw (FETCH_DE | OP_ADDHL | STORE_HL ) ; 19 ADD HL,DE
2327 .dw (FETCH_MDE | OP_NOP | STORE_A ) ; 1A LD A,(DE)
2328 .dw (FETCH_DE | OP_DEC16 | STORE_DE ) ; 1B DEC DE
2329 .dw (FETCH_E | OP_INC | STORE_E ) ; 1C INC E
2330 .dw (FETCH_E | OP_DEC | STORE_E ) ; 1D DEC E
2331 .dw (FETCH_DIR8 | OP_NOP | STORE_E ) ; 1E nn LD E,n
2332 .dw (FETCH_A | OP_RR | STORE_A ) ; 1F RRA
2333 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 20 oo JR NZ,o (Z80)
2334 .dw (FETCH_DIR16| OP_NOP | STORE_HL ) ; 21 nn nn LD HL,nn
2335 .dw (FETCH_DIR16| OP_STHL | STORE_NOP) ; 22 nn nn LD (nn),HL
2336 .dw (FETCH_HL | OP_INC16 | STORE_HL ) ; 23 INC HL
2337 .dw (FETCH_H | OP_INC | STORE_H ) ; 24 INC H
2338 .dw (FETCH_H | OP_DEC | STORE_H ) ; 25 DEC H
2339 .dw (FETCH_DIR8 | OP_NOP | STORE_H ) ; 26 nn LD H,n
2340 .dw (FETCH_A | OP_DA | STORE_A ) ; 27 DAA
2341 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 28 oo JR Z,o (Z80)
2342 .dw (FETCH_HL | OP_ADDHL | STORE_HL ) ; 29 ADD HL,HL
2343 .dw (FETCH_DIR16| OP_RMEM16 | STORE_HL ) ; 2A nn nn LD HL,(nn)
2344 .dw (FETCH_HL | OP_DEC16 | STORE_HL ) ; 2B DEC HL
2345 .dw (FETCH_L | OP_INC | STORE_L ) ; 2C INC L
2346 .dw (FETCH_L | OP_DEC | STORE_L ) ; 2D DEC L
2347 .dw (FETCH_DIR8 | OP_NOP | STORE_L ) ; 2E nn LD L,n
2348 .dw (FETCH_A | OP_CPL | STORE_A ) ; 2F CPL
2349 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 30 oo JR NC,o (Z80)
2350 .dw (FETCH_DIR16| OP_NOP | STORE_SP ) ; 31 nn nn LD SP,nn
2351 .dw (FETCH_DIR16| OP_NOP | STORE_AM ) ; 32 nn nn LD (nn),A
2352 .dw (FETCH_SP | OP_INC16 | STORE_SP ) ; 33 INC SP
2353 .dw (FETCH_MHL | OP_INC | STORE_MHL) ; 34 INC (HL)
2354 .dw (FETCH_MHL | OP_DEC | STORE_MHL) ; 35 DEC (HL)
2355 .dw (FETCH_DIR8 | OP_NOP | STORE_MHL) ; 36 nn LD (HL),n
2356 .dw (FETCH_NOP | OP_SCF | STORE_NOP) ; 37 SCF
2357 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 38 oo JR C,o (Z80)
2358 .dw (FETCH_SP | OP_ADDHL | STORE_HL ) ; 39 ADD HL,SP
2359 .dw (FETCH_DIR16| OP_RMEM8 | STORE_A ) ; 3A nn nn LD A,(nn)
2360 .dw (FETCH_SP | OP_DEC16 | STORE_SP ) ; 3B DEC SP
2361 .dw (FETCH_A | OP_INC | STORE_A ) ; 3C INC A
2362 .dw (FETCH_A | OP_DEC | STORE_A ) ; 3D DEC A
2363 .dw (FETCH_DIR8 | OP_NOP | STORE_A ) ; 3E nn LD A,n
2364 .dw (FETCH_NOP | OP_CCF | STORE_NOP) ; 3F CCF (Complement Carry Flag, gvd)
2365 .dw (FETCH_B | OP_NOP | STORE_B ) ; 40 LD B,r
2366 .dw (FETCH_C | OP_NOP | STORE_B ) ; 41 LD B,r
2367 .dw (FETCH_D | OP_NOP | STORE_B ) ; 42 LD B,r
2368 .dw (FETCH_E | OP_NOP | STORE_B ) ; 43 LD B,r
2369 .dw (FETCH_H | OP_NOP | STORE_B ) ; 44 LD B,r
2370 .dw (FETCH_L | OP_NOP | STORE_B ) ; 45 LD B,r
2371 .dw (FETCH_MHL | OP_NOP | STORE_B ) ; 46 LD B,r
2372 .dw (FETCH_A | OP_NOP | STORE_B ) ; 47 LD B,r
2373 .dw (FETCH_B | OP_NOP | STORE_C ) ; 48 LD C,r
2374 .dw (FETCH_C | OP_NOP | STORE_C ) ; 49 LD C,r
2375 .dw (FETCH_D | OP_NOP | STORE_C ) ; 4A LD C,r
2376 .dw (FETCH_E | OP_NOP | STORE_C ) ; 4B LD C,r
2377 .dw (FETCH_H | OP_NOP | STORE_C ) ; 4C LD C,r
2378 .dw (FETCH_L | OP_NOP | STORE_C ) ; 4D LD C,r
2379 .dw (FETCH_MHL | OP_NOP | STORE_C ) ; 4E LD C,r
2380 .dw (FETCH_A | OP_NOP | STORE_C ) ; 4F LD C,r
2381 .dw (FETCH_B | OP_NOP | STORE_D ) ; 50 LD D,r
2382 .dw (FETCH_C | OP_NOP | STORE_D ) ; 51 LD D,r
2383 .dw (FETCH_D | OP_NOP | STORE_D ) ; 52 LD D,r
2384 .dw (FETCH_E | OP_NOP | STORE_D ) ; 53 LD D,r
2385 .dw (FETCH_H | OP_NOP | STORE_D ) ; 54 LD D,r
2386 .dw (FETCH_L | OP_NOP | STORE_D ) ; 55 LD D,r
2387 .dw (FETCH_MHL | OP_NOP | STORE_D ) ; 56 LD D,r
2388 .dw (FETCH_A | OP_NOP | STORE_D ) ; 57 LD D,r
2389 .dw (FETCH_B | OP_NOP | STORE_E ) ; 58 LD E,r
2390 .dw (FETCH_C | OP_NOP | STORE_E ) ; 59 LD E,r
2391 .dw (FETCH_D | OP_NOP | STORE_E ) ; 5A LD E,r
2392 .dw (FETCH_E | OP_NOP | STORE_E ) ; 5B LD E,r
2393 .dw (FETCH_H | OP_NOP | STORE_E ) ; 5C LD E,r
2394 .dw (FETCH_L | OP_NOP | STORE_E ) ; 5D LD E,r
2395 .dw (FETCH_MHL | OP_NOP | STORE_E ) ; 5E LD E,r
2396 .dw (FETCH_A | OP_NOP | STORE_E ) ; 5F LD E,r
2397 .dw (FETCH_B | OP_NOP | STORE_H ) ; 60 LD H,r
2398 .dw (FETCH_C | OP_NOP | STORE_H ) ; 61 LD H,r
2399 .dw (FETCH_D | OP_NOP | STORE_H ) ; 62 LD H,r
2400 .dw (FETCH_E | OP_NOP | STORE_H ) ; 63 LD H,r
2401 .dw (FETCH_H | OP_NOP | STORE_H ) ; 64 LD H,r
2402 .dw (FETCH_L | OP_NOP | STORE_H ) ; 65 LD H,r
2403 .dw (FETCH_MHL | OP_NOP | STORE_H ) ; 66 LD H,r
2404 .dw (FETCH_A | OP_NOP | STORE_H ) ; 67 LD H,r
2405 .dw (FETCH_B | OP_NOP | STORE_L ) ; 68 LD L,r
2406 .dw (FETCH_C | OP_NOP | STORE_L ) ; 69 LD L,r
2407 .dw (FETCH_D | OP_NOP | STORE_L ) ; 6A LD L,r
2408 .dw (FETCH_E | OP_NOP | STORE_L ) ; 6B LD L,r
2409 .dw (FETCH_H | OP_NOP | STORE_L ) ; 6C LD L,r
2410 .dw (FETCH_L | OP_NOP | STORE_L ) ; 6D LD L,r
2411 .dw (FETCH_MHL | OP_NOP | STORE_L ) ; 6E LD L,r
2412 .dw (FETCH_A | OP_NOP | STORE_L ) ; 6F LD L,r
2413 .dw (FETCH_B | OP_NOP | STORE_MHL) ; 70 LD (HL),r
2414 .dw (FETCH_C | OP_NOP | STORE_MHL) ; 71 LD (HL),r
2415 .dw (FETCH_D | OP_NOP | STORE_MHL) ; 72 LD (HL),r
2416 .dw (FETCH_E | OP_NOP | STORE_MHL) ; 73 LD (HL),r
2417 .dw (FETCH_H | OP_NOP | STORE_MHL) ; 74 LD (HL),r
2418 .dw (FETCH_L | OP_NOP | STORE_MHL) ; 75 LD (HL),r
2419 .dw (FETCH_NOP | OP_NOP | STORE_NOP) ; 76 HALT
2420 .dw (FETCH_A | OP_NOP | STORE_MHL) ; 77 LD (HL),r
2421 .dw (FETCH_B | OP_NOP | STORE_A ) ; 78 LD A,r
2422 .dw (FETCH_C | OP_NOP | STORE_A ) ; 79 LD A,r
2423 .dw (FETCH_D | OP_NOP | STORE_A ) ; 7A LD A,r
2424 .dw (FETCH_E | OP_NOP | STORE_A ) ; 7B LD A,r
2425 .dw (FETCH_H | OP_NOP | STORE_A ) ; 7C LD A,r
2426 .dw (FETCH_L | OP_NOP | STORE_A ) ; 7D LD A,r
2427 .dw (FETCH_MHL | OP_NOP | STORE_A ) ; 7E LD A,r
2428 .dw (FETCH_A | OP_NOP | STORE_A ) ; 7F LD A,r
2429 .dw (FETCH_B | OP_ADDA | STORE_A ) ; 80 ADD A,r
2430 .dw (FETCH_C | OP_ADDA | STORE_A ) ; 81 ADD A,r
2431 .dw (FETCH_D | OP_ADDA | STORE_A ) ; 82 ADD A,r
2432 .dw (FETCH_E | OP_ADDA | STORE_A ) ; 83 ADD A,r
2433 .dw (FETCH_H | OP_ADDA | STORE_A ) ; 84 ADD A,r
2434 .dw (FETCH_L | OP_ADDA | STORE_A ) ; 85 ADD A,r
2435 .dw (FETCH_MHL | OP_ADDA | STORE_A ) ; 86 ADD A,r
2436 .dw (FETCH_A | OP_ADDA | STORE_A ) ; 87 ADD A,r
2437 .dw (FETCH_B | OP_ADCA | STORE_A ) ; 88 ADC A,r
2438 .dw (FETCH_C | OP_ADCA | STORE_A ) ; 89 ADC A,r
2439 .dw (FETCH_D | OP_ADCA | STORE_A ) ; 8A ADC A,r
2440 .dw (FETCH_E | OP_ADCA | STORE_A ) ; 8B ADC A,r
2441 .dw (FETCH_H | OP_ADCA | STORE_A ) ; 8C ADC A,r
2442 .dw (FETCH_L | OP_ADCA | STORE_A ) ; 8D ADC A,r
2443 .dw (FETCH_MHL | OP_ADCA | STORE_A ) ; 8E ADC A,r
2444 .dw (FETCH_A | OP_ADCA | STORE_A ) ; 8F ADC A,r
2445 .dw (FETCH_B | OP_SUBFA | STORE_A ) ; 90 SUB A,r
2446 .dw (FETCH_C | OP_SUBFA | STORE_A ) ; 91 SUB A,r
2447 .dw (FETCH_D | OP_SUBFA | STORE_A ) ; 92 SUB A,r
2448 .dw (FETCH_E | OP_SUBFA | STORE_A ) ; 93 SUB A,r
2449 .dw (FETCH_H | OP_SUBFA | STORE_A ) ; 94 SUB A,r
2450 .dw (FETCH_L | OP_SUBFA | STORE_A ) ; 95 SUB A,r
2451 .dw (FETCH_MHL | OP_SUBFA | STORE_A ) ; 96 SUB A,r
2452 .dw (FETCH_A | OP_SUBFA | STORE_A ) ; 97 SUB A,r
2453 .dw (FETCH_B | OP_SBCFA | STORE_A ) ; 98 SBC A,r
2454 .dw (FETCH_C | OP_SBCFA | STORE_A ) ; 99 SBC A,r
2455 .dw (FETCH_D | OP_SBCFA | STORE_A ) ; 9A SBC A,r
2456 .dw (FETCH_E | OP_SBCFA | STORE_A ) ; 9B SBC A,r
2457 .dw (FETCH_H | OP_SBCFA | STORE_A ) ; 9C SBC A,r
2458 .dw (FETCH_L | OP_SBCFA | STORE_A ) ; 9D SBC A,r
2459 .dw (FETCH_MHL | OP_SBCFA | STORE_A ) ; 9E SBC A,r
2460 .dw (FETCH_A | OP_SBCFA | STORE_A ) ; 9F SBC A,r
2461 .dw (FETCH_B | OP_ANDA | STORE_A ) ; A0 AND A,r
2462 .dw (FETCH_C | OP_ANDA | STORE_A ) ; A1 AND A,r
2463 .dw (FETCH_D | OP_ANDA | STORE_A ) ; A2 AND A,r
2464 .dw (FETCH_E | OP_ANDA | STORE_A ) ; A3 AND A,r
2465 .dw (FETCH_H | OP_ANDA | STORE_A ) ; A4 AND A,r
2466 .dw (FETCH_L | OP_ANDA | STORE_A ) ; A5 AND A,r
2467 .dw (FETCH_MHL | OP_ANDA | STORE_A ) ; A6 AND A,r
2468 .dw (FETCH_A | OP_ANDA | STORE_A ) ; A7 AND A,r
2469 .dw (FETCH_B | OP_XORA | STORE_A ) ; A8 XOR A,r
2470 .dw (FETCH_C | OP_XORA | STORE_A ) ; A9 XOR A,r
2471 .dw (FETCH_D | OP_XORA | STORE_A ) ; AA XOR A,r
2472 .dw (FETCH_E | OP_XORA | STORE_A ) ; AB XOR A,r
2473 .dw (FETCH_H | OP_XORA | STORE_A ) ; AC XOR A,r
2474 .dw (FETCH_L | OP_XORA | STORE_A ) ; AD XOR A,r
2475 .dw (FETCH_MHL | OP_XORA | STORE_A ) ; AE XOR A,r
2476 .dw (FETCH_A | OP_XORA | STORE_A ) ; AF XOR A,r
2477 .dw (FETCH_B | OP_ORA | STORE_A ) ; B0 OR A,r
2478 .dw (FETCH_C | OP_ORA | STORE_A ) ; B1 OR A,r
2479 .dw (FETCH_D | OP_ORA | STORE_A ) ; B2 OR A,r
2480 .dw (FETCH_E | OP_ORA | STORE_A ) ; B3 OR A,r
2481 .dw (FETCH_H | OP_ORA | STORE_A ) ; B4 OR A,r
2482 .dw (FETCH_L | OP_ORA | STORE_A ) ; B5 OR A,r
2483 .dw (FETCH_MHL | OP_ORA | STORE_A ) ; B6 OR A,r
2484 .dw (FETCH_A | OP_ORA | STORE_A ) ; B7 OR A,r
2485 .dw (FETCH_B | OP_SUBFA | STORE_NOP) ; B8 CP A,r
2486 .dw (FETCH_C | OP_SUBFA | STORE_NOP) ; B9 CP A,r
2487 .dw (FETCH_D | OP_SUBFA | STORE_NOP) ; BA CP A,r
2488 .dw (FETCH_E | OP_SUBFA | STORE_NOP) ; BB CP A,r
2489 .dw (FETCH_H | OP_SUBFA | STORE_NOP) ; BC CP A,r
2490 .dw (FETCH_L | OP_SUBFA | STORE_NOP) ; BD CP A,r
2491 .dw (FETCH_MHL | OP_SUBFA | STORE_NOP) ; BE CP A,r
2492 .dw (FETCH_A | OP_SUBFA | STORE_NOP) ; BF CP A,r
2493 .dw (FETCH_NOP | OP_IFNZ | STORE_RET) ; C0 RET NZ
2494 .dw (FETCH_NOP | OP_POP16 | STORE_BC ) ; C1 POP BC
2495 .dw (FETCH_DIR16| OP_IFNZ | STORE_PC ) ; C2 nn nn JP NZ,nn
2496 .dw (FETCH_DIR16| OP_NOP | STORE_PC ) ; C3 nn nn JP nn
2497 .dw (FETCH_DIR16| OP_IFNZ | STORE_CALL) ; C4 nn nn CALL NZ,nn
2498 .dw (FETCH_BC | OP_PUSH16 | STORE_NOP) ; C5 PUSH BC
2499 .dw (FETCH_DIR8 | OP_ADDA | STORE_A ) ; C6 nn ADD A,n
2500 .dw (FETCH_RST | OP_NOP | STORE_CALL) ; C7 RST 0
2501 .dw (FETCH_NOP | OP_IFZ | STORE_RET) ; C8 RET Z
2502 .dw (FETCH_NOP | OP_NOP | STORE_RET) ; C9 RET
2503 .dw (FETCH_DIR16| OP_IFZ | STORE_PC ) ; CA nn nn JP Z,nn
2504 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; CB (Z80 specific)
2505 .dw (FETCH_DIR16| OP_IFZ | STORE_CALL) ; CC nn nn CALL Z,nn
2506 .dw (FETCH_DIR16| OP_NOP | STORE_CALL) ; CD nn nn CALL nn
2507 .dw (FETCH_DIR8 | OP_ADCA | STORE_A ) ; CE nn ADC A,n
2508 .dw (FETCH_RST | OP_NOP | STORE_CALL) ; CF RST 8H
2509 .dw (FETCH_NOP | OP_IFNC | STORE_RET) ; D0 RET NC
2510 .dw (FETCH_NOP | OP_POP16 | STORE_DE ) ; D1 POP DE
2511 .dw (FETCH_DIR16| OP_IFNC | STORE_PC ) ; D2 nn nn JP NC,nn
2512 .dw (FETCH_DIR8 | OP_OUTA | STORE_NOP) ; D3 nn OUT (n),A
2513 .dw (FETCH_DIR16| OP_IFNC | STORE_CALL) ; D4 nn nn CALL NC,nn
2514 .dw (FETCH_DE | OP_PUSH16 | STORE_NOP) ; D5 PUSH DE
2515 .dw (FETCH_DIR8 | OP_SUBFA | STORE_A ) ; D6 nn SUB n
2516 .dw (FETCH_RST | OP_NOP | STORE_CALL) ; D7 RST 10H
2517 .dw (FETCH_NOP | OP_IFC | STORE_RET) ; D8 RET C
2518 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; D9 EXX (Z80)
2519 .dw (FETCH_DIR16| OP_IFC | STORE_PC ) ; DA nn nn JP C,nn
2520 .dw (FETCH_DIR8 | OP_IN | STORE_A ) ; DB nn IN A,(n)
2521 .dw (FETCH_DIR16| OP_IFC | STORE_CALL) ; DC nn nn CALL C,nn
2522 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; DD (Z80)
2523 .dw (FETCH_DIR8 | OP_SBCFA | STORE_A ) ; DE nn SBC A,n
2524 .dw (FETCH_RST | OP_NOP | STORE_CALL) ; DF RST 18H
2525 .dw (FETCH_NOP | OP_IFPO | STORE_RET) ; E0 RET PO
2526 .dw (FETCH_NOP | OP_POP16 | STORE_HL ) ; E1 POP HL
2527 .dw (FETCH_DIR16| OP_IFPO | STORE_PC ) ; E2 nn nn JP PO,nn
2528 .dw (FETCH_MSP | OP_EXHL | STORE_MSP) ; E3 EX (SP),HL
2529 .dw (FETCH_DIR16| OP_IFPO | STORE_CALL) ; E4 nn nn CALL PO,nn
2530 .dw (FETCH_HL | OP_PUSH16 | STORE_NOP) ; E5 PUSH HL
2531 .dw (FETCH_DIR8 | OP_ANDA | STORE_A ) ; E6 nn AND n
2532 .dw (FETCH_RST | OP_NOP | STORE_CALL) ; E7 RST 20H
2533 .dw (FETCH_NOP | OP_IFPE | STORE_RET) ; E8 RET PE
2534 .dw (FETCH_HL | OP_NOP | STORE_PC ) ; E9 JP (HL)
2535 .dw (FETCH_DIR16| OP_IFPE | STORE_PC ) ; EA nn nn JP PE,nn
2536 .dw (FETCH_DE | OP_EXHL | STORE_DE ) ; EB EX DE,HL
2537 .dw (FETCH_DIR16| OP_IFPE | STORE_CALL) ; EC nn nn CALL PE,nn
2538 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; ED (Z80 specific)
2539 .dw (FETCH_DIR8 | OP_XORA | STORE_A ) ; EE nn XOR n
2540 .dw (FETCH_RST | OP_NOP | STORE_CALL) ; EF RST 28H
2541 .dw (FETCH_NOP | OP_IFP | STORE_RET) ; F0 RET P
2542 .dw (FETCH_NOP | OP_POP16 | STORE_AF ) ; F1 POP AF
2543 .dw (FETCH_DIR16| OP_IFP | STORE_PC ) ; F2 nn nn JP P,nn
2544 .dw (FETCH_NOP | OP_DI | STORE_NOP) ; F3 DI
2545 .dw (FETCH_DIR16| OP_IFP | STORE_CALL) ; F4 nn nn CALL P,nn
2546 .dw (FETCH_AF | OP_PUSH16 | STORE_NOP) ; F5 PUSH AF
2547 .dw (FETCH_DIR8 | OP_ORA | STORE_A ) ; F6 nn OR n
2548 .dw (FETCH_RST | OP_NOP | STORE_CALL) ; F7 RST 30H
2549 .dw (FETCH_NOP | OP_IFM | STORE_RET) ; F8 RET M
2550 .dw (FETCH_HL | OP_NOP | STORE_SP ) ; F9 LD SP,HL
2551 .dw (FETCH_DIR16| OP_IFM | STORE_PC ) ; FA nn nn JP M,nn
2552 .dw (FETCH_NOP | OP_EI | STORE_NOP) ; FB EI
2553 .dw (FETCH_DIR16| OP_IFM | STORE_CALL) ; FC nn nn CALL M,nn
2554 .dw (FETCH_NOP | OP_INV | STORE_NOP) ; FD (Z80 specific)
2555 .dw (FETCH_DIR8 | OP_SUBFA | STORE_NOP) ; FE nn CP n
2556 .dw (FETCH_RST | OP_NOP | STORE_CALL) ; FF RST 38H