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* MMC/SD Bootloader support
authorLeo <erbl259-lmu@yahoo.de>
Thu, 21 Mar 2013 09:23:11 +0000 (09:23 +0000)
committerLeo <erbl259-lmu@yahoo.de>
Thu, 21 Mar 2013 09:23:11 +0000 (09:23 +0000)
   - Files: config.inc, avrcpm.asm, Makefile
* sw-uart.asm
   - TX Bugfix: don't miss bit timeout at end of character (OC1 int)
* Z80int-jmp.asm
   - reorganization to reduce flash footprint

git-svn-id: svn://cu.loc/avr-cpm/avrcpm/trunk@201 57430480-672e-4586-8877-bcf8adbbf3b7

avr/Makefile patch | blob | blame | history
avr/Z80int-jmp.asm patch | blob | blame | history
avr/avrcpm.asm patch | blob | blame | history
avr/config.inc patch | blob | blame | history
avr/dsk_fsys.asm patch | blob | blame | history
avr/macros.inc patch | blob | blame | history
avr/sw-uart.asm patch | blob | blame | history
avr/timer.asm patch | blob | blame | history
avr/utils.asm patch | blob | blame | history

diff --git a/avr/Makefile b/avr/Makefile
index efc5b1c04e6c93cc39db1f175d9e049687e7c287..e4802ccf367f1382c7f1a18f380ffa257dbe30c8 100644 (file)
--- a/avr/Makefile
+++ b/avr/Makefile
@@ -6,12 +6,23 @@
 MCU = atmega328P
 F_CPU = 20000000
 #BAUD = 19200
-BAUD = 57600
-#BAUD = 115200
+#BAUD = 57600
+BAUD = 115200
 
 DRAM_8BIT = 1
 #I2C = 1
 
+#MMC/SD bootloader
+# undef/comment 'DEVID_S' if not used
+DEVID_S = ACPM
+
+# Version defined in 'config.inc'.
+VMAJOR = $(call conf-val, VMAJOR, config.inc)
+VMINOR = $(call conf-val, VMINOR, config.inc)
+
+TESTVERSION = 1
+BOOTLDRSIZE = 2048 #Byte
+
 TARGET = avrcpm
 ASRC0  = avrcpm.asm 
 
@@ -26,14 +37,25 @@ else
   ASRC0 += dram-4bit.inc dram-4bit.asm hw-uart.asm 
 endif
 
+ASRC = $(ASRC0) svnrev.inc
 #ASRC := $(ASRC0) svnrev.inc
-ASRC := $(ASRC0) svnrev.inc
 
 # Place -D or -U options here
 CDEFS = -DF_CPU=$(F_CPU) -DBAUD=$(BAUD) -D$(MCU) -DDRAM_8BIT=$(DRAM_8BIT) 
+
 ifdef I2C
   CDEFS += -DI2C=$(I2C)
 endif
+ifdef FAT16_SUPPORT
+  CDEFS += -DFAT16_SUPPORT=$(FAT16_SUPPORT)
+endif
+ifdef EM_Z80
+  CDEFS += -DEM_Z80=$(EM_Z80)
+endif
+ifdef DEVID_S
+  CDEFS += -DDEVID_S=\"$(DEVID_S)\" -DBOOTLDRSIZE=$(BOOTLDRSIZE) -DTESTVERSION=$(TESTVERSION)
+endif
+
 
 ASPATH = C:/Programme/Atmel/AVR\ Tools/AvrAssembler2
 DEFS = $(ASPATH)/Appnotes
@@ -52,6 +74,17 @@ endif
 AS = $(WINE) $(ASPATH)/avrasm2.exe
 ASFLAGS = -I $(DEFS) $(CDEFS)
 
+AWK = gawk
+OBJCOPY = avr-objcopy
+CRCGEN = crcgen
+
+HEXTOBIN = $(OBJCOPY) -I ihex -O binary --gap-fill 0xff 
+
+#(call conf-val,config-id,config-file)
+#conf-val = $(shell awk -vID=$(strip $1) '$$0 ~ "^[ \t]*\#define[ \t]+" ID "[ \t]+" {print $$3}' $2 )
+conf-val = $(shell awk -vID=$(strip $1) '$$1$$2 ~ "\#define"ID {print $$3}' $2)
+
+
 # Programming support using avrdude. Settings and variables.
 
 AVRDUDE_PROGRAMMER = dragon_isp
@@ -82,23 +115,16 @@ AVRDUDE = avrdude
 REMOVE = rm -f
 MV = mv -f
 
-
-# Define all listing files.
-#LST = $(ASRC:.asm=.lst)
-
-# Combine all necessary flags and optional flags.
-# Add target processor to flags.
-ALL_ASFLAGS =  $(ASFLAGS)
-
-.PHONY:        all hex eep lst map program flash eeprom tags clean
+.PHONY:        all bin hex eep lst map program flash eeprom tags clean
 
 # Default target.
 all: hex lst
 
-hex: $(TARGET).hex $(ASRC)
-eep: $(TARGET).eep $(ASRC)
-lst: $(TARGET).lst $(ASRC)
-map: $(TARGET).map $(ASRC)
+hex: $(TARGET).hex
+eep: $(TARGET).eep
+lst: $(TARGET).lst
+map: $(TARGET).map
+bin: $(TARGET)-$(VMAJOR).$(VMINOR).bin
 
 
 # Program the device.  
@@ -117,25 +143,31 @@ $(TARGET).eep: $(ASRC)
 $(TARGET).lst: $(ASRC)
 $(TARGET).map: $(ASRC)
 
-#.SUFFIXES: .hex .eep .lst
+
 .SUFFIXES:
 
+%-$(VMAJOR).$(VMINOR).bin: %.hex
+       $(HEXTOBIN) $< $@
+       $(CRCGEN) $@
+
 %.hex: %.asm
-       $(AS) $(ALL_ASFLAGS) -fI -o $@ $<
+       $(AS) $(ASFLAGS) -fI -o $@ $<
 
 %.lst: %.asm
-       @$(AS) $(ALL_ASFLAGS) -v0 -f- -l $@ $<
+       @$(AS) $(ASFLAGS) -v0 -f- -l $@ $<
 
 %.map: %.asm
-       $(AS) $(ALL_ASFLAGS) -v0 -f- -m $@ $<
+       $(AS) $(ASFLAGS) -v0 -f- -m $@ $<
 
 tags: $(SRC) $(ASRC)
        ctags $(SRC) $(ASRC)
 
 svnrev.inc: $(ASRC0)
-       @svnrev -osvnrev.inc $^
+       svnrev -osvnrev.inc $^
+       touch svnrev.inc
 
 # Target: clean project.
 clean:
-       $(REMOVE) $(TARGET).hex $(TARGET).eep $(TARGET).obj $(TARGET).map $(TARGET).lst
+       $(REMOVE) $(TARGET).hex $(TARGET).eep $(TARGET).obj $(TARGET).map $(TARGET).lst \
+               $(TARGET)-$(VMAJOR).$(VMINOR).bin
 
diff --git a/avr/Z80int-jmp.asm b/avr/Z80int-jmp.asm
index 7b17fa47b365218574604fc436e2d6581a96e44e..e68db280e1132bfdec1153910f8f578bc0c227e9 100644 (file)
--- a/avr/Z80int-jmp.asm
+++ b/avr/Z80int-jmp.asm
@@ -24,12 +24,6 @@
 ;    $Id$
 ;
 
-#if EM_Z80
-  #define OPC_TABSTART 0x1B00
-#else
-  #define OPC_TABSTART 0x1200
-#endif
-
        .dseg
 z_regs:        
 z_b:   .byte   1
@@ -164,33 +158,78 @@ int_nobreak:
 ;--------------------------------------------------
 ; init opcode table 
 ;
-;      opctable opc_name
+;      opctable opc_name, pos
 ;
-#if EM_Z80
-       .equ    numtabs_ = 5
-#else
-       .equ    numtabs_ = 1
-#endif
 
 .macro opctable
 
+
+  .set opcjmp_table_pos_ = (@1 + 255) & -0x100         ;0xff00
+
   .ifndef opc_tabnext_
-    .if OPC_TABSTART & 0x00ff
-      .error "OPC_TABSTART is not page aligned!"
-    .endif
-    .set opc_tabnext_ = OPC_TABSTART
-    .equ opc_tablow_ = opc_tabnext_
-    .equ opc_tabend_ = opc_tablow_ + (256 * numtabs_) + 128
-    .equ sz53p_table_pos = opc_tablow_ + (256 * numtabs_)
+    .set opc_tabnext_ = opcjmp_table_pos_
+
+    .set opc_tablow_0 = 0
+    .set opc_tablen_0 = 0
+    .set opc_tablow_1 = 0
+    .set opc_tablen_1 = 0
+  .endif
+
+  .if opcjmp_table_pos_ < opc_tabnext_
+    .set opcjmp_table_pos_ = opc_tabnext_
   .endif
 
-  .set opcjmp_table_pos_ = opc_tabnext_
-  .set opc_tabnext_ = opc_tabnext_ + 256
+  .if opc_tablow_0 == 0
+    .set opc_tablow_0 = opcjmp_table_pos_
+    .set opc_tablen_0 = 256
+;.message "add tab_0"
+  .elif opc_tablow_1 == 0
+    .if (opc_tablow_0 + opc_tablen_0) == opcjmp_table_pos_
+      .set opc_tablen_0 = opc_tablen_0 + 256
+;.message "    tab_0++"
+    .else
+      .set opc_tablow_1 = opcjmp_table_pos_
+      .set opc_tablen_1 = 256
+;.message "add tab_1"
+    .endif
+  .else  
+    .if (opc_tablow_1 + opc_tablen_1) == opcjmp_table_pos_
+      .set opc_tablen_1 = opc_tablen_1 + 256
+;.message     "tab_1++"
+    .else
+      .error "Tab full_"
+    .endif
+  .endif
 
+  .set opc_tabnext_ = opcjmp_table_pos_ + 256
   .equ @0 = opcjmp_table_pos_
 
-  .set todo_table_pos_ = 0
+.endm
 
+;--------------------------------------------------
+; 
+;      checkspace frompos, size
+;
+.macro checkspace
+
+  .ifdef opc_tablow_0
+    .if @0 <=  opc_tablow_0
+      .if (@0 + @1) >  opc_tablow_0
+        .org opc_tablow_0 + opc_tablen_0
+;        .message "skip tab, remove tab_0"
+        .if opc_tablow_1 == 0
+          .set opc_tablow_0 = 0
+          .set opc_tablen_0 = 0
+        .else
+          .set opc_tablow_0 = opc_tablow_1
+          .set opc_tablen_0 = opc_tablen_1
+          .set opc_tablow_1 = 0
+          .set opc_tablen_1 = 0
+;          .message "remove tab_1"
+        .endif
+      .endif
+    .endif
+  .endif
 .endm
 
 ;--------------------------------------------------
@@ -205,11 +244,16 @@ int_nobreak:
   .set store_ = (do_@2 != do_store_nop)                ; must jump to store action
   .set cnt_ = fetch_ + op_ + store_            ; number of actions for this instruction
 
-  .set action_1_ = 0
-  .set action_2_ = 0
-  .set action_3_ = 0
 
-  .if cnt_ == 1
+  .set done_ = 0
+  .set pc_save_ = PC
+
+  .if cnt_ == 0                                        ; nothing to do (nop)
+    .org opcjmp_table_pos_
+    ret                                                ; go back to main
+    .org pc_save_
+    .set done_ = 1
+  .elif cnt_ == 1                              ; jump direct to action
     .if fetch_
       .set action_1_ = do_@0
     .elif op_
@@ -217,79 +261,38 @@ int_nobreak:
     .else
       .set action_1_ = do_@2
     .endif
-  .elif cnt_ == 2
-    .if fetch_
-      .set action_1_ = do_@0
-      .if op_
-        .set action_2_ = do_@1
-      .else
-        .set action_2_ = do_@2
-      .endif
-    .else
-      .set action_1_ = do_@1
-      .set action_2_ = do_@2
-    .endif
-  .elif cnt_ == 3
-    .set action_1_ = do_@0
-    .set action_2_ = do_@1
-    .set action_3_ = do_@2
-  .endif
-
-  .set longdist_ = 0
-  .set pc_save_ = PC
-
-  .org opcjmp_table_pos_
-  .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1
-
-
-  .if cnt_ == 0                                        ; nothing to do (nop)
-    ret                                                ; go back to main
-  .elif cnt_ == 1                              ; jump direct to action
-    .if (PC - action_1_) > 2047
-      .set longdist_ = 1                        ; target action out of reach for rel jump
-    .else
+    .if (opcjmp_table_pos_ - action_1_) <= 2047
+       .org opcjmp_table_pos_
         rjmp action_1_                         ; do op and return to main
+       .org pc_save_
+      .set done_ = 1
     .endif
   .endif
 
+  .if !done_
 
-  .set done_ = 0
-  .if (cnt_ > 1) || longdist_
-                                               ; two or tree actions
     .if defined (l_@0_@1_@2)
-      .if (PC - l_@0_@1_@2) <= 2047
-        rjmp l_@0_@1_@2                                ; generate a jump to action table
-       .set done_ = 1
-      .endif
-    .endif
 
-    .if !done_
-
-      .if todo_table_pos_ == 0
-        .set todo_table_pos_ = opcjmp_table_pos_ - 2048
-        .if todo_table_pos_ < pc_save_
-          .set todo_table_pos_ = pc_save_
-        .endif
-      .endif
-
-      .if todo_table_pos_ <  opc_tablow_
-        .if todo_table_pos_ + 2*cnt_ >  opc_tablow_
-          .set todo_table_pos_ = opc_tabend_
-        .endif
-      .endif
-
-      .if defined (l_@0_@1_@2)
-        rjmp todo_table_pos_
-        .org todo_table_pos_
+      .if (opcjmp_table_pos_ - l_@0_@1_@2) <= 2047
+        .org opcjmp_table_pos_
+        rjmp l_@0_@1_@2                                ; generate a jump to action table
+        .org pc_save_
+      .else
+        checkspace pc_save_, 2
+        .set pc_save_ = PC
+        .org opcjmp_table_pos_
+        rjmp pc_save_
+        .org pc_save_
        jmp l_@0_@1_@2
-        .set todo_table_pos_ = PC
-       .set done_ = 1
       .endif
-    .endif
 
-    .if !done_
+    .else
+
+      checkspace pc_save_, 2*cnt_
+      .set pc_save_ = PC
 
-      .equ l_@0_@1_@2 = todo_table_pos_                ; make a label
+      .org opcjmp_table_pos_
+      .equ l_@0_@1_@2 = pc_save_               ; make a label
       rjmp l_@0_@1_@2                          ; generate a jump to action table
 
       .org l_@0_@1_@2
@@ -335,16 +338,10 @@ int_nobreak:
         .endif
       .endif    
 
-      .set todo_table_pos_ = PC
-
     .endif
   .endif
 
-  .if todo_table_pos_ == 0
-    .org pc_save_
-  .else
-    .org todo_table_pos_
-  .endif
+  .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1
 
 .endm
 
@@ -354,9 +351,17 @@ do_x_nop:
 
 ; ------------ Fetch phase stuff -----------------
 
+
 fetch_ops:
 .equ do_fetch_nop = do_x_nop
 
+do_fetch_rst:
+       movw x,z_pcl
+       sbiw x,1
+       mem_read_d opl
+       andi opl,0x38
+       ldi oph,0
+       ret
 
 .macro m_do_fetch_a
        mov opl,z_a
@@ -479,14 +484,6 @@ do_fetch_dir16:
        adiw z_pcl,1
        ret
 
-do_fetch_rst:
-       movw x,z_pcl
-       sbiw x,1
-       mem_read_d opl
-       andi opl,0x38
-       ldi oph,0
-       ret
-
 ; ------------ Store phase stuff -----------------
 
 store_ops:
@@ -1959,14 +1956,11 @@ do_op_EXX:
 
 #if EM_Z80
 
-do_op_noni:
-       sbiw    z_pcl,1                         ;--z_pc
-       ret
-
 do_op_prefixED:
        mem_read_ds zl,z_pc                     ;zl = memReadByte(z_pc)
        adiw    z_pcl,1                         ;++z_pc
        ldi     zh,high(EDjmp)                  ;
+;;;    ldi     zh,high(0)                      ;
        ijmp
 
 
@@ -2031,23 +2025,24 @@ do_op_prefixCB:
 #endif
 
 
+
 ; ----------------------- Opcode decoding -------------------------
 
 ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
 ; operations: fetch, do something, store.
 ; The table is made of 256 words. 
 
-       opctable opcjmp
+       opctable opcjmp, PC     ;+3*256
         
 instr  fetch_nop,      op_nop,         store_nop       ;00             ;NOP
 instr  fetch_DIR16,    op_nop,         store_BC        ;01 nn nn       ;LD BC,nn
 instr  fetch_nop,      op_nop,         store_MBC       ;02             ;LD (BC),A
 instr  fetch_BC,       op_INC16,       store_BC        ;03             ;INC BC
 instr  fetch_B,        op_INC,         store_B         ;04             ;INC B
-instr  fetch_B,        op_DEC,         store_B         ;05     ;DEC B
+instr  fetch_B,        op_DEC,         store_B         ;05             ;DEC B
 instr  fetch_DIR8,     op_nop,         store_B         ;06             ;LD B,n
 instr  fetch_nop,      op_RLCA,        store_nop       ;07             ;RLCA
-instr  fetch_nop,      op_EXAF,        store_nop       ;08     ;EX AF,AF'
+instr  fetch_nop,      op_EXAF,        store_nop       ;08             ;EX AF,AF'
 instr  fetch_BC,       op_ADDHL,       store_nop       ;09             ;ADD HL,BC
 instr  fetch_MBC,      op_nop,         store_nop       ;0A             ;LD A,(BC)
 instr  fetch_BC,       op_DEC16,       store_BC        ;0B             ;DEC BC
@@ -2060,49 +2055,49 @@ instr   fetch_DIR16,    op_nop,         store_DE        ;11 nn nn       ;LD DE,nn
 instr  fetch_nop,      op_nop,         store_MDE       ;12             ;LD (DE),A
 instr  fetch_DE,       op_INC16,       store_DE        ;13             ;INC DE
 instr  fetch_D,        op_INC,         store_D         ;14             ;INC D
-instr  fetch_D,        op_DEC,         store_D         ;15     ;DEC D
+instr  fetch_D,        op_DEC,         store_D         ;15             ;DEC D
 instr  fetch_DIR8,     op_nop,         store_D         ;16 nn          ;LD D,n
 instr  fetch_nop,      op_RLA,         store_nop       ;17             ;RLA
 instr  fetch_DIR8,     op_nop,         store_pcrel     ;18 oo          ;JR o
 instr  fetch_DE,       op_ADDHL,       store_nop       ;19             ;ADD HL,DE
 instr  fetch_MDE,      op_nop,         store_nop       ;1A             ;LD A,(DE)
-instr  fetch_DE,       op_DEC16,       store_DE        ;1B     ;DEC DE
+instr  fetch_DE,       op_DEC16,       store_DE        ;1B             ;DEC DE
 instr  fetch_E,        op_INC,         store_E         ;1C             ;INC E
-instr  fetch_E,        op_DEC,         store_E         ;1D     ;DEC E
+instr  fetch_E,        op_DEC,         store_E         ;1D             ;DEC E
 instr  fetch_DIR8,     op_nop,         store_E         ;1E nn          ;LD E,n
 instr  fetch_nop,      op_RRA,         store_nop       ;1F             ;RRA
 instr  fetch_DIR8,     op_IFNZ,        store_pcrel     ;20 oo          ;JR NZ,o
 instr  fetch_DIR16,    op_nop,         store_HL        ;21 nn nn       ;LD HL,nn
 instr  fetch_DIR16,    op_STHL,        store_nop       ;22 nn nn       ;LD (nn),HL
 instr  fetch_HL,       op_INC16,       store_HL        ;23             ;INC HL
-instr  fetch_H,        op_INC,         store_H ;24             ;INC H
-instr  fetch_H,        op_DEC,         store_H ;25     ;DEC H
-instr  fetch_DIR8,     op_nop,         store_H ;26 nn          ;LD H,n
-instr  fetch_A,        op_DAA,         store_A ;27     ;DAA
+instr  fetch_H,        op_INC,         store_H         ;24             ;INC H
+instr  fetch_H,        op_DEC,         store_H         ;25             ;DEC H
+instr  fetch_DIR8,     op_nop,         store_H         ;26 nn          ;LD H,n
+instr  fetch_A,        op_DAA,         store_A         ;27             ;DAA
 instr  fetch_DIR8,     op_IFZ,         store_pcrel     ;28 oo          ;JR Z,o
 instr  fetch_HL,       op_ADDHL,       store_nop       ;29             ;ADD HL,HL
 instr  fetch_DIR16,    op_RMEM16,      store_HL        ;2A nn nn       ;LD HL,(nn)
-instr  fetch_HL,       op_DEC16,       store_HL        ;2B     ;DEC HL
-instr  fetch_L,        op_INC,         store_L ;2C             ;INC L
-instr  fetch_L,        op_DEC,         store_L ;2D     ;DEC L
-instr  fetch_DIR8,     op_nop,         store_L ;2E nn          ;LD L,n
-instr  fetch_nop,      op_CPL,         store_nop       ;2F     ;CPL
+instr  fetch_HL,       op_DEC16,       store_HL        ;2B             ;DEC HL
+instr  fetch_L,        op_INC,         store_L         ;2C             ;INC L
+instr  fetch_L,        op_DEC,         store_L         ;2D             ;DEC L
+instr  fetch_DIR8,     op_nop,         store_L         ;2E nn          ;LD L,n
+instr  fetch_nop,      op_CPL,         store_nop       ;2F             ;CPL
 instr  fetch_DIR8,     op_IFNC,        store_pcrel     ;30 oo          ;JR NC,o
 instr  fetch_DIR16,    op_nop,         store_SP        ;31 nn nn       ;LD SP,nn
 instr  fetch_DIR16,    op_nop,         store_AM        ;32 nn nn       ;LD (nn),A
 instr  fetch_SP,       op_INC16,       store_SP        ;33             ;INC SP
 instr  fetch_MHL,      op_INC,         store_MHL       ;34             ;INC (HL)
-instr  fetch_MHL,      op_DEC,         store_MHL       ;35     ;DEC (HL)
+instr  fetch_MHL,      op_DEC,         store_MHL       ;35             ;DEC (HL)
 instr  fetch_DIR8,     op_nop,         store_MHL       ;36 nn          ;LD (HL),n
 instr  fetch_nop,      op_SCF,         store_nop       ;37             ;SCF
 instr  fetch_DIR8,     op_IFC,         store_pcrel     ;38 oo          ;JR C,o
 instr  fetch_SP,       op_ADDHL,       store_nop       ;39             ;ADD HL,SP
-instr  fetch_DIR16,    op_RMEM8,       store_A ;3A nn nn       ;LD A,(nn)
-instr  fetch_SP,       op_DEC16,       store_SP        ;3B     ;DEC SP
+instr  fetch_DIR16,    op_RMEM8,       store_A         ;3A nn nn       ;LD A,(nn)
+instr  fetch_SP,       op_DEC16,       store_SP        ;3B             ;DEC SP
 instr  fetch_nop,      op_INCA,        store_nop       ;3C             ;INC A
-instr  fetch_nop,      op_DECA,        store_nop       ;3D     ;DEC A
-instr  fetch_DIR8,     op_nop,         store_A ;3E nn          ;LD A,n
-instr  fetch_nop,      op_CCF,         store_nop       ;3F     ;CCF (Complement Carry Flag, gvd)
+instr  fetch_nop,      op_DECA,        store_nop       ;3D             ;DEC A
+instr  fetch_DIR8,     op_nop,         store_A         ;3E nn          ;LD A,n
+instr  fetch_nop,      op_CCF,         store_nop       ;3F             ;CCF (Complement Carry Flag, gvd)
 instr  fetch_nop,      op_nop,         store_nop       ;40             ;LD B,B
 instr  fetch_C,        op_nop,         store_B         ;41             ;LD B,C
 instr  fetch_D,        op_nop,         store_B         ;42             ;LD B,D
@@ -2223,14 +2218,14 @@ instr   fetch_H,        op_ORA,         store_nop       ;B4             ;OR A,H
 instr  fetch_L,        op_ORA,         store_nop       ;B5             ;OR A,L
 instr  fetch_MHL,      op_ORA,         store_nop       ;B6             ;OR A,(HL)
 instr  fetch_A,        op_ORA,         store_nop       ;B7             ;OR A,A
-instr  fetch_B,        op_CPFA,        store_nop       ;B8     ;CP A,B
-instr  fetch_C,        op_CPFA,        store_nop       ;B9     ;CP A,C
-instr  fetch_D,        op_CPFA,        store_nop       ;BA     ;CP A,D
-instr  fetch_E,        op_CPFA,        store_nop       ;BB     ;CP A,E
-instr  fetch_H,        op_CPFA,        store_nop       ;BC     ;CP A,H
-instr  fetch_L,        op_CPFA,        store_nop       ;BD     ;CP A,L
-instr  fetch_MHL,      op_CPFA,        store_nop       ;BE     ;CP A,(HL)
-instr  fetch_A,        op_CPFA,        store_nop       ;BF     ;CP A,A
+instr  fetch_B,        op_CPFA,        store_nop       ;B8             ;CP A,B
+instr  fetch_C,        op_CPFA,        store_nop       ;B9             ;CP A,C
+instr  fetch_D,        op_CPFA,        store_nop       ;BA             ;CP A,D
+instr  fetch_E,        op_CPFA,        store_nop       ;BB             ;CP A,E
+instr  fetch_H,        op_CPFA,        store_nop       ;BC             ;CP A,H
+instr  fetch_L,        op_CPFA,        store_nop       ;BD             ;CP A,L
+instr  fetch_MHL,      op_CPFA,        store_nop       ;BE             ;CP A,(HL)
+instr  fetch_A,        op_CPFA,        store_nop       ;BF             ;CP A,A
 instr  fetch_nop,      op_IFNZ,        store_RET       ;C0             ;RET NZ
 instr  fetch_nop,      op_POP16,       store_BC        ;C1             ;POP BC
 instr  fetch_DIR16,    op_IFNZ,        store_PC        ;C2 nn nn       ;JP NZ,nn
@@ -2256,7 +2251,7 @@ instr     fetch_DE,       op_PUSH16,      store_nop       ;D5             ;PUSH DE
 instr  fetch_DIR8,     op_SUBFA,       store_nop       ;D6 nn          ;SUB n
 instr  fetch_RST,      op_nop,         store_CALL      ;D7             ;RST 10H
 instr  fetch_nop,      op_IFC,         store_RET       ;D8             ;RET C
-instr  fetch_nop,      op_EXX,         store_nop       ;D9     ;EXX
+instr  fetch_nop,      op_EXX,         store_nop       ;D9             ;EXX
 instr  fetch_DIR16,    op_IFC,         store_PC        ;DA nn nn       ;JP C,nn
 instr  fetch_DIR8,     op_INA,         store_nop       ;DB nn          ;IN A,(n)
 instr  fetch_DIR16,    op_IFC,         store_CALL      ;DC nn nn       ;CALL C,nn
@@ -2266,7 +2261,7 @@ instr     fetch_RST,      op_nop,         store_CALL      ;DF             ;RST 18H
 instr  fetch_nop,      op_IFPO,        store_RET       ;E0             ;RET PO
 instr  fetch_nop,      op_POP16,       store_HL        ;E1             ;POP HL
 instr  fetch_DIR16,    op_IFPO,        store_PC        ;E2 nn nn       ;JP PO,nn
-instr  fetch_MSP,      op_EXHL,        store_MSP       ;E3     ;EX (SP),HL
+instr  fetch_MSP,      op_EXHL,        store_MSP       ;E3             ;EX (SP),HL
 instr  fetch_DIR16,    op_IFPO,        store_CALL      ;E4 nn nn       ;CALL PO,nn
 instr  fetch_HL,       op_PUSH16,      store_nop       ;E5             ;PUSH HL
 instr  fetch_DIR8,     op_ANDA,        store_nop       ;E6 nn          ;AND n
@@ -2274,7 +2269,7 @@ instr     fetch_RST,      op_nop,         store_CALL      ;E7             ;RST 20H
 instr  fetch_nop,      op_IFPE,        store_RET       ;E8             ;RET PE
 instr  fetch_HL,       op_nop,         store_PC        ;E9             ;JP HL
 instr  fetch_DIR16,    op_IFPE,        store_PC        ;EA nn nn       ;JP PE,nn
-instr  fetch_DE,       op_EXHL,        store_DE        ;EB     ;EX DE,HL
+instr  fetch_DE,       op_EXHL,        store_DE        ;EB             ;EX DE,HL
 instr  fetch_DIR16,    op_IFPE,        store_CALL      ;EC nn nn       ;CALL PE,nn
 instr  fetch_nop,      op_prefixED,    store_nop       ;ED             ;(ED opcode prefix)
 instr  fetch_DIR8,     op_XORA,        store_nop       ;EE nn          ;XOR n
@@ -2282,7 +2277,7 @@ instr     fetch_RST,      op_nop,         store_CALL      ;EF             ;RST 28H
 instr  fetch_nop,      op_IFP,         store_RET       ;F0             ;RET P
 instr  fetch_nop,      op_POP16,       store_AF        ;F1             ;POP AF
 instr  fetch_DIR16,    op_IFP,         store_PC        ;F2 nn nn       ;JP P,nn
-instr  fetch_nop,      op_DI,          store_nop       ;F3     ;DI
+instr  fetch_nop,      op_DI,          store_nop       ;F3             ;DI
 instr  fetch_DIR16,    op_IFP,         store_CALL      ;F4 nn nn       ;CALL P,nn
 instr  fetch_AF,       op_PUSH16,      store_nop       ;F5             ;PUSH AF
 instr  fetch_DIR8,     op_ORA,         store_nop       ;F6 nn          ;OR n
@@ -2290,10 +2285,10 @@ instr   fetch_RST,      op_nop,         store_CALL      ;F7             ;RST 30H
 instr  fetch_nop,      op_IFM,         store_RET       ;F8             ;RET M
 instr  fetch_HL,       op_nop,         store_SP        ;F9             ;LD SP,HL
 instr  fetch_DIR16,    op_IFM,         store_PC        ;FA nn nn       ;JP M,nn
-instr  fetch_nop,      op_EI,          store_nop       ;FB     ;EI
+instr  fetch_nop,      op_EI,          store_nop       ;FB             ;EI
 instr  fetch_DIR16,    op_IFM,         store_CALL      ;FC nn nn       ;CALL M,nn
 instr  fetch_nop,      op_prefixFD,    store_nop       ;FD             ;(FD opcode prefix)
-instr  fetch_DIR8,     op_CPFA,        store_nop       ;FE nn  ;CP n
+instr  fetch_DIR8,     op_CPFA,        store_nop       ;FE nn          ;CP n
 instr  fetch_RST,      op_nop,         store_CALL      ;FF             ;RST 38H
 
 
@@ -2301,359 +2296,96 @@ instr  fetch_RST,      op_nop,         store_CALL      ;FF             ;RST 38H
 
 
 
-do_fetch_0:
-       ldi     opl,0
+       checkspace PC, 2
+
+do_op_noni:
+       sbiw    z_pcl,1                         ;--z_pc
        ret
 
+       checkspace PC, 16
+
 do_fetch_dir8_2:
        movw    xl,z_pcl
        adiw    xl,1
        mem_read_d opl
        ret
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|IN r,[C]  |***P0-|Input                |r=[C]                 |
-;
+       checkspace PC, 5
 
-do_op_in:                      ; in opl,(opl)
-.if PORT_DEBUG
-       push    opl     
-       cp      opl,_0          ; don't debug port 0 (con stat)
-       breq    dbg_op_in_1
-       printnewline
-       printstring "Port read: ("
-       mov temp,opl
-       lcall printhex
-       printstring ") -> "
-dbg_op_in_1:
-.endif
+do_fetch_xh:
+       sbis    flags,prefixfd
+       ldd     opl,y+oz_xh
+       sbic    flags,prefixfd
+       ldd     opl,y+oz_yh
+       ret
 
-       mov     temp2,opl
-       lcall   portRead
-       mov     opl,temp
-       bst     z_flags,ZFL_C                   ;save Carry
-       ldpmx   z_flags,sz53p_tab,temp          ;S,Z,P
-       bld     z_flags,ZFL_C
+       checkspace PC, 5
 
-.if PORT_DEBUG
-       pop     temp
-       cp      temp,_0
-       breq    dbg_op_in_2
-       lcall printhex
-       printstring " "
-dbg_op_in_2:
-.endif
+do_fetch_xl:
+       sbis    flags,prefixfd
+       ldd     opl,y+oz_xl
+       sbic    flags,prefixfd
+       ldd     opl,y+oz_yl
        ret
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|OUT [C],r |------|Output               |[C]=r                 |
-;
 
-do_op_out:                     ; out (c),opl
-.if PORT_DEBUG
-       printnewline
-       printstring "Port write: "
-       mov temp,opl
-       lcall printhex
-       printstring " -> ("
-       ldd temp,y+oz_c
-       lcall printhex
-       printstring ") "
-.endif
-       mov     temp,opl
-       ldd     temp2,y+oz_c
-       lcall   portWrite
-       ret
+       checkspace PC, 41
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|LD dst,src|------|Load                 |dst=src               |
-;
+do_fetch_mxx:
+       sbic    flags,prefixfd
+       rjmp    fetchmxx_fd
+       ldd     xh,y+oz_xh
+       ldd     xl,y+oz_xl
+       rjmp    fetchmxx1
+fetchmxx_fd:
+       ldd     xh,y+oz_yh
+       ldd     xl,y+oz_yl
+fetchmxx1:
+       mem_read_ds opl, z_pc                   ;get displacement
+       adiw z_pcl,1
+       clr     oph                             ;sign extend
+       tst     opl
+       brpl    fetchmxx2
+       com     oph
+fetchmxx2:
+       add     xl,opl                          ;add displacement
+       adc     xh,oph
+       mem_read_d opl                          ;get operand
+       ret                                     ;(Ix+d) still in xl,xh
 
-do_op_stbc:            ;store bc to mem loc in opl:h
-       movw xl,opl
-       ldd     temp,y+oz_c
-       mem_write
-       adiw xl,1
-       ldd     temp,y+oz_b
-       mem_write
+
+       checkspace PC, 8
+
+do_fetch_xx:
+       sbic    flags,prefixfd
+       rjmp    fetchxx_fd
+       ldd     opl,y+oz_xl
+       ldd     oph,y+oz_xh
+       ret
+fetchxx_fd:
+       ldd     opl,y+oz_yl
+       ldd     oph,y+oz_yh
        ret
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|LD dst,src|------|Load                 |dst=src               |
-;
-;
-do_op_stde:            ;store de to mem loc in opl:h
-       movw xl,opl
-       ldd     temp,y+oz_e
-       mem_write
-       adiw xl,1
-       ldd     temp,y+oz_d
-       mem_write
+       checkspace PC, 5
+
+do_store_xh:
+       sbis    flags,prefixfd
+       std     y+oz_xh,opl
+       sbic    flags,prefixfd
+       std     y+oz_yh,opl
        ret
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|LD dst,src|------|Load                 |dst=src               |
-;
-;
-do_op_stsp:            ;store sp to mem loc in opl:h
-       movw xl,opl
-       mem_write_s z_spl
-       adiw xl,1
-       mem_write_s z_sph
+       checkspace PC, 5
+
+do_store_xl:
+       sbis    flags,prefixfd
+       std     y+oz_xl,opl
+       sbic    flags,prefixfd
+       std     y+oz_yl,opl
        ret
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|ADC HL,ss |***V0*|Add with Carry       |HL=HL+ss+CY           |
-;
-
-do_op_ADCHL:
-       ldd     temp,y+oz_l
-       ldd     temp2,y+oz_h
-       clc
-       sbrc z_flags,ZFL_C
-        sec
-       adc opl,temp
-       in temp,sreg                            ; save lower Z 
-       adc oph,temp2
-       in temp2,sreg
-       std     y+oz_l,opl
-       std     y+oz_h,oph
-       and     temp,temp2                      ; 16bit Z
-       ldi     z_flags,0                       ; clear N
-       bmov    z_flags,ZFL_C, temp2,AVR_C
-       bmov    z_flags,ZFL_P, temp2,AVR_V
-       bmov    z_flags,ZFL_H, temp2,AVR_H
-       bmov    z_flags,ZFL_Z, temp,AVR_Z
-       bmov    z_flags,ZFL_S, temp2,AVR_N
-       ret
-
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|SBC HL,ss |***V1*|Subtract with carry  |HL=HL-ss-CY           |
-;
-;
-do_op_sbchl:
-       ldd     temp,y+oz_l
-       ldd     temp2,y+oz_h
-       cp      temp,opl                        ; set z
-       clc
-       sbrc    z_flags,ZFL_C
-        sec
-       sbc     temp,opl
-       sbc     temp2,oph
-       std     y+oz_l,temp
-       std     y+oz_h,temp2
-       in temp,sreg
-       ldi     z_flags,(1<<ZFL_N)                      ; set N
-       bmov    z_flags,ZFL_C, temp,AVR_C
-       bmov    z_flags,ZFL_P, temp,AVR_V
-       bmov    z_flags,ZFL_H, temp,AVR_H
-       bmov    z_flags,ZFL_Z, temp,AVR_Z
-       bmov    z_flags,ZFL_S, temp,AVR_N
-       ret
-
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|NEG       |***V1*|Negate A             |A=0-A                 |
-
-;
-do_op_NEG:
-       ldi     temp,0
-       sub     temp,z_a
-       mov     z_a,temp
-       in      temp,sreg
-       ldpmx   z_flags,sz53p_tab,z_a           ;S,Z,P
-       bmov    z_flags,ZFL_C, temp,AVR_C
-       bmov    z_flags,ZFL_H, temp,AVR_H
-       do_z80_flags_V
-       do_z80_flags_set_N
-       ret
-
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|RETI      |------|Return from Interrupt|PC=[SP]+              |
-;|RETN      |------|Return from NMI      |  Copy IFF2 to IFF1   |
-
-
-do_op_RETI:
-do_op_RETN:
-       ldd     temp,y+oz_istat
-       bmov    temp,IFF1, temp,IFF2
-       std     y+oz_istat,temp
-       ljmp    do_store_ret
-
-
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|IM n      |------|Interrupt Mode       |             (n=0,1,2)|
-
-do_op_IM0:
-       ldd     temp,y+oz_istat
-       andi    temp, ~IM_MASK
-       std     y+oz_istat,temp
-       ret
-
-do_op_IM1:
-       ldd     temp,y+oz_istat
-       andi    temp,~IM_MASK
-       ori     temp,IM1
-       std     y+oz_istat,temp
-       ret
-
-do_op_IM2:
-       ldd     temp,y+oz_istat
-       andi    temp, ~IM_MASK
-       ori     temp,IM2
-       std     y+oz_istat,temp
-       ret
-
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|LD A,i    |**0*0-|Load                 |(i=I,R)  IFF2 --> P   |
-;|LD i,A    |------|Load                 |(i=I,R)               |
-
-do_op_ldai:
-       ldd     z_a,y+oz_i
-       rjmp    op_ldar1
-
-do_op_ldar:
-       ldd     z_a,y+oz_r
-op_ldar1:
-       bst     z_flags,ZFL_C                   ;save C
-       ldpmx   z_flags,sz53p_tab,z_a           ;S,Z,H,P,N      
-       bld     z_flags,ZFL_C                   ;
-       ldd     temp,y+oz_istat
-       bmov    z_flags,ZFL_P, temp,IFF2
-       ret
-
-do_op_ldia:
-       std     y+oz_i,z_a
-       ret
-
-do_op_ldra:
-       std     y+oz_r,z_a
-       ret
-
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|RLD       |**0P0-|Rotate Left 4 bits   |{A,[HL]}={A,[HL]}<- ##|
-;|RRD       |**0P0-|Rotate Right 4 bits  |{A,[HL]}=->{A,[HL]} ##|
-
-do_op_rld:
-       swap    opl
-       mov     oph,opl
-       andi    opl,0xf0
-       andi    oph,0x0f
-       mov     temp,z_a
-       andi    temp,0x0f
-       or      opl,temp
-       mov     temp,z_a
-       andi    temp,0xf0
-       or      temp,oph
-       mov     z_a,temp
-       bst     z_flags,ZFL_C                   ;save C
-       ldpmx   z_flags,sz53p_tab,z_a           ;S,Z,H,P,N      
-       bld     z_flags,ZFL_C                   ;
-       ret
-
-do_op_rrd:
-       mov     oph,opl
-       andi    opl,0xf0
-       andi    oph,0x0f
-       mov     temp,z_a
-       andi    temp,0x0f
-       or      opl,temp
-       swap    opl
-       mov     temp,z_a
-       andi    temp,0xf0
-       or      temp,oph
-       mov     z_a,temp
-       bst     z_flags,ZFL_C                   ;save C
-       ldpmx   z_flags,sz53p_tab,z_a           ;S,Z,H,P,N      
-       bld     z_flags,ZFL_C                   ;
-       ret
-
-
-do_fetch_xh:
-       sbis    flags,prefixfd
-       ldd     opl,y+oz_xh
-       sbic    flags,prefixfd
-       ldd     opl,y+oz_yh
-       ret
-
-do_fetch_xl:
-       sbis    flags,prefixfd
-       ldd     opl,y+oz_xl
-       sbic    flags,prefixfd
-       ldd     opl,y+oz_yl
-       ret
-
-
-do_fetch_mxx:
-       sbic    flags,prefixfd
-       rjmp    fetchmxx_fd
-       ldd     xh,y+oz_xh
-       ldd     xl,y+oz_xl
-       rjmp    fetchmxx1
-fetchmxx_fd:
-       ldd     xh,y+oz_yh
-       ldd     xl,y+oz_yl
-fetchmxx1:
-       mem_read_ds opl, z_pc                   ;get displacement
-       adiw z_pcl,1
-       clr     oph                             ;sign extend
-       tst     opl
-       brpl    fetchmxx2
-       com     oph
-fetchmxx2:
-       add     xl,opl                          ;add displacement
-       adc     xh,oph
-       mem_read_d opl                          ;get operand
-       ret                                     ;(Ix+d) still in xl,xh
-
-
-do_fetch_xx:
-       sbic    flags,prefixfd
-       rjmp    fetchxx_fd
-       ldd     opl,y+oz_xl
-       ldd     oph,y+oz_xh
-       ret
-fetchxx_fd:
-       ldd     opl,y+oz_yl
-       ldd     oph,y+oz_yh
-       ret
-
-do_store_xh:
-       sbis    flags,prefixfd
-       std     y+oz_xh,opl
-       sbic    flags,prefixfd
-       std     y+oz_yh,opl
-       ret
-
-do_store_xl:
-       sbis    flags,prefixfd
-       std     y+oz_xl,opl
-       sbic    flags,prefixfd
-       std     y+oz_yl,opl
-       ret
+       checkspace PC, 37
 
 do_store_mxx:
        sbic    flags,prefixfd
@@ -2677,10 +2409,14 @@ storemxx2:
        mem_write_s opl                         ;store operand
        ret
 
+       checkspace PC, 10
+
 do_store_mxx_0:
        mem_write_s opl                         ;store operand
        ret
 
+       checkspace PC, 38
+
 do_store_mxx_2:
        sbic    flags,prefixfd
        rjmp    storemxx2_fd
@@ -2704,6 +2440,8 @@ storemxx22:
        mem_write_s opl                         ;store operand
        ret
 
+       checkspace PC, 8
+
 do_store_xx:
        sbic    flags,prefixfd
        rjmp    storexx_fd
@@ -2720,10 +2458,12 @@ storexx_fd:
 ;----------------------------------------------------------------
 ;|LD dst,src|------|Load                 |dst=src               |
 ;
-;
+
+       checkspace PC, 30
+
 do_op_stxx:            ;store xx to mem loc in opl:h
 
-       movw xl,opl
+       movw    xl,opl
        sbis    flags,prefixfd
        ldd     temp,y+oz_xl
        sbic    flags,prefixfd
@@ -2744,6 +2484,8 @@ do_op_stxx:               ;store xx to mem loc in opl:h
 ;|EX [SP],IX|------|Exchange             |[SP]<->IX             |
 ;|EX [SP],IY|------|Exchange             |[SP]<->IY             |
 ; 
+       checkspace PC, 13
+
 do_op_EXxx:
        sbic    flags,prefixfd
        rjmp    opexxx_fd
@@ -2767,7 +2509,9 @@ opexxxe:
 ;|ADD IX,pp |--*-0*|Add                  |IX=IX+pp              |
 ;|ADD IY,rr |--*-0*|Add                  |IY=IY+rr              |
 ;
-;
+
+       checkspace PC, 25
+
 do_op_addxx:
        sbic    flags,prefixfd
        rjmp    opadx_fd
@@ -2792,1043 +2536,565 @@ opadx_e:
        do_z80_flags_clear_N
        ret
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|LDD       |--0*0-|Load and Decrement   |[DE]=[HL],HL=HL-1,#   |
-;|LDDR      |--000-|Load, Dec., Repeat   |LDD till BC=0         |
-;|LDI       |--0*0-|Load and Increment   |[DE]=[HL],HL=HL+1,#   |
-;|LDIR      |--000-|Load, Inc., Repeat   |LDI till BC=0         |
-;
 
-op_LDxx_common:
-       ldd     zh,y+oz_h               ;H
-       ldd     zl,y+oz_l               ;L
-       ldd     xh,y+oz_d       ;D
-       ldd     xl,y+oz_e       ;E
-       ldd     oph,y+oz_b      ;B
-       ldd     opl,y+oz_c      ;C
-       mem_read_ds temp, z
-       mem_write_ds x, temp
-       cbr     z_flags,(1<<ZFL_H) | (1<<ZFL_P) | (1<<ZFL_N)
-       subi    opl,1
-       sbci    oph,0
-       breq    PC+2
-        sbr    z_flags,(1<<ZFL_P)
-       std     y+oz_c,opl      ;C
-       std     y+oz_b,oph      ;B
-       ret
+       opctable DDFDjmp, PC    ;+256
 
-do_op_LDI:
-       rcall   op_LDxx_common
-       adiw    z,1
-       adiw    x,1
-       std     y+oz_e,xl       ;E
-       std     y+oz_d,xh       ;D
-       std     y+oz_l,zl               ;L
-       std     y+oz_h,zh               ;H
-       ret
+instr  fetch_nop,      op_noni,                store_nop       ;00             ;
+instr  fetch_nop,      op_noni,        store_nop       ;01             ;
+instr  fetch_nop,      op_noni,        store_nop       ;02             ;
+instr  fetch_nop,      op_noni,        store_nop       ;03             ;
+instr  fetch_nop,      op_noni,        store_nop       ;04             ;
+instr  fetch_nop,      op_noni,        store_nop       ;05             ;
+instr  fetch_nop,      op_noni,        store_nop       ;06             ;
+instr  fetch_nop,      op_noni,        store_nop       ;07             ;
+instr  fetch_nop,      op_noni,        store_nop       ;08             ;
+instr  fetch_BC,       op_ADDxx,       store_nop       ;09             ;ADD xx,BC
+instr  fetch_nop,      op_noni,        store_nop       ;0A             ;
+instr  fetch_nop,      op_noni,        store_nop       ;0B             ;
+instr  fetch_nop,      op_noni,        store_nop       ;0C             ;
+instr  fetch_nop,      op_noni,        store_nop       ;0D             ;
+instr  fetch_nop,      op_noni,        store_nop       ;0E             ;
+instr  fetch_nop,      op_noni,        store_nop       ;0F             ;
+instr  fetch_nop,      op_noni,        store_nop       ;10             ;
+instr  fetch_nop,      op_noni,        store_nop       ;11             ;
+instr  fetch_nop,      op_noni,        store_nop       ;12             ;
+instr  fetch_nop,      op_noni,        store_nop       ;13             ;
+instr  fetch_nop,      op_noni,        store_nop       ;14             ;
+instr  fetch_nop,      op_noni,        store_nop       ;15             ;
+instr  fetch_nop,      op_noni,        store_nop       ;16             ;
+instr  fetch_nop,      op_noni,        store_nop       ;17             ;
+instr  fetch_nop,      op_noni,        store_nop       ;18             ;
+instr  fetch_DE,       op_ADDxx,       store_nop       ;19             ;ADD xx,DE
+instr  fetch_nop,      op_noni,        store_nop       ;1A             ;
+instr  fetch_nop,      op_noni,        store_nop       ;1B             ;
+instr  fetch_nop,      op_noni,        store_nop       ;1C             ;
+instr  fetch_nop,      op_noni,        store_nop       ;1D             ;
+instr  fetch_nop,      op_noni,        store_nop       ;1E             ;
+instr  fetch_nop,      op_noni,        store_nop       ;1F             ;
+instr  fetch_nop,      op_noni,        store_nop       ;20             ;
+instr  fetch_DIR16,    op_nop,         store_xx        ;21             ;LD xx,nn
+instr  fetch_DIR16,    op_STxx,        store_nop       ;22             ;LD (nn),xx
+instr  fetch_xx,       op_INC16,       store_xx        ;23             ;INC xx
+instr  fetch_xH,       op_INC,         store_xH        ;24             ;INC xh
+instr  fetch_xH,       op_DEC,         store_xH        ;25             ;DEC xh
+instr  fetch_DIR8,     op_nop,         store_xH        ;26             ;LD xh,n
+instr  fetch_nop,      op_noni,        store_nop       ;27             ;
+instr  fetch_nop,      op_noni,        store_nop       ;28             ;
+instr  fetch_xx,       op_ADDxx,       store_nop       ;29             ;ADD xx,xx
+instr  fetch_DIR16,    op_RMEM16,      store_xx        ;2A             ;LD xx,(nn)
+instr  fetch_xx,       op_DEC16,       store_xx        ;2B             ;DEC xx
+instr  fetch_xL,       op_INC,         store_xL        ;2C             ;INC xl
+instr  fetch_xL,       op_DEC,         store_xL        ;2D             ;DEC xl
+instr  fetch_DIR8,     op_nop,         store_xL        ;2E             ;LD xl,n
+instr  fetch_nop,      op_noni,        store_nop       ;2F             ;
+instr  fetch_nop,      op_noni,        store_nop       ;30             ;
+instr  fetch_nop,      op_noni,        store_nop       ;31             ;
+instr  fetch_nop,      op_noni,        store_nop       ;32             ;
+instr  fetch_nop,      op_noni,        store_nop       ;33             ;
+instr  fetch_MXX,      op_INC,         store_MXX_0     ;34             ;INC (xx+d)
+instr  fetch_MXX,      op_DEC,         store_MXX_0     ;35             ;DEC (xx+d)
+instr  fetch_DIR8_2,   op_nop,         store_MXX_2     ;36             ;LD (xx+d),n
+instr  fetch_nop,      op_noni,        store_nop       ;37             ;
+instr  fetch_nop,      op_noni,        store_nop       ;38             ;
+instr  fetch_SP,       op_ADDxx,       store_nop       ;39             ;ADD xx,SP
+instr  fetch_nop,      op_noni,        store_nop       ;3A             ;
+instr  fetch_nop,      op_noni,        store_nop       ;3B             ;
+instr  fetch_nop,      op_noni,        store_nop       ;3C             ;
+instr  fetch_nop,      op_noni,        store_nop       ;3D             ;
+instr  fetch_nop,      op_noni,        store_nop       ;3E             ;
+instr  fetch_nop,      op_noni,        store_nop       ;3F             ;
+instr  fetch_nop,      op_noni,        store_nop       ;40             ;
+instr  fetch_nop,      op_noni,        store_nop       ;41             ;
+instr  fetch_nop,      op_noni,        store_nop       ;42             ;
+instr  fetch_nop,      op_noni,        store_nop       ;43             ;
+instr  fetch_xH,       op_nop,         store_B         ;44             ;LD B,xh
+instr  fetch_xL,       op_nop,         store_B         ;45             ;LD B,xl
+instr  fetch_MXX,      op_nop,         store_B         ;46             ;LD B,(xx+d)
+instr  fetch_nop,      op_noni,        store_nop       ;47             ;
+instr  fetch_nop,      op_noni,        store_nop       ;48             ;
+instr  fetch_nop,      op_noni,        store_nop       ;49             ;
+instr  fetch_nop,      op_noni,        store_nop       ;4A             ;
+instr  fetch_nop,      op_noni,        store_nop       ;4B             ;
+instr  fetch_xH,       op_nop,         store_C         ;4C             ;LD C,xh
+instr  fetch_xL,       op_nop,         store_C         ;4D             ;LD C,xl
+instr  fetch_MXX,      op_nop,         store_C         ;4E             ;LD C,(xx+d)
+instr  fetch_nop,      op_noni,        store_nop       ;4F             ;
+instr  fetch_nop,      op_noni,        store_nop       ;50             ;
+instr  fetch_nop,      op_noni,        store_nop       ;51             ;
+instr  fetch_nop,      op_noni,        store_nop       ;52             ;
+instr  fetch_nop,      op_noni,        store_nop       ;53             ;
+instr  fetch_xH,       op_nop,         store_D         ;54             ;LD D,xh
+instr  fetch_xL,       op_nop,         store_D         ;55             ;LD D,xl
+instr  fetch_MXX,      op_nop,         store_D         ;56             ;LD D,(xx+d)
+instr  fetch_nop,      op_noni,        store_nop       ;57             ;
+instr  fetch_nop,      op_noni,        store_nop       ;58             ;
+instr  fetch_nop,      op_noni,        store_nop       ;59             ;
+instr  fetch_nop,      op_noni,        store_nop       ;5A             ;
+instr  fetch_nop,      op_noni,        store_nop       ;5B             ;
+instr  fetch_xH,       op_nop,         store_E         ;5C             ;LD E,xh
+instr  fetch_xL,       op_nop,         store_E         ;5D             ;LD E,xl
+instr  fetch_MXX,      op_nop,         store_E         ;5E             ;LD E,(xx+d)
+instr  fetch_nop,      op_noni,        store_nop       ;5F             ;
+instr  fetch_B,        op_nop,         store_xH        ;60             ;LD xh,B
+instr  fetch_C,        op_nop,         store_xH        ;61             ;LD xh,C
+instr  fetch_D,        op_nop,         store_xH        ;62             ;LD xh,D
+instr  fetch_E,        op_nop,         store_xH        ;63             ;LD xh,E
+instr  fetch_nop,      op_noni,        store_nop       ;64             ;LD xh,xh
+instr  fetch_xL,       op_nop,         store_xH        ;65             ;LD xh,xl
+instr  fetch_MXX,      op_nop,         store_H         ;66             ;LD H,(xx+d)
+instr  fetch_A,        op_nop,         store_xH        ;67             ;LD xh,A
+instr  fetch_B,        op_nop,         store_xL        ;68             ;LD xl,B
+instr  fetch_C,        op_nop,         store_xL        ;69             ;LD xl,C
+instr  fetch_D,        op_nop,         store_xL        ;6A             ;LD xl,D
+instr  fetch_E,        op_nop,         store_xL        ;6B             ;LD xl,E
+instr  fetch_xH,       op_nop,         store_xL        ;6C             ;LD xl,xh
+instr  fetch_nop,      op_noni,        store_nop       ;6D             ;LD xl,xl
+instr  fetch_MXX,      op_nop,         store_L         ;6E             ;LD L,(xx+d)
+instr  fetch_A,        op_nop,         store_xL        ;6F             ;LD xl,A
+instr  fetch_B,        op_nop,         store_MXX       ;70             ;LD (xx+d),B
+instr  fetch_C,        op_nop,         store_MXX       ;71             ;LD (xx+d),C
+instr  fetch_D,        op_nop,         store_MXX       ;72             ;LD (xx+d),D
+instr  fetch_E,        op_nop,         store_MXX       ;73             ;LD (xx+d),E
+instr  fetch_H,        op_nop,         store_MXX       ;74             ;LD (xx+d),H
+instr  fetch_L,        op_nop,         store_MXX       ;75             ;LD (xx+d),L
+instr  fetch_nop,      op_noni,        store_nop       ;76             ;
+instr  fetch_A,        op_nop,         store_MXX       ;77             ;LD (xx+d),A
+instr  fetch_nop,      op_noni,        store_nop       ;78             ;
+instr  fetch_nop,      op_noni,        store_nop       ;79             ;
+instr  fetch_nop,      op_noni,        store_nop       ;7A             ;
+instr  fetch_nop,      op_noni,        store_nop       ;7B             ;
+instr  fetch_xH,       op_nop,         store_A         ;7C             ;LD A,xh
+instr  fetch_xL,       op_nop,         store_A         ;7D             ;LD A,xl
+instr  fetch_MXX,      op_nop,         store_A         ;7E             ;LD A,(xx+d)
+instr  fetch_nop,      op_noni,        store_nop       ;7F             ;
+instr  fetch_nop,      op_noni,        store_nop       ;80             ;
+instr  fetch_nop,      op_noni,        store_nop       ;81             ;
+instr  fetch_nop,      op_noni,        store_nop       ;82             ;
+instr  fetch_nop,      op_noni,        store_nop       ;83             ;
+instr  fetch_xH,       op_ADDA,        store_nop       ;84             ;ADD A,xh
+instr  fetch_xL,       op_ADDA,        store_nop       ;85             ;ADD A,xl
+instr  fetch_MXX,      op_ADDA,        store_nop       ;86             ;ADD A,(xx)
+instr  fetch_nop,      op_noni,        store_nop       ;87             ;
+instr  fetch_nop,      op_noni,        store_nop       ;88             ;
+instr  fetch_nop,      op_noni,        store_nop       ;89             ;
+instr  fetch_nop,      op_noni,        store_nop       ;8A             ;
+instr  fetch_nop,      op_noni,        store_nop       ;8B             ;
+instr  fetch_xH,       op_ADCA,        store_nop       ;8C             ;ADC A,xh
+instr  fetch_xL,       op_ADCA,        store_nop       ;8D             ;ADC A,xl
+instr  fetch_MXX,      op_ADCA,        store_nop       ;8E             ;ADC A,(xx)
+instr  fetch_nop,      op_noni,        store_nop       ;8F             ;
+instr  fetch_nop,      op_noni,        store_nop       ;90             ;
+instr  fetch_nop,      op_noni,        store_nop       ;91             ;
+instr  fetch_nop,      op_noni,        store_nop       ;92             ;
+instr  fetch_nop,      op_noni,        store_nop       ;93             ;
+instr  fetch_xH,       op_SUBFA,       store_nop       ;94             ;SUB A,xh
+instr  fetch_xL,       op_SUBFA,       store_nop       ;95             ;SUB A,xl
+instr  fetch_MXX,      op_SUBFA,       store_nop       ;96             ;SUB A,(xx)
+instr  fetch_nop,      op_noni,        store_nop       ;97             ;
+instr  fetch_nop,      op_noni,        store_nop       ;98             ;
+instr  fetch_nop,      op_noni,        store_nop       ;99             ;
+instr  fetch_nop,      op_noni,        store_nop       ;9A             ;
+instr  fetch_nop,      op_noni,        store_nop       ;9B             ;
+instr  fetch_xH,       op_SBCFA,       store_nop       ;9C             ;SBC A,xh
+instr  fetch_xL,       op_SBCFA,       store_nop       ;9D             ;SBC A,xl
+instr  fetch_MXX,      op_SBCFA,       store_nop       ;9E             ;SBC A,(xx)
+instr  fetch_nop,      op_noni,        store_nop       ;9F             ;
+instr  fetch_nop,      op_noni,        store_nop       ;A0             ;
+instr  fetch_nop,      op_noni,        store_nop       ;A1             ;
+instr  fetch_nop,      op_noni,        store_nop       ;A2             ;
+instr  fetch_nop,      op_noni,        store_nop       ;A3             ;
+instr  fetch_xH,       op_ANDA,        store_nop       ;A4             ;AND A,xh
+instr  fetch_xL,       op_ANDA,        store_nop       ;A5             ;AND A,xl
+instr  fetch_MXX,      op_ANDA,        store_nop       ;A6             ;AND A,(xx)
+instr  fetch_nop,      op_noni,        store_nop       ;A7             ;
+instr  fetch_nop,      op_noni,        store_nop       ;A8             ;
+instr  fetch_nop,      op_noni,        store_nop       ;A9             ;
+instr  fetch_nop,      op_noni,        store_nop       ;AA             ;
+instr  fetch_nop,      op_noni,        store_nop       ;AB             ;
+instr  fetch_xH,       op_XORA,        store_nop       ;AC             ;XOR A,xh
+instr  fetch_xL,       op_XORA,        store_nop       ;AD             ;XOR A,xl
+instr  fetch_MXX,      op_XORA,        store_nop       ;AE             ;XOR A,(xx)
+instr  fetch_nop,      op_noni,        store_nop       ;AF             ;
+instr  fetch_nop,      op_noni,        store_nop       ;B0             ;
+instr  fetch_nop,      op_noni,        store_nop       ;B1             ;
+instr  fetch_nop,      op_noni,        store_nop       ;B2             ;
+instr  fetch_nop,      op_noni,        store_nop       ;B3             ;
+instr  fetch_xH,       op_ORA,         store_nop       ;B4             ;OR A,xh
+instr  fetch_xL,       op_ORA,         store_nop       ;B5             ;OR A,xl
+instr  fetch_MXX,      op_ORA,         store_nop       ;B6             ;OR A,(xx)
+instr  fetch_nop,      op_noni,        store_nop       ;B7             ;
+instr  fetch_nop,      op_noni,        store_nop       ;B8             ;
+instr  fetch_nop,      op_noni,        store_nop       ;B9             ;
+instr  fetch_nop,      op_noni,        store_nop       ;BA             ;
+instr  fetch_nop,      op_noni,        store_nop       ;BB             ;
+instr  fetch_xH,       op_CPFA,        store_nop       ;BC             ;CP A,xh
+instr  fetch_xL,       op_CPFA,        store_nop       ;BD             ;CP A,xl
+instr  fetch_MXX,      op_CPFA,        store_nop       ;BE             ;CP A,(xx)
+instr  fetch_nop,      op_noni,        store_nop       ;BF             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C0             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C1             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C2             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C3             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C4             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C5             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C6             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C7             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C8             ;
+instr  fetch_nop,      op_noni,        store_nop       ;C9             ;
+instr  fetch_nop,      op_noni,        store_nop       ;CA             ;
+instr  fetch_nop,      op_prefixDDFDCB,store_nop       ;CB             ;
+instr  fetch_nop,      op_noni,        store_nop       ;CC             ;
+instr  fetch_nop,      op_noni,        store_nop       ;CD             ;
+instr  fetch_nop,      op_noni,        store_nop       ;CE             ;
+instr  fetch_nop,      op_noni,        store_nop       ;CF             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D0             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D1             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D2             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D3             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D4             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D5             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D6             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D7             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D8             ;
+instr  fetch_nop,      op_noni,        store_nop       ;D9             ;
+instr  fetch_nop,      op_noni,        store_nop       ;DA             ;
+instr  fetch_nop,      op_noni,        store_nop       ;DB             ;
+instr  fetch_nop,      op_noni,        store_nop       ;DC             ;
+instr  fetch_nop,      op_noni,        store_nop       ;DD             ;
+instr  fetch_nop,      op_noni,        store_nop       ;DE             ;
+instr  fetch_nop,      op_noni,        store_nop       ;DF             ;
+instr  fetch_nop,      op_noni,        store_nop       ;E0             ;
+instr  fetch_nop,      op_POP16,       store_xx        ;E1             ;POP xx
+instr  fetch_nop,      op_noni,        store_nop       ;E2             ;
+instr  fetch_MSP,      op_EXxx,        store_MSP       ;E3             ;EX (SP),xx
+instr  fetch_nop,      op_noni,        store_nop       ;E4             ;
+instr  fetch_xx,       op_PUSH16,      store_nop       ;E5             ;PUSH xx
+instr  fetch_nop,      op_noni,        store_nop       ;E6             ;
+instr  fetch_nop,      op_noni,        store_nop       ;E7             ;
+instr  fetch_nop,      op_noni,        store_nop       ;E8             ;
+instr  fetch_xx,       op_nop,         store_PC        ;E9             ;JP xx
+instr  fetch_nop,      op_noni,        store_nop       ;EA             ;
+instr  fetch_nop,      op_noni,        store_nop       ;EB             ;
+instr  fetch_nop,      op_noni,        store_nop       ;EC             ;
+instr  fetch_nop,      op_noni,        store_nop       ;ED             ;
+instr  fetch_nop,      op_noni,        store_nop       ;EE             ;
+instr  fetch_nop,      op_noni,        store_nop       ;EF             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F0             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F1             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F2             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F3             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F4             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F5             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F6             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F7             ;
+instr  fetch_nop,      op_noni,        store_nop       ;F8             ;
+instr  fetch_xx,       op_nop,         store_SP        ;F9             ;LD SP,xx
+instr  fetch_nop,      op_noni,        store_nop       ;FA             ;
+instr  fetch_nop,      op_noni,        store_nop       ;FB             ;
+instr  fetch_nop,      op_noni,        store_nop       ;FC             ;
+instr  fetch_nop,      op_noni,        store_nop       ;FD             ;
+instr  fetch_nop,      op_noni,        store_nop       ;FE             ;
+instr  fetch_nop,      op_noni,        store_nop       ;FF             ;
 
-do_op_LDD:
-       rcall   op_LDxx_common
-       sbiw    z,1
-       sbiw    x,1
-       std     y+oz_e,xl       ;E
-       std     y+oz_d,xh       ;D
-       std     y+oz_l,zl               ;L
-       std     y+oz_h,zh               ;H
-       ret
-
-do_op_LDIR:
-       rcall   do_op_LDI
-       sbrs    z_flags,ZFL_P
-        ret
-       sbiw    z_pcl,2
-       ret
 
-do_op_LDDR:
-       rcall   do_op_LDD
-       sbrs    z_flags,ZFL_P
-        ret
-       sbiw    z_pcl,2
-       ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
-;|CPD       |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
-;|CPDR      |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
-;|CPI       |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
-;|CPIR      |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
-
+;|RLC m     |**0P0*|Rotate Left Circular |m=m<-                 |
+;|RRC m     |**0P0*|Rotate Right Circular|m=->m                 |
+;|RL m      |**0P0*|Rotate Left          |m={CY,m}<-            |
+;|RR m      |**0P0*|Rotate Right         |m=->{CY,m}            |
+;|SLA m     |**0P0*|Shift Left Arithmetic|m=m*2                 |
+;|SRA m     |**0P0*|Shift Right Arith.   |m=m/2                 |
+;|SLL m     |**0P0*|Shift Right Logical  |
+;|SRL m     |**0P0*|Shift Right Logical  |m=->{0,m,CY}          |
 
-op_CPxx_common:
-       ldd     xh,y+oz_h               ; H
-       ldd     xl,y+oz_l               ; L
-       ldd     zh,y+oz_b               ; B
-       ldd     zl,y+oz_c               ; C
 
-       cbr     z_flags,(1<<ZFL_S)|(1<<ZFL_Z)|(1<<ZFL_H)|(1<<ZFL_P)
-       sbr     z_flags,(1<<ZFL_N)
-       mem_read                        ; temp = (HL)
-       mov     temp2,z_a
-       sub     temp2,temp              ; A - (HL)
-       brpl    PC+2
-        sbr    z_flags,(1<<ZFL_S)
-       brne    PC+2
-        sbr    z_flags,(1<<ZFL_Z)
-       brhc    PC+2
-        sbr    z_flags,(1<<ZFL_H)
+       checkspace PC, 9
 
-       sbiw    z,1                     ; BC--
-       breq    PC+2
-        sbr    z_flags,(1<<ZFL_P)
-       std     y+oz_c,zl               ; C
-       std     y+oz_b,zh               ; B
+do_op_rlc:
+       ;Rotate Left Cyclical. All bits move 1 to the 
+       ;left, the msb becomes c and lsb.
+       clr     temp
+       lsl     opl
+       adc     temp,_0
+       or      opl,temp
+       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
+       or      z_flags,temp
        ret
 
-do_op_CPI:
-       rcall   op_CPxx_common
-       adiw    x,1                     ; HL++
-       std     y+oz_l,xl               ; L
-       std     y+oz_h,xh               ; H
+       checkspace PC, 9
+
+do_op_rrc: 
+       ;Rotate Right Cyclical. All bits move 1 to the 
+       ;right, the lsb becomes c and msb.
+       lsr     opl
+       brcc    PC+2
+       ori     opl,0x80
+       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
+       bmov    z_flags,ZFL_C, opl,7
        ret
 
 
-do_op_CPD:
-       rcall   op_CPxx_common
-       sbiw    x,1                     ; HL--
-       std     y+oz_l,xl               ; L
-       std     y+oz_h,xh               ; H
-       ret
+       checkspace PC, 11
 
-do_op_CPIR:
-       rcall   do_op_CPI
-       sbrc    z_flags,ZFL_Z
-        ret
-       sbrs    z_flags,ZFL_P
-        ret
-       sbiw    z_pcl,2
+do_op_rl:
+       ;Rotate Left. All bits move 1 to the left, the msb 
+       ;becomes c, c becomes lsb.
+       clc
+       sbrc    z_flags,ZFL_C
+        sec
+       rol     opl
+       in      temp,sreg
+       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
+       bmov    z_flags,ZFL_C, temp,AVR_C
        ret
 
-do_op_CPDR:
-       rcall   do_op_CPD
-       sbrc    z_flags,ZFL_Z
-        ret
-       sbrs    z_flags,ZFL_P
-        ret
-       sbiw    z_pcl,2
-       ret
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|INI       |?*??1-|Input and Increment  |[HL]=[C],HL=HL+1,B=B-1|
-;|IND       |?*??1-|Input and Decrement  |[HL]=[C],HL=HL-1,B=B-1|
-;|INIR      |?1??1-|Input, Inc., Repeat  |INI till B=0          |
-;|INDR      |?1??1-|Input, Dec., Repeat  |IND till B=0          |
+       checkspace PC, 9
 
-op_INxx_common:
-       cbr     z_flags,(1<<ZFL_Z)
-       sbr     z_flags,(1<<ZFL_N)
-       ldd     temp2,y+oz_c    ;C
-       lcall   portRead
-       ldd     xh,y+oz_h               ;H
-       ldd     xl,y+oz_l               ;L
-       lcall   dram_write
-       ldd     temp,y+oz_b     ;B
-       dec     temp
-       std     y+oz_b,temp     ;B
-       brne    PC+2
-        sbr    z_flags,(1<<ZFL_Z)
+do_op_rr:
+       ;Rotate Right. All bits move 1 to the right, the lsb 
+       ;becomes c, c becomes msb.
+
+       ror     opl
+       in      temp,sreg               ;CY
+       bmov    opl,7, z_flags,ZFL_C            ;old CY --> Bit 7
+       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
+       bmov    z_flags,ZFL_C, temp,AVR_C       ;
        ret
 
-do_op_INI:
-       rcall   op_INxx_common
-       adiw    x,1
-       std     y+oz_l,xl               ;L
-       std     y+oz_h,xh               ;H
+       checkspace PC, 8
+
+do_op_sla:
+       lsl     opl
+       in      temp,sreg
+       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
+       bmov    z_flags,ZFL_C, temp,AVR_C       ;
        ret
 
-do_op_IND:
-       rcall   op_INxx_common
-       sbiw    x,1
-       std     y+oz_l,xl               ;L
-       std     y+oz_h,xh               ;H
+       checkspace PC, 9
+
+do_op_sra:
+       lsr     opl
+       in      temp,sreg
+       bmov    opl,7, opl,6                    ;old CY --> Bit 7
+       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
+       bmov    z_flags,ZFL_C, temp,AVR_C       ;
        ret
 
-do_op_INIR:
-       rcall   do_op_INI
-       sbrc    z_flags,ZFL_Z
-        ret
-       sbiw    z_pcl,2
+       checkspace PC, 9
+
+do_op_sll:
+       sec
+       rol     opl
+       in      temp,sreg
+       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
+       bmov    z_flags,ZFL_C, temp,AVR_C       ;
        ret
 
-do_op_INDR:
-       rcall   do_op_IND
-       sbrc    z_flags,ZFL_Z
-        ret
-       sbiw    z_pcl,2
+       checkspace PC, 8
+
+do_op_srl:
+       lsr     opl
+       in      temp,sreg
+       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
+       bmov    z_flags,ZFL_C, temp,AVR_C       ;
        ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
-;|OUTI      |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
-;|OUTD      |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
-;|OTIR      |?1??1-|Output, Inc., Repeat |OUTI till B=0         |
-;|OTDR      |?1??1-|Output, Dec., Repeat |OUTD till B=0         |
+;|BIT b,m   |?*1?0-|Test Bit             |m&{2^b}               |
+;|RES b,m   |------|Reset bit            |m=m&{~2^b}            |
+;|SET b,m   |------|Set bit              |m=mv{2^b}             |
 
-op_OUTxx_common:
-       cbr     z_flags,(1<<ZFL_Z)
-       sbr     z_flags,(1<<ZFL_N)
-       lcall   dram_read               ;temp = (z)
-       ldd     temp2,y+oz_c    ;C
-       lcall   portWrite
-       ldd     temp,y+oz_b     ;B
-       dec     temp
-       std     y+oz_b,temp     ;B
-       brne    PC+2
-        sbr    z_flags,(1<<ZFL_Z)
-       ret
 
-do_op_OUTI:
-       ldd     xh,y+oz_h               ;H
-       ldd     xl,y+oz_l               ;L
-       adiw    x,1
-       std     y+oz_l,xl               ;L
-       std     y+oz_h,xh               ;H
-       sbiw    x,1
-       rcall   op_OUTxx_common
+do_op_BIT7:
+       ldi     temp,0x80
+       rjmp    opbit
+do_op_BIT6:
+       ldi     temp,0x40
+       rjmp    opbit
+do_op_BIT5:
+       ldi     temp,0x20
+       rjmp    opbit
+do_op_BIT4:
+       ldi     temp,0x10
+       rjmp    opbit
+do_op_BIT3:
+       ldi     temp,0x08
+       rjmp    opbit
+do_op_BIT2:
+       ldi     temp,0x04
+       rjmp    opbit
+do_op_BIT1:
+       ldi     temp,0x02
+       rjmp    opbit
+do_op_BIT0:
+       ldi     temp,0x01
+opbit:
+       and     temp,opl
+       in      temp,sreg
+       ori     z_flags,(1<<ZFL_H)
+       andi    z_flags,~(1<<ZFL_N)
+       bmov    z_flags,ZFL_Z, temp,AVR_Z
        ret
 
-do_op_OUTD:
-       ldd     xh,y+oz_h               ;H
-       ldd     xl,y+oz_l               ;L
-       sbiw    x,1
-       std     y+oz_l,xl               ;L
-       std     y+oz_h,xh               ;H
-       adiw    x,1
-       rcall   op_OUTxx_common
-       ret
 
-do_op_OTIR:
-       rcall   do_op_OUTI
-       sbrc    z_flags,ZFL_Z
-        ret
-       sbiw    z_pcl,2
-       ret
+.macro m_do_op_RES7
+       andi    opl,~0x80
+.endm
+.equ   do_op_RES7 = 0
+;      andi    opl,~0x80
+;      ret
 
-do_op_OTDR:
-       rcall   do_op_OUTD
-       sbrc    z_flags,ZFL_Z
-        ret
-       sbiw    z_pcl,2
+.macro m_do_op_RES6
+       andi    opl,~0x40
+.endm
+.equ   do_op_RES6 = 0
+;      andi    opl,~0x40
+;      ret
+
+.macro m_do_op_RES5
+       andi    opl,~0x20
+.endm
+.equ   do_op_RES5 = 0
+;      andi    opl,~0x20
+;      ret
+
+.macro m_do_op_RES4
+       andi    opl,~0x10
+.endm
+.equ   do_op_RES4 = 0
+;      andi    opl,~0x10
+;      ret
+
+.macro m_do_op_RES3
+       andi    opl,~0x08
+.endm
+.equ   do_op_RES3 = 0
+;      andi    opl,~0x08
+;      ret
+
+.macro m_do_op_RES2
+       andi    opl,~0x04
+.endm
+.equ   do_op_RES2 = 0
+;      andi    opl,~0x04
+;      ret
+
+.macro m_do_op_RES1
+       andi    opl,~0x02
+.endm
+.equ   do_op_RES1 = 0
+;      andi    opl,~0x02
+;      ret
+
+.macro m_do_op_RES0
+       andi    opl,~0x01
+.endm
+.equ   do_op_RES0 = 0
+;      andi    opl,~0x01
+;      ret
+
+.macro m_do_op_SET7
+       ori     opl,0x80
+.endm
+.equ   do_op_SET7 = 0
+;      ori     opl,0x80
+;      ret
+
+.macro m_do_op_SET6
+       ori     opl,0x40
+.endm
+.equ   do_op_SET6 = 0
+;      ori     opl,0x40
+;      ret
+
+.macro m_do_op_SET5
+       ori     opl,0x20
+.endm
+.equ   do_op_SET5 = 0
+;      ori     opl,0x20
+;      ret
+
+.macro m_do_op_SET4
+       ori     opl,0x10
+.endm
+.equ   do_op_SET4 = 0
+;      ori     opl,0x10
+;      ret
+
+.macro m_do_op_SET3
+       ori     opl,0x08
+.endm
+.equ   do_op_SET3 = 0
+;      ori     opl,0x08
+;      ret
+
+.macro m_do_op_SET2
+       ori     opl,0x04
+.endm
+.equ   do_op_SET2 = 0
+;      ori     opl,0x04
+;      ret
+
+.macro m_do_op_SET1
+       ori     opl,0x02
+.endm
+.equ   do_op_SET1 = 0
+;      ori     opl,0x02
+;      ret
+
+.macro m_do_op_SET0
+       ori     opl,0x01
+.endm
+.equ   do_op_SET0 = 0
+;      ori     opl,0x01
+;      ret
+
+
+;.macro m_do_store_b 
+;      std     y+oz_b,opl
+;.endm
+;.equ do_store_b = 0
+do_store2_b:
+       std     y+oz_b,opl
        ret
 
+do_store2_c:
+       std     y+oz_c,opl
+       ret
 
-       opctable EDjmp
+do_store2_d:
+       std     y+oz_d,opl
+       ret
 
-instr  fetch_nop,      op_nop,         store_nop       ;00             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;01             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;02             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;03             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;04             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;05             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;06             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;07             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;08             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;09             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;0A             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;0B             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;0C             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;0D             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;0E             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;0F             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;10             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;11             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;12             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;13             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;14             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;15             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;16             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;17             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;18             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;19             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;1A             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;1B             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;1C             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;1D             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;1E             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;1F             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;20             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;21             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;22             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;23             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;24             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;25             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;26             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;27             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;28             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;29             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;2A             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;2B             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;2C             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;2D             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;2E             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;2F             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;30             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;31             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;32             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;33             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;34             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;35             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;36             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;37             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;38             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;39             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;3A             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;3B             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;3C             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;3D             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;3E             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;3F             ;NOP
-instr  fetch_C,        op_IN,          store_B         ;40             ;IN B,(C)
-instr  fetch_B,        op_OUT,         store_nop       ;41             ;OUT (C),B
-instr  fetch_BC,       op_SBCHL,       store_nop       ;42             ;SBC HL,BC
-instr  fetch_DIR16,    op_STBC,        store_nop       ;43             ;LD (nn),BC
-instr  fetch_nop,      op_NEG,         store_nop       ;44             ;NEG
-instr  fetch_nop,      op_RETN,        store_nop       ;45             ;RETN
-instr  fetch_nop,      op_IM0,         store_nop       ;46             ;IM 0
-instr  fetch_nop,      op_ldia,        store_nop       ;47             ;LD I,A
-instr  fetch_C,        op_IN,          store_C         ;48             ;IN C,(C)
-instr  fetch_C,        op_OUT,         store_nop       ;49             ;OUT (C),C
-instr  fetch_BC,       op_ADCHL,       store_nop       ;4A             ;ADC HL,BC
-instr  fetch_DIR16,    op_RMEM16,      store_BC        ;4B nn nn       ;LD BC,(nn)
-instr  fetch_nop,      op_NEG,         store_nop       ;4C             ;NEG
-instr  fetch_nop,      op_RETI,        store_nop       ;4D             ;RETI
-instr  fetch_nop,      op_IM0,         store_nop       ;4E             ;IM 0
-instr  fetch_nop,      op_ldra,        store_nop       ;4F             ;LD R,A
-instr  fetch_C,        op_IN,          store_D         ;50             ;IN D,(C)
-instr  fetch_D,        op_OUT,         store_nop       ;51             ;OUT (C),D
-instr  fetch_DE,       op_SBCHL,       store_nop       ;52             ;SBC HL,DE
-instr  fetch_DIR16,    op_STDE,        store_nop       ;53 nn nn       ;LD (nn),DE
-instr  fetch_nop,      op_NEG,         store_nop       ;54             ;NEG
-instr  fetch_nop,      op_RETN,        store_nop       ;55             ;RETN
-instr  fetch_nop,      op_IM1,         store_nop       ;56             ;IM 1
-instr  fetch_nop,      op_ldai,        store_nop       ;57             ;LD A,I
-instr  fetch_C,        op_IN,          store_E         ;58             ;IN E,(C)
-instr  fetch_E,        op_OUT,         store_nop       ;59             ;OUT (C),E
-instr  fetch_DE,       op_ADCHL,       store_nop       ;5A             ;ADC HL,DE
-instr  fetch_DIR16,    op_RMEM16,      store_DE        ;5B nn nn       ;LD DE,(nn)
-instr  fetch_nop,      op_NEG,         store_nop       ;5C             ;NEG
-instr  fetch_nop,      op_RETN,        store_nop       ;5D             ;RETN
-instr  fetch_nop,      op_IM2,         store_nop       ;5E             ;IM 2
-instr  fetch_nop,      op_ldar,        store_nop       ;5F             ;LD A,R
-instr  fetch_C,        op_IN,          store_H         ;60             ;IN H,(C)
-instr  fetch_H,        op_OUT,         store_nop       ;61             ;OUT (C),H
-instr  fetch_HL,       op_SBCHL,       store_nop       ;62             ;SBC HL,HL
-instr  fetch_DIR16,    op_STHL,        store_nop       ;63 nn nn       ;LD (nn),HL
-instr  fetch_nop,      op_NEG,         store_nop       ;64             ;NEG
-instr  fetch_nop,      op_RETN,        store_nop       ;65             ;RETN
-instr  fetch_nop,      op_IM0,         store_nop       ;66             ;IM 0
-instr  fetch_mhl,      op_RRD,         store_mhl       ;67             ;RRD
-instr  fetch_C,        op_IN,          store_L         ;68             ;IN L,(C)
-instr  fetch_L,        op_OUT,         store_nop       ;69             ;OUT (C),L
-instr  fetch_HL,       op_ADCHL,       store_nop       ;6A             ;ADC HL,HL
-instr  fetch_DIR16,    op_RMEM16,      store_HL        ;6B nn nn       ;LD HL,(nn)
-instr  fetch_nop,      op_NEG,         store_nop       ;6C             ;NEG
-instr  fetch_nop,      op_RETN,        store_nop       ;6D             ;RETN
-instr  fetch_nop,      op_IM0,         store_nop       ;6E             ;IM 0
-instr  fetch_mhl,      op_RLD,         store_mhl       ;6F             ;RLD
-instr  fetch_C,        op_IN,          store_nop       ;70             ;IN (C)
-instr  fetch_0,        op_OUT,         store_nop       ;71             ;OUT (C),0
-instr  fetch_SP,       op_SBCHL,       store_nop       ;72             ;SBC HL,SP
-instr  fetch_DIR16,    op_STSP,        store_nop       ;73 nn nn       ;LD (nn),SP
-instr  fetch_nop,      op_NEG,         store_nop       ;74             ;NEG
-instr  fetch_nop,      op_RETN,        store_nop       ;75             ;RETN
-instr  fetch_nop,      op_IM1,         store_nop       ;76             ;IM 1
-instr  fetch_nop,      op_nop,         store_nop       ;77             ;NOP
-instr  fetch_C,        op_IN,          store_A         ;78             ;IN A,(C)
-instr  fetch_A,        op_OUT,         store_nop       ;79             ;OUT (C),A
-instr  fetch_SP,       op_ADCHL,       store_nop       ;7A             ;ADC HL,SP
-instr  fetch_DIR16,    op_RMEM16,      store_SP        ;7B nn nn       ;LD SP,(nn)
-instr  fetch_nop,      op_NEG,         store_nop       ;7C             ;NEG
-instr  fetch_nop,      op_RETN,        store_nop       ;7D             ;RETN
-instr  fetch_nop,      op_IM2,         store_nop       ;7E             ;IM 2
-instr  fetch_nop,      op_nop,         store_nop       ;7F             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;80             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;81             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;82             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;83             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;84             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;85             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;86             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;87             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;88             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;89             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;8A             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;8B             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;8C             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;8D             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;8E             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;8F             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;90             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;91             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;92             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;93             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;94             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;95             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;96             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;97             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;98             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;99             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;9A             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;9B             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;9C             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;9D             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;9E             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;9F             ;NOP
-instr  fetch_nop,      op_LDI,         store_nop       ;A0             ;LDI
-instr  fetch_nop,      op_CPI,         store_nop       ;A1     ;CPI
-instr  fetch_nop,      op_INI,         store_nop       ;A2             ;INI
-instr  fetch_nop,      op_OUTI,        store_nop       ;A3             ;OUTI
-instr  fetch_nop,      op_nop,         store_nop       ;A4             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;A5             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;A6             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;A7             ;NOP
-instr  fetch_nop,      op_LDD,         store_nop       ;A8             ;LDD
-instr  fetch_nop,      op_CPD,         store_nop       ;A9     ;CPD
-instr  fetch_nop,      op_IND,         store_nop       ;AA             ;IND
-instr  fetch_nop,      op_OUTD,        store_nop       ;AB             ;OUTD
-instr  fetch_nop,      op_nop,         store_nop       ;AC             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;AD             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;AE             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;AF             ;NOP
-instr  fetch_nop,      op_LDIR,        store_nop       ;B0             ;LDIR
-instr  fetch_nop,      op_CPIR,        store_nop       ;B1     ;CPIR
-instr  fetch_nop,      op_INIR,        store_nop       ;B2             ;INIR
-instr  fetch_nop,      op_OTIR,        store_nop       ;B3             ;OTIR
-instr  fetch_nop,      op_nop,         store_nop       ;B4             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;B5             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;B6             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;B7             ;NOP
-instr  fetch_nop,      op_LDDR,        store_nop       ;B8             ;LDDR
-instr  fetch_nop,      op_CPDR,        store_nop       ;B9     ;CPDR
-instr  fetch_nop,      op_INDR,        store_nop       ;BA             ;INDR
-instr  fetch_nop,      op_OTDR,        store_nop       ;BB             ;OTDR
-instr  fetch_nop,      op_nop,         store_nop       ;BC             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;BD             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;BE             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;BF             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C0             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C1             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C2             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C3             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C4             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C5             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C6             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C7             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C8             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;C9             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;CA             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;CB             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;CC             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;CD             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;CE             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;CF             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D0             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D1             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D2             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D3             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D4             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D5             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D6             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D7             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D8             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;D9             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;DA             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;DB             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;DC             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;DD             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;DE             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;DF             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E0             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E1             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E2             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E3             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E4             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E5             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E6             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E7             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E8             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;E9             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;EA             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;EB             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;EC             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;ED             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;EE             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;EF             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F0             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F1             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F2             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F3             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F4             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F5             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F6             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F7             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F8             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;F9             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;FA             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;FB             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;FC             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;FD             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;FE             ;NOP
-instr  fetch_nop,      op_nop,         store_nop       ;FF             ;NOP
+do_store2_e:
+       std     y+oz_e,opl
+       ret
 
+do_store2_h:
+       std     y+oz_h,opl
+       ret
 
-       opctable        DDFDjmp
+do_store2_l:
+       std     y+oz_l,opl
+       ret
 
-instr  fetch_nop,      op_noni,                store_nop       ;00             ;
-instr  fetch_nop,      op_noni,        store_nop       ;01             ;
-instr  fetch_nop,      op_noni,        store_nop       ;02             ;
-instr  fetch_nop,      op_noni,        store_nop       ;03             ;
-instr  fetch_nop,      op_noni,        store_nop       ;04             ;
-instr  fetch_nop,      op_noni,        store_nop       ;05             ;
-instr  fetch_nop,      op_noni,        store_nop       ;06             ;
-instr  fetch_nop,      op_noni,        store_nop       ;07             ;
-instr  fetch_nop,      op_noni,        store_nop       ;08             ;
-instr  fetch_BC,       op_ADDxx,       store_nop       ;09             ;ADD xx,BC
-instr  fetch_nop,      op_noni,        store_nop       ;0A             ;
-instr  fetch_nop,      op_noni,        store_nop       ;0B             ;
-instr  fetch_nop,      op_noni,        store_nop       ;0C             ;
-instr  fetch_nop,      op_noni,        store_nop       ;0D             ;
-instr  fetch_nop,      op_noni,        store_nop       ;0E             ;
-instr  fetch_nop,      op_noni,        store_nop       ;0F             ;
-instr  fetch_nop,      op_noni,        store_nop       ;10             ;
-instr  fetch_nop,      op_noni,        store_nop       ;11             ;
-instr  fetch_nop,      op_noni,        store_nop       ;12             ;
-instr  fetch_nop,      op_noni,        store_nop       ;13             ;
-instr  fetch_nop,      op_noni,        store_nop       ;14             ;
-instr  fetch_nop,      op_noni,        store_nop       ;15             ;
-instr  fetch_nop,      op_noni,        store_nop       ;16             ;
-instr  fetch_nop,      op_noni,        store_nop       ;17             ;
-instr  fetch_nop,      op_noni,        store_nop       ;18             ;
-instr  fetch_DE,       op_ADDxx,       store_nop       ;19             ;ADD xx,DE
-instr  fetch_nop,      op_noni,        store_nop       ;1A             ;
-instr  fetch_nop,      op_noni,        store_nop       ;1B             ;
-instr  fetch_nop,      op_noni,        store_nop       ;1C             ;
-instr  fetch_nop,      op_noni,        store_nop       ;1D             ;
-instr  fetch_nop,      op_noni,        store_nop       ;1E             ;
-instr  fetch_nop,      op_noni,        store_nop       ;1F             ;
-instr  fetch_nop,      op_noni,        store_nop       ;20             ;
-instr  fetch_DIR16,    op_nop,         store_xx        ;21             ;LD xx,nn
-instr  fetch_DIR16,    op_STxx,        store_nop       ;22             ;LD (nn),xx
-instr  fetch_xx,       op_INC16,       store_xx        ;23             ;INC xx
-instr  fetch_xH,       op_INC,         store_xH        ;24             ;INC xh
-instr  fetch_xH,       op_DEC,         store_xH        ;25     ;DEC xh
-instr  fetch_DIR8,     op_nop,         store_xH        ;26             ;LD xh,n
-instr  fetch_nop,      op_noni,        store_nop       ;27             ;
-instr  fetch_nop,      op_noni,        store_nop       ;28             ;
-instr  fetch_xx,       op_ADDxx,       store_nop       ;29             ;ADD xx,xx
-instr  fetch_DIR16,    op_RMEM16,      store_xx        ;2A             ;LD xx,(nn)
-instr  fetch_xx,       op_DEC16,       store_xx        ;2B     ;DEC xx
-instr  fetch_xL,       op_INC,         store_xL        ;2C             ;INC xl
-instr  fetch_xL,       op_DEC,         store_xL        ;2D     ;DEC xl
-instr  fetch_DIR8,     op_nop,         store_xL        ;2E             ;LD xl,n
-instr  fetch_nop,      op_noni,        store_nop       ;2F             ;
-instr  fetch_nop,      op_noni,        store_nop       ;30             ;
-instr  fetch_nop,      op_noni,        store_nop       ;31             ;
-instr  fetch_nop,      op_noni,        store_nop       ;32             ;
-instr  fetch_nop,      op_noni,        store_nop       ;33             ;
-instr  fetch_MXX,      op_INC,         store_MXX_0     ;34             ;INC (xx+d)
-instr  fetch_MXX,      op_DEC,         store_MXX_0     ;35     ;DEC (xx+d)
-instr  fetch_DIR8_2,   op_nop,         store_MXX_2     ;36             ;LD (xx+d),n
-instr  fetch_nop,      op_noni,        store_nop       ;37             ;
-instr  fetch_nop,      op_noni,        store_nop       ;38             ;
-instr  fetch_SP,       op_ADDxx,       store_nop       ;39             ;ADD xx,SP
-instr  fetch_nop,      op_noni,        store_nop       ;3A             ;
-instr  fetch_nop,      op_noni,        store_nop       ;3B             ;
-instr  fetch_nop,      op_noni,        store_nop       ;3C             ;
-instr  fetch_nop,      op_noni,        store_nop       ;3D             ;
-instr  fetch_nop,      op_noni,        store_nop       ;3E             ;
-instr  fetch_nop,      op_noni,        store_nop       ;3F             ;
-instr  fetch_nop,      op_noni,        store_nop       ;40             ;
-instr  fetch_nop,      op_noni,        store_nop       ;41             ;
-instr  fetch_nop,      op_noni,        store_nop       ;42             ;
-instr  fetch_nop,      op_noni,        store_nop       ;43             ;
-instr  fetch_xH,       op_nop,         store_B         ;44             ;LD B,xh
-instr  fetch_xL,       op_nop,         store_B         ;45             ;LD B,xl
-instr  fetch_MXX,      op_nop,         store_B         ;46             ;LD B,(xx+d)
-instr  fetch_nop,      op_noni,        store_nop       ;47             ;
-instr  fetch_nop,      op_noni,        store_nop       ;48             ;
-instr  fetch_nop,      op_noni,        store_nop       ;49             ;
-instr  fetch_nop,      op_noni,        store_nop       ;4A             ;
-instr  fetch_nop,      op_noni,        store_nop       ;4B             ;
-instr  fetch_xH,       op_nop,         store_C         ;4C             ;LD C,xh
-instr  fetch_xL,       op_nop,         store_C         ;4D             ;LD C,xl
-instr  fetch_MXX,      op_nop,         store_C         ;4E             ;LD C,(xx+d)
-instr  fetch_nop,      op_noni,        store_nop       ;4F             ;
-instr  fetch_nop,      op_noni,        store_nop       ;50             ;
-instr  fetch_nop,      op_noni,        store_nop       ;51             ;
-instr  fetch_nop,      op_noni,        store_nop       ;52             ;
-instr  fetch_nop,      op_noni,        store_nop       ;53             ;
-instr  fetch_xH,       op_nop,         store_D         ;54             ;LD D,xh
-instr  fetch_xL,       op_nop,         store_D         ;55             ;LD D,xl
-instr  fetch_MXX,      op_nop,         store_D         ;56             ;LD D,(xx+d)
-instr  fetch_nop,      op_noni,        store_nop       ;57             ;
-instr  fetch_nop,      op_noni,        store_nop       ;58             ;
-instr  fetch_nop,      op_noni,        store_nop       ;59             ;
-instr  fetch_nop,      op_noni,        store_nop       ;5A             ;
-instr  fetch_nop,      op_noni,        store_nop       ;5B             ;
-instr  fetch_xH,       op_nop,         store_E         ;5C             ;LD E,xh
-instr  fetch_xL,       op_nop,         store_E         ;5D             ;LD E,xl
-instr  fetch_MXX,      op_nop,         store_E         ;5E             ;LD E,(xx+d)
-instr  fetch_nop,      op_noni,        store_nop       ;5F             ;
-instr  fetch_B,        op_nop,         store_xH        ;60             ;LD xh,B
-instr  fetch_C,        op_nop,         store_xH        ;61             ;LD xh,C
-instr  fetch_D,        op_nop,         store_xH        ;62             ;LD xh,D
-instr  fetch_E,        op_nop,         store_xH        ;63             ;LD xh,E
-instr  fetch_nop,      op_noni,        store_nop       ;64             ;LD xh,xh
-instr  fetch_xL,       op_nop,         store_xH        ;65             ;LD xh,xl
-instr  fetch_MXX,      op_nop,         store_H         ;66             ;LD H,(xx+d)
-instr  fetch_A,        op_nop,         store_xH        ;67             ;LD xh,A
-instr  fetch_B,        op_nop,         store_xL        ;68             ;LD xl,B
-instr  fetch_C,        op_nop,         store_xL        ;69             ;LD xl,C
-instr  fetch_D,        op_nop,         store_xL        ;6A             ;LD xl,D
-instr  fetch_E,        op_nop,         store_xL        ;6B             ;LD xl,E
-instr  fetch_xH,       op_nop,         store_xL        ;6C             ;LD xl,xh
-instr  fetch_nop,      op_noni,        store_nop       ;6D             ;LD xl,xl
-instr  fetch_MXX,      op_nop,         store_L         ;6E             ;LD L,(xx+d)
-instr  fetch_A,        op_nop,         store_xL        ;6F             ;LD xl,A
-instr  fetch_B,        op_nop,         store_MXX       ;70             ;LD (xx+d),B
-instr  fetch_C,        op_nop,         store_MXX       ;71             ;LD (xx+d),C
-instr  fetch_D,        op_nop,         store_MXX       ;72             ;LD (xx+d),D
-instr  fetch_E,        op_nop,         store_MXX       ;73             ;LD (xx+d),E
-instr  fetch_H,        op_nop,         store_MXX       ;74             ;LD (xx+d),H
-instr  fetch_L,        op_nop,         store_MXX       ;75             ;LD (xx+d),L
-instr  fetch_nop,      op_noni,        store_nop       ;76             ;
-instr  fetch_A,        op_nop,         store_MXX       ;77             ;LD (xx+d),A
-instr  fetch_nop,      op_noni,        store_nop       ;78             ;
-instr  fetch_nop,      op_noni,        store_nop       ;79             ;
-instr  fetch_nop,      op_noni,        store_nop       ;7A             ;
-instr  fetch_nop,      op_noni,        store_nop       ;7B             ;
-instr  fetch_xH,       op_nop,         store_A         ;7C             ;LD A,xh
-instr  fetch_xL,       op_nop,         store_A         ;7D             ;LD A,xl
-instr  fetch_MXX,      op_nop,         store_A         ;7E             ;LD A,(xx+d)
-instr  fetch_nop,      op_noni,        store_nop       ;7F             ;
-instr  fetch_nop,      op_noni,        store_nop       ;80             ;
-instr  fetch_nop,      op_noni,        store_nop       ;81             ;
-instr  fetch_nop,      op_noni,        store_nop       ;82             ;
-instr  fetch_nop,      op_noni,        store_nop       ;83             ;
-instr  fetch_xH,       op_ADDA,        store_nop       ;84             ;ADD A,xh
-instr  fetch_xL,       op_ADDA,        store_nop       ;85             ;ADD A,xl
-instr  fetch_MXX,      op_ADDA,        store_nop       ;86             ;ADD A,(xx)
-instr  fetch_nop,      op_noni,        store_nop       ;87             ;
-instr  fetch_nop,      op_noni,        store_nop       ;88             ;
-instr  fetch_nop,      op_noni,        store_nop       ;89             ;
-instr  fetch_nop,      op_noni,        store_nop       ;8A             ;
-instr  fetch_nop,      op_noni,        store_nop       ;8B             ;
-instr  fetch_xH,       op_ADCA,        store_nop       ;8C             ;ADC A,xh
-instr  fetch_xL,       op_ADCA,        store_nop       ;8D             ;ADC A,xl
-instr  fetch_MXX,      op_ADCA,        store_nop       ;8E             ;ADC A,(xx)
-instr  fetch_nop,      op_noni,        store_nop       ;8F             ;
-instr  fetch_nop,      op_noni,        store_nop       ;90             ;
-instr  fetch_nop,      op_noni,        store_nop       ;91             ;
-instr  fetch_nop,      op_noni,        store_nop       ;92             ;
-instr  fetch_nop,      op_noni,        store_nop       ;93             ;
-instr  fetch_xH,       op_SUBFA,       store_nop       ;94             ;SUB A,xh
-instr  fetch_xL,       op_SUBFA,       store_nop       ;95             ;SUB A,xl
-instr  fetch_MXX,      op_SUBFA,       store_nop       ;96             ;SUB A,(xx)
-instr  fetch_nop,      op_noni,        store_nop       ;97             ;
-instr  fetch_nop,      op_noni,        store_nop       ;98             ;
-instr  fetch_nop,      op_noni,        store_nop       ;99             ;
-instr  fetch_nop,      op_noni,        store_nop       ;9A             ;
-instr  fetch_nop,      op_noni,        store_nop       ;9B             ;
-instr  fetch_xH,       op_SBCFA,       store_nop       ;9C             ;SBC A,xh
-instr  fetch_xL,       op_SBCFA,       store_nop       ;9D             ;SBC A,xl
-instr  fetch_MXX,      op_SBCFA,       store_nop       ;9E             ;SBC A,(xx)
-instr  fetch_nop,      op_noni,        store_nop       ;9F             ;
-instr  fetch_nop,      op_noni,        store_nop       ;A0             ;
-instr  fetch_nop,      op_noni,        store_nop       ;A1             ;
-instr  fetch_nop,      op_noni,        store_nop       ;A2             ;
-instr  fetch_nop,      op_noni,        store_nop       ;A3             ;
-instr  fetch_xH,       op_ANDA,        store_nop       ;A4             ;AND A,xh
-instr  fetch_xL,       op_ANDA,        store_nop       ;A5             ;AND A,xl
-instr  fetch_MXX,      op_ANDA,        store_nop       ;A6             ;AND A,(xx)
-instr  fetch_nop,      op_noni,        store_nop       ;A7             ;
-instr  fetch_nop,      op_noni,        store_nop       ;A8             ;
-instr  fetch_nop,      op_noni,        store_nop       ;A9             ;
-instr  fetch_nop,      op_noni,        store_nop       ;AA             ;
-instr  fetch_nop,      op_noni,        store_nop       ;AB             ;
-instr  fetch_xH,       op_XORA,        store_nop       ;AC             ;XOR A,xh
-instr  fetch_xL,       op_XORA,        store_nop       ;AD             ;XOR A,xl
-instr  fetch_MXX,      op_XORA,        store_nop       ;AE             ;XOR A,(xx)
-instr  fetch_nop,      op_noni,        store_nop       ;AF             ;
-instr  fetch_nop,      op_noni,        store_nop       ;B0             ;
-instr  fetch_nop,      op_noni,        store_nop       ;B1             ;
-instr  fetch_nop,      op_noni,        store_nop       ;B2             ;
-instr  fetch_nop,      op_noni,        store_nop       ;B3             ;
-instr  fetch_xH,       op_ORA,         store_nop       ;B4             ;OR A,xh
-instr  fetch_xL,       op_ORA,         store_nop       ;B5             ;OR A,xl
-instr  fetch_MXX,      op_ORA,         store_nop       ;B6             ;OR A,(xx)
-instr  fetch_nop,      op_noni,        store_nop       ;B7             ;
-instr  fetch_nop,      op_noni,        store_nop       ;B8             ;
-instr  fetch_nop,      op_noni,        store_nop       ;B9             ;
-instr  fetch_nop,      op_noni,        store_nop       ;BA             ;
-instr  fetch_nop,      op_noni,        store_nop       ;BB             ;
-instr  fetch_xH,       op_CPFA,        store_nop       ;BC     ;CP A,xh
-instr  fetch_xL,       op_CPFA,        store_nop       ;BD     ;CP A,xl
-instr  fetch_MXX,      op_CPFA,        store_nop       ;BE     ;CP A,(xx)
-instr  fetch_nop,      op_noni,        store_nop       ;BF             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C0             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C1             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C2             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C3             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C4             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C5             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C6             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C7             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C8             ;
-instr  fetch_nop,      op_noni,        store_nop       ;C9             ;
-instr  fetch_nop,      op_noni,        store_nop       ;CA             ;
-instr  fetch_nop,      op_prefixDDFDCB,store_nop       ;CB             ;
-instr  fetch_nop,      op_noni,        store_nop       ;CC             ;
-instr  fetch_nop,      op_noni,        store_nop       ;CD             ;
-instr  fetch_nop,      op_noni,        store_nop       ;CE             ;
-instr  fetch_nop,      op_noni,        store_nop       ;CF             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D0             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D1             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D2             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D3             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D4             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D5             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D6             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D7             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D8             ;
-instr  fetch_nop,      op_noni,        store_nop       ;D9             ;
-instr  fetch_nop,      op_noni,        store_nop       ;DA             ;
-instr  fetch_nop,      op_noni,        store_nop       ;DB             ;
-instr  fetch_nop,      op_noni,        store_nop       ;DC             ;
-instr  fetch_nop,      op_noni,        store_nop       ;DD             ;
-instr  fetch_nop,      op_noni,        store_nop       ;DE             ;
-instr  fetch_nop,      op_noni,        store_nop       ;DF             ;
-instr  fetch_nop,      op_noni,        store_nop       ;E0             ;
-instr  fetch_nop,      op_POP16,       store_xx        ;E1             ;POP xx
-instr  fetch_nop,      op_noni,        store_nop       ;E2             ;
-instr  fetch_MSP,      op_EXxx,        store_MSP       ;E3     ;EX (SP),xx
-instr  fetch_nop,      op_noni,        store_nop       ;E4             ;
-instr  fetch_xx,       op_PUSH16,      store_nop       ;E5             ;PUSH xx
-instr  fetch_nop,      op_noni,        store_nop       ;E6             ;
-instr  fetch_nop,      op_noni,        store_nop       ;E7             ;
-instr  fetch_nop,      op_noni,        store_nop       ;E8             ;
-instr  fetch_xx,       op_nop,         store_PC        ;E9             ;JP xx
-instr  fetch_nop,      op_noni,        store_nop       ;EA             ;
-instr  fetch_nop,      op_noni,        store_nop       ;EB             ;
-instr  fetch_nop,      op_noni,        store_nop       ;EC             ;
-instr  fetch_nop,      op_noni,        store_nop       ;ED             ;
-instr  fetch_nop,      op_noni,        store_nop       ;EE             ;
-instr  fetch_nop,      op_noni,        store_nop       ;EF             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F0             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F1             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F2             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F3             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F4             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F5             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F6             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F7             ;
-instr  fetch_nop,      op_noni,        store_nop       ;F8             ;
-instr  fetch_xx,       op_nop,         store_SP        ;F9             ;LD SP,xx
-instr  fetch_nop,      op_noni,        store_nop       ;FA             ;
-instr  fetch_nop,      op_noni,        store_nop       ;FB             ;
-instr  fetch_nop,      op_noni,        store_nop       ;FC             ;
-instr  fetch_nop,      op_noni,        store_nop       ;FD             ;
-instr  fetch_nop,      op_noni,        store_nop       ;FE             ;
-instr  fetch_nop,      op_noni,        store_nop       ;FF             ;
-
-
-
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|RLC m     |**0P0*|Rotate Left Circular |m=m<-                 |
-;|RRC m     |**0P0*|Rotate Right Circular|m=->m                 |
-;|RL m      |**0P0*|Rotate Left          |m={CY,m}<-            |
-;|RR m      |**0P0*|Rotate Right         |m=->{CY,m}            |
-;|SLA m     |**0P0*|Shift Left Arithmetic|m=m*2                 |
-;|SRA m     |**0P0*|Shift Right Arith.   |m=m/2                 |
-;|SLL m     |**0P0*|Shift Right Logical  |
-;|SRL m     |**0P0*|Shift Right Logical  |m=->{0,m,CY}          |
-
-
-do_op_rlc:
-       ;Rotate Left Cyclical. All bits move 1 to the 
-       ;left, the msb becomes c and lsb.
-       clr     temp
-       lsl     opl
-       adc     temp,_0
-       or      opl,temp
-       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
-       or      z_flags,temp
-       ret
-
-do_op_rrc: 
-       ;Rotate Right Cyclical. All bits move 1 to the 
-       ;right, the lsb becomes c and msb.
-       lsr     opl
-       brcc    PC+2
-       ori     opl,0x80
-       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
-       bmov    z_flags,ZFL_C, opl,7
-       ret
-
-
-do_op_rl:
-       ;Rotate Left. All bits move 1 to the left, the msb 
-       ;becomes c, c becomes lsb.
-       clc
-       sbrc    z_flags,ZFL_C
-        sec
-       rol     opl
-       in      temp,sreg
-       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
-       bmov    z_flags,ZFL_C, temp,AVR_C
-       ret
-
-
-do_op_rr:
-       ;Rotate Right. All bits move 1 to the right, the lsb 
-       ;becomes c, c becomes msb.
-
-       ror     opl
-       in      temp,sreg               ;CY
-       bmov    opl,7, z_flags,ZFL_C            ;old CY --> Bit 7
-       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
-       bmov    z_flags,ZFL_C, temp,AVR_C       ;
-       ret
-
-do_op_sla:
-       lsl     opl
-       in      temp,sreg
-       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
-       bmov    z_flags,ZFL_C, temp,AVR_C       ;
-       ret
-
-do_op_sra:
-       lsr     opl
-       in      temp,sreg
-       bmov    opl,7, opl,6                    ;old CY --> Bit 7
-       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
-       bmov    z_flags,ZFL_C, temp,AVR_C       ;
-       ret
-
-do_op_sll:
-       sec
-       rol     opl
-       in      temp,sreg
-       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
-       bmov    z_flags,ZFL_C, temp,AVR_C       ;
-       ret
-
-do_op_srl:
-       lsr     opl
-       in      temp,sreg
-       ldpmx   z_flags,sz53p_tab,opl           ;S,Z,H,P,N      
-       bmov    z_flags,ZFL_C, temp,AVR_C       ;
+do_store2_a:
+       mov z_a,opl
        ret
 
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;----------------------------------------------------------------
-;|BIT b,m   |?*1?0-|Test Bit             |m&{2^b}               |
-;|RES b,m   |------|Reset bit            |m=m&{~2^b}            |
-;|SET b,m   |------|Set bit              |m=mv{2^b}             |
-
-
-do_op_BIT7:
-       ldi     temp,0x80
-       rjmp    opbit
-do_op_BIT6:
-       ldi     temp,0x40
-       rjmp    opbit
-do_op_BIT5:
-       ldi     temp,0x20
-       rjmp    opbit
-do_op_BIT4:
-       ldi     temp,0x10
-       rjmp    opbit
-do_op_BIT3:
-       ldi     temp,0x08
-       rjmp    opbit
-do_op_BIT2:
-       ldi     temp,0x04
-       rjmp    opbit
-do_op_BIT1:
-       ldi     temp,0x02
-       rjmp    opbit
-do_op_BIT0:
-       ldi     temp,0x01
-opbit:
-       and     temp,opl
-       in      temp,sreg
-       ori     z_flags,(1<<ZFL_H)
-       andi    z_flags,~(1<<ZFL_N)
-       bmov    z_flags,ZFL_Z, temp,AVR_Z
+do_fetch2_mhl:
+       ldd     xh,y+oz_h
+       ldd     xl,y+oz_l
+       mem_read_d opl
        ret
 
-
-.macro m_do_op_RES7
-       andi    opl,~0x80
-.endm
-.equ   do_op_RES7 = 0
-;      andi    opl,~0x80
-;      ret
-
-.macro m_do_op_RES6
-       andi    opl,~0x40
-.endm
-.equ   do_op_RES6 = 0
-;      andi    opl,~0x40
-;      ret
-
-.macro m_do_op_RES5
-       andi    opl,~0x20
-.endm
-.equ   do_op_RES5 = 0
-;      andi    opl,~0x20
-;      ret
-
-.macro m_do_op_RES4
-       andi    opl,~0x10
-.endm
-.equ   do_op_RES4 = 0
-;      andi    opl,~0x10
-;      ret
-
-.macro m_do_op_RES3
-       andi    opl,~0x08
-.endm
-.equ   do_op_RES3 = 0
-;      andi    opl,~0x08
-;      ret
-
-.macro m_do_op_RES2
-       andi    opl,~0x04
-.endm
-.equ   do_op_RES2 = 0
-;      andi    opl,~0x04
-;      ret
-
-.macro m_do_op_RES1
-       andi    opl,~0x02
-.endm
-.equ   do_op_RES1 = 0
-;      andi    opl,~0x02
-;      ret
-
-.macro m_do_op_RES0
-       andi    opl,~0x01
-.endm
-.equ   do_op_RES0 = 0
-;      andi    opl,~0x01
-;      ret
-
-.macro m_do_op_SET7
-       ori     opl,0x80
-.endm
-.equ   do_op_SET7 = 0
-;      ori     opl,0x80
-;      ret
-
-.macro m_do_op_SET6
-       ori     opl,0x40
-.endm
-.equ   do_op_SET6 = 0
-;      ori     opl,0x40
-;      ret
-
-.macro m_do_op_SET5
-       ori     opl,0x20
-.endm
-.equ   do_op_SET5 = 0
-;      ori     opl,0x20
-;      ret
-
-.macro m_do_op_SET4
-       ori     opl,0x10
-.endm
-.equ   do_op_SET4 = 0
-;      ori     opl,0x10
-;      ret
-
-.macro m_do_op_SET3
-       ori     opl,0x08
-.endm
-.equ   do_op_SET3 = 0
-;      ori     opl,0x08
-;      ret
-
-.macro m_do_op_SET2
-       ori     opl,0x04
-.endm
-.equ   do_op_SET2 = 0
-;      ori     opl,0x04
-;      ret
-
-.macro m_do_op_SET1
-       ori     opl,0x02
-.endm
-.equ   do_op_SET1 = 0
-;      ori     opl,0x02
-;      ret
-
-.macro m_do_op_SET0
-       ori     opl,0x01
-.endm
-.equ   do_op_SET0 = 0
-;      ori     opl,0x01
-;      ret
-
-
-;.macro m_do_store_b 
-;      std     y+oz_b,opl
-;.endm
-;.equ do_store_b = 0
-do_store2_b:
-       std     y+oz_b,opl
-       ret
-
-do_store2_c:
-       std     y+oz_c,opl
-       ret
-
-do_store2_d:
-       std     y+oz_d,opl
-       ret
-
-do_store2_e:
-       std     y+oz_e,opl
-       ret
-
-do_store2_h:
-       std     y+oz_h,opl
-       ret
-
-do_store2_l:
-       std     y+oz_l,opl
-       ret
-
-do_store2_a:
-       mov z_a,opl
-       ret
-
-do_fetch2_mhl:
-       ldd     xh,y+oz_h
-       ldd     xl,y+oz_l
-       mem_read_d opl
-       ret
-
-       opctable        CBjmp
+       opctable CBjmp, PC      ;+256
 
 instr  fetch_B,        op_RLC,         store2_B        ;00             ;RLC B
 instr  fetch_C,        op_RLC,         store2_C        ;01             ;RLC C
@@ -4088,7 +3354,7 @@ instr     fetch2_mhl,     op_SET7,        store_MHL       ;FE             ;SET 7,(HL)
 instr  fetch_A,        op_SET7,        store2_A        ;FF             ;SET 7,A
 
 
-       opctable        DDFDCBjmp
+       opctable DDFDCBjmp, PC ;+256
 
 instr  fetch_nop,      op_RLC,         store2_B        ;00             ;RLC (Ix+d),B
 instr  fetch_nop,      op_RLC,         store2_C        ;01             ;RLC (Ix+d),C
@@ -4347,6 +3613,842 @@ instr   fetch_nop,      op_SET7,        store2_L        ;FD             ;SET 7,(Ix+d),L
 instr  fetch_nop,      op_SET7,        store_nop       ;FE             ;SET 7,(Ix+d)
 instr  fetch_nop,      op_SET7,        store2_A        ;FF             ;SET 7,(Ix+d),A
 
+do_fetch_0:
+       ldi     opl,0
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|IN r,[C]  |***P0-|Input                |r=[C]                 |
+;
+
+do_op_in:                      ; in opl,(opl)
+.if PORT_DEBUG
+       push    opl     
+       cp      opl,_0          ; don't debug port 0 (con stat)
+       breq    dbg_op_in_1
+       printnewline
+       printstring "Port read: ("
+       mov temp,opl
+       lcall printhex
+       printstring ") -> "
+dbg_op_in_1:
+.endif
+
+       mov     temp2,opl
+       lcall   portRead
+       mov     opl,temp
+       bst     z_flags,ZFL_C                   ;save Carry
+       ldpmx   z_flags,sz53p_tab,temp          ;S,Z,P
+       bld     z_flags,ZFL_C
+
+.if PORT_DEBUG
+       pop     temp
+       cp      temp,_0
+       breq    dbg_op_in_2
+       lcall printhex
+       printstring " "
+dbg_op_in_2:
+.endif
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|OUT [C],r |------|Output               |[C]=r                 |
+;
+
+do_op_out:                     ; out (c),opl
+.if PORT_DEBUG
+       printnewline
+       printstring "Port write: "
+       mov temp,opl
+       lcall printhex
+       printstring " -> ("
+       ldd temp,y+oz_c
+       lcall printhex
+       printstring ") "
+.endif
+       mov     temp,opl
+       ldd     temp2,y+oz_c
+       lcall   portWrite
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|LD dst,src|------|Load                 |dst=src               |
+;
+
+do_op_stbc:            ;store bc to mem loc in opl:h
+       movw xl,opl
+       ldd     temp,y+oz_c
+       mem_write
+       adiw xl,1
+       ldd     temp,y+oz_b
+       mem_write
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|LD dst,src|------|Load                 |dst=src               |
+;
+;
+do_op_stde:            ;store de to mem loc in opl:h
+       movw xl,opl
+       ldd     temp,y+oz_e
+       mem_write
+       adiw xl,1
+       ldd     temp,y+oz_d
+       mem_write
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|LD dst,src|------|Load                 |dst=src               |
+;
+;
+do_op_stsp:            ;store sp to mem loc in opl:h
+       movw xl,opl
+       mem_write_s z_spl
+       adiw xl,1
+       mem_write_s z_sph
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|ADC HL,ss |***V0*|Add with Carry       |HL=HL+ss+CY           |
+;
+
+do_op_ADCHL:
+       ldd     temp,y+oz_l
+       ldd     temp2,y+oz_h
+       clc
+       sbrc z_flags,ZFL_C
+        sec
+       adc opl,temp
+       in temp,sreg                            ; save lower Z 
+       adc oph,temp2
+       in temp2,sreg
+       std     y+oz_l,opl
+       std     y+oz_h,oph
+       and     temp,temp2                      ; 16bit Z
+       ldi     z_flags,0                       ; clear N
+       bmov    z_flags,ZFL_C, temp2,AVR_C
+       bmov    z_flags,ZFL_P, temp2,AVR_V
+       bmov    z_flags,ZFL_H, temp2,AVR_H
+       bmov    z_flags,ZFL_Z, temp,AVR_Z
+       bmov    z_flags,ZFL_S, temp2,AVR_N
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|SBC HL,ss |***V1*|Subtract with carry  |HL=HL-ss-CY           |
+;
+
+       checkspace PC, 24
+
+do_op_sbchl:
+       ldd     temp,y+oz_l
+       ldd     temp2,y+oz_h
+       cp      temp,opl                        ; set z
+       clc
+       sbrc    z_flags,ZFL_C
+        sec
+       sbc     temp,opl
+       sbc     temp2,oph
+       std     y+oz_l,temp
+       std     y+oz_h,temp2
+       in temp,sreg
+       ldi     z_flags,(1<<ZFL_N)                      ; set N
+       bmov    z_flags,ZFL_C, temp,AVR_C
+       bmov    z_flags,ZFL_P, temp,AVR_V
+       bmov    z_flags,ZFL_H, temp,AVR_H
+       bmov    z_flags,ZFL_Z, temp,AVR_Z
+       bmov    z_flags,ZFL_S, temp,AVR_N
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|NEG       |***V1*|Negate A             |A=0-A                 |
+
+;
+do_op_NEG:
+       ldi     temp,0
+       sub     temp,z_a
+       mov     z_a,temp
+       in      temp,sreg
+       ldpmx   z_flags,sz53p_tab,z_a           ;S,Z,P
+       bmov    z_flags,ZFL_C, temp,AVR_C
+       bmov    z_flags,ZFL_H, temp,AVR_H
+       do_z80_flags_V
+       do_z80_flags_set_N
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|RETI      |------|Return from Interrupt|PC=[SP]+              |
+;|RETN      |------|Return from NMI      |  Copy IFF2 to IFF1   |
+
+
+do_op_RETI:
+do_op_RETN:
+       ldd     temp,y+oz_istat
+       bmov    temp,IFF1, temp,IFF2
+       std     y+oz_istat,temp
+       ljmp    do_store_ret
+
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|IM n      |------|Interrupt Mode       |             (n=0,1,2)|
+
+do_op_IM0:
+       ldd     temp,y+oz_istat
+       andi    temp, ~IM_MASK
+       std     y+oz_istat,temp
+       ret
+
+do_op_IM1:
+       ldd     temp,y+oz_istat
+       andi    temp,~IM_MASK
+       ori     temp,IM1
+       std     y+oz_istat,temp
+       ret
+
+do_op_IM2:
+       ldd     temp,y+oz_istat
+       andi    temp, ~IM_MASK
+       ori     temp,IM2
+       std     y+oz_istat,temp
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|LD A,i    |**0*0-|Load                 |(i=I,R)  IFF2 --> P   |
+;|LD i,A    |------|Load                 |(i=I,R)               |
+
+do_op_ldai:
+       ldd     z_a,y+oz_i
+       rjmp    op_ldar1
+
+do_op_ldar:
+       ldd     z_a,y+oz_r
+op_ldar1:
+       bst     z_flags,ZFL_C                   ;save C
+       ldpmx   z_flags,sz53p_tab,z_a           ;S,Z,H,P,N      
+       bld     z_flags,ZFL_C                   ;
+       ldd     temp,y+oz_istat
+       bmov    z_flags,ZFL_P, temp,IFF2
+       ret
+
+do_op_ldia:
+       std     y+oz_i,z_a
+       ret
+
+do_op_ldra:
+       std     y+oz_r,z_a
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|RLD       |**0P0-|Rotate Left 4 bits   |{A,[HL]}={A,[HL]}<- ##|
+;|RRD       |**0P0-|Rotate Right 4 bits  |{A,[HL]}=->{A,[HL]} ##|
+
+do_op_rld:
+       swap    opl
+       mov     oph,opl
+       andi    opl,0xf0
+       andi    oph,0x0f
+       mov     temp,z_a
+       andi    temp,0x0f
+       or      opl,temp
+       mov     temp,z_a
+       andi    temp,0xf0
+       or      temp,oph
+       mov     z_a,temp
+       bst     z_flags,ZFL_C                   ;save C
+       ldpmx   z_flags,sz53p_tab,z_a           ;S,Z,H,P,N      
+       bld     z_flags,ZFL_C                   ;
+       ret
+
+do_op_rrd:
+       mov     oph,opl
+       andi    opl,0xf0
+       andi    oph,0x0f
+       mov     temp,z_a
+       andi    temp,0x0f
+       or      opl,temp
+       swap    opl
+       mov     temp,z_a
+       andi    temp,0xf0
+       or      temp,oph
+       mov     z_a,temp
+       bst     z_flags,ZFL_C                   ;save C
+       ldpmx   z_flags,sz53p_tab,z_a           ;S,Z,H,P,N      
+       bld     z_flags,ZFL_C                   ;
+       ret
+
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|LDD       |--0*0-|Load and Decrement   |[DE]=[HL],HL=HL-1,#   |
+;|LDDR      |--000-|Load, Dec., Repeat   |LDD till BC=0         |
+;|LDI       |--0*0-|Load and Increment   |[DE]=[HL],HL=HL+1,#   |
+;|LDIR      |--000-|Load, Inc., Repeat   |LDI till BC=0         |
+;
+
+       checkspace PC, 19
+
+op_LDxx_common:
+       ldd     xh,y+oz_h               ;H
+       ldd     xl,y+oz_l               ;L
+;      mem_read_ds temp, z
+       lcall   dram_read               ; temp = (HL)
+       movw    z,x
+
+       ldd     xh,y+oz_d               ;D
+       ldd     xl,y+oz_e               ;E
+;      mem_write_ds x, temp
+       lcall   dram_write              ; (DE) = temp
+
+       ldd     oph,y+oz_b              ;B
+       ldd     opl,y+oz_c              ;C
+
+       cbr     z_flags,(1<<ZFL_H) | (1<<ZFL_P) | (1<<ZFL_N)
+       subi    opl,1
+       sbci    oph,0
+       breq    PC+2
+        sbr    z_flags,(1<<ZFL_P)
+       std     y+oz_c,opl              ;C
+       std     y+oz_b,oph              ;B
+       ret
+
+       checkspace PC, 8
+
+do_op_LDI:
+       rcall   op_LDxx_common
+       adiw    z,1
+       adiw    x,1
+       std     y+oz_e,xl               ;E
+       std     y+oz_d,xh               ;D
+       std     y+oz_l,zl               ;L
+       std     y+oz_h,zh               ;H
+       ret
+
+       checkspace PC, 8
+
+do_op_LDD:
+       rcall   op_LDxx_common
+       sbiw    z,1
+       sbiw    x,1
+       std     y+oz_e,xl               ;E
+       std     y+oz_d,xh               ;D
+       std     y+oz_l,zl               ;L
+       std     y+oz_h,zh               ;H
+       ret
+
+       checkspace PC, 5
+
+do_op_LDIR:
+       rcall   do_op_LDI
+#if 1
+       sbrc    z_flags,ZFL_P
+        rjmp   do_op_LDIR
+       ret
+#else
+       sbrs    z_flags,ZFL_P
+        ret
+       sbiw    z_pcl,2
+       ret
+#endif
+
+       checkspace PC, 5
+
+do_op_LDDR:
+       rcall   do_op_LDD
+       sbrs    z_flags,ZFL_P
+        ret
+       sbiw    z_pcl,2
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|CPD       |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
+;|CPDR      |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
+;|CPI       |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
+;|CPIR      |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
+
+
+       checkspace PC, 21
+
+op_CPxx_common:
+       ldd     xh,y+oz_h               ; H
+       ldd     xl,y+oz_l               ; L
+       ldd     zh,y+oz_b               ; B
+       ldd     zl,y+oz_c               ; C
+
+       cbr     z_flags,(1<<ZFL_S)|(1<<ZFL_Z)|(1<<ZFL_H)|(1<<ZFL_P)
+       sbr     z_flags,(1<<ZFL_N)
+       lcall   dram_read               ; temp = (HL)
+
+;      mov     temp2,z_a
+;      sub     temp2,temp              ; A - (HL)
+       cp      z_a,temp
+
+       brpl    PC+2
+        sbr    z_flags,(1<<ZFL_S)
+       brne    PC+2
+        sbr    z_flags,(1<<ZFL_Z)
+       brhc    PC+2
+        sbr    z_flags,(1<<ZFL_H)
+
+       sbiw    z,1                     ; BC--
+       breq    PC+2
+        sbr    z_flags,(1<<ZFL_P)
+       std     y+oz_c,zl               ; C
+       std     y+oz_b,zh               ; B
+       ret
+
+       checkspace PC, 5
+
+do_op_CPI:
+       rcall   op_CPxx_common
+       adiw    x,1                     ; HL++
+       std     y+oz_l,xl               ; L
+       std     y+oz_h,xh               ; H
+       ret
+
+
+       checkspace PC, 5
+
+do_op_CPD:
+       rcall   op_CPxx_common
+       sbiw    x,1                     ; HL--
+       std     y+oz_l,xl               ; L
+       std     y+oz_h,xh               ; H
+       ret
+
+       checkspace PC, 7
+
+do_op_CPIR:
+       rcall   do_op_CPI
+       sbrc    z_flags,ZFL_Z
+        ret
+       sbrs    z_flags,ZFL_P
+        ret
+       sbiw    z_pcl,2
+       ret
+
+       checkspace PC, 7
+
+do_op_CPDR:
+       rcall   do_op_CPD
+       sbrc    z_flags,ZFL_Z
+        ret
+       sbrs    z_flags,ZFL_P
+        ret
+       sbiw    z_pcl,2
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|INI       |?*??1-|Input and Increment  |[HL]=[C],HL=HL+1,B=B-1|
+;|IND       |?*??1-|Input and Decrement  |[HL]=[C],HL=HL-1,B=B-1|
+;|INIR      |?1??1-|Input, Inc., Repeat  |INI till B=0          |
+;|INDR      |?1??1-|Input, Dec., Repeat  |IND till B=0          |
+
+       checkspace PC, 15
+
+op_INxx_common:
+       cbr     z_flags,(1<<ZFL_Z)
+       sbr     z_flags,(1<<ZFL_N)
+       ldd     temp2,y+oz_c    ;C
+       lcall   portRead
+       ldd     xh,y+oz_h               ;H
+       ldd     xl,y+oz_l               ;L
+       lcall   dram_write
+       ldd     temp,y+oz_b     ;B
+       dec     temp
+       std     y+oz_b,temp     ;B
+       brne    PC+2
+        sbr    z_flags,(1<<ZFL_Z)
+       ret
+
+       checkspace PC, 5
+
+do_op_INI:
+       rcall   op_INxx_common
+       adiw    x,1
+       std     y+oz_l,xl               ;L
+       std     y+oz_h,xh               ;H
+       ret
+
+       checkspace PC, 5
+
+do_op_IND:
+       rcall   op_INxx_common
+       sbiw    x,1
+       std     y+oz_l,xl               ;L
+       std     y+oz_h,xh               ;H
+       ret
+
+       checkspace PC, 5
+
+do_op_INIR:
+       rcall   do_op_INI
+       sbrc    z_flags,ZFL_Z
+        ret
+       sbiw    z_pcl,2
+       ret
+
+       checkspace PC, 5
+
+do_op_INDR:
+       rcall   do_op_IND
+       sbrc    z_flags,ZFL_Z
+        ret
+       sbiw    z_pcl,2
+       ret
+
+;----------------------------------------------------------------
+;|Mnemonic  |SZHPNC|Description          |Notes                 |
+;----------------------------------------------------------------
+;|OUTI      |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
+;|OUTD      |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
+;|OTIR      |?1??1-|Output, Inc., Repeat |OUTI till B=0         |
+;|OTDR      |?1??1-|Output, Dec., Repeat |OUTD till B=0         |
+
+       checkspace PC, 13
+
+op_OUTxx_common:
+       cbr     z_flags,(1<<ZFL_Z)
+       sbr     z_flags,(1<<ZFL_N)
+       lcall   dram_read               ;temp = (z)
+       ldd     temp2,y+oz_c    ;C
+       lcall   portWrite
+       ldd     temp,y+oz_b     ;B
+       dec     temp
+       std     y+oz_b,temp     ;B
+       brne    PC+2
+        sbr    z_flags,(1<<ZFL_Z)
+       ret
+
+       checkspace PC, 8
+
+do_op_OUTI:
+       ldd     xh,y+oz_h               ;H
+       ldd     xl,y+oz_l               ;L
+       adiw    x,1
+       std     y+oz_l,xl               ;L
+       std     y+oz_h,xh               ;H
+       sbiw    x,1
+       rcall   op_OUTxx_common
+       ret
+
+       checkspace PC, 8
+
+do_op_OUTD:
+       ldd     xh,y+oz_h               ;H
+       ldd     xl,y+oz_l               ;L
+       sbiw    x,1
+       std     y+oz_l,xl               ;L
+       std     y+oz_h,xh               ;H
+       adiw    x,1
+       rcall   op_OUTxx_common
+       ret
+
+       checkspace PC, 5
+
+do_op_OTIR:
+       rcall   do_op_OUTI
+       sbrc    z_flags,ZFL_Z
+        ret
+       sbiw    z_pcl,2
+       ret
+
+       checkspace PC, 5
+
+do_op_OTDR:
+       rcall   do_op_OUTD
+       sbrc    z_flags,ZFL_Z
+        ret
+       sbiw    z_pcl,2
+       ret
+
+#if 1
+       opctable EDjmp, PC      ;+ 2*256
+
+instr  fetch_nop,      op_nop,         store_nop       ;00             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;01             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;02             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;03             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;04             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;05             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;06             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;07             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;08             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;09             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;0A             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;0B             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;0C             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;0D             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;0E             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;0F             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;10             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;11             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;12             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;13             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;14             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;15             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;16             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;17             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;18             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;19             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;1A             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;1B             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;1C             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;1D             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;1E             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;1F             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;20             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;21             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;22             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;23             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;24             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;25             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;26             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;27             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;28             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;29             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;2A             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;2B             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;2C             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;2D             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;2E             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;2F             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;30             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;31             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;32             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;33             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;34             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;35             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;36             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;37             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;38             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;39             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;3A             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;3B             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;3C             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;3D             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;3E             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;3F             ;NOP
+instr  fetch_C,        op_IN,          store2_B        ;40             ;IN B,(C)
+instr  fetch_B,        op_OUT,         store_nop       ;41             ;OUT (C),B
+instr  fetch_BC,       op_SBCHL,       store_nop       ;42             ;SBC HL,BC
+instr  fetch_DIR16,    op_STBC,        store_nop       ;43             ;LD (nn),BC
+instr  fetch_nop,      op_NEG,         store_nop       ;44             ;NEG
+instr  fetch_nop,      op_RETN,        store_nop       ;45             ;RETN
+instr  fetch_nop,      op_IM0,         store_nop       ;46             ;IM 0
+instr  fetch_nop,      op_ldia,        store_nop       ;47             ;LD I,A
+instr  fetch_C,        op_IN,          store2_C        ;48             ;IN C,(C)
+instr  fetch_C,        op_OUT,         store_nop       ;49             ;OUT (C),C
+instr  fetch_BC,       op_ADCHL,       store_nop       ;4A             ;ADC HL,BC
+instr  fetch_DIR16,    op_RMEM16,      store_BC        ;4B nn nn       ;LD BC,(nn)
+instr  fetch_nop,      op_NEG,         store_nop       ;4C             ;NEG
+instr  fetch_nop,      op_RETI,        store_nop       ;4D             ;RETI
+instr  fetch_nop,      op_IM0,         store_nop       ;4E             ;IM 0
+instr  fetch_nop,      op_ldra,        store_nop       ;4F             ;LD R,A
+instr  fetch_C,        op_IN,          store2_D        ;50             ;IN D,(C)
+instr  fetch_D,        op_OUT,         store_nop       ;51             ;OUT (C),D
+instr  fetch_DE,       op_SBCHL,       store_nop       ;52             ;SBC HL,DE
+instr  fetch_DIR16,    op_STDE,        store_nop       ;53 nn nn       ;LD (nn),DE
+instr  fetch_nop,      op_NEG,         store_nop       ;54             ;NEG
+instr  fetch_nop,      op_RETN,        store_nop       ;55             ;RETN
+instr  fetch_nop,      op_IM1,         store_nop       ;56             ;IM 1
+instr  fetch_nop,      op_ldai,        store_nop       ;57             ;LD A,I
+instr  fetch_C,        op_IN,          store2_E        ;58             ;IN E,(C)
+instr  fetch_E,        op_OUT,         store_nop       ;59             ;OUT (C),E
+instr  fetch_DE,       op_ADCHL,       store_nop       ;5A             ;ADC HL,DE
+instr  fetch_DIR16,    op_RMEM16,      store_DE        ;5B nn nn       ;LD DE,(nn)
+instr  fetch_nop,      op_NEG,         store_nop       ;5C             ;NEG
+instr  fetch_nop,      op_RETN,        store_nop       ;5D             ;RETN
+instr  fetch_nop,      op_IM2,         store_nop       ;5E             ;IM 2
+instr  fetch_nop,      op_ldar,        store_nop       ;5F             ;LD A,R
+instr  fetch_C,        op_IN,          store2_H        ;60             ;IN H,(C)
+instr  fetch_H,        op_OUT,         store_nop       ;61             ;OUT (C),H
+instr  fetch_HL,       op_SBCHL,       store_nop       ;62             ;SBC HL,HL
+instr  fetch_DIR16,    op_STHL,        store_nop       ;63 nn nn       ;LD (nn),HL
+instr  fetch_nop,      op_NEG,         store_nop       ;64             ;NEG
+instr  fetch_nop,      op_RETN,        store_nop       ;65             ;RETN
+instr  fetch_nop,      op_IM0,         store_nop       ;66             ;IM 0
+instr  fetch2_mhl,     op_RRD,         store_mhl       ;67             ;RRD
+instr  fetch_C,        op_IN,          store2_L        ;68             ;IN L,(C)
+instr  fetch_L,        op_OUT,         store_nop       ;69             ;OUT (C),L
+instr  fetch_HL,       op_ADCHL,       store_nop       ;6A             ;ADC HL,HL
+instr  fetch_DIR16,    op_RMEM16,      store_HL        ;6B nn nn       ;LD HL,(nn)
+instr  fetch_nop,      op_NEG,         store_nop       ;6C             ;NEG
+instr  fetch_nop,      op_RETN,        store_nop       ;6D             ;RETN
+instr  fetch_nop,      op_IM0,         store_nop       ;6E             ;IM 0
+instr  fetch2_mhl,     op_RLD,         store_mhl       ;6F             ;RLD
+instr  fetch_C,        op_IN,          store_nop       ;70             ;IN (C)
+instr  fetch_0,        op_OUT,         store_nop       ;71             ;OUT (C),0
+instr  fetch_SP,       op_SBCHL,       store_nop       ;72             ;SBC HL,SP
+instr  fetch_DIR16,    op_STSP,        store_nop       ;73 nn nn       ;LD (nn),SP
+instr  fetch_nop,      op_NEG,         store_nop       ;74             ;NEG
+instr  fetch_nop,      op_RETN,        store_nop       ;75             ;RETN
+instr  fetch_nop,      op_IM1,         store_nop       ;76             ;IM 1
+instr  fetch_nop,      op_nop,         store_nop       ;77             ;NOP
+instr  fetch_C,        op_IN,          store2_A        ;78             ;IN A,(C)
+instr  fetch_A,        op_OUT,         store_nop       ;79             ;OUT (C),A
+instr  fetch_SP,       op_ADCHL,       store_nop       ;7A             ;ADC HL,SP
+instr  fetch_DIR16,    op_RMEM16,      store_SP        ;7B nn nn       ;LD SP,(nn)
+instr  fetch_nop,      op_NEG,         store_nop       ;7C             ;NEG
+instr  fetch_nop,      op_RETN,        store_nop       ;7D             ;RETN
+instr  fetch_nop,      op_IM2,         store_nop       ;7E             ;IM 2
+instr  fetch_nop,      op_nop,         store_nop       ;7F             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;80             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;81             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;82             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;83             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;84             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;85             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;86             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;87             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;88             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;89             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;8A             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;8B             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;8C             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;8D             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;8E             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;8F             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;90             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;91             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;92             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;93             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;94             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;95             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;96             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;97             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;98             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;99             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;9A             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;9B             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;9C             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;9D             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;9E             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;9F             ;NOP
+instr  fetch_nop,      op_LDI,         store_nop       ;A0             ;LDI
+instr  fetch_nop,      op_CPI,         store_nop       ;A1             ;CPI
+instr  fetch_nop,      op_INI,         store_nop       ;A2             ;INI
+instr  fetch_nop,      op_OUTI,        store_nop       ;A3             ;OUTI
+instr  fetch_nop,      op_nop,         store_nop       ;A4             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;A5             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;A6             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;A7             ;NOP
+instr  fetch_nop,      op_LDD,         store_nop       ;A8             ;LDD
+instr  fetch_nop,      op_CPD,         store_nop       ;A9             ;CPD
+instr  fetch_nop,      op_IND,         store_nop       ;AA             ;IND
+instr  fetch_nop,      op_OUTD,        store_nop       ;AB             ;OUTD
+instr  fetch_nop,      op_nop,         store_nop       ;AC             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;AD             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;AE             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;AF             ;NOP
+instr  fetch_nop,      op_LDIR,        store_nop       ;B0             ;LDIR
+instr  fetch_nop,      op_CPIR,        store_nop       ;B1             ;CPIR
+instr  fetch_nop,      op_INIR,        store_nop       ;B2             ;INIR
+instr  fetch_nop,      op_OTIR,        store_nop       ;B3             ;OTIR
+instr  fetch_nop,      op_nop,         store_nop       ;B4             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;B5             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;B6             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;B7             ;NOP
+instr  fetch_nop,      op_LDDR,        store_nop       ;B8             ;LDDR
+instr  fetch_nop,      op_CPDR,        store_nop       ;B9             ;CPDR
+instr  fetch_nop,      op_INDR,        store_nop       ;BA             ;INDR
+instr  fetch_nop,      op_OTDR,        store_nop       ;BB             ;OTDR
+instr  fetch_nop,      op_nop,         store_nop       ;BC             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;BD             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;BE             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;BF             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C0             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C1             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C2             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C3             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C4             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C5             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C6             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C7             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C8             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;C9             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;CA             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;CB             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;CC             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;CD             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;CE             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;CF             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D0             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D1             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D2             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D3             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D4             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D5             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D6             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D7             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D8             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;D9             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;DA             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;DB             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;DC             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;DD             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;DE             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;DF             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E0             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E1             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E2             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E3             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E4             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E5             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E6             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E7             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E8             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;E9             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;EA             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;EB             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;EC             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;ED             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;EE             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;EF             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F0             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F1             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F2             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F3             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F4             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F5             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F6             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F7             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F8             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;F9             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;FA             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;FB             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;FC             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;FD             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;FE             ;NOP
+instr  fetch_nop,      op_nop,         store_nop       ;FF             ;NOP
+#endif
 
 #endif
 
@@ -4356,9 +4458,11 @@ instr    fetch_nop,      op_SET7,        store2_A        ;FF             ;SET 7,(Ix+d),A
 
 ; The S, Z, 5 and 3 bits and the parity of the lookup value 
 
-;      .org (PC+255) & 0xff00
+       checkspace PC, 128
+
+       .org (PC+255) & 0xff00
 ;      .org opcjmp + 256
-       .org sz53p_table_pos
+;      .org sz53p_table_pos
 ;      .org FLASHEND & 0xff00
 ;      .org 0x1fff & 0xff00
 
diff --git a/avr/avrcpm.asm b/avr/avrcpm.asm
index 016b56b9ba177cef5d193439092c12af94f97258..948ac0248ebe655b3225ed2abaa17f1625175cd8 100644 (file)
--- a/avr/avrcpm.asm
+++ b/avr/avrcpm.asm
@@ -23,7 +23,8 @@
 ;    $Id$
 ;
 
-.nolist
+       .nolist
+
 #if defined atmega8
        .include "m8def.inc"
 #elif defined atmega168
@@ -41,14 +42,30 @@
 #else
        .include "dram-4bit.inc"
 #endif
+
        .list
+
+#if defined DEVID_S
+
        .cseg
+       .org FLASHEND-3 - BOOTLDRSIZE/2 ;
+       .db     DEVID_S                 ;
+  #if TESTVERSION
+       .db     0,0
+  #else
+       .db     VMINOR, VMAJOR          ;
+  #endif
+       .dw     0                       ;placeholder for crc
+
+#endif /* DEVID_S */
 
+       .cseg
        .org 0
        rjmp start              ; reset vector
        
        .org INT_VECTORS_SIZE
 
+       .include "utils.asm"
        .include "init.asm"
        .include "dram-refresh.asm"
        .include "timer.asm"
@@ -60,22 +77,19 @@
        .include "hw-uart.asm"
        .include "dram-4bit.asm"
 #endif
-       .include "utils.asm"
        .include "heap.asm"
        .include "mmc.asm"
 ;      .include "mmc-old.asm"
 
-; >>>-------------------------------------- Virtual Devices
-       .include "virt_ports.asm"       ; Virtual Ports for BIOS
-; <<<-------------------------------------- Virtual Devices
-
 ; >>>-------------------------------------- File System Management
        .include "dsk_fsys.asm"         ; Basic Filesystem definitions
        .include "dsk_mgr.asm"          ; Disk- Manager
        .include "dsk_cpm.asm"          ; CPM- Disk Interaktion
        .include "dsk_fat16.asm"        ; FAT16-DISK Interaktion
        .include "dsk_ram.asm"          ; RAM- Disk Interaktion
+       .include "virt_ports.asm"       ; Virtual Ports for BIOS
 ; <<<-------------------------------------- File System Management
+
 ;      .include "8080int-orig.asm"     ;Old 8080 interpreter.
 ;      .include "8080int.asm"          ;New 8080 interpreter.
 ;      .include "8080int-t3.asm"       ;Another 8080 interpreter
diff --git a/avr/config.inc b/avr/config.inc
index 5917a0644de48e1fd6f599b9346b62e0f7673dfb..192ecb47d4ca9cb7367d2ebf9d930d2e8b3b0ae7 100644 (file)
--- a/avr/config.inc
+++ b/avr/config.inc
@@ -29,19 +29,21 @@
   #define DRAM_8BIT 1          /* 1 = 8bit wide data bus to DRAM (ie two 4-bit Chips)*/
 #endif                         /* 0 = only one 4 bit wide DRAM chip */
 #ifndef F_CPU
-  #define F_CPU  20000000      /* system clock in Hz; defaults to 20MHz */
+       #define F_CPU   20000000        /* system clock in Hz; defaults to 20MHz */
 #endif
 #ifndef BAUD
   #define BAUD   38400         /* console baud rate */
 #endif
 #ifndef I2C
-    #define I2C  0             /* I2C requires 8 bit DRAM */
+  #define I2C  0               /* I2C requires 8 bit DRAM */
 #endif
 #if I2C && !DRAM_8BIT
   #error "I2C requires 8 bit DRAM (DRAM_8BIT=1)!"
 #endif
 
-#define EM_Z80 1               /* Emulate Z80 if true, else 8080 */
+#ifndef EM_Z80
+  #define EM_Z80       1               /* Emulate Z80 if true, else 8080 */
+#endif
 
 #ifndef FAT16_SUPPORT
   #define FAT16_SUPPORT 1      /* Include Support for FAT16 Partitions */
@@ -57,7 +59,7 @@
 #define REFR_RATE   64000       /* dram refresh rate in cycles/s. */
                                /* Most drams need 1/15.6µs. */
 #define        RXBUFSIZE 128           /* USART recieve buffer size. Must be power of 2 */
-#define        TXBUFSIZE 128           /* USART transmit buffer size. Must be power of 2 */
+#define        TXBUFSIZE 32            /* USART transmit buffer size. Must be power of 2 */
 
 #define I2C_CLOCK  100000      /* 100kHz */
 #define I2C_BUFSIZE    17      /* largest message size including address byte (SLA) */
@@ -242,12 +244,20 @@
 .equ   i_halt  = 2                     ;executing halt instruction
 
 #if defined __ATmega8__
-.equ   flags   = TWBR
-.equ   P_PUD   = SFIOR
-#else
-.equ   flags   = GPIOR0
-.equ   P_PUD   = MCUCR
-#endif
+ #if DRAM_8BIT
+
+       .equ    flags   = UBRRL         ;UART is unused with 8-Bit RAM
+ #else
+       .equ    flags   = TWBR          ;TWI is unused with 4-Bit RAM
+ #endif 
+       .equ    P_PUD   = SFIOR
+
+#else 
+
+       .equ    flags   = GPIOR0
+       .equ    P_PUD   = MCUCR
+
+#endif /* __ATmega8__ */
 
 ; Flags:
        .equ    hostact = 7             ;host active flag
diff --git a/avr/dsk_fsys.asm b/avr/dsk_fsys.asm
index 1ba9f7d6af02fe2a90bd539ac54819ec97579c47..f2d656b3cba7601f50d9eb58040762c3b53e0fed 100644 (file)
--- a/avr/dsk_fsys.asm
+++ b/avr/dsk_fsys.asm
@@ -451,38 +451,6 @@ cpydpb_l:
        ret
 
 
-; String compare (z, y), one z-string in flash.
-
-strcmp_p:
-       lpm     _tmp0,z+
-       tst     _tmp0
-       breq    strcmp_pex
-
-       ld      temp, y+
-       lpm     _tmp0, z+
-       sub     temp,_tmp0
-       brne    strcmp_pex
-       tst     _tmp0
-       brne    strcmp_p
-strcmp_pex:
-       ret
-
-; String compare (x, y, temp2). Max temp2 bytes are compared.
-
-strncmp_p:
-       subi    temp2,1
-       brcs    strncmp_peq
-       ld      temp,y+
-       lpm     _tmp0, z+
-       sub     temp,_tmp0
-       brne    strncmp_pex
-       tst     _tmp0
-       brne    strncmp_p
-strncmp_peq:
-       sub     temp,temp
-strncmp_pex:
-       ret
-
 ; ====================================================================
 ; Function: get drive table entry pointer for drive # in temp
 ; ====================================================================
@@ -615,7 +583,7 @@ dsk_tst_yaze:
        ldiw    y,hostbuf
        ldiw    z,str_CPM_Disk*2
        lpm     temp2,z+                ; get length
-       rcall   strncmp_p
+       lcall   strncmp_p
        brne    dsk_tyze_not
        
        ldiw    z,hostbuf+32
@@ -696,7 +664,7 @@ dsk_tst_simhd:
        ldiw    y,hostbuf+128-10
        ldiw    z,str_CPM_Disk*2
        lpm     temp2,z+                ; get length
-       rcall   strncmp_p
+       lcall   strncmp_p
        breq    dsk_tsimhd_found
        
        ldiw    z,hostbuf
diff --git a/avr/macros.inc b/avr/macros.inc
index 03360c6a466115795d8c280928647df871cdab18..74c9f215ade7cf397d3080e614b04ffd39666d6b 100644 (file)
--- a/avr/macros.inc
+++ b/avr/macros.inc
@@ -135,6 +135,7 @@
   .endif
 .endm
 
+
 ;------------------------------------------------
 ;
 ;
@@ -142,7 +143,7 @@
   .if FLASHEND > 0x0fff
     .ifdef @0
       .if abs(PC - @0) > 2047
-       call    @0
+        call   @0
       .else
        rcall   @0
       .endif
@@ -159,11 +160,7 @@
 ;      printstring "String"
 
 .macro printstring
-  .if FLASHEND > 0x0fff
-       call    printstr
-  .else
-       rcall   printstr
-  .endif
+  lcall        printstr
   .if strlen(@0) % 2
     .db @0,0
   .else
diff --git a/avr/sw-uart.asm b/avr/sw-uart.asm
index df25d094d94b4b75b9ea08c1edd0bb9b9c247622..7e81d98f9fa4676f58e3467243e7e00ef968ec0b 100644 (file)
--- a/avr/sw-uart.asm
+++ b/avr/sw-uart.asm
@@ -21,6 +21,10 @@
 ;    $Id$
 ;
 
+#ifdef  __ATmega8__
+  #error "ATmega8 is not supported (yet)! Please update this driver, or buy an ATmega88."
+#endif
+
 #define SSER_BIT_TC    (F_CPU+BAUD/2) / BAUD 
 
 #define RXBUFMASK      RXBUFSIZE-1
@@ -34,8 +38,8 @@ srx_char_to:
        .byte   1
 srx_dr:
        .byte   1
-;srx_lastedge:
-;      .byte   2
+srx_lastedge:
+       .byte   2
 stx_bitcount:
        .byte   1
 stx_dr:
@@ -70,14 +74,20 @@ uart_init:
 ; - Soft UART RX (ICP1/ICR1).
 ; - 1ms System timer is already configured at this point.
 
+
+       cbi     P_TXD-1,TXD                     ;TXD pin as input
        ldi     temp,(1<<COM1A1)|(1<<COM1A0)    ;OC1A high on compare match (UART TX)
+       ldi     temp2,(1<<FOC1A)                ;force compare match
        outm8   TCCR1A,temp
+       outm8   TCCR1C,temp2
+       sbi     P_TXD-1,TXD                     ;TXD pin now output (OC1A)
 
-       ldi     temp,(1<<ICF1)                  ;clear pending int
-       out     TIFR1,temp
-       inm8    temp,TIMSK1
+       ldi     temp,(1<<ICF1)                  ;clear pending input capture int
+       out     TIFR1,temp                      ;
+       inm8    temp,TIMSK1                     ;
        ori     temp,(1<<ICIE1)                 ;Enable input capture int.  (UART RX)
-       outm8   TIMSK1,temp
+       outm8   TIMSK1,temp                     ;
+
        ret
        
 ;------------------------------------------------------------------
@@ -116,23 +126,23 @@ uart_init:
 
 ; State 0: Wait for start bit
 
-;      sts     srx_lastedge,zl                 ;save beginning of start bit
-;      sts     srx_lastedge+1,zh
-       movw    srx_lastedgel,zl
+       sts     srx_lastedge,zl                 ;save beginning of start bit
+       sts     srx_lastedge+1,zh
+;      movw    srx_lastedgel,zl
        sts     srx_dr,_0
        ldi     temp,1
        sts     srx_state,temp
        ldi     temp,2
        sts     srx_char_to,temp
        sbis    P_RXD-2,RXD                     ;RXD still low?
-       rjmp    srxi_end2
+       rjmp    srxi_end
        ldi     zl,(1<<ICNC1)|(1<<CS10)         ;next edge is falling edge
        outm8   TCCR1B,zl
        ldi     zh,(1<<ICF1)                    ;clear pending int
        out     TIFR1,zh
        sts     srx_state,_0
        sts     srx_char_to,_0
-       rjmp    srxi_end2
+       rjmp    srxi_end
 
 srxi_S1:
        cpi     temp,1
@@ -140,13 +150,13 @@ srxi_S1:
 
 ; State 1: Check start bit (and collect 0-bits)
 
-;      lds     temp,srx_lastedge
-;      lds     temp2,srx_lastedge+1
-;      sts     srx_lastedge,zl
-;      sts     srx_lastedge+1,zh
+       lds     temp,srx_lastedge
+       lds     temp2,srx_lastedge+1
+       sts     srx_lastedge,zl
+       sts     srx_lastedge+1,zh
 
-       movw    temp,srx_lastedgel
-       movw    srx_lastedgel,zl
+;      movw    temp,srx_lastedgel
+;      movw    srx_lastedgel,zl
 
        sub     zl,temp
        sbc     zh,temp2
@@ -179,13 +189,13 @@ srxi_1fe:
        sts     rxidx_w,_0
        sts     rxidx_r,_0
 
-       rjmp    srxi_end2
+       rjmp    srxi_end
 
 srxi_1be:
        sts     srx_dr,temp
        ldi     temp,2
        sts     srx_state,temp
-       rjmp    srxi_end2
+       rjmp    srxi_end
 
 srxi_sberr:
        ldi     temp,(1<<ICNC1)|(1<<CS10)       ;next edge is falling edge
@@ -203,7 +213,7 @@ srxi_sberr:
        mov     temp,zl
        rcall   printhex
 #endif
-       rjmp    srxi_end2
+       rjmp    srxi_end
 
 srxi_S2:
        cpi     temp,2
@@ -211,13 +221,13 @@ srxi_S2:
 
 ; State 2: collect 1-bits
 
-;      lds     temp,srx_lastedge
-;      lds     temp2,srx_lastedge+1
-;      sts     srx_lastedge,zl
-;      sts     srx_lastedge+1,zh
+       lds     temp,srx_lastedge
+       lds     temp2,srx_lastedge+1
+       sts     srx_lastedge,zl
+       sts     srx_lastedge+1,zh
 
-       movw    temp,srx_lastedgel
-       movw    srx_lastedgel,zl
+;      movw    temp,srx_lastedgel
+;      movw    srx_lastedgel,zl
 
        sub     zl,temp
        sbc     zh,temp2
@@ -236,7 +246,7 @@ srxi_2l:
        sts     srx_dr,temp
        ldi     temp,3
        sts     srx_state,temp
-       rjmp    srxi_end2
+       rjmp    srxi_end
        
 srxi_complete1:
        ldi     temp2,1                 ;We are in start bit now.
@@ -251,13 +261,13 @@ srxi_S3:
 
 ; State 3: collect 0-bits
 
-;      lds     temp,srx_lastedge
-;      lds     temp2,srx_lastedge+1
-;      sts     srx_lastedge,zl
-;      sts     srx_lastedge+1,zh
+       lds     temp,srx_lastedge
+       lds     temp2,srx_lastedge+1
+       sts     srx_lastedge,zl
+       sts     srx_lastedge+1,zh
 
-       movw    temp,srx_lastedgel
-       movw    srx_lastedgel,zl
+;      movw    temp,srx_lastedgel
+;      movw    srx_lastedgel,zl
 
        sub     zl,temp
        sbc     zh,temp2
@@ -276,14 +286,14 @@ srxi_3l:
        sts     srx_dr,temp
        ldi     temp,2
        sts     srx_state,temp
-       rjmp    srxi_end2
+       rjmp    srxi_end
 
 srxi_S4:
        ldi     zl,(1<<ICNC1)|(1<<CS10) ;next edge is falling edge
        outm8   TCCR1B,zl
        ldi     zl,(1<<ICF1)            ;clear pending int
        sts     srx_state,_0            ;next state
-       rjmp    srxi_end2
+       rjmp    srxi_end
 
 srxi_complete0:        
        sts     srx_char_to,_0          ;clear timeout
@@ -298,27 +308,25 @@ srxi_complete:
 
 ; Save received character in a circular buffer. Do nothing if buffer overflows.
 
-       lds     zh,rxcount              ;if rxcount < RXBUFSIZE
-       cpi     zh,RXBUFSIZE            ;   (room for at least 1 char?)
-       brsh    srxi_ov                 ; 
-       inc     zh                      ;
-       sts     rxcount,zh              ;   rxcount++
-
-       ldi     zl,low(rxfifo)          ;  
-       lds     zh,rxidx_w              ;
-       add     zl,zh                   ;
-       inc     zh                      ;
-       andi    zh,RXBUFMASK            ;
-       sts     rxidx_w,zh              ;   rxidx_w = ++rxidx_w % RXBUFSIZE
-       ldi     zh,high(rxfifo)         ;
-       brcc    PC+2                    ;
-       inc     zh                      ;
-       st      z,temp                  ;   rxfifo[rxidx_w] = char
-srxi_ov:                                       ;endif
-
-srxi_end2:
+       lds     zh,rxcount                      ;2   if rxcount < RXBUFSIZE
+       cpi     zh,RXBUFSIZE                    ;1      (room for at least 1 char?)
+       brsh    srxi_ov                         ;1 
+       inc     zh                              ;1
+       sts     rxcount,zh                      ;2      rxcount++
+
+       ldi     zl,low(rxfifo)                  ;1  
+       lds     zh,rxidx_w                      ;2
+       add     zl,zh                           ;1
+       inc     zh                              ;1
+       andi    zh,RXBUFMASK                    ;1
+       sts     rxidx_w,zh                      ;2      rxidx_w = ++rxidx_w % RXBUFSIZE
+       ldi     zh,high(rxfifo)                 ;1
+       adc     zh,_0                           ;1
+       st      z,temp                          ;2      rxfifo[rxidx_w] = char
+srxi_ov:                                       ;=19     endif
+
+srxi_end:
        pop     temp2
-srxi_end: 
        pop     zl
        pop     zh
        pop     temp
@@ -335,82 +343,76 @@ srxi_end:
        
        INTERRUPT OC1Aaddr
        
-       push    temp
-       in      temp,sreg
-       push    temp
+       push    zl
+       in      zl,sreg
+       push    zl
        push    zh
 
-       inm8    temp,OCR1AL
+       inm8    zl,OCR1AL
        inm8    zh,OCR1AH
-       subi    temp,low(-SSER_BIT_TC)
+       subi    zl,low(-SSER_BIT_TC)
        sbci    zh,high(-SSER_BIT_TC)
        outm8   OCR1AH,zh
-       outm8   OCR1AL,temp
-       lds     temp,stx_bitcount
-       tst     temp
-       breq    stxi_nxtchar
+       outm8   OCR1AL,zl
+
+       lds     zl,stx_bitcount
+       dec     zl
+       brpl    stxi_nextbit
        
-       dec     temp
-       sts     stx_bitcount,temp
-       ldi     zh,9                            ;Start bit?
-       cp      temp,zh
-       ldi     zh,(1<<COM1A1)
-       breq    stxi_0
-       lds     temp,stx_dr
-       sbrs    temp,0
-       ldi     zh,(1<<COM1A1)|(1<<COM1A0)
-       lsr     temp
-       sts     stx_dr,temp
-stxi_0:
-       outm8   TCCR1A,zh
-       pop     zh
-       pop     temp
-       out     sreg,temp
-       pop     temp
-       reti
+; bit counter was 0, more characters?
 
-; more characters?
 stxi_nxtchar:
-       lds     temp,txcount            ;if txcount != 0
-       tst     temp                    ;
-       breq    stxi_dis
+       lds     zl,txcount              ;if txcount != 0
+       dec     zl
+       brmi    stxi_dis
+
 ; get next char
-       push    zl
-       dec     temp                    ;
-       sts     txcount,temp            ;   --txcount
+       sts     txcount,zl              ;   --txcount
+       push    temp                    ;
        ldi     zl,low(txfifo)          ;  
        ldi     zh,high(txfifo)         ;
        lds     temp,txidx_r            ;
        add     zl,temp                 ;
-       brcc    PC+2                    ;
-       inc     zh                      ;
+       adc     zh,_0
        inc     temp                    ;
        andi    temp,TXBUFMASK          ;
        sts     txidx_r,temp            ;
        ld      temp,z
        com     temp
        sts     stx_dr,temp
-       ldi     temp,10
+       ldi     temp,9
        sts     stx_bitcount,temp
-       pop     zl
-       pop     zh
        pop     temp
-       out     sreg,temp
-       pop     temp
-       reti
+
+       ldi     zh,(1<<COM1A1)
+       rjmp    stxi_ex
 
 ; disable transmitter
 stxi_dis:
-       ldi     temp,(1<<COM1A1)|(1<<COM1A0)
-       outm8   TCCR1A,temp
-       inm8    temp,TIMSK1
-       andi    temp,~(1<<OCIE1A)
-       outm8   TIMSK1,temp
+       inm8    zl,TIMSK1
+       andi    zl,~(1<<OCIE1A)
+       outm8   TIMSK1,zl
+
+       ldi     zh,(1<<COM1A1)|(1<<COM1A0)
+       rjmp    stxi_ex
+
+stxi_nextbit:
+       sts     stx_bitcount,zl
+
+       ldi     zh,(1<<COM1A1)
+       lds     zl,stx_dr
+       sbrs    zl,0
+       ldi     zh,(1<<COM1A1)|(1<<COM1A0)
+       lsr     zl
+       sts     stx_dr,zl
+stxi_ex:
+       outm8   TCCR1A,zh
        pop     zh
-       pop     temp
-       out     sreg,temp
-       pop     temp
+       pop     zl
+       out     sreg,zl
+       pop     zl
        reti
+
 ;------------------------------------------------------------------
 
 srx_to:
@@ -531,12 +533,23 @@ sputc_l:
        lds     zh,txcount
        inc     zh
        sts     txcount,zh
-       dec     zh
+       cpi     zh,1
        brne    sputc_e
 ; Enable transmitter
        inm8    zh,TIMSK1
+       sbrc    zh,OCIE1A
+       rjmp    sputc_e
        ori     zh,(1<<OCIE1A)
        outm8   TIMSK1,zh
+
+       inm8    zl,TCNT1L               ;
+       inm8    zh,TCNT1H               ;
+       adiw    zl,30                   ;
+       outm8   OCR1AH,zh               ;
+       outm8   OCR1AL,zl               ;
+       ldi     zl,(1<<OCF1A)
+       outm8   TIFR1,zl
+
 sputc_e:
        pop     zl
        out     sreg,zl
diff --git a/avr/timer.asm b/avr/timer.asm
index d6c02c39e198f86ec730da30a8b931491ac31007..402c9c9093b1871dc2b7c93b3c2e96e956cc01d9 100644 (file)
--- a/avr/timer.asm
+++ b/avr/timer.asm
@@ -328,8 +328,7 @@ tobcd_l:
 
 binbcd4:
        ldi     temp3,16
-       mov     _tmp0,temp
-       mov     _tmp1,temp2
+       movw    _tmp0,temp
        clr     temp
        clr     temp2
 binbcd4l:
diff --git a/avr/utils.asm b/avr/utils.asm
index 155c0274130b7c331a1a48adb37b0fa63c339fe8..685ce569622f2eaf2f01bc01f3ea84fdc2fd0d28 100644 (file)
--- a/avr/utils.asm
+++ b/avr/utils.asm
@@ -202,6 +202,44 @@ printstr_end:
        pop     zh
        ret
        
+; ------------------------ String functions -------------------------
+;
+
+#if 0
+; String compare (z, y), one z-string in flash.
+
+strcmp_p:
+       lpm     _tmp0,z+
+       tst     _tmp0
+       breq    strcmp_pex
+
+       ld      temp, y+
+       lpm     _tmp0, z+
+       sub     temp,_tmp0
+       brne    strcmp_pex
+       tst     _tmp0
+       brne    strcmp_p
+strcmp_pex:
+       ret
+#endif
+
+; String compare (x, y, temp2). Max temp2 bytes are compared.
+
+strncmp_p:
+       subi    temp2,1
+       brcs    strncmp_peq
+       ld      temp,y+
+       lpm     _tmp0, z+
+       sub     temp,_tmp0
+       brne    strncmp_pex
+       tst     _tmp0
+       brne    strncmp_p
+strncmp_peq:
+       sub     temp,temp
+strncmp_pex:
+       ret
+
+
 ; --------------- Debugging stuff ---------------
 ; Print a line with the 8080/Z80 registers
 
CP/M on an AVR