* avr/z80.asm:

  - Removed DRAM_DQ_ORDER.
  - New macros inm8/outm8 to hide the differences between ATmega8 and ATmegaX8.
  - Added USART TX buffer with Interrupt.
  - DRAM read: 1 nop added.
  - Cleaned up INS_DEBUG.

git-svn-id: svn://cu.loc/avr-cpm/trunk@51 57430480-672e-4586-8877-bcf8adbbf3b7

diff --git a/avrcpm/avr/z80.asm b/avrcpm/avr/z80.asm
index 0f2e46bfc7d8c308bb127e7f9401b3ae2dc73a0e..dd32be8b82d791030220bf7cabd910d4a6e59ee8 100644 (file)
--- a/avrcpm/avr/z80.asm
+++ b/avrcpm/avr/z80.asm
@@ -31,9 +31,6 @@
 .list
 .listmac
 
-#ifndef DRAM_DQ_ORDER                  /* If this is set to 1, the portbits  */
-       #define DRAM_DQ_ORDER 0         /* for DRAM D1 and WE are swapped.    */
-#endif
 
 
 #ifndef F_CPU
@@ -47,6 +44,7 @@
 #define UBRR_VAL  ((F_CPU+BAUD*8)/(BAUD*16)-1)  /* clever rounding */
 
 #define        RXBUFSIZE 64            /* USART recieve buffer size. Must be power of 2 */
+#define        TXBUFSIZE 64            /* USART transmit buffer size. Must be power of 2 */
 
 #define REFR_RATE   64000       /* dram refresh rate in cycles/s. */
                                /* Most drams need 1/15.6µs. */
@@ -115,16 +113,11 @@
 .equ PB_OUTPUT_MASK = (1<<ram_ras) | RAM_AL_MASK
 
 ;Port C
-#if DRAM_DQ_ORDER == 1
-.equ ram_d1 =  1
-.equ ram_w  =  4
-#else /* original */
-.equ ram_d1 =  4
-.equ ram_w  =  1
-#endif
 .equ ram_d0 =  0
+.equ ram_d1 =  1
 .equ ram_d2 =  2
 .equ ram_d3 =  3
+.equ ram_w  =  4
 .equ ram_cas=  5
 
 .equ P_DQ  = PORTC
@@ -179,52 +172,16 @@
 ; zh           ;r31    ;
 
 
-#if 0
-;Register definitions
-.def   _tmp    = r0    ;  0
-.def   _0      = r1
-;.def z_a      = r2
-.def z_b      = r3
-.def z_c      = r4
-.def z_d      = r5
-.def z_e      = r6
-.def z_l      = r7
-.def z_h      = r8
-;.def z_spl    = r9
-;.def z_sph    = r10
-.def   z_a     = r11
-.def   _wl     = r12
-.def   _wh     = r13
-.def   z_spl   = r14
-.def   z_sph   = r15   ;
-.def   temp    = r16   ;
-.def   temp2   = r17   ;
-.def   temp3   = r18
-.def   temp4   = r19
-.def   z_flags = r20   ;
-.def   trace   = r21   ;
-.def   insdecl = r22   ;
-.def   insdech = r23   ;
-.def   z_pcl   = r24   ;
-.def   z_pch   = r25   ;
-.undef xl              ;r26
-.undef xh              ;r27
-.undef yl              ;r28
-.undef yh              ;r29
-.def opl       = r26   ;
-.def oph       = r27   ;
-.def adrl      = r28   ;
-.def adrh      = r29   ;
-; zl           ;r30    ;
-; zh           ;r31    ;
-#endif
 
 #if defined __ATmega8__
-       .equ    flags = TWBR
+.equ   flags   = TWBR
+.equ   P_PUD   = SFIOR
 #else
-       .equ    flags = GPIOR0
+.equ   flags   = GPIOR0
+.equ   P_PUD   = MCUCR
 #endif
 
+; Flags:
        .equ    hostact = 7             ;host active flag
        .equ    hostwrt = 6             ;host written flag
        .equ    rsflag  = 5             ;read sector flag
@@ -242,6 +199,53 @@
 #define printTimerCmd  15
 #define uptimeCmd      16
 
+#if defined __ATmega8__
+.equ   RXTXDR0 = UDR
+.equ   UCSR0A  = UCSRA
+.equ    UDRE0  = UDRE
+.equ   UCSR0B  = UCSRB
+.equ    RXCIE0 = RXCIE
+.equ    UDRIE0 = UDRIE
+.equ    RXEN0  = RXEN
+.equ    TXEN0  = TXEN
+.equ   UCSR0C  = UCSRC
+.equ    UCSZ00 = UCSZ0
+.equ    UCSZ01 = UCSZ1
+.equ   UBRR0H  = UBRRH
+.equ   UBRR0L  = UBRRL
+.equ   OCR2A   = OCR2
+.equ   TCCR2A  = TCCR2
+.equ   TCCR2B  = TCCR2
+.equ   TIMSK1  = TIMSK
+.equ   TIMSK2  = TIMSK
+.equ   OCIE2A  = OCIE2
+.equ   TIFR1   = TIFR
+.equ   ICIE1   = TICIE1
+#else
+.equ   RXTXDR0 = UDR0
+#endif
+
+
+;----------------------------------------
+; 
+.macro outm8
+.if    @0 > 0x3f
+       sts     @0,@1
+.else
+       out     @0,@1
+.endif
+.endm
+
+;----------------------------------------
+; 
+.macro inm8
+.if    @1 > 0x3f
+       lds     @0,@1
+.else
+       in      @0,@1
+.endif
+.endm
+
 
 
 .cseg
@@ -253,8 +257,8 @@
        rjmp sysclockint        ; 1ms system timer
 .org URXCaddr   
        rjmp rxint              ; USART receive int.
-;.org UDREaddr
-;      rjmp txint
+.org UDREaddr
+       rjmp txint              ; USART transmit int.
        
 .org INT_VECTORS_SIZE
 
@@ -264,41 +268,32 @@ start:
        ldi temp,high(RAMEND)   ; top of memory
        out SPH,temp            ; init stack pointer
 
+       clr     _0
+
 ; - Kill wdt
        wdr
-#if defined __ATmega8__
-       out MCUCSR,_0
-       
-       ldi temp,(1<<WDCE) | (1<<WDE)
-       out WDTCSR,temp
-       ldi temp,(1<<WDCE)
-       out WDTCSR,temp
-       ldi temp,(1<<PUD)       ;disable pullups
-       out SFIOR,temp
-#else
        out MCUSR,_0
 
        ldi temp,(1<<WDCE) | (1<<WDE)
-       sts WDTCSR,temp
+       outm8   WDTCSR,temp
        ldi temp,(1<<WDCE)
-       sts WDTCSR,temp
-       ldi temp,(1<<PUD)       ;disable pullups
-       out MCUCR,temp
-#endif
+       outm8   WDTCSR,temp
 
 ; - Setup Ports
-       ldi temp,PB_OUTPUT_MASK
-       out DDRB,temp
-       ldi temp,PD_OUTPUT_MASK
-       out DDRD,temp
-       ldi temp,PC_OUTPUT_MASK
-       out DDRC,temp
+       ldi     temp,(1<<PUD)           ;disable pullups
+       outm8   P_PUD,temp
+       ldi     temp,0xFF
+       out     PORTD,temp              ;all pins high
+       out     PORTB,temp
+       out     PORTC,temp
+       out     DDRD,temp               ; all outputs
+       out     DDRB,temp
+       out     DDRC,temp
 
-       sbi P_W,ram_w
-       sbi P_CAS,ram_cas
-       sbi P_RAS,ram_ras
-       sbi P_OE,ram_oe
-       sbi P_MMC_CS,mmc_cs
+       outm8   TIMSK1,_0
+       outm8   TIMSK2,_0
+       outm8   TCCR2A,_0
+       outm8   TCCR2B,_0
 
 
 ; - Init serial port
@@ -306,48 +301,36 @@ start:
        sts     rxcount,_0      ; reset receive buffer
        sts     rxidx_r,_0
        sts     rxidx_w,_0
+       sts     txcount,_0      ; reset transmit buffer
+       sts     txidx_r,_0
+       sts     txidx_w,_0
        
-
-#if defined __ATmega8__
-       ldi temp, (1<<TXEN) | (1<<RXEN) | (1<<RXCIE)
-       out UCSRB,temp
-       ldi temp, (1<<URSEL) | (1<<UCSZ1) | (1<<UCSZ0)
-       out UCSRC,temp
-       ldi temp, HIGH(UBRR_VAL)
-       out UBRRH,temp
-       ldi temp, LOW(UBRR_VAL)
-       out UBRRL,temp
-#else
        ldi temp, (1<<TXEN0) | (1<<RXEN0) | (1<<RXCIE0)
-       sts UCSR0B,temp
+       outm8 UCSR0B,temp
+.ifdef URSEL
+       ldi temp, (1<<URSEL) | (1<<UCSZ01) | (1<<UCSZ00)
+.else
        ldi temp, (1<<UCSZ01) | (1<<UCSZ00)
-       sts UCSR0C,temp
+.endif
+       outm8 UCSR0C,temp
        ldi temp, HIGH(UBRR_VAL)
-       sts UBRR0H,temp
+       outm8 UBRR0H,temp
        ldi temp, LOW(UBRR_VAL)
-       sts UBRR0L,temp
-#endif
+       outm8 UBRR0L,temp
 
 ;Init timer2. Refresh-call should happen every (8ms/512)=312 cycles.
 
-#ifdef __ATmega8__
-       ldi temp,REFR_CNT*2             ; 2 cycles per int
-       out OCR2,temp
-       ldi temp,(1<<WGM21) | REFR_CS   ;CTC, clk/REFR_PRE
-       out TCCR2,temp
-       ldi temp, (1<<OCIE2)
-       out TIMSK,temp
-#else
-       ldi temp,REFR_CNT               ;=312 cycles
-       sts OCR2A,temp
-       ldi temp, (1<<WGM21)
-       sts TCCR2A,temp
-       ldi temp, REFR_CS               ;clk/REFR_PRE
-       sts TCCR2B,temp
-       ldi temp,(1<<OCIE2A)
-       sts TIMSK2,temp
-#endif
-
+       ldi     temp,REFR_CNT*2                 ; 2 cycles per int
+       outm8   OCR2A,temp
+       inm8    temp,TCCR2A
+       ori     temp,(1<<WGM21)                 ;CTC mode
+       outm8   TCCR2A,temp
+       inm8    temp,TCCR2B
+       ori     temp,REFR_CS                    ;clk/REFR_PRE
+       outm8   TCCR2B,temp
+       inm8    temp,TIMSK2
+       ori     temp, (1<<OCIE2A)
+       outm8   TIMSK2,temp
 
 ; Init clock/timer system
 
@@ -361,27 +344,16 @@ ti_loop:
 
 ; Init timer 1 as 1 ms system clock tick.
 
-#ifdef __ATmega8__
-       ldi     temp,high(F_CPU/1000)
-       out     OCR1AH,temp
-       ldi     temp,low(F_CPU/1000)
-       out     OCR1AL,temp
-       ldi     temp,(1<<WGM12) | (1<<CS10)     ;CTC, clk/1
-       out     TCCR1B,temp
-       in      temp,TIMSK
-       ori     temp,(1<<OCIE1A)
-       out     TIMSK,temp
-#else
        ldi     temp,high(F_CPU/1000)
-       sts     OCR1AH,temp
+       outm8   OCR1AH,temp
        ldi     temp,low(F_CPU/1000)
-       sts     OCR1AL,temp
+       outm8   OCR1AL,temp
        ldi     temp,(1<<WGM12) | (1<<CS10)     ;CTC, clk/1
-       sts     TCCR1B,temp
-       lds     temp,TIMSK1
+       outm8   TCCR1B,temp
+       inm8    temp,TIMSK1
        ori     temp,(1<<OCIE1A)
-       sts     TIMSK1,temp
-#endif
+       outm8   TIMSK1,temp
+
        sei
 
 
@@ -430,7 +402,7 @@ ramtestwl:
        ldi adrl,0
        ldi adrh,0
 ramtestr:
-       rcall memreadbyte
+       rcall memReadByte
        mov temp2,adrh
        eor temp2,adrl
        cp temp,temp2
@@ -480,11 +452,7 @@ ramfillw:
        ldi adrl,0x00
 iplwriteloop:
        ld temp,z+
-       push zh
-       push zl
        rcall memWriteByte
-       pop zl
-       pop zh
        adiw adrl,1
        cpi zl,low(hostbuf+128)
        brne iplwriteloop
@@ -533,7 +501,6 @@ noprintpc:
        ; *** Stage 1: Fetch next opcode
        movw adrl,z_pcl
        rcall memReadByte
-       adiw z_pcl,1
 
 
 .if INS_DEBUG
@@ -542,9 +509,9 @@ noprintpc:
        rcall printstr
        .db "PC=",0
        push temp
-       mov temp,adrh
+       mov temp,z_pch
        rcall printhex
-       mov temp,adrl
+       mov temp,z_pcl
        rcall printhex
        pop temp
        rcall printstr
@@ -552,6 +519,7 @@ noprintpc:
        rcall printhex
 notrace1:
 .endif
+       adiw z_pcl,1
 
        ; *** Stage 2: Decode it using the ins_table.
        ldi zh,high(inst_table*2)
@@ -565,13 +533,13 @@ notrace1:
        sbis    flags,trace
        rjmp    notrace2
        rcall printstr
-       .db ", decoded=",0
+       .db ", decoded=",0,0
        mov temp,insdech
        rcall printhex
        mov temp,insdecl
        rcall printhex
        rcall printstr
-       .db ".",13,0
+       .db ".",13,0,0
 notrace2:
 .endif
 
@@ -595,7 +563,7 @@ notrace2:
        mov temp,opl
        rcall printhex
        rcall printstr
-       .db " -- ",0
+       .db " -- ",0,0
 notrace3:
 .endif
 
@@ -616,7 +584,7 @@ nofetch:
        sbis    flags,trace
        rjmp    notrace4
        rcall printstr
-       .db ",post:oph:l=",0
+       .db ",post:oph:l=",0,0
        mov temp,oph
        rcall printhex
        mov temp,opl
@@ -783,8 +751,7 @@ conStatus:
        ret
 
 conInp:
-       rcall uartGetc
-       ret
+       rjmp uartGetc
 
 dbgOut:
        rcall printstr
@@ -795,8 +762,7 @@ dbgOut:
        ret
 
 conOut:
-       rcall uartputc
-       ret
+       rjmp uartputc
 
 
 
@@ -1469,17 +1435,10 @@ mmcwaitwritten:
 ;Set up wdt to time out after 1 sec.
 resetAVR:
        cli
-#if defined __ATmega8__
-       ldi temp,(1<<WDCE)
-       out WDTCSR,temp
-       ldi temp,(1<<WDCE) | (1<<WDE) | (110<<WDP0)
-       out WDTCSR,temp
-#else
        ldi temp,(1<<WDCE)
-       sts WDTCSR,temp
+       outm8 WDTCSR,temp
        ldi temp,(1<<WDCE) | (1<<WDE) | (110<<WDP0)
-       sts WDTCSR,temp
-#endif
+       outm8 WDTCSR,temp
 resetwait:
        rjmp resetwait
 
@@ -1514,12 +1473,14 @@ dram_read:
        DRAM_SETADDR adrl, ~(1<<ram_ras),0, ~((1<<ram_oe)), (1<<ram_a8)
        cbi P_CAS,ram_cas
        cbi P_A8,ram_a8
+       nop
        in  temp,P_DQ-2         ; PIN
        sbi P_CAS,ram_cas
 
        cbi P_CAS,ram_cas
        andi temp,0x0f
        swap temp
+       nop
        in  temp2,P_DQ-2        ; PIN
        andi temp2,0x0f
        or  temp,temp2
@@ -1550,11 +1511,13 @@ dram_read_w1:
        DRAM_SETADDR adrl, ~(1<<ram_ras),0, ~((1<<ram_oe)), (1<<ram_a8)
        cbi P_CAS,ram_cas
        cbi P_A8,ram_a8
+       nop
        in  temp,P_DQ-2         ; PIN
        sbi P_CAS,ram_cas
        cbi P_CAS,ram_cas
        andi temp,0x0f
        swap temp
+       nop
        in  temp2,P_DQ-2        ; PIN
        sbi P_CAS,ram_cas
        andi temp2,0x0f
@@ -1566,11 +1529,13 @@ dram_read_w1:
        DRAM_SETADDR adrl, ~(1<<ram_ras),0, ~((1<<ram_oe)), (1<<ram_a8)
        cbi P_CAS,ram_cas
        cbi P_A8,ram_a8
+       nop
        in  temp,P_DQ-2         ; PIN
        sbi P_CAS,ram_cas
        cbi P_CAS,ram_cas
        andi temp,0x0f
        swap temp
+       nop
        in  temp2,P_DQ-2        ; PIN
        sbi P_CAS,ram_cas
        andi temp2,0x0f
@@ -1709,7 +1674,7 @@ refrint:
 
 ; ****************************************************************************
 
-; ------------- system timer 10ms ---------------
+; ------------- system timer 1ms ---------------
     .dseg
 
 delay_timer:
@@ -2074,8 +2039,8 @@ printhex:
 printstr:
        push    zh
        push    zl
-       push    r29
-       push    r28
+       push    yh
+       push    yl
        push    temp
        in      r29,sph
        in      r28,spl
@@ -2103,8 +2068,8 @@ printstr_end:
        std     y+7,zl
        std     y+6,zh
        pop     temp
-       pop     r28
-       pop     r29
+       pop     yl
+       pop     yh
        pop     zl
        pop     zh
        ret
@@ -2123,6 +2088,7 @@ printstr_end:
        .dseg
        
 #define RXBUFMASK  RXBUFSIZE-1
+#define TXBUFMASK  TXBUFSIZE-1
 
 rxcount:
        .byte   1
@@ -2130,9 +2096,16 @@ rxidx_w:
        .byte   1
 rxidx_r:
        .byte   1
+txcount:
+       .byte   1
+txidx_w:
+       .byte   1
+txidx_r:
+       .byte   1
 rxfifo:
        .byte   RXBUFSIZE
-       .byte   0
+txfifo:
+       .byte   TXBUFSIZE
 
        .cseg
 
@@ -2144,11 +2117,7 @@ rxint:
        push    temp
        push    zh
        push    zl
-#ifdef __ATmega8__     
-       in      temp,UDR
-#else
-       lds     temp,UDR0
-#endif
+       inm8    temp,RXTXDR0
        lds     zh,rxcount              ;if rxcount < RXBUFSIZE
        cpi     zh,RXBUFSIZE            ;   (room for at least 1 char?)
        brsh    rxi_ov                  ; 
@@ -2202,24 +2171,74 @@ uartgetc:
        pop     zh
        ret
 
+txint: 
+       push    temp
+       in      temp,sreg
+       push    temp
+       lds     temp,txcount            ;if txcount != 0
+       tst     temp                    ;
+       breq    txi_e                   ; 
+
+       dec     temp                    ;
+       sts     txcount,temp            ;   --txcount
+       push    zh                      ;
+       push    zl                      ;
+       ldi     zl,low(txfifo)          ;  
+       ldi     zh,high(txfifo)         ;
+       lds     temp,txidx_r            ;
+       add     zl,temp                 ;
+       brcc    PC+2                    ;
+       inc     zh                      ;
+       inc     temp                    ;
+       andi    temp,TXBUFMASK          ;
+       sts     txidx_r,temp            ;
+       ld      temp,z
+       outm8 RXTXDR0,temp
+       pop     zl
+       pop     zh
+txi_e:                                 ;endif
+       lds     temp,txcount
+       tst     temp
+       brne    txi_x
+       ldi temp, (1<<TXEN0) | (1<<RXEN0) | (1<<RXCIE0)
+       outm8 UCSR0B,temp
+txi_x:
+       pop     temp
+       out     sreg,temp
+       pop     temp
+       reti
 
 
 ;Sends a char from temp to the uart. 
 uartputc:
-#if defined __ATmega8__
-uartputc_l:
-       sbis UCSRA,UDRE
-        rjmp uartputc_l
-    out UDR,temp
-#else
-       push temp
-uartputc_l:
-       lds temp,UCSR0A
-       sbrs temp,UDRE0
-        rjmp uartputc_l
-       pop temp
-       sts UDR0,temp
-#endif
+       push    zh
+       push    zl
+       push    temp
+putc_l:
+       lds     temp,txcount            ;do {
+       cpi     temp,TXBUFSIZE          ;
+       brsh    putc_l                  ;} while (txcount >= TXBUFSIZE)
+
+       ldi     zl,low(txfifo)          ;  
+       ldi     zh,high(txfifo)         ;
+       lds     temp,txidx_w            ;
+       add     zl,temp                 ;
+       brcc    PC+2                    ;
+       inc     zh                      ;
+       inc     temp                    ;
+       andi    temp,TXBUFMASK          ;
+       sts     txidx_w,temp            ;   txidx_w = ++txidx_w % TXBUFSIZE
+       pop     temp                    ;
+       st      z,temp                  ;   txfifo[txidx_w] = char
+       cli
+       lds     zl,txcount
+       inc     zl
+       sts     txcount,zl
+       ldi     zl, (1<<UDRIE0) | (1<<TXEN0) | (1<<RXEN0) | (1<<RXCIE0)
+       outm8   UCSR0B,zl
+       sei
+       pop     zl
+       pop     zh
        ret
 
 ; ------------ Fetch phase stuff -----------------