/* IRMP */\r
/*--------------------------------------------------------------------------*/\r
\r
+#define IRMP_TIMER_NUMBER 3\r
+#define IRMP_TIMER CONCAT(TIM, IRMP_TIMER_NUMBER)\r
+\r
#define IRMP_TIMER_CR1 TIM_CR1(IRMP_TIMER)\r
#define IRMP_TIMER_DIER TIM_DIER(IRMP_TIMER)\r
#define IRMP_TIMER_SR TIM_SR(IRMP_TIMER)\r
#define IRMP_TIMER_ARR TIM_ARR(IRMP_TIMER)\r
-#define RCC_IRMP_TIMER CONCAT(RCC_TIM, IRMP_TIMER_NUMBER)\r
+#define IRMP_TIMER_RCC CONCAT(RCC_TIM, IRMP_TIMER_NUMBER)\r
#define NVIC_IRMP_TIMER_IRQ CONCAT(CONCAT(NVIC_TIM, IRMP_TIMER_NUMBER), _IRQ)\r
-#define IRMP_TIMER_ISR CONCAT(CONCAT(tim, IRMP_TIMER_NUMBER), _isr)\r
+#define IRMP_TIMER_ISR CONCAT(CONCAT(tim, IRMP_TIMER_NUMBER), _isr)\r
\r
\r
/** Retrieve the actual input clock of a timer\r
GPIO_CNF_OUTPUT_PUSHPULL, GPIO2);\r
#endif\r
/* Enable timer clock. */\r
- rcc_periph_clock_enable(RCC_IRMP_TIMER);\r
+ rcc_periph_clock_enable(IRMP_TIMER_RCC);\r
nvic_set_priority(NVIC_IRMP_TIMER_IRQ, 4*16);\r
nvic_enable_irq(NVIC_IRMP_TIMER_IRQ);\r
\r