Rename TIM_IRMP --> IRMP_TIMER

diff --git a/.gitmodules b/.gitmodules
index 4dd8d13dbdcb4e1983fca807f1c2b536dfb94c45..98382bf967cc5ca200c6ae8eef894fa0d8ffeb0f 100644 (file)
--- a/.gitmodules
+++ b/.gitmodules
@@ -3,4 +3,5 @@
        url = https://github.com/libopencm3/libopencm3.git
 [submodule "irmp"]
        path = irmp
-       url = http://cloudbase.mooo.com/git/irmp
+       url = cu.loc:git/irmp
+

diff --git a/Makefile b/Makefile
index 7de56466e08b4ce84991b2dd28cd9850e13675eb..19cbdb7b24c5e87d177854fac7ed900b6ed59242 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -30,5 +30,6 @@ DEFS          += -DF_INTERRUPTS=15000 -DIRMP_PROTOCOL_NAMES=1
 
 DEVICE         = stm32f103c8t6
 OPENCM3_DIR    = libopencm3
+LDFLAGS                += --specs=nano.specs
 
 include libopencm3.target.mk

diff --git a/irmp b/irmp
index 85fbd0c57a5f553cb22cfdec2daaf8c70afdbe96..13c24737d1698d551d20baa74681021dc2c0c359 160000 (submodule)
--- a/irmp
+++ b/irmp
@@ -1 +1 @@
-Subproject commit 85fbd0c57a5f553cb22cfdec2daaf8c70afdbe96
+Subproject commit 13c24737d1698d551d20baa74681021dc2c0c359

diff --git a/irmp-main.c b/irmp-main.c
index f7d213d36177fa8388a4a1706bb02df1d86a0463..6c8fd53daa9e97fef82a34591b80ca37edbff9c7 100644 (file)
--- a/irmp-main.c
+++ b/irmp-main.c
@@ -70,13 +70,13 @@ static void setup_clock_and_gpios(void)
 /* IRMP                                                                     */\r
 /*--------------------------------------------------------------------------*/\r
 \r
-#define TIM_IRMP_CR1            TIM_CR1(TIM_IRMP)\r
-#define TIM_IRMP_DIER           TIM_DIER(TIM_IRMP)\r
-#define TIM_IRMP_SR             TIM_SR(TIM_IRMP)\r
-#define TIM_IRMP_ARR            TIM_ARR(TIM_IRMP)\r
-#define RCC_TIM_IRMP            CONCAT(RCC_TIM, IRMP_TIMER)\r
-#define NVIC_TIM_IRMP_IRQ       CONCAT(CONCAT(NVIC_TIM, IRMP_TIMER), _IRQ)\r
-#define IRMP_TIMER_ISR          CONCAT(CONCAT(tim, IRMP_TIMER), _isr)\r
+#define IRMP_TIMER_CR1            TIM_CR1(IRMP_TIMER)\r
+#define IRMP_TIMER_DIER           TIM_DIER(IRMP_TIMER)\r
+#define IRMP_TIMER_SR             TIM_SR(IRMP_TIMER)\r
+#define IRMP_TIMER_ARR            TIM_ARR(IRMP_TIMER)\r
+#define RCC_IRMP_TIMER            CONCAT(RCC_TIM, IRMP_TIMER_NUMBER)\r
+#define NVIC_IRMP_TIMER_IRQ       CONCAT(CONCAT(NVIC_TIM, IRMP_TIMER_NUMBER), _IRQ)\r
+#define IRMP_TIMER_ISR          CONCAT(CONCAT(tim, IRMP_TIMER_NUMBER), _isr)\r
 \r
 \r
 /** Retrieve the actual input clock of a timer\r
@@ -87,20 +87,17 @@ static void setup_clock_and_gpios(void)
 uint32_t timer_internal_clock_get(uint32_t timer_peripheral)\r
 {\r
     uint32_t timer_frequency;\r
-    uint32_t ppre;\r
 \r
     /* Get preripheral bus frequency and prescaler mask */\r
-       if (timer_peripheral == TIM1 || timer_peripheral == TIM8) {\r
-        /* Advanced timers TIM1 and TIM8 are on APB2 */\r
-        ppre = RCC_CFGR_PPRE2;\r
-        timer_frequency = rcc_apb2_frequency;\r
-       } else {\r
-        /* Other timers are on APB1 */\r
-        ppre = RCC_CFGR_PPRE1;\r
+       if ((timer_peripheral >= TIM2 && timer_peripheral <= TIM5)\r
+            || (timer_peripheral >= TIM12 && timer_peripheral <= TIM14))\r
+    {\r
         timer_frequency = rcc_apb1_frequency;\r
+       } else {\r
+        timer_frequency = rcc_apb2_frequency;\r
     }\r
     /* Timer clock is doubled, if the APB prescaler is greater than 1 */\r
-    if ((RCC_CFGR & ppre) != 0)\r
+    if (timer_frequency != rcc_ahb_frequency)\r
         timer_frequency *= 2;\r
 \r
        return timer_frequency;\r
@@ -118,9 +115,9 @@ void irmp_timer_init (void)
               GPIO_CNF_OUTPUT_PUSHPULL, GPIO2);\r
 #endif\r
        /* Enable timer clock. */\r
-    rcc_periph_clock_enable(RCC_TIM_IRMP);\r
-    nvic_set_priority(NVIC_TIM_IRMP_IRQ, 4*16);\r
-       nvic_enable_irq(NVIC_TIM_IRMP_IRQ);\r
+    rcc_periph_clock_enable(RCC_IRMP_TIMER);\r
+    nvic_set_priority(NVIC_IRMP_TIMER_IRQ, 4*16);\r
+       nvic_enable_irq(NVIC_IRMP_TIMER_IRQ);\r
 \r
 #if USE_OPENCM3_API    /* Using API functions: */\r
 \r
@@ -131,22 +128,22 @@ void irmp_timer_init (void)
         * (These are actually default values after reset, so this call\r
         * is strictly unnecessary, but demos the api for alternative settings)\r
         */\r
-       timer_set_mode(TIM_IRMP, TIM_CR1_CKD_CK_INT,\r
+       timer_set_mode(IRMP_TIMER, TIM_CR1_CKD_CK_INT,\r
                         TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);\r
-       timer_set_period(TIM_IRMP, timer_internal_clock_get(TIM_IRMP) / F_INTERRUPTS);\r
+       timer_set_period(IRMP_TIMER, timer_internal_clock_get(IRMP_TIMER) / F_INTERRUPTS - 1);\r
        /* Enable Channel 1 compare interrupt to recalculate compare values */\r
-       timer_enable_irq(TIM_IRMP, TIM_DIER_UIE);\r
+       timer_enable_irq(IRMP_TIMER, TIM_DIER_UIE);\r
        /* Counter enable. */\r
-       timer_enable_counter(TIM_IRMP);\r
+       timer_enable_counter(IRMP_TIMER);\r
 \r
 #else /* Manually */\r
 \r
-    TIM_IRMP_CR1 = TIM_CR1_CKD_CK_INT | TIM_CR1_CMS_EDGE | TIM_CR1_DIR_UP;\r
-    TIM_IRMP_ARR = timer_internal_clock_get(TIM_IRMP) / F_INTERRUPTS;\r
+    IRMP_TIMER_CR1 = TIM_CR1_CKD_CK_INT | TIM_CR1_CMS_EDGE | TIM_CR1_DIR_UP;\r
+    IRMP_TIMER_ARR = timer_internal_clock_get(IRMP_TIMER) / F_INTERRUPTS - 1;\r
 \r
     /* Enable Timer interrupt and timer */\r
-    TIM_IRMP_DIER = TIM_DIER_UIE;\r
-    TIM_IRMP_CR1 |= TIM_CR1_CEN;\r
+    IRMP_TIMER_DIER = TIM_DIER_UIE;\r
+    IRMP_TIMER_CR1 |= TIM_CR1_CEN;\r
 \r
 #endif\r
 }\r
@@ -158,13 +155,13 @@ void IRMP_TIMER_ISR(void)
 \r
     gpio_clear(GPIOA, GPIO2);\r
     /* Clear update interrupt flag. */\r
-    timer_clear_flag(TIM_IRMP, TIM_SR_UIF);\r
+    timer_clear_flag(IRMP_TIMER, TIM_SR_UIF);\r
 # else /* Manually */\r
     GPIO_BRR(GPIOA) = GPIO2;\r
 # endif\r
 #endif\r
     /* Clear update interrupt flag. */\r
-    TIM_IRMP_SR = ~TIM_SR_UIF;\r
+    IRMP_TIMER_SR = ~TIM_SR_UIF;\r
 \r
     (void) irmp_ISR();                  // call irmp ISR\r
 \r
@@ -380,7 +377,7 @@ int main (void)
             "                   System frequency: %luHz\n"\r
             "IRMP timer input frequency (CK_INT): %luHz\n"\r
             "           IRMP interrupt frequency: %uHz\n",\r
-            rcc_ahb_frequency, timer_internal_clock_get(TIM_IRMP), F_INTERRUPTS);\r
+            rcc_ahb_frequency, timer_internal_clock_get(IRMP_TIMER), F_INTERRUPTS);\r
 \r
     systick_setup();\r
     irmp_timer_init();       // initialize timer for irmp\r

diff --git a/libopencm3.rules.mk b/libopencm3.rules.mk
index 0a6171a0eaae114c789c3e9fb063e4eda9a6ef54..037c9abcbc89b0cdde4230fd1c2ba9eee34fc722 100644 (file)
--- a/libopencm3.rules.mk
+++ b/libopencm3.rules.mk
@@ -122,7 +122,7 @@ TGT_CPPFLAGS        += $(DEFS)
 ###############################################################################
 # Linker flags
 
-TGT_LDFLAGS            += --static -nostartfiles --specs=nano.specs
+TGT_LDFLAGS            += --static -nostartfiles
 TGT_LDFLAGS            += -T$(LDSCRIPT)
 TGT_LDFLAGS            += $(ARCH_FLAGS)
 TGT_LDFLAGS            += -Wl,-Map=$(*).map
@@ -153,8 +153,9 @@ srec: $(BINARY).srec
 list: $(BINARY).list
 size: $(BINARY).size
 
-images: $(BINARY).images
-flash: $(BINARY).stlink-flash
+images:  $(BINARY).images
+flash:   $(BINARY).flash
+stflash: $(BINARY).stlink-flash
 
 # Either verify the user provided LDSCRIPT exists, or generate it.
 ifeq ($(strip $(DEVICE)),)