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version 2.1.0: corrected denon timing, new source structure
[irmp.git] / irsnd.c
CommitLineData
4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * @file irsnd.c\r
3 *\r
08f2dd9d 4 * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
7644ac04 6 * Supported mikrocontrollers:\r
7 *\r
476267f4 8 * ATtiny45, ATtiny85\r
9 * ATtiny84\r
7644ac04 10 * ATmega8, ATmega16, ATmega32\r
11 * ATmega162\r
12 * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284\r
13 * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r
14 *\r
08f2dd9d 15 * $Id: irsnd.c,v 1.54 2012/05/23 12:26:26 fm Exp $\r
5481e9cd 16 *\r
4225a882 17 * This program is free software; you can redistribute it and/or modify\r
18 * it under the terms of the GNU General Public License as published by\r
19 * the Free Software Foundation; either version 2 of the License, or\r
20 * (at your option) any later version.\r
21 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
22 */\r
23\r
4225a882 24#include "irsnd.h"\r
25\r
1f54e86c 26/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
27 * ATtiny pin definition of OC0A / OC0B\r
28 * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B\r
29 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
30 */\r
08f2dd9d 31#if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7\r
32# if IRSND_OCx == IRSND_OC0A // OC0A\r
33# define IRSND_PORT PORTB // port B\r
34# define IRSND_DDR DDRB // ddr B\r
35# define IRSND_BIT 2 // OC0A\r
36# elif IRSND_OCx == IRSND_OC0B // OC0B\r
37# define IRSND_PORT PORTA // port A\r
38# define IRSND_DDR DDRA // ddr A\r
39# define IRSND_BIT 7 // OC0B\r
40# else\r
41# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
42# endif // IRSND_OCx\r
43#elif defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45/85 uses OC0A = PB0 or OC0B = PB1\r
44# if IRSND_OCx == IRSND_OC0A // OC0A\r
45# define IRSND_PORT PORTB // port B\r
46# define IRSND_DDR DDRB // ddr B\r
47# define IRSND_BIT 0 // OC0A\r
48# elif IRSND_OCx == IRSND_OC0B // OC0B\r
49# define IRSND_PORT PORTB // port B\r
50# define IRSND_DDR DDRB // ddr B\r
51# define IRSND_BIT 1 // OC0B\r
52# else\r
53# error Wrong value for IRSND_OCx, choose IRSND_OC0A or IRSND_OC0B in irsndconfig.h\r
54# endif // IRSND_OCx\r
55#elif defined (__AVR_ATmega8__) // ATmega8 uses only OC2 = PB3\r
56# if IRSND_OCx == IRSND_OC2 // OC0A\r
57# define IRSND_PORT PORTB // port B\r
58# define IRSND_DDR DDRB // ddr B\r
59# define IRSND_BIT 3 // OC0A\r
60# else\r
61# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
62# endif // IRSND_OCx\r
63#elif defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) // ATmega16|32 uses OC2 = PD7\r
64# if IRSND_OCx == IRSND_OC2 // OC2\r
65# define IRSND_PORT PORTD // port D\r
66# define IRSND_DDR DDRD // ddr D\r
67# define IRSND_BIT 7 // OC2\r
68# else\r
69# error Wrong value for IRSND_OCx, choose IRSND_OC2 in irsndconfig.h\r
70# endif // IRSND_OCx\r
71#elif defined (__AVR_ATmega162__) // ATmega162 uses OC2 = PB1 or OC0 = PB0\r
72# if IRSND_OCx == IRSND_OC2 // OC2\r
73# define IRSND_PORT PORTB // port B\r
74# define IRSND_DDR DDRB // ddr B\r
75# define IRSND_BIT 1 // OC2\r
76# elif IRSND_OCx == IRSND_OC0 // OC0\r
77# define IRSND_PORT PORTB // port B\r
78# define IRSND_DDR DDRB // ddr B\r
79# define IRSND_BIT 0 // OC0\r
80# else\r
81# error Wrong value for IRSND_OCx, choose IRSND_OC2 or IRSND_OC0 in irsndconfig.h\r
82# endif // IRSND_OCx\r
f50e01e7 83#elif defined (__AVR_ATmega164__) \\r
84 || defined (__AVR_ATmega324__) \\r
85 || defined (__AVR_ATmega644__) \\r
86 || defined (__AVR_ATmega644P__) \\r
0f700c8e 87 || defined (__AVR_ATmega1284__) \\r
08f2dd9d 88 || defined (__AVR_ATmega1284P__) // ATmega164|324|644|644P|1284 uses OC2A = PD7 or OC2B = PD6 or OC0A = PB3 or OC0B = PB4\r
89# if IRSND_OCx == IRSND_OC2A // OC2A\r
90# define IRSND_PORT PORTD // port D\r
91# define IRSND_DDR DDRD // ddr D\r
92# define IRSND_BIT 7 // OC2A\r
93# elif IRSND_OCx == IRSND_OC2B // OC2B\r
94# define IRSND_PORT PORTD // port D\r
95# define IRSND_DDR DDRD // ddr D\r
96# define IRSND_BIT 6 // OC2B\r
97# elif IRSND_OCx == IRSND_OC0A // OC0A\r
98# define IRSND_PORT PORTB // port B\r
99# define IRSND_DDR DDRB // ddr B\r
100# define IRSND_BIT 3 // OC0A\r
101# elif IRSND_OCx == IRSND_OC0B // OC0B\r
102# define IRSND_PORT PORTB // port B\r
103# define IRSND_DDR DDRB // ddr B\r
104# define IRSND_BIT 4 // OC0B\r
105# else\r
106# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
107# endif // IRSND_OCx\r
f50e01e7 108#elif defined (__AVR_ATmega48__) \\r
109 || defined (__AVR_ATmega88__) \\r
7644ac04 110 || defined (__AVR_ATmega88P__) \\r
f50e01e7 111 || defined (__AVR_ATmega168__) \\r
1f54e86c 112 || defined (__AVR_ATmega168P__) \\r
08f2dd9d 113 || defined (__AVR_ATmega328P__) // ATmega48|88|168|168|328 uses OC2A = PB3 or OC2B = PD3 or OC0A = PD6 or OC0B = PD5\r
114# if IRSND_OCx == IRSND_OC2A // OC2A\r
115# define IRSND_PORT PORTB // port B\r
116# define IRSND_DDR DDRB // ddr B\r
117# define IRSND_BIT 3 // OC2A\r
118# elif IRSND_OCx == IRSND_OC2B // OC2B\r
119# define IRSND_PORT PORTD // port D\r
120# define IRSND_DDR DDRD // ddr D\r
121# define IRSND_BIT 3 // OC2B\r
122# elif IRSND_OCx == IRSND_OC0A // OC0A\r
123# define IRSND_PORT PORTB // port B\r
124# define IRSND_DDR DDRB // ddr B\r
125# define IRSND_BIT 6 // OC0A\r
126# elif IRSND_OCx == IRSND_OC0B // OC0B\r
127# define IRSND_PORT PORTD // port D\r
128# define IRSND_DDR DDRD // ddr D\r
129# define IRSND_BIT 5 // OC0B\r
130# else\r
131# error Wrong value for IRSND_OCx, choose IRSND_OC2A, IRSND_OC2B, IRSND_OC0A, or IRSND_OC0B in irsndconfig.h\r
132# endif // IRSND_OCx\r
0f700c8e 133#elif defined (__AVR_ATmega8515__) \r
08f2dd9d 134# if IRSND_OCx == IRSND_OC0 \r
135# define IRSND_PORT PORTB // port B\r
136# define IRSND_DDR DDRB // ddr B\r
137# define IRSND_BIT 0 // OC0\r
138# elif IRSND_OCx == IRSND_OC1A \r
139# define IRSND_PORT PORTD // port D\r
140# define IRSND_DDR DDRD // ddr D\r
141# define IRSND_BIT 5 // OC1A\r
142# elif IRSND_OCx == IRSND_OC1B \r
143# define IRSND_PORT PORTE // port E\r
144# define IRSND_DDR DDRE // ddr E\r
145# define IRSND_BIT 2 // OC1E\r
146# else\r
147# error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h\r
148# endif // IRSND_OCx\r
9c86ff1a 149#elif defined (PIC_C18) //Microchip C18 compiler\r
150 //Nothing here to do here -> See irsndconfig.h\r
08f2dd9d 151#elif defined (ARM_STM32) //STM32\r
152 //Nothing here to do here -> See irsndconfig.h\r
f50e01e7 153#else\r
08f2dd9d 154# if !defined (unix) && !defined (WIN32)\r
155# error mikrocontroller not defined, please fill in definitions here.\r
156# endif // unix, WIN32\r
f50e01e7 157#endif // __AVR...\r
158\r
9405f84a 159#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
9c86ff1a 160 typedef uint16_t IRSND_PAUSE_LEN;\r
9405f84a 161#else\r
9c86ff1a 162 typedef uint8_t IRSND_PAUSE_LEN;\r
9405f84a 163#endif\r
164\r
f50e01e7 165/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
166 * IR timings\r
167 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
168 */\r
4225a882 169#define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r
170#define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r
171#define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r
172#define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r
173#define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r
a7054daf 174#define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
175#define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 176\r
177#define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r
178#define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r
a7054daf 179#define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
4225a882 180#define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r
181#define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r
182#define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r
a7054daf 183#define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 184\r
185#define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r
186#define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r
187#define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r
188#define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r
189#define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r
a7054daf 190#define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 191\r
a7054daf 192#define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
193#define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 194\r
4225a882 195#define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r
196#define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r
197#define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r
198#define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r
199#define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r
a7054daf 200#define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 201\r
770a1a9d 202#define KASEIKYO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME + 0.5)\r
203#define KASEIKYO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME + 0.5)\r
204#define KASEIKYO_PULSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME + 0.5)\r
205#define KASEIKYO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME + 0.5)\r
206#define KASEIKYO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME + 0.5)\r
207#define KASEIKYO_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
208#define KASEIKYO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * KASEIKYO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
209\r
4225a882 210#define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r
211#define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r
212#define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r
213#define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r
214#define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r
a7054daf 215#define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 216\r
217#define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
218#define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r
a7054daf 219#define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 220\r
221#define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r
222#define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r
223#define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r
224#define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r
a7054daf 225#define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 226\r
227#define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r
228#define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r
229#define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r
a7054daf 230#define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
231#define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 232\r
beda975f 233#define THOMSON_PULSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME + 0.5)\r
234#define THOMSON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME + 0.5)\r
235#define THOMSON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME + 0.5)\r
236#define THOMSON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
237#define THOMSON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * THOMSON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
238\r
4225a882 239#define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r
240#define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r
241#define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r
242#define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r
243#define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r
a7054daf 244#define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 245\r
246#define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r
247#define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r
248#define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r
249#define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r
250#define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r
251#define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r
a7054daf 252#define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
253#define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
4225a882 254\r
5481e9cd 255#define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r
256#define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r
257#define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r
258#define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r
259#define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r
260#define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r
261#define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r
262#define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r
263#define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r
264#define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r
265#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r
a7054daf 266#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5481e9cd 267\r
9c86ff1a 268#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)\r
269#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)\r
a7054daf 270#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
271#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
89e8cafb 272#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
a7054daf 273\r
a48187fa 274#define IR60_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * IR60_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r
275\r
02ccdb69 276#define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME + 0.5)\r
277#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)\r
278#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
5b437ff6 279\r
9c86ff1a 280\r
08f2dd9d 281#ifdef PIC_C18 // PIC C18\r
282# define IRSND_FREQ_TYPE uint8_t\r
283# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
284# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
285# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
286# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
287# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
288# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
289# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)\r
290#elif defined (ARM_STM32) // STM32\r
291# define IRSND_FREQ_TYPE uint32_t\r
292# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) (30000)\r
293# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) (32000)\r
294# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) (36000)\r
295# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) (38000)\r
296# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) (40000)\r
297# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) (56000)\r
298# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) (455000)\r
299#else // AVR\r
300# define IRSND_FREQ_TYPE uint8_t\r
301# define IRSND_FREQ_30_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 30000 / 2) - 1)\r
302# define IRSND_FREQ_32_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 32000 / 2) - 1)\r
303# define IRSND_FREQ_36_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 36000 / 2) - 1)\r
304# define IRSND_FREQ_38_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 38000 / 2) - 1)\r
305# define IRSND_FREQ_40_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 40000 / 2) - 1)\r
306# define IRSND_FREQ_56_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 56000 / 2) - 1)\r
307# define IRSND_FREQ_455_KHZ (IRSND_FREQ_TYPE) ((F_CPU / 455000 / 2) - 1)\r
9c86ff1a 308#endif\r
4225a882 309\r
48664931 310#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r
311#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r
312#define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r
313#define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r
314#define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r
315#define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
b5ea7869 316\r
c7c9a4a1 317#define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r
318#define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r
319#define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r
320#define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r
321#define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r
322#define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
323\r
c7a47e89 324#define JVC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME + 0.5)\r
325#define JVC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_START_BIT_PAUSE_TIME + 0.5)\r
326#define JVC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
327#define JVC_PULSE_LEN (uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME + 0.5)\r
328#define JVC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME + 0.5)\r
329#define JVC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME + 0.5)\r
330#define JVC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
331\r
9405f84a 332#define NIKON_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME + 0.5)\r
333#define NIKON_START_BIT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME + 0.5)\r
334#define NIKON_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
335#define NIKON_PULSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME + 0.5)\r
336#define NIKON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME + 0.5)\r
337#define NIKON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME + 0.5)\r
f50e01e7 338#define NIKON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
339\r
340#define LEGO_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME + 0.5)\r
341#define LEGO_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME + 0.5)\r
342#define LEGO_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r
343#define LEGO_PULSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME + 0.5)\r
344#define LEGO_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME + 0.5)\r
345#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)\r
346#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r
9405f84a 347\r
9c86ff1a 348static volatile uint8_t irsnd_busy = 0;\r
349static volatile uint8_t irsnd_protocol = 0;\r
350static volatile uint8_t irsnd_buffer[6] = {0};\r
351static volatile uint8_t irsnd_repeat = 0;\r
4225a882 352static volatile uint8_t irsnd_is_on = FALSE;\r
353\r
f50e01e7 354#if IRSND_USE_CALLBACK == 1\r
355static void (*irsnd_callback_ptr) (uint8_t);\r
356#endif // IRSND_USE_CALLBACK == 1\r
357\r
4225a882 358/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
359 * Switch PWM on\r
360 * @details Switches PWM on with a narrow spike on all 3 channels -> leds glowing\r
361 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
362 */\r
363static void\r
364irsnd_on (void)\r
365{\r
366 if (! irsnd_is_on)\r
367 {\r
368#ifndef DEBUG\r
08f2dd9d 369# if defined(PIC_C18) // PIC C18\r
9c86ff1a 370 IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)\r
08f2dd9d 371# elif defined (ARM_STM32) // STM32\r
372 TIM_Cmd(IRSND_TIMER, ENABLE); // TIMx enable counter\r
373# else // AVR\r
374# if IRSND_OCx == IRSND_OC2 // use OC2\r
1f54e86c 375 TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2\r
08f2dd9d 376# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
f50e01e7 377 TCCR2A |= (1<<COM2A0)|(1<<WGM21); // toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r
08f2dd9d 378# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
f50e01e7 379 TCCR2A |= (1<<COM2B0)|(1<<WGM21); // toggle OC2B on compare match, clear Timer 2 at compare match OCR2A (yes: A, not B!)\r
08f2dd9d 380# elif IRSND_OCx == IRSND_OC0 // use OC0\r
1f54e86c 381 TCCR0 |= (1<<COM00)|(1<<WGM01); // toggle OC0 on compare match, clear Timer 0 at compare match OCR0\r
08f2dd9d 382# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
1f54e86c 383 TCCR0A |= (1<<COM0A0)|(1<<WGM01); // toggle OC0A on compare match, clear Timer 0 at compare match OCR0A\r
08f2dd9d 384# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
1f54e86c 385 TCCR0A |= (1<<COM0B0)|(1<<WGM01); // toggle OC0B on compare match, clear Timer 0 at compare match OCR0A (yes: A, not B!)\r
08f2dd9d 386# else\r
387# error wrong value of IRSND_OCx\r
388# endif // IRSND_OCx\r
389# endif // C18\r
4225a882 390#endif // DEBUG\r
f50e01e7 391\r
392#if IRSND_USE_CALLBACK == 1\r
393 if (irsnd_callback_ptr)\r
394 {\r
395 (*irsnd_callback_ptr) (TRUE);\r
396 }\r
397#endif // IRSND_USE_CALLBACK == 1\r
398\r
4225a882 399 irsnd_is_on = TRUE;\r
400 }\r
401}\r
402\r
403/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
404 * Switch PWM off\r
405 * @details Switches PWM off\r
406 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
407 */\r
408static void\r
409irsnd_off (void)\r
410{\r
411 if (irsnd_is_on)\r
412 {\r
413#ifndef DEBUG\r
9c86ff1a 414 \r
08f2dd9d 415# if defined(PIC_C18) // PIC C18\r
9c86ff1a 416 IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)\r
08f2dd9d 417# elif defined (ARM_STM32) // STM32\r
418 TIM_Cmd(IRSND_TIMER, DISABLE); // TIMx enable counter\r
419# else //AVR\r
9c86ff1a 420\r
08f2dd9d 421# if IRSND_OCx == IRSND_OC2 // use OC2\r
f50e01e7 422 TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.\r
08f2dd9d 423# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
f50e01e7 424 TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r
08f2dd9d 425# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
f50e01e7 426 TCCR2A &= ~(1<<COM2B0); // normal port operation, OC2B disconnected.\r
08f2dd9d 427# elif IRSND_OCx == IRSND_OC0 // use OC0\r
1f54e86c 428 TCCR0 &= ~(1<<COM00); // normal port operation, OC0 disconnected.\r
08f2dd9d 429# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
1f54e86c 430 TCCR0A &= ~(1<<COM0A0); // normal port operation, OC0A disconnected.\r
08f2dd9d 431# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
1f54e86c 432 TCCR0A &= ~(1<<COM0B0); // normal port operation, OC0B disconnected.\r
08f2dd9d 433# else\r
434# error wrong value of IRSND_OCx\r
435# endif // IRSND_OCx\r
f50e01e7 436 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
08f2dd9d 437# endif //C18\r
4225a882 438#endif // DEBUG\r
f50e01e7 439\r
440#if IRSND_USE_CALLBACK == 1\r
441 if (irsnd_callback_ptr)\r
442 {\r
443 (*irsnd_callback_ptr) (FALSE);\r
444 }\r
445#endif // IRSND_USE_CALLBACK == 1\r
446\r
4225a882 447 irsnd_is_on = FALSE;\r
448 }\r
449}\r
450\r
451/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
452 * Set PWM frequency\r
453 * @details sets pwm frequency\r
454 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
455 */\r
456static void\r
08f2dd9d 457irsnd_set_freq (IRSND_FREQ_TYPE freq)\r
4225a882 458{\r
459#ifndef DEBUG\r
08f2dd9d 460# if defined(PIC_C18) // PIC C18\r
461 OpenPWM(freq); \r
462 SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%\r
463# elif defined (ARM_STM32) // STM32\r
464 static uint32_t TimeBaseFreq = 0;\r
465 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;\r
466 TIM_OCInitTypeDef TIM_OCInitStructure;\r
467\r
468 if (TimeBaseFreq == 0)\r
469 {\r
470 RCC_ClocksTypeDef RCC_ClocksStructure;\r
471 /* Get system clocks and store timer clock in variable */\r
472 RCC_GetClocksFreq(&RCC_ClocksStructure);\r
473# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
474 TimeBaseFreq = RCC_ClocksStructure.PCLK1_Frequency;\r
475# else\r
476 TimeBaseFreq = RCC_ClocksStructure.PCLK2_Frequency;\r
477# endif\r
478 }\r
479\r
480 freq = TimeBaseFreq/freq;\r
481\r
482 /* Time base configuration */\r
483 TIM_TimeBaseStructure.TIM_Period = freq;\r
484 TIM_TimeBaseStructure.TIM_Prescaler = 0;\r
485 TIM_TimeBaseStructure.TIM_ClockDivision = 0;\r
486 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;\r
487 TIM_TimeBaseInit(IRSND_TIMER, &TIM_TimeBaseStructure);\r
488\r
489 /* PWM1 Mode configuration: Channel1 */\r
490 TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;\r
491 TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;\r
492 TIM_OCInitStructure.TIM_Pulse = (freq + 1) / 2;\r
493 TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;\r
494 TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);\r
495\r
496# else // AVR\r
497\r
498# if IRSND_OCx == IRSND_OC2\r
499 OCR2 = freq; // use register OCR2 for OC2\r
500# elif IRSND_OCx == IRSND_OC2A // use OC2A\r
501 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
502# elif IRSND_OCx == IRSND_OC2B // use OC2B\r
503 OCR2A = freq; // use register OCR2A for OC2A and OC2B!\r
504# elif IRSND_OCx == IRSND_OC0 // use OC0\r
505 OCR0 = freq; // use register OCR2 for OC2\r
506# elif IRSND_OCx == IRSND_OC0A // use OC0A\r
507 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
508# elif IRSND_OCx == IRSND_OC0B // use OC0B\r
509 OCR0A = freq; // use register OCR0A for OC0A and OC0B!\r
510# else\r
511# error wrong value of IRSND_OCx\r
512# endif\r
513# endif //PIC_C18\r
4225a882 514#endif // DEBUG\r
515}\r
516\r
517/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
518 * Initialize the PWM\r
519 * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r
520 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
521 */\r
522void\r
523irsnd_init (void)\r
524{\r
525#ifndef DEBUG\r
08f2dd9d 526# if defined(PIC_C18) // PIC C18\r
527 OpenTimer;\r
528 irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency\r
529 IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)\r
530# elif defined (ARM_STM32) // STM32\r
531 GPIO_InitTypeDef GPIO_InitStructure;\r
532\r
533 /* GPIOx clock enable */\r
534# if defined (ARM_STM32L1XX)\r
535 RCC_AHBPeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
536# elif defined (ARM_STM32F10X)\r
537 RCC_APB2PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
538# elif defined (ARM_STM32F4XX)\r
539 RCC_AHB1PeriphClockCmd(IRSND_PORT_RCC, ENABLE);\r
540# endif\r
541\r
542 /* GPIO Configuration */\r
543 GPIO_InitStructure.GPIO_Pin = IRSND_BIT;\r
544# if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r
545 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r
546 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
547 GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r
548 GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r
549 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
550 GPIO_PinAFConfig(IRSND_PORT, (uint8_t)IRSND_BIT_NUMBER, IRSND_GPIO_AF);\r
551# elif defined (ARM_STM32F10X)\r
552 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r
553 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r
554 GPIO_Init(IRSND_PORT, &GPIO_InitStructure);\r
555 GPIO_PinRemapConfig(, ENABLE); // TODO: remapping required\r
556# endif\r
557\r
558 /* TIMx clock enable */\r
559# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))\r
560 RCC_APB1PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
561# else\r
562 RCC_APB2PeriphClockCmd(IRSND_TIMER_RCC, ENABLE);\r
563# endif\r
564 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
565\r
566 /* TIMx Configuration */\r
567 TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);\r
568 TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);\r
569 TIM_Cmd(IRSND_TIMER, ENABLE);\r
570# else // AVR\r
571 IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r
572 IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r
573\r
574# if IRSND_OCx == IRSND_OC2 // use OC2\r
575 TCCR2 = (1<<WGM21); // CTC mode\r
576 TCCR2 |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r
577# elif IRSND_OCx == IRSND_OC2A || IRSND_OCx == IRSND_OC2B // use OC2A or OC2B\r
578 TCCR2A = (1<<WGM21); // CTC mode\r
579 TCCR2B |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r
580# elif IRSND_OCx == IRSND_OC0 // use OC0\r
581 TCCR0 = (1<<WGM01); // CTC mode\r
582 TCCR0 |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r
583# elif IRSND_OCx == IRSND_OC0A || IRSND_OCx == IRSND_OC0B // use OC0A or OC0B\r
584 TCCR0A = (1<<WGM01); // CTC mode\r
585 TCCR0B |= (1<<CS00); // 0x01, start Timer 0, no prescaling\r
586# else\r
587# error wrong value of IRSND_OCx\r
588# endif\r
589 irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r
590# endif //PIC_C18\r
4225a882 591#endif // DEBUG\r
592}\r
593\r
f50e01e7 594#if IRSND_USE_CALLBACK == 1\r
595void\r
596irsnd_set_callback_ptr (void (*cb)(uint8_t))\r
597{\r
598 irsnd_callback_ptr = cb;\r
599}\r
600#endif // IRSND_USE_CALLBACK == 1\r
601\r
4225a882 602uint8_t\r
603irsnd_is_busy (void)\r
604{\r
605 return irsnd_busy;\r
606}\r
607\r
608static uint16_t\r
609bitsrevervse (uint16_t x, uint8_t len)\r
610{\r
611 uint16_t xx = 0;\r
612\r
613 while(len)\r
614 {\r
615 xx <<= 1;\r
616 if (x & 1)\r
617 {\r
618 xx |= 1;\r
619 }\r
620 x >>= 1;\r
621 len--;\r
622 }\r
623 return xx;\r
624}\r
625\r
626\r
9547ee89 627#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
628static uint8_t sircs_additional_bitlen;\r
629#endif // IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
630\r
4225a882 631uint8_t\r
879b06c2 632irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r
4225a882 633{\r
634#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
635 static uint8_t toggle_bit_recs80;\r
636#endif\r
637#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
638 static uint8_t toggle_bit_recs80ext;\r
639#endif\r
640#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
641 static uint8_t toggle_bit_rc5;\r
9547ee89 642#endif\r
779fbc81 643#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
9547ee89 644 static uint8_t toggle_bit_rc6;\r
beda975f 645#endif\r
646#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
647 static uint8_t toggle_bit_thomson;\r
4225a882 648#endif\r
649 uint16_t address;\r
650 uint16_t command;\r
651\r
879b06c2 652 if (do_wait)\r
4225a882 653 {\r
879b06c2 654 while (irsnd_busy)\r
655 {\r
656 // do nothing;\r
657 }\r
658 }\r
659 else if (irsnd_busy)\r
660 {\r
661 return (FALSE);\r
4225a882 662 }\r
663\r
664 irsnd_protocol = irmp_data_p->protocol;\r
beda975f 665 irsnd_repeat = irmp_data_p->flags & IRSND_REPETITION_MASK;\r
4225a882 666\r
667 switch (irsnd_protocol)\r
668 {\r
669#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
670 case IRMP_SIRCS_PROTOCOL:\r
671 {\r
08f2dd9d 672 // uint8_t sircs_additional_command_len;\r
9547ee89 673 uint8_t sircs_additional_address_len;\r
674\r
675 sircs_additional_bitlen = (irmp_data_p->address & 0xFF00) >> 8; // additional bitlen\r
676\r
677 if (sircs_additional_bitlen > 15 - SIRCS_MINIMUM_DATA_LEN)\r
678 {\r
08f2dd9d 679 // sircs_additional_command_len = 15 - SIRCS_MINIMUM_DATA_LEN;\r
9547ee89 680 sircs_additional_address_len = sircs_additional_bitlen - (15 - SIRCS_MINIMUM_DATA_LEN);\r
681 }\r
682 else\r
683 {\r
08f2dd9d 684 // sircs_additional_command_len = sircs_additional_bitlen;\r
9547ee89 685 sircs_additional_address_len = 0;\r
686 }\r
4225a882 687\r
9547ee89 688 command = bitsrevervse (irmp_data_p->command, 15);\r
689\r
690 irsnd_buffer[0] = (command & 0x7F80) >> 7; // CCCCCCCC\r
691 irsnd_buffer[1] = (command & 0x007F) << 1; // CCCC****\r
692\r
693 if (sircs_additional_address_len > 0)\r
694 {\r
695 address = bitsrevervse (irmp_data_p->address, 5);\r
696 irsnd_buffer[1] |= (address & 0x0010) >> 4;\r
697 irsnd_buffer[2] = (address & 0x000F) << 4;\r
698 }\r
4225a882 699 irsnd_busy = TRUE;\r
700 break;\r
701 }\r
702#endif\r
703#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
46dd89b7 704 case IRMP_APPLE_PROTOCOL:\r
c7a47e89 705 {\r
706 command = irmp_data_p->command | (irmp_data_p->address << 8); // store address as ID in upper byte of command\r
707 address = 0x87EE; // set fixed NEC-lookalike address (customer ID of apple)\r
708\r
709 address = bitsrevervse (address, NEC_ADDRESS_LEN);\r
710 command = bitsrevervse (command, NEC_COMMAND_LEN);\r
711\r
712 irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with id instead of inverted command\r
713\r
7644ac04 714 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
715 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
716 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
717 irsnd_buffer[3] = 0x8B; // 10001011 (id)\r
c7a47e89 718 irsnd_busy = TRUE;\r
719 break;\r
720 }\r
721 case IRMP_NEC_PROTOCOL:\r
4225a882 722 {\r
723 address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r
724 command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r
725\r
4225a882 726 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
727 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
728 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
7644ac04 729 irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r
730 irsnd_busy = TRUE;\r
731 break;\r
732 }\r
733#endif\r
734#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
735 case IRMP_NEC16_PROTOCOL:\r
736 {\r
737 address = bitsrevervse (irmp_data_p->address, NEC16_ADDRESS_LEN);\r
738 command = bitsrevervse (irmp_data_p->command, NEC16_COMMAND_LEN);\r
46dd89b7 739\r
7644ac04 740 irsnd_buffer[0] = (address & 0x00FF); // AAAAAAAA\r
741 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
742 irsnd_busy = TRUE;\r
743 break;\r
744 }\r
745#endif\r
746#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
747 case IRMP_NEC42_PROTOCOL:\r
748 {\r
749 address = bitsrevervse (irmp_data_p->address, NEC42_ADDRESS_LEN);\r
750 command = bitsrevervse (irmp_data_p->command, NEC42_COMMAND_LEN);\r
751\r
752 irsnd_buffer[0] = ( (address & 0x1FE0) >> 5); // AAAAAAAA\r
a48187fa 753 irsnd_buffer[1] = ( (address & 0x001F) << 3) | ((~address & 0x1C00) >> 10); // AAAAAaaa\r
7644ac04 754 irsnd_buffer[2] = ((~address & 0x03FC) >> 2); // aaaaaaaa\r
755 irsnd_buffer[3] = ((~address & 0x0003) << 6) | ( (command & 0x00FC) >> 2); // aaCCCCCC\r
756 irsnd_buffer[4] = ( (command & 0x0003) << 6) | ((~command & 0x00FC) >> 2); // CCcccccc\r
757 irsnd_buffer[5] = ((~command & 0x0003) << 6); // cc\r
4225a882 758 irsnd_busy = TRUE;\r
759 break;\r
760 }\r
761#endif\r
762#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
763 case IRMP_SAMSUNG_PROTOCOL:\r
764 {\r
765 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
766 command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r
767\r
4225a882 768 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
769 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
770 irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r
771 irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r
772 irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r
773 irsnd_busy = TRUE;\r
774 break;\r
775 }\r
776 case IRMP_SAMSUNG32_PROTOCOL:\r
777 {\r
778 address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r
779 command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r
780\r
4225a882 781 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
782 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
783 irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r
784 irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r
785 irsnd_busy = TRUE;\r
786 break;\r
787 }\r
788#endif\r
789#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
790 case IRMP_MATSUSHITA_PROTOCOL:\r
791 {\r
792 address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r
793 command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r
794\r
4225a882 795 irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
796 irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r
797 irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r
798 irsnd_busy = TRUE;\r
799 break;\r
800 }\r
801#endif\r
770a1a9d 802#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
803 case IRMP_KASEIKYO_PROTOCOL:\r
804 {\r
805 uint8_t xor;\r
0f700c8e 806 uint16_t genre2;\r
770a1a9d 807\r
808 address = bitsrevervse (irmp_data_p->address, KASEIKYO_ADDRESS_LEN);\r
809 command = bitsrevervse (irmp_data_p->command, KASEIKYO_COMMAND_LEN + 4);\r
0f700c8e 810 genre2 = bitsrevervse ((irmp_data_p->flags & ~IRSND_REPETITION_MASK) >> 4, 4);\r
770a1a9d 811\r
812 xor = ((address & 0x000F) ^ ((address & 0x00F0) >> 4) ^ ((address & 0x0F00) >> 8) ^ ((address & 0xF000) >> 12)) & 0x0F;\r
813\r
814 irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r
815 irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r
816 irsnd_buffer[2] = xor << 4 | (command & 0x000F); // XXXXCCCC\r
0f700c8e 817 irsnd_buffer[3] = (genre2 << 4) | (command & 0xF000) >> 12; // ggggCCCC\r
770a1a9d 818 irsnd_buffer[4] = (command & 0x0FF0) >> 4; // CCCCCCCC\r
819\r
820 xor = irsnd_buffer[2] ^ irsnd_buffer[3] ^ irsnd_buffer[4];\r
821\r
822 irsnd_buffer[5] = xor;\r
823 irsnd_busy = TRUE;\r
824 break;\r
825 }\r
826#endif\r
4225a882 827#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
828 case IRMP_RECS80_PROTOCOL:\r
829 {\r
830 toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r
831\r
4225a882 832 irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r
833 ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r
834 irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r
835 irsnd_busy = TRUE;\r
836 break;\r
837 }\r
838#endif\r
839#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
840 case IRMP_RECS80EXT_PROTOCOL:\r
841 {\r
842 toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r
843\r
4225a882 844 irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r
845 ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r
846 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r
847 irsnd_busy = TRUE;\r
848 break;\r
849 }\r
850#endif\r
851#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
852 case IRMP_RC5_PROTOCOL:\r
853 {\r
854 toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r
855\r
4225a882 856 irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r
857 ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r
858 irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r
859 irsnd_busy = TRUE;\r
860 break;\r
861 }\r
862#endif\r
9547ee89 863#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
864 case IRMP_RC6_PROTOCOL:\r
865 {\r
866 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
867\r
868 irsnd_buffer[0] = 0x80 | toggle_bit_rc6 | ((irmp_data_p->address & 0x00E0) >> 5); // 1MMMTAAA, MMM = 000\r
869 irsnd_buffer[1] = ((irmp_data_p->address & 0x001F) << 3) | ((irmp_data_p->command & 0xE0) >> 5); // AAAAACCC\r
870 irsnd_buffer[2] = (irmp_data_p->command & 0x1F) << 3; // CCCCC\r
871 irsnd_busy = TRUE;\r
872 break;\r
873 }\r
874#endif\r
875#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
876 case IRMP_RC6A_PROTOCOL:\r
877 {\r
878 toggle_bit_rc6 = toggle_bit_rc6 ? 0x00 : 0x08;\r
879\r
880 irsnd_buffer[0] = 0x80 | 0x60 | ((irmp_data_p->address & 0x3000) >> 12); // 1MMMT0AA, MMM = 110\r
881 irsnd_buffer[1] = ((irmp_data_p->address & 0x0FFF) >> 4) ; // AAAAAAAA\r
882 irsnd_buffer[2] = ((irmp_data_p->address & 0x000F) << 4) | ((irmp_data_p->command & 0xF000) >> 12) | toggle_bit_rc6; // AAAACCCC\r
883 irsnd_buffer[3] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
884 irsnd_buffer[4] = (irmp_data_p->command & 0x000F) << 4; // CCCC\r
885 irsnd_busy = TRUE;\r
886 break;\r
887 }\r
888#endif\r
4225a882 889#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
890 case IRMP_DENON_PROTOCOL:\r
891 {\r
d155e9ab 892 irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r
893 irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r
08f2dd9d 894 irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAAccc (2nd frame)\r
895 irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // ccccccc\r
4225a882 896 irsnd_busy = TRUE;\r
897 break;\r
898 }\r
899#endif\r
beda975f 900#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
901 case IRMP_THOMSON_PROTOCOL:\r
902 {\r
903 toggle_bit_thomson = toggle_bit_thomson ? 0x00 : 0x08;\r
904\r
905 irsnd_buffer[0] = ((irmp_data_p->address & 0x0F) << 4) | toggle_bit_thomson | ((irmp_data_p->command & 0x0070) >> 4); // AAAATCCC (1st frame)\r
906 irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC\r
907 irsnd_busy = TRUE;\r
908 break;\r
909 }\r
910#endif\r
4225a882 911#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
912 case IRMP_NUBERT_PROTOCOL:\r
913 {\r
4225a882 914 irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r
915 irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r
916 irsnd_busy = TRUE;\r
917 break;\r
918 }\r
5481e9cd 919#endif\r
920#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
921 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
922 {\r
5481e9cd 923 irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r
924 irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r
925 irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r
926 irsnd_busy = TRUE;\r
927 break;\r
928 }\r
4225a882 929#endif\r
5b437ff6 930#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
931 case IRMP_GRUNDIG_PROTOCOL:\r
932 {\r
933 command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r
934\r
d155e9ab 935 irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r
936 irsnd_buffer[1] = 0xC0; // 11\r
937 irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r
938 irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r
939\r
940 irsnd_busy = TRUE;\r
941 break;\r
942 }\r
943#endif\r
a48187fa 944#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
945 case IRMP_IR60_PROTOCOL:\r
946 {\r
947 command = (bitsrevervse (0x7d, IR60_COMMAND_LEN) << 7) | bitsrevervse (irmp_data_p->command, IR60_COMMAND_LEN);\r
08f2dd9d 948#if 0\r
a48187fa 949 irsnd_buffer[0] = command >> 6 | 0x01; // 1011111S (start instruction frame)\r
950 irsnd_buffer[1] = (command & 0x7F) << 1; // CCCCCCC_ (2nd frame)\r
08f2dd9d 951#else\r
952 irsnd_buffer[0] = ((command & 0x7F) << 1) | 0x01; // CCCCCCCS (1st frame)\r
953 irsnd_buffer[1] = command >> 6; // 1011111_ (start instruction frame)\r
954#endif\r
a48187fa 955\r
956 irsnd_busy = TRUE;\r
957 break;\r
958 }\r
959#endif\r
d155e9ab 960#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
961 case IRMP_NOKIA_PROTOCOL:\r
962 {\r
963 address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r
964 command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r
965\r
966 irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r
967 irsnd_buffer[1] = 0xFF; // 11111111\r
968 irsnd_buffer[2] = 0x80; // 1\r
969 irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r
970 irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r
971 irsnd_buffer[5] = (address << 7); // A\r
5b437ff6 972\r
973 irsnd_busy = TRUE;\r
974 break;\r
975 }\r
976#endif\r
a7054daf 977#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
978 case IRMP_SIEMENS_PROTOCOL:\r
979 {\r
980 irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA\r
981 irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC\r
9405f84a 982 irsnd_buffer[2] = (irmp_data_p->command << 3) | ((~irmp_data_p->command & 0x01) << 2); // CCCCCc\r
983\r
a7054daf 984 irsnd_busy = TRUE;\r
985 break;\r
986 }\r
b5ea7869 987#endif\r
48664931 988#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
989 case IRMP_FDC_PROTOCOL:\r
b5ea7869 990 {\r
48664931 991 address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r
992 command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r
b5ea7869 993\r
c7c9a4a1 994 irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r
995 irsnd_buffer[1] = 0; // 00000000\r
996 irsnd_buffer[2] = 0; // 0000RRRR\r
997 irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r
998 irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r
999 irsnd_busy = TRUE;\r
1000 break;\r
1001 }\r
1002#endif\r
1003#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
1004 case IRMP_RCCAR_PROTOCOL:\r
1005 {\r
1006 address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r
1007 command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r
1008\r
1009 irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r
1010 irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r
1011 \r
b5ea7869 1012 irsnd_busy = TRUE;\r
1013 break;\r
1014 }\r
a7054daf 1015#endif\r
c7a47e89 1016#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
1017 case IRMP_JVC_PROTOCOL:\r
1018 {\r
1019 address = bitsrevervse (irmp_data_p->address, JVC_ADDRESS_LEN);\r
1020 command = bitsrevervse (irmp_data_p->command, JVC_COMMAND_LEN);\r
1021\r
1022 irsnd_buffer[0] = ((address & 0x000F) << 4) | (command & 0x0F00) >> 8; // AAAACCCC\r
1023 irsnd_buffer[1] = (command & 0x00FF); // CCCCCCCC\r
1024\r
1025 irsnd_busy = TRUE;\r
1026 break;\r
1027 }\r
1028#endif\r
9405f84a 1029#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
1030 case IRMP_NIKON_PROTOCOL:\r
1031 {\r
1032 irsnd_buffer[0] = (irmp_data_p->command & 0x0003) << 6; // CC\r
1033 irsnd_busy = TRUE;\r
1034 break;\r
1035 }\r
f50e01e7 1036#endif\r
1037#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1038 case IRMP_LEGO_PROTOCOL:\r
1039 {\r
1040 uint8_t crc = 0x0F ^ ((irmp_data_p->command & 0x0F00) >> 8) ^ ((irmp_data_p->command & 0x00F0) >> 4) ^ (irmp_data_p->command & 0x000F);\r
1041\r
1042 irsnd_buffer[0] = (irmp_data_p->command & 0x0FF0) >> 4; // CCCCCCCC\r
1043 irsnd_buffer[1] = ((irmp_data_p->command & 0x000F) << 4) | crc; // CCCCcccc\r
1044\r
1045 irsnd_protocol = IRMP_LEGO_PROTOCOL;\r
1046 irsnd_busy = TRUE;\r
1047 break;\r
1048 }\r
9405f84a 1049#endif\r
4225a882 1050 default:\r
1051 {\r
1052 break;\r
1053 }\r
1054 }\r
1055\r
1056 return irsnd_busy;\r
1057}\r
1058\r
beda975f 1059void\r
1060irsnd_stop (void)\r
1061{\r
acf7fb44 1062 irsnd_repeat = 0;\r
beda975f 1063}\r
1064\r
4225a882 1065/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1066 * ISR routine\r
1067 * @details ISR routine, called 10000 times per second\r
1068 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
1069 */\r
1070uint8_t\r
1071irsnd_ISR (void)\r
1072{\r
a48187fa 1073 static uint8_t send_trailer = FALSE;\r
1074 static uint8_t current_bit = 0xFF;\r
1075 static uint8_t pulse_counter = 0;\r
1076 static IRSND_PAUSE_LEN pause_counter = 0;\r
1077 static uint8_t startbit_pulse_len = 0;\r
1078 static IRSND_PAUSE_LEN startbit_pause_len = 0;\r
1079 static uint8_t pulse_1_len = 0;\r
1080 static uint8_t pause_1_len = 0;\r
1081 static uint8_t pulse_0_len = 0;\r
1082 static uint8_t pause_0_len = 0;\r
1083 static uint8_t has_stop_bit = 0;\r
1084 static uint8_t new_frame = TRUE;\r
1085 static uint8_t complete_data_len = 0;\r
1086 static uint8_t n_repeat_frames = 0; // number of repetition frames\r
1087 static uint8_t n_auto_repetitions = 0; // number of auto_repetitions\r
1088 static uint8_t auto_repetition_counter = 0; // auto_repetition counter\r
1089 static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!\r
1090 static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!\r
1091 static uint8_t repeat_counter = 0; // repeat counter\r
1092 static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!\r
1093 static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!\r
5481e9cd 1094#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
a48187fa 1095 static uint8_t last_bit_value;\r
5481e9cd 1096#endif\r
a48187fa 1097 static uint8_t pulse_len = 0xFF;\r
08f2dd9d 1098 static IRSND_PAUSE_LEN pause_len = 0xFF;\r
4225a882 1099\r
1100 if (irsnd_busy)\r
1101 {\r
1102 if (current_bit == 0xFF && new_frame) // start of transmission...\r
1103 {\r
a7054daf 1104 if (auto_repetition_counter > 0)\r
4225a882 1105 {\r
a7054daf 1106 auto_repetition_pause_counter++;\r
4225a882 1107\r
08f2dd9d 1108#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1109 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1110 {\r
1111 repeat_frame_pause_len--;\r
1112 }\r
1113#endif\r
1114\r
a7054daf 1115 if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r
4225a882 1116 {\r
a7054daf 1117 auto_repetition_pause_counter = 0;\r
4225a882 1118\r
08f2dd9d 1119#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
a48187fa 1120 if (irsnd_protocol == IRMP_DENON_PROTOCOL) // n'th denon frame\r
4225a882 1121 {\r
1122 current_bit = 16;\r
1123 complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r
1124 }\r
08f2dd9d 1125 else\r
1126#endif\r
1127#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
1128 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig frame\r
5b437ff6 1129 {\r
1130 current_bit = 15;\r
1131 complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r
1132 }\r
08f2dd9d 1133 else\r
1134#endif\r
1135#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
1136 if (irsnd_protocol == IRMP_IR60_PROTOCOL) // n'th IR60 frame\r
a48187fa 1137 {\r
1138 current_bit = 7;\r
1139 complete_data_len = 2 * IR60_COMPLETE_DATA_LEN + 1;\r
1140 }\r
08f2dd9d 1141 else\r
1142#endif\r
1143#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1144 if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia frame\r
d155e9ab 1145 {\r
a7054daf 1146 if (auto_repetition_counter + 1 < n_auto_repetitions)\r
d155e9ab 1147 {\r
1148 current_bit = 23;\r
1149 complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r
1150 }\r
a7054daf 1151 else // nokia stop frame\r
d155e9ab 1152 {\r
1153 current_bit = 0xFF;\r
1154 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
1155 }\r
1156 }\r
08f2dd9d 1157 else\r
1158#endif\r
1159 {\r
1160 ;\r
1161 }\r
4225a882 1162 }\r
1163 else\r
1164 {\r
1165#ifdef DEBUG\r
1166 if (irsnd_is_on)\r
1167 {\r
1168 putchar ('0');\r
1169 }\r
1170 else\r
1171 {\r
1172 putchar ('1');\r
1173 }\r
1174#endif\r
1175 return irsnd_busy;\r
1176 }\r
1177 }\r
beda975f 1178#if 0\r
a7054daf 1179 else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r
beda975f 1180#else\r
1181 else if (packet_repeat_pause_counter < repeat_frame_pause_len)\r
1182#endif\r
a7054daf 1183 {\r
1184 packet_repeat_pause_counter++;\r
1185\r
1186#ifdef DEBUG\r
1187 if (irsnd_is_on)\r
1188 {\r
1189 putchar ('0');\r
1190 }\r
1191 else\r
1192 {\r
1193 putchar ('1');\r
1194 }\r
1195#endif\r
1196 return irsnd_busy;\r
1197 }\r
4225a882 1198 else\r
1199 {\r
0f700c8e 1200 if (send_trailer)\r
1201 {\r
1202 irsnd_busy = FALSE;\r
6ab7d63c 1203 send_trailer = FALSE;\r
0f700c8e 1204 return irsnd_busy;\r
1205 }\r
9c86ff1a 1206 \r
a7054daf 1207 n_repeat_frames = irsnd_repeat;\r
beda975f 1208\r
1209 if (n_repeat_frames == IRSND_ENDLESS_REPETITION)\r
1210 {\r
1211 n_repeat_frames = 255;\r
1212 }\r
1213\r
a7054daf 1214 packet_repeat_pause_counter = 0;\r
1215 pulse_counter = 0;\r
1216 pause_counter = 0;\r
5481e9cd 1217\r
4225a882 1218 switch (irsnd_protocol)\r
1219 {\r
1220#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
1221 case IRMP_SIRCS_PROTOCOL:\r
1222 {\r
a7054daf 1223 startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r
53c11f07 1224 startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1225 pulse_1_len = SIRCS_1_PULSE_LEN;\r
53c11f07 1226 pause_1_len = SIRCS_PAUSE_LEN - 1;\r
a7054daf 1227 pulse_0_len = SIRCS_0_PULSE_LEN;\r
53c11f07 1228 pause_0_len = SIRCS_PAUSE_LEN - 1;\r
a7054daf 1229 has_stop_bit = SIRCS_STOP_BIT;\r
9547ee89 1230 complete_data_len = SIRCS_MINIMUM_DATA_LEN + sircs_additional_bitlen;\r
a7054daf 1231 n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r
1232 auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r
1233 repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1234 irsnd_set_freq (IRSND_FREQ_40_KHZ);\r
1235 break;\r
1236 }\r
1237#endif\r
1238#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
1239 case IRMP_NEC_PROTOCOL:\r
1240 {\r
a7054daf 1241 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1242\r
1243 if (repeat_counter > 0)\r
1244 {\r
53c11f07 1245 startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1246 complete_data_len = 0;\r
1247 }\r
1248 else\r
1249 {\r
53c11f07 1250 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1251 complete_data_len = NEC_COMPLETE_DATA_LEN;\r
1252 }\r
1253\r
1254 pulse_1_len = NEC_PULSE_LEN;\r
53c11f07 1255 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
a7054daf 1256 pulse_0_len = NEC_PULSE_LEN;\r
53c11f07 1257 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
a7054daf 1258 has_stop_bit = NEC_STOP_BIT;\r
1259 n_auto_repetitions = 1; // 1 frame\r
1260 auto_repetition_pause_len = 0;\r
1261 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1262 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1263 break;\r
1264 }\r
1265#endif\r
7644ac04 1266#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1267 case IRMP_NEC16_PROTOCOL:\r
1268 {\r
1269 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1270 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1271 pulse_1_len = NEC_PULSE_LEN;\r
1272 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1273 pulse_0_len = NEC_PULSE_LEN;\r
1274 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1275 has_stop_bit = NEC_STOP_BIT;\r
1276 complete_data_len = NEC16_COMPLETE_DATA_LEN + 1; // 1 more: sync bit\r
1277 n_auto_repetitions = 1; // 1 frame\r
1278 auto_repetition_pause_len = 0;\r
1279 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1280 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1281 break;\r
1282 }\r
1283#endif\r
1284#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
1285 case IRMP_NEC42_PROTOCOL:\r
1286 {\r
1287 startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r
1288 startbit_pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1289 pulse_1_len = NEC_PULSE_LEN;\r
1290 pause_1_len = NEC_1_PAUSE_LEN - 1;\r
1291 pulse_0_len = NEC_PULSE_LEN;\r
1292 pause_0_len = NEC_0_PAUSE_LEN - 1;\r
1293 has_stop_bit = NEC_STOP_BIT;\r
1294 complete_data_len = NEC42_COMPLETE_DATA_LEN;\r
1295 n_auto_repetitions = 1; // 1 frame\r
1296 auto_repetition_pause_len = 0;\r
1297 repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r
1298 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1299 break;\r
1300 }\r
1301#endif\r
4225a882 1302#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1303 case IRMP_SAMSUNG_PROTOCOL:\r
1304 {\r
a7054daf 1305 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
53c11f07 1306 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1307 pulse_1_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1308 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
a7054daf 1309 pulse_0_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1310 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
a7054daf 1311 has_stop_bit = SAMSUNG_STOP_BIT;\r
1312 complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r
1313 n_auto_repetitions = 1; // 1 frame\r
1314 auto_repetition_pause_len = 0;\r
1315 repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1316 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1317 break;\r
1318 }\r
1319\r
1320 case IRMP_SAMSUNG32_PROTOCOL:\r
1321 {\r
a7054daf 1322 startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r
53c11f07 1323 startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1324 pulse_1_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1325 pause_1_len = SAMSUNG_1_PAUSE_LEN - 1;\r
a7054daf 1326 pulse_0_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1327 pause_0_len = SAMSUNG_0_PAUSE_LEN - 1;\r
a7054daf 1328 has_stop_bit = SAMSUNG_STOP_BIT;\r
1329 complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r
1330 n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r
1331 auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r
1332 repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1333 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1334 break;\r
1335 }\r
1336#endif\r
1337#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
1338 case IRMP_MATSUSHITA_PROTOCOL:\r
1339 {\r
a7054daf 1340 startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r
53c11f07 1341 startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1342 pulse_1_len = MATSUSHITA_PULSE_LEN;\r
53c11f07 1343 pause_1_len = MATSUSHITA_1_PAUSE_LEN - 1;\r
a7054daf 1344 pulse_0_len = MATSUSHITA_PULSE_LEN;\r
53c11f07 1345 pause_0_len = MATSUSHITA_0_PAUSE_LEN - 1;\r
a7054daf 1346 has_stop_bit = MATSUSHITA_STOP_BIT;\r
1347 complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r
1348 n_auto_repetitions = 1; // 1 frame\r
1349 auto_repetition_pause_len = 0;\r
1350 repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1351 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1352 break;\r
1353 }\r
1354#endif\r
770a1a9d 1355#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
1356 case IRMP_KASEIKYO_PROTOCOL:\r
1357 {\r
1358 startbit_pulse_len = KASEIKYO_START_BIT_PULSE_LEN;\r
53c11f07 1359 startbit_pause_len = KASEIKYO_START_BIT_PAUSE_LEN - 1;\r
770a1a9d 1360 pulse_1_len = KASEIKYO_PULSE_LEN;\r
53c11f07 1361 pause_1_len = KASEIKYO_1_PAUSE_LEN - 1;\r
770a1a9d 1362 pulse_0_len = KASEIKYO_PULSE_LEN;\r
53c11f07 1363 pause_0_len = KASEIKYO_0_PAUSE_LEN - 1;\r
770a1a9d 1364 has_stop_bit = KASEIKYO_STOP_BIT;\r
1365 complete_data_len = KASEIKYO_COMPLETE_DATA_LEN;\r
1366 n_auto_repetitions = (repeat_counter == 0) ? KASEIKYO_FRAMES : 1; // 2 frames auto repetition if first frame\r
1367 auto_repetition_pause_len = KASEIKYO_AUTO_REPETITION_PAUSE_LEN; // 75 ms pause\r
1368 repeat_frame_pause_len = KASEIKYO_FRAME_REPEAT_PAUSE_LEN;\r
1369 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1370 break;\r
1371 }\r
1372#endif\r
4225a882 1373#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
1374 case IRMP_RECS80_PROTOCOL:\r
1375 {\r
a7054daf 1376 startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r
53c11f07 1377 startbit_pause_len = RECS80_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1378 pulse_1_len = RECS80_PULSE_LEN;\r
53c11f07 1379 pause_1_len = RECS80_1_PAUSE_LEN - 1;\r
a7054daf 1380 pulse_0_len = RECS80_PULSE_LEN;\r
53c11f07 1381 pause_0_len = RECS80_0_PAUSE_LEN - 1;\r
a7054daf 1382 has_stop_bit = RECS80_STOP_BIT;\r
1383 complete_data_len = RECS80_COMPLETE_DATA_LEN;\r
1384 n_auto_repetitions = 1; // 1 frame\r
1385 auto_repetition_pause_len = 0;\r
1386 repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1387 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1388 break;\r
1389 }\r
1390#endif\r
1391#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
1392 case IRMP_RECS80EXT_PROTOCOL:\r
1393 {\r
a7054daf 1394 startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r
53c11f07 1395 startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1396 pulse_1_len = RECS80EXT_PULSE_LEN;\r
53c11f07 1397 pause_1_len = RECS80EXT_1_PAUSE_LEN - 1;\r
a7054daf 1398 pulse_0_len = RECS80EXT_PULSE_LEN;\r
53c11f07 1399 pause_0_len = RECS80EXT_0_PAUSE_LEN - 1;\r
a7054daf 1400 has_stop_bit = RECS80EXT_STOP_BIT;\r
1401 complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r
1402 n_auto_repetitions = 1; // 1 frame\r
1403 auto_repetition_pause_len = 0;\r
1404 repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1405 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1406 break;\r
1407 }\r
1408#endif\r
1409#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
1410 case IRMP_RC5_PROTOCOL:\r
1411 {\r
a7054daf 1412 startbit_pulse_len = RC5_BIT_LEN;\r
1413 startbit_pause_len = RC5_BIT_LEN;\r
1414 pulse_len = RC5_BIT_LEN;\r
1415 pause_len = RC5_BIT_LEN;\r
1416 has_stop_bit = RC5_STOP_BIT;\r
1417 complete_data_len = RC5_COMPLETE_DATA_LEN;\r
1418 n_auto_repetitions = 1; // 1 frame\r
1419 auto_repetition_pause_len = 0;\r
1420 repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1421 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1422 break;\r
1423 }\r
1424#endif\r
9547ee89 1425#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
1426 case IRMP_RC6_PROTOCOL:\r
1427 {\r
1428 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
53c11f07 1429 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
9547ee89 1430 pulse_len = RC6_BIT_LEN;\r
1431 pause_len = RC6_BIT_LEN;\r
1432 has_stop_bit = RC6_STOP_BIT;\r
1433 complete_data_len = RC6_COMPLETE_DATA_LEN_SHORT;\r
1434 n_auto_repetitions = 1; // 1 frame\r
1435 auto_repetition_pause_len = 0;\r
1436 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1437 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1438 break;\r
1439 }\r
1440#endif\r
1441#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
1442 case IRMP_RC6A_PROTOCOL:\r
1443 {\r
1444 startbit_pulse_len = RC6_START_BIT_PULSE_LEN;\r
53c11f07 1445 startbit_pause_len = RC6_START_BIT_PAUSE_LEN - 1;\r
9547ee89 1446 pulse_len = RC6_BIT_LEN;\r
1447 pause_len = RC6_BIT_LEN;\r
1448 has_stop_bit = RC6_STOP_BIT;\r
1449 complete_data_len = RC6_COMPLETE_DATA_LEN_LONG;\r
1450 n_auto_repetitions = 1; // 1 frame\r
1451 auto_repetition_pause_len = 0;\r
1452 repeat_frame_pause_len = RC6_FRAME_REPEAT_PAUSE_LEN;\r
1453 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1454 break;\r
1455 }\r
1456#endif\r
4225a882 1457#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1458 case IRMP_DENON_PROTOCOL:\r
1459 {\r
a7054daf 1460 startbit_pulse_len = 0x00;\r
1461 startbit_pause_len = 0x00;\r
1462 pulse_1_len = DENON_PULSE_LEN;\r
53c11f07 1463 pause_1_len = DENON_1_PAUSE_LEN - 1;\r
a7054daf 1464 pulse_0_len = DENON_PULSE_LEN;\r
53c11f07 1465 pause_0_len = DENON_0_PAUSE_LEN - 1;\r
a7054daf 1466 has_stop_bit = DENON_STOP_BIT;\r
1467 complete_data_len = DENON_COMPLETE_DATA_LEN;\r
1468 n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r
1469 auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r
1470 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
779fbc81 1471 irsnd_set_freq (IRSND_FREQ_36_KHZ); // in theory 32kHz, in practice 36kHz is better\r
4225a882 1472 break;\r
1473 }\r
1474#endif\r
beda975f 1475#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
1476 case IRMP_THOMSON_PROTOCOL:\r
1477 {\r
1478 startbit_pulse_len = 0x00;\r
1479 startbit_pause_len = 0x00;\r
1480 pulse_1_len = THOMSON_PULSE_LEN;\r
1481 pause_1_len = THOMSON_1_PAUSE_LEN - 1;\r
1482 pulse_0_len = THOMSON_PULSE_LEN;\r
1483 pause_0_len = THOMSON_0_PAUSE_LEN - 1;\r
1484 has_stop_bit = THOMSON_STOP_BIT;\r
1485 complete_data_len = THOMSON_COMPLETE_DATA_LEN;\r
1486 n_auto_repetitions = THOMSON_FRAMES; // only 1 frame\r
1487 auto_repetition_pause_len = THOMSON_AUTO_REPETITION_PAUSE_LEN;\r
1488 repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r
1489 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1490 break;\r
1491 }\r
1492#endif\r
4225a882 1493#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
1494 case IRMP_NUBERT_PROTOCOL:\r
1495 {\r
a7054daf 1496 startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r
53c11f07 1497 startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN - 1;\r
a7054daf 1498 pulse_1_len = NUBERT_1_PULSE_LEN;\r
53c11f07 1499 pause_1_len = NUBERT_1_PAUSE_LEN - 1;\r
a7054daf 1500 pulse_0_len = NUBERT_0_PULSE_LEN;\r
53c11f07 1501 pause_0_len = NUBERT_0_PAUSE_LEN - 1;\r
a7054daf 1502 has_stop_bit = NUBERT_STOP_BIT;\r
1503 complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r
1504 n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r
1505 auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r
1506 repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r
4225a882 1507 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1508 break;\r
1509 }\r
5481e9cd 1510#endif\r
1511#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1512 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
1513 {\r
a7054daf 1514 startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r
53c11f07 1515 startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN - 1;\r
a7054daf 1516 pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1517 pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN - 1;\r
a7054daf 1518 pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1519 pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN - 1;\r
a7054daf 1520 has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r
1521 complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r
1522 n_auto_repetitions = 1; // 1 frame\r
1523 auto_repetition_pause_len = 0;\r
1524 repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r
1525 last_bit_value = 0;\r
5481e9cd 1526 irsnd_set_freq (IRSND_FREQ_455_KHZ);\r
1527 break;\r
1528 }\r
5b437ff6 1529#endif\r
1530#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
1531 case IRMP_GRUNDIG_PROTOCOL:\r
1532 {\r
89e8cafb 1533 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1534 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1535 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1536 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1537 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
a7054daf 1538 complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r
1539 n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r
1540 auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
a48187fa 1541 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
d155e9ab 1542 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
a48187fa 1543 break;\r
1544 }\r
1545#endif\r
1546#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
1547 case IRMP_IR60_PROTOCOL:\r
1548 {\r
1549 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1550 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1551 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1552 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1553 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
1554 complete_data_len = IR60_COMPLETE_DATA_LEN;\r
1555 n_auto_repetitions = IR60_FRAMES; // 2 frames\r
1556 auto_repetition_pause_len = IR60_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r
1557 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
1558 irsnd_set_freq (IRSND_FREQ_30_KHZ);\r
d155e9ab 1559 break;\r
1560 }\r
1561#endif\r
1562#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1563 case IRMP_NOKIA_PROTOCOL:\r
1564 {\r
89e8cafb 1565 startbit_pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1566 startbit_pause_len = GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN - 1;\r
1567 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1568 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
1569 has_stop_bit = GRUNDIG_NOKIA_IR60_STOP_BIT;\r
a7054daf 1570 complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r
08f2dd9d 1571 n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r
1572 auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r
1573 repeat_frame_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r
d155e9ab 1574 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
5b437ff6 1575 break;\r
1576 }\r
a7054daf 1577#endif\r
1578#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
1579 case IRMP_SIEMENS_PROTOCOL:\r
1580 {\r
1581 startbit_pulse_len = SIEMENS_BIT_LEN;\r
1582 startbit_pause_len = SIEMENS_BIT_LEN;\r
1583 pulse_len = SIEMENS_BIT_LEN;\r
1584 pause_len = SIEMENS_BIT_LEN;\r
02ccdb69 1585 has_stop_bit = SIEMENS_OR_RUWIDO_STOP_BIT;\r
a7054daf 1586 complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;\r
1587 n_auto_repetitions = 1; // 1 frame\r
1588 auto_repetition_pause_len = 0;\r
1589 repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r
1590 irsnd_set_freq (IRSND_FREQ_36_KHZ);\r
1591 break;\r
1592 }\r
b5ea7869 1593#endif\r
48664931 1594#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
1595 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1596 {\r
48664931 1597 startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r
53c11f07 1598 startbit_pause_len = FDC_START_BIT_PAUSE_LEN - 1;\r
48664931 1599 complete_data_len = FDC_COMPLETE_DATA_LEN;\r
1600 pulse_1_len = FDC_PULSE_LEN;\r
53c11f07 1601 pause_1_len = FDC_1_PAUSE_LEN - 1;\r
48664931 1602 pulse_0_len = FDC_PULSE_LEN;\r
53c11f07 1603 pause_0_len = FDC_0_PAUSE_LEN - 1;\r
48664931 1604 has_stop_bit = FDC_STOP_BIT;\r
b5ea7869 1605 n_auto_repetitions = 1; // 1 frame\r
1606 auto_repetition_pause_len = 0;\r
48664931 1607 repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r
b5ea7869 1608 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1609 break;\r
1610 }\r
c7c9a4a1 1611#endif\r
1612#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
1613 case IRMP_RCCAR_PROTOCOL:\r
1614 {\r
1615 startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r
53c11f07 1616 startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN - 1;\r
c7c9a4a1 1617 complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r
1618 pulse_1_len = RCCAR_PULSE_LEN;\r
53c11f07 1619 pause_1_len = RCCAR_1_PAUSE_LEN - 1;\r
c7c9a4a1 1620 pulse_0_len = RCCAR_PULSE_LEN;\r
53c11f07 1621 pause_0_len = RCCAR_0_PAUSE_LEN - 1;\r
c7c9a4a1 1622 has_stop_bit = RCCAR_STOP_BIT;\r
1623 n_auto_repetitions = 1; // 1 frame\r
1624 auto_repetition_pause_len = 0;\r
1625 repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r
1626 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1627 break;\r
1628 }\r
4225a882 1629#endif\r
c7a47e89 1630#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
1631 case IRMP_JVC_PROTOCOL:\r
1632 {\r
1633 if (repeat_counter != 0) // skip start bit if repetition frame\r
1634 {\r
1635 current_bit = 0;\r
1636 }\r
1637\r
1638 startbit_pulse_len = JVC_START_BIT_PULSE_LEN;\r
53c11f07 1639 startbit_pause_len = JVC_START_BIT_PAUSE_LEN - 1;\r
c7a47e89 1640 complete_data_len = JVC_COMPLETE_DATA_LEN;\r
1641 pulse_1_len = JVC_PULSE_LEN;\r
53c11f07 1642 pause_1_len = JVC_1_PAUSE_LEN - 1;\r
c7a47e89 1643 pulse_0_len = JVC_PULSE_LEN;\r
53c11f07 1644 pause_0_len = JVC_0_PAUSE_LEN - 1;\r
c7a47e89 1645 has_stop_bit = JVC_STOP_BIT;\r
1646 n_auto_repetitions = 1; // 1 frame\r
1647 auto_repetition_pause_len = 0;\r
1648 repeat_frame_pause_len = JVC_FRAME_REPEAT_PAUSE_LEN;\r
1649 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
c7a47e89 1650 break;\r
1651 }\r
1652#endif\r
9405f84a 1653#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
1654 case IRMP_NIKON_PROTOCOL:\r
1655 {\r
1656 startbit_pulse_len = NIKON_START_BIT_PULSE_LEN;\r
53c11f07 1657 startbit_pause_len = 271 - 1; // NIKON_START_BIT_PAUSE_LEN;\r
9405f84a 1658 complete_data_len = NIKON_COMPLETE_DATA_LEN;\r
1659 pulse_1_len = NIKON_PULSE_LEN;\r
53c11f07 1660 pause_1_len = NIKON_1_PAUSE_LEN - 1;\r
9405f84a 1661 pulse_0_len = NIKON_PULSE_LEN;\r
53c11f07 1662 pause_0_len = NIKON_0_PAUSE_LEN - 1;\r
9405f84a 1663 has_stop_bit = NIKON_STOP_BIT;\r
1664 n_auto_repetitions = 1; // 1 frame\r
1665 auto_repetition_pause_len = 0;\r
1666 repeat_frame_pause_len = NIKON_FRAME_REPEAT_PAUSE_LEN;\r
1667 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
9405f84a 1668 break;\r
1669 }\r
1670#endif\r
f50e01e7 1671#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1672 case IRMP_LEGO_PROTOCOL:\r
1673 {\r
1674 startbit_pulse_len = LEGO_START_BIT_PULSE_LEN;\r
1675 startbit_pause_len = LEGO_START_BIT_PAUSE_LEN - 1;\r
1676 complete_data_len = LEGO_COMPLETE_DATA_LEN;\r
1677 pulse_1_len = LEGO_PULSE_LEN;\r
1678 pause_1_len = LEGO_1_PAUSE_LEN - 1;\r
1679 pulse_0_len = LEGO_PULSE_LEN;\r
1680 pause_0_len = LEGO_0_PAUSE_LEN - 1;\r
1681 has_stop_bit = LEGO_STOP_BIT;\r
1682 n_auto_repetitions = 1; // 1 frame\r
1683 auto_repetition_pause_len = 0;\r
1684 repeat_frame_pause_len = LEGO_FRAME_REPEAT_PAUSE_LEN;\r
1685 irsnd_set_freq (IRSND_FREQ_38_KHZ);\r
1686 break;\r
1687 }\r
1688#endif\r
4225a882 1689 default:\r
1690 {\r
1691 irsnd_busy = FALSE;\r
1692 break;\r
1693 }\r
1694 }\r
1695 }\r
1696 }\r
1697\r
1698 if (irsnd_busy)\r
1699 {\r
1700 new_frame = FALSE;\r
a7054daf 1701\r
4225a882 1702 switch (irsnd_protocol)\r
1703 {\r
1704#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r
1705 case IRMP_SIRCS_PROTOCOL:\r
1706#endif\r
1707#if IRSND_SUPPORT_NEC_PROTOCOL == 1\r
1708 case IRMP_NEC_PROTOCOL:\r
1709#endif\r
7644ac04 1710#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1711 case IRMP_NEC16_PROTOCOL:\r
1712#endif\r
1713#if IRSND_SUPPORT_NEC42_PROTOCOL == 1\r
1714 case IRMP_NEC42_PROTOCOL:\r
1715#endif\r
4225a882 1716#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1717 case IRMP_SAMSUNG_PROTOCOL:\r
1718 case IRMP_SAMSUNG32_PROTOCOL:\r
1719#endif\r
1720#if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r
1721 case IRMP_MATSUSHITA_PROTOCOL:\r
1722#endif\r
770a1a9d 1723#if IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1\r
1724 case IRMP_KASEIKYO_PROTOCOL:\r
1725#endif\r
4225a882 1726#if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r
1727 case IRMP_RECS80_PROTOCOL:\r
1728#endif\r
1729#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r
1730 case IRMP_RECS80EXT_PROTOCOL:\r
1731#endif\r
1732#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1733 case IRMP_DENON_PROTOCOL:\r
1734#endif\r
beda975f 1735#if IRSND_SUPPORT_THOMSON_PROTOCOL == 1\r
1736 case IRMP_THOMSON_PROTOCOL:\r
1737#endif\r
4225a882 1738#if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r
1739 case IRMP_NUBERT_PROTOCOL:\r
5481e9cd 1740#endif\r
1741#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1742 case IRMP_BANG_OLUFSEN_PROTOCOL:\r
4225a882 1743#endif\r
c7c9a4a1 1744#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
48664931 1745 case IRMP_FDC_PROTOCOL:\r
b5ea7869 1746#endif\r
c7c9a4a1 1747#if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r
1748 case IRMP_RCCAR_PROTOCOL:\r
1749#endif\r
c7a47e89 1750#if IRSND_SUPPORT_JVC_PROTOCOL == 1\r
1751 case IRMP_JVC_PROTOCOL:\r
1752#endif\r
9405f84a 1753#if IRSND_SUPPORT_NIKON_PROTOCOL == 1\r
1754 case IRMP_NIKON_PROTOCOL:\r
1755#endif\r
f50e01e7 1756#if IRSND_SUPPORT_LEGO_PROTOCOL == 1\r
1757 case IRMP_LEGO_PROTOCOL:\r
1758#endif\r
a7054daf 1759\r
1760\r
7644ac04 1761#if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_NEC16_PROTOCOL == 1 || IRSND_SUPPORT_NEC42_PROTOCOL == 1 || \\r
1762 IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r
770a1a9d 1763 IRSND_SUPPORT_KASEIKYO_PROTOCOL == 1 || IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || \\r
c7a47e89 1764 IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1 || \\r
beda975f 1765 IRSND_SUPPORT_JVC_PROTOCOL == 1 || IRSND_SUPPORT_NIKON_PROTOCOL == 1 || IRSND_SUPPORT_LEGO_PROTOCOL == 1 || IRSND_SUPPORT_THOMSON_PROTOCOL == 1 \r
4225a882 1766 {\r
08f2dd9d 1767#if IRSND_SUPPORT_DENON_PROTOCOL == 1\r
1768 if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r
1769 {\r
1770 if (auto_repetition_pause_len > 0) // 2nd frame distance counts from beginning of 1st frame!\r
1771 {\r
1772 auto_repetition_pause_len--;\r
1773 }\r
1774\r
1775 if (repeat_frame_pause_len > 0) // frame repeat distance counts from beginning of 1st frame!\r
1776 {\r
1777 repeat_frame_pause_len--;\r
1778 }\r
1779 }\r
1780#endif\r
1781\r
5481e9cd 1782 if (pulse_counter == 0)\r
4225a882 1783 {\r
5481e9cd 1784 if (current_bit == 0xFF) // send start bit\r
1785 {\r
1786 pulse_len = startbit_pulse_len;\r
1787 pause_len = startbit_pause_len;\r
1788 }\r
1789 else if (current_bit < complete_data_len) // send n'th bit\r
4225a882 1790 {\r
5481e9cd 1791#if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r
1792 if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r
4225a882 1793 {\r
5481e9cd 1794 if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r
1795 {\r
1796 pulse_len = SAMSUNG_PULSE_LEN;\r
1797 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
53c11f07 1798 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
5481e9cd 1799 }\r
1800 else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r
1801 {\r
1802 pulse_len = SAMSUNG_PULSE_LEN;\r
53c11f07 1803 pause_len = SAMSUNG_START_BIT_PAUSE_LEN - 1;\r
5481e9cd 1804 }\r
1805 else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r
1806 {\r
1807 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1808\r
1809 pulse_len = SAMSUNG_PULSE_LEN;\r
1810 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
53c11f07 1811 (SAMSUNG_1_PAUSE_LEN - 1) : (SAMSUNG_0_PAUSE_LEN - 1);\r
5481e9cd 1812 }\r
4225a882 1813 }\r
5481e9cd 1814 else\r
1815#endif\r
1816\r
7644ac04 1817#if IRSND_SUPPORT_NEC16_PROTOCOL == 1\r
1818 if (irsnd_protocol == IRMP_NEC16_PROTOCOL)\r
1819 {\r
1820 if (current_bit < NEC16_ADDRESS_LEN) // send address bits\r
1821 {\r
1822 pulse_len = NEC_PULSE_LEN;\r
1823 pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r
1824 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1825 }\r
1826 else if (current_bit == NEC16_ADDRESS_LEN) // send SYNC bit (8th bit)\r
1827 {\r
1828 pulse_len = NEC_PULSE_LEN;\r
1829 pause_len = NEC_START_BIT_PAUSE_LEN - 1;\r
1830 }\r
1831 else if (current_bit < NEC16_COMPLETE_DATA_LEN + 1) // send n'th bit\r
1832 {\r
1833 uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r
1834\r
1835 pulse_len = NEC_PULSE_LEN;\r
1836 pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r
1837 (NEC_1_PAUSE_LEN - 1) : (NEC_0_PAUSE_LEN - 1);\r
1838 }\r
1839 }\r
1840 else\r
1841#endif\r
1842\r
5481e9cd 1843#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r
1844 if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r
4225a882 1845 {\r
5481e9cd 1846 if (current_bit == 0) // send 2nd start bit\r
1847 {\r
1848 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
53c11f07 1849 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
5481e9cd 1850 }\r
1851 else if (current_bit == 1) // send 3rd start bit\r
1852 {\r
1853 pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r
53c11f07 1854 pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN - 1;\r
5481e9cd 1855 }\r
1856 else if (current_bit == 2) // send 4th start bit\r
1857 {\r
1858 pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r
53c11f07 1859 pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN - 1;\r
5481e9cd 1860 }\r
1861 else if (current_bit == 19) // send trailer bit\r
1862 {\r
1863 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
53c11f07 1864 pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN - 1;\r
5481e9cd 1865 }\r
1866 else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r
1867 {\r
1868 uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r
1869 pulse_len = BANG_OLUFSEN_PULSE_LEN;\r
1870\r
1871 if (cur_bit_value == last_bit_value)\r
1872 {\r
53c11f07 1873 pause_len = BANG_OLUFSEN_R_PAUSE_LEN - 1;\r
5481e9cd 1874 }\r
1875 else\r
1876 {\r
53c11f07 1877 pause_len = cur_bit_value ? (BANG_OLUFSEN_1_PAUSE_LEN - 1) : (BANG_OLUFSEN_0_PAUSE_LEN - 1);\r
5481e9cd 1878 last_bit_value = cur_bit_value;\r
1879 }\r
1880 }\r
4225a882 1881 }\r
5481e9cd 1882 else\r
1883#endif\r
1884 if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r
4225a882 1885 {\r
5481e9cd 1886 pulse_len = pulse_1_len;\r
1887 pause_len = pause_1_len;\r
1888 }\r
1889 else\r
1890 {\r
1891 pulse_len = pulse_0_len;\r
1892 pause_len = pause_0_len;\r
4225a882 1893 }\r
1894 }\r
5481e9cd 1895 else if (has_stop_bit) // send stop bit\r
4225a882 1896 {\r
1897 pulse_len = pulse_0_len;\r
4225a882 1898\r
a7054daf 1899 if (auto_repetition_counter < n_auto_repetitions)\r
5481e9cd 1900 {\r
1901 pause_len = pause_0_len;\r
1902 }\r
1903 else\r
1904 {\r
1905 pause_len = 255; // last frame: pause of 255\r
1906 }\r
4225a882 1907 }\r
1908 }\r
1909\r
1910 if (pulse_counter < pulse_len)\r
1911 {\r
1912 if (pulse_counter == 0)\r
1913 {\r
1914 irsnd_on ();\r
1915 }\r
1916 pulse_counter++;\r
1917 }\r
1918 else if (pause_counter < pause_len)\r
1919 {\r
1920 if (pause_counter == 0)\r
1921 {\r
1922 irsnd_off ();\r
1923 }\r
1924 pause_counter++;\r
1925 }\r
1926 else\r
1927 {\r
1928 current_bit++;\r
1929\r
1930 if (current_bit >= complete_data_len + has_stop_bit)\r
1931 {\r
1932 current_bit = 0xFF;\r
a7054daf 1933 auto_repetition_counter++;\r
4225a882 1934\r
a7054daf 1935 if (auto_repetition_counter == n_auto_repetitions)\r
4225a882 1936 {\r
1937 irsnd_busy = FALSE;\r
a7054daf 1938 auto_repetition_counter = 0;\r
4225a882 1939 }\r
1940 new_frame = TRUE;\r
1941 }\r
1942\r
1943 pulse_counter = 0;\r
1944 pause_counter = 0;\r
1945 }\r
1946 break;\r
1947 }\r
a7054daf 1948#endif\r
1949\r
4225a882 1950#if IRSND_SUPPORT_RC5_PROTOCOL == 1\r
1951 case IRMP_RC5_PROTOCOL:\r
a7054daf 1952#endif\r
9547ee89 1953#if IRSND_SUPPORT_RC6_PROTOCOL == 1\r
1954 case IRMP_RC6_PROTOCOL:\r
1955#endif\r
1956#if IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
1957 case IRMP_RC6A_PROTOCOL:\r
1958#endif\r
a7054daf 1959#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r
1960 case IRMP_SIEMENS_PROTOCOL:\r
1961#endif\r
1962#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r
1963 case IRMP_GRUNDIG_PROTOCOL:\r
1964#endif\r
a48187fa 1965#if IRSND_SUPPORT_IR60_PROTOCOL == 1\r
1966 case IRMP_IR60_PROTOCOL:\r
1967#endif\r
a7054daf 1968#if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1969 case IRMP_NOKIA_PROTOCOL:\r
1970#endif\r
4225a882 1971\r
9547ee89 1972#if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || \\r
a48187fa 1973 IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
a7054daf 1974 {\r
1975 if (pulse_counter == pulse_len && pause_counter == pause_len)\r
4225a882 1976 {\r
a7054daf 1977 current_bit++;\r
4225a882 1978\r
a7054daf 1979 if (current_bit >= complete_data_len)\r
4225a882 1980 {\r
a7054daf 1981 current_bit = 0xFF;\r
1982\r
a48187fa 1983#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
1984 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
4225a882 1985 {\r
a7054daf 1986 auto_repetition_counter++;\r
1987\r
1988 if (repeat_counter > 0)\r
1989 { // set 117 msec pause time\r
89e8cafb 1990 auto_repetition_pause_len = GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN;\r
a7054daf 1991 }\r
1992\r
1993 if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r
1994 {\r
1995 n_auto_repetitions++; // increment number of auto repetitions\r
1996 repeat_counter++;\r
1997 }\r
1998 else if (auto_repetition_counter == n_auto_repetitions)\r
1999 {\r
2000 irsnd_busy = FALSE;\r
2001 auto_repetition_counter = 0;\r
2002 }\r
4225a882 2003 }\r
a7054daf 2004 else\r
2005#endif\r
4225a882 2006 {\r
a7054daf 2007 irsnd_busy = FALSE;\r
4225a882 2008 }\r
4225a882 2009\r
4225a882 2010 new_frame = TRUE;\r
2011 irsnd_off ();\r
2012 }\r
2013\r
2014 pulse_counter = 0;\r
2015 pause_counter = 0;\r
2016 }\r
5b437ff6 2017\r
a7054daf 2018 if (! new_frame)\r
5b437ff6 2019 {\r
a7054daf 2020 uint8_t first_pulse;\r
5b437ff6 2021\r
a48187fa 2022#if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
2023 if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_IR60_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r
5b437ff6 2024 {\r
a7054daf 2025 if (current_bit == 0xFF || // start bit of start-frame\r
2026 (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r
a48187fa 2027 (irsnd_protocol == IRMP_IR60_PROTOCOL && current_bit == 7) || // start bit of data frame (IR60)\r
a7054daf 2028 (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r
5b437ff6 2029 {\r
a7054daf 2030 pulse_len = startbit_pulse_len;\r
2031 pause_len = startbit_pause_len;\r
2032 first_pulse = TRUE;\r
5b437ff6 2033 }\r
a7054daf 2034 else // send n'th bit\r
5b437ff6 2035 {\r
89e8cafb 2036 pulse_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
2037 pause_len = GRUNDIG_NOKIA_IR60_BIT_LEN;\r
a7054daf 2038 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
5b437ff6 2039 }\r
5b437ff6 2040 }\r
9547ee89 2041 else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL ||\r
2042 // irsnd_protocol == IRMP_SIEMENS_PROTOCOL)\r
a7054daf 2043#endif\r
5b437ff6 2044 {\r
a7054daf 2045 if (current_bit == 0xFF) // 1 start bit\r
2046 {\r
9547ee89 2047#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
2048 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2049 {\r
2050 pulse_len = startbit_pulse_len;\r
2051 pause_len = startbit_pause_len;\r
2052 }\r
2053#endif\r
a7054daf 2054 first_pulse = TRUE;\r
2055 }\r
2056 else // send n'th bit\r
2057 {\r
9547ee89 2058#if IRSND_SUPPORT_RC6_PROTOCOL == 1 || IRSND_SUPPORT_RC6A_PROTOCOL == 1\r
2059 if (irsnd_protocol == IRMP_RC6_PROTOCOL || irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2060 {\r
2061 pulse_len = RC6_BIT_LEN;\r
2062 pause_len = RC6_BIT_LEN;\r
2063\r
2064 if (irsnd_protocol == IRMP_RC6_PROTOCOL)\r
2065 {\r
2066 if (current_bit == 4) // toggle bit (double len)\r
2067 {\r
2068 pulse_len = 2 * RC6_BIT_LEN;\r
2069 pause_len = 2 * RC6_BIT_LEN;\r
2070 }\r
2071 }\r
2072 else // if (irsnd_protocol == IRMP_RC6A_PROTOCOL)\r
2073 {\r
2074 if (current_bit == 4) // toggle bit (double len)\r
2075 {\r
2076 pulse_len = 2 * RC6_BIT_LEN + RC6_BIT_LEN; // hack!\r
2077 pause_len = 2 * RC6_BIT_LEN;\r
2078 }\r
2079 else if (current_bit == 5) // toggle bit (double len)\r
2080 {\r
2081 pause_len = 2 * RC6_BIT_LEN;\r
2082 }\r
2083 }\r
2084 }\r
2085#endif\r
a7054daf 2086 first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r
2087 }\r
5b437ff6 2088\r
a7054daf 2089 if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r
2090 {\r
2091 first_pulse = first_pulse ? FALSE : TRUE;\r
2092 }\r
2093 }\r
5b437ff6 2094\r
2095 if (first_pulse)\r
2096 {\r
a7054daf 2097 if (pulse_counter < pulse_len)\r
5b437ff6 2098 {\r
2099 if (pulse_counter == 0)\r
2100 {\r
2101 irsnd_on ();\r
2102 }\r
2103 pulse_counter++;\r
2104 }\r
a7054daf 2105 else // if (pause_counter < pause_len)\r
5b437ff6 2106 {\r
2107 if (pause_counter == 0)\r
2108 {\r
2109 irsnd_off ();\r
2110 }\r
2111 pause_counter++;\r
2112 }\r
5b437ff6 2113 }\r
2114 else\r
2115 {\r
a7054daf 2116 if (pause_counter < pause_len)\r
5b437ff6 2117 {\r
2118 if (pause_counter == 0)\r
2119 {\r
2120 irsnd_off ();\r
2121 }\r
2122 pause_counter++;\r
2123 }\r
a7054daf 2124 else // if (pulse_counter < pulse_len)\r
5b437ff6 2125 {\r
2126 if (pulse_counter == 0)\r
2127 {\r
2128 irsnd_on ();\r
2129 }\r
2130 pulse_counter++;\r
2131 }\r
5b437ff6 2132 }\r
2133 }\r
2134 break;\r
2135 }\r
9547ee89 2136#endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_RC6_PROTOCOL == 1 || || IRSND_SUPPORT_RC6A_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 ||\r
a48187fa 2137 // IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_IR60_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r
5b437ff6 2138\r
4225a882 2139 default:\r
2140 {\r
2141 irsnd_busy = FALSE;\r
2142 break;\r
2143 }\r
2144 }\r
2145 }\r
a7054daf 2146\r
2147 if (! irsnd_busy)\r
2148 {\r
2149 if (repeat_counter < n_repeat_frames)\r
2150 {\r
c7c9a4a1 2151#if IRSND_SUPPORT_FDC_PROTOCOL == 1\r
2152 if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r
2153 {\r
2154 irsnd_buffer[2] |= 0x0F;\r
2155 }\r
2156#endif\r
a7054daf 2157 repeat_counter++;\r
2158 irsnd_busy = TRUE;\r
2159 }\r
2160 else\r
2161 {\r
9c86ff1a 2162 irsnd_busy = TRUE; //Rainer\r
0f700c8e 2163 send_trailer = TRUE;\r
a7054daf 2164 n_repeat_frames = 0;\r
2165 repeat_counter = 0;\r
2166 }\r
2167 }\r
4225a882 2168 }\r
2169\r
2170#ifdef DEBUG\r
2171 if (irsnd_is_on)\r
2172 {\r
2173 putchar ('0');\r
2174 }\r
2175 else\r
2176 {\r
2177 putchar ('1');\r
2178 }\r
2179#endif\r
2180\r
2181 return irsnd_busy;\r
2182}\r
2183\r
2184#ifdef DEBUG\r
2185\r
2186// main function - for unix/linux + windows only!\r
2187// AVR: see main.c!\r
2188// Compile it under linux with:\r
2189// cc irsnd.c -o irsnd\r
2190//\r
2191// usage: ./irsnd protocol hex-address hex-command >filename\r
2192\r
2193int\r
2194main (int argc, char ** argv)\r
2195{\r
4225a882 2196 int protocol;\r
2197 int address;\r
2198 int command;\r
4225a882 2199 IRMP_DATA irmp_data;\r
2200\r
a7054daf 2201 if (argc != 4 && argc != 5)\r
4225a882 2202 {\r
a7054daf 2203 fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r
4225a882 2204 return 1;\r
2205 }\r
2206\r
2207 if (sscanf (argv[1], "%d", &protocol) == 1 &&\r
2208 sscanf (argv[2], "%x", &address) == 1 &&\r
2209 sscanf (argv[3], "%x", &command) == 1)\r
2210 {\r
2211 irmp_data.protocol = protocol;\r
2212 irmp_data.address = address;\r
2213 irmp_data.command = command;\r
2214\r
a7054daf 2215 if (argc == 5)\r
2216 {\r
2217 irmp_data.flags = atoi (argv[4]);\r
2218 }\r
2219 else\r
2220 {\r
2221 irmp_data.flags = 0;\r
2222 }\r
2223\r
4225a882 2224 irsnd_init ();\r
2225\r
879b06c2 2226 (void) irsnd_send_data (&irmp_data, TRUE);\r
4225a882 2227\r
a7054daf 2228 while (irsnd_busy)\r
2229 {\r
2230 irsnd_ISR ();\r
2231 }\r
beda975f 2232\r
4225a882 2233 putchar ('\n');\r
2234 }\r
2235 else\r
2236 {\r
2237 fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r
2238 return 1;\r
2239 }\r
2240 return 0;\r
2241}\r
2242\r
2243#endif // DEBUG\r
Clone of IRMP - Infrared Muliti Protocol Decoder (https://www.mikrocontroller.net/articles/IRMP)