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4225a882 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2 | * irmp.c - infrared multi-protocol decoder, supports several remote control protocols\r | |
3 | *\r | |
2ac088b2 | 4 | * Copyright (c) 2009-2013 Frank Meyer - frank(at)fli4l.de\r |
4225a882 | 5 | *\r |
0a2f634b | 6 | * $Id: irmp.c,v 1.148 2014/05/30 12:48:54 fm Exp $\r |
cb8474cc | 7 | *\r |
4225a882 | 8 | * ATMEGA88 @ 8 MHz\r |
9 | *\r | |
7644ac04 | 10 | * Supported mikrocontrollers:\r |
11 | *\r | |
21a4e0ee | 12 | * ATtiny87, ATtiny167\r |
476267f4 | 13 | * ATtiny45, ATtiny85\r |
2ac088b2 | 14 | * ATtiny44, ATtiny84\r |
7644ac04 | 15 | * ATmega8, ATmega16, ATmega32\r |
16 | * ATmega162\r | |
e664a9f3 | 17 | * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r |
7644ac04 | 18 | * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r |
19 | *\r | |
4225a882 | 20 | * This program is free software; you can redistribute it and/or modify\r |
21 | * it under the terms of the GNU General Public License as published by\r | |
22 | * the Free Software Foundation; either version 2 of the License, or\r | |
23 | * (at your option) any later version.\r | |
24 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
25 | */\r | |
26 | \r | |
f5ca0147 | 27 | #include "irmp.h"\r |
4225a882 | 28 | \r |
89e8cafb | 29 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
08f2dd9d | 30 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 1\r |
d155e9ab | 31 | #else\r |
08f2dd9d | 32 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 0\r |
d155e9ab | 33 | #endif\r |
34 | \r | |
12948cf3 | 35 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 || IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r |
08f2dd9d | 36 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 1\r |
12948cf3 | 37 | #else\r |
08f2dd9d | 38 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 0\r |
12948cf3 | 39 | #endif\r |
40 | \r | |
deba2a0a | 41 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || \\r |
42 | IRMP_SUPPORT_RC6_PROTOCOL == 1 || \\r | |
43 | IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1 || \\r | |
44 | IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 || \\r | |
2fb27bfe | 45 | IRMP_SUPPORT_IR60_PROTOCOL == 1 || \\r |
b85cb27d | 46 | IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1 || \\r |
47 | IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
08f2dd9d | 48 | # define IRMP_SUPPORT_MANCHESTER 1\r |
77f488bb | 49 | #else\r |
08f2dd9d | 50 | # define IRMP_SUPPORT_MANCHESTER 0\r |
77f488bb | 51 | #endif\r |
52 | \r | |
93570cd9 | 53 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
08f2dd9d | 54 | # define IRMP_SUPPORT_SERIAL 1\r |
deba2a0a | 55 | #else\r |
08f2dd9d | 56 | # define IRMP_SUPPORT_SERIAL 0\r |
deba2a0a | 57 | #endif\r |
58 | \r | |
6db2522c | 59 | #define IRMP_KEY_REPETITION_LEN (uint16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec\r |
4225a882 | 60 | \r |
fef942f6 | 61 | #define MIN_TOLERANCE_00 1.0 // -0%\r |
62 | #define MAX_TOLERANCE_00 1.0 // +0%\r | |
63 | \r | |
64 | #define MIN_TOLERANCE_05 0.95 // -5%\r | |
65 | #define MAX_TOLERANCE_05 1.05 // +5%\r | |
66 | \r | |
4225a882 | 67 | #define MIN_TOLERANCE_10 0.9 // -10%\r |
68 | #define MAX_TOLERANCE_10 1.1 // +10%\r | |
69 | \r | |
fef942f6 | 70 | #define MIN_TOLERANCE_15 0.85 // -15%\r |
71 | #define MAX_TOLERANCE_15 1.15 // +15%\r | |
72 | \r | |
4225a882 | 73 | #define MIN_TOLERANCE_20 0.8 // -20%\r |
74 | #define MAX_TOLERANCE_20 1.2 // +20%\r | |
75 | \r | |
76 | #define MIN_TOLERANCE_30 0.7 // -30%\r | |
77 | #define MAX_TOLERANCE_30 1.3 // +30%\r | |
78 | \r | |
79 | #define MIN_TOLERANCE_40 0.6 // -40%\r | |
80 | #define MAX_TOLERANCE_40 1.4 // +40%\r | |
81 | \r | |
82 | #define MIN_TOLERANCE_50 0.5 // -50%\r | |
83 | #define MAX_TOLERANCE_50 1.5 // +50%\r | |
84 | \r | |
85 | #define MIN_TOLERANCE_60 0.4 // -60%\r | |
86 | #define MAX_TOLERANCE_60 1.6 // +60%\r | |
87 | \r | |
9405f84a | 88 | #define MIN_TOLERANCE_70 0.3 // -70%\r |
89 | #define MAX_TOLERANCE_70 1.7 // +70%\r | |
90 | \r | |
fef942f6 | 91 | #define SIRCS_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
92 | #define SIRCS_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
93 | #define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
deba2a0a | 94 | #if IRMP_SUPPORT_NETBOX_PROTOCOL // only 5% to avoid conflict with NETBOX:\r |
08f2dd9d | 95 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r |
deba2a0a | 96 | #else // only 5% + 1 to avoid conflict with RC6:\r |
08f2dd9d | 97 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r |
deba2a0a | 98 | #endif\r |
fef942f6 | 99 | #define SIRCS_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
100 | #define SIRCS_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
101 | #define SIRCS_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
102 | #define SIRCS_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
103 | #define SIRCS_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
104 | #define SIRCS_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
105 | \r | |
93ba2e01 | 106 | #define NEC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r |
107 | #define NEC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
108 | #define NEC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
109 | #define NEC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
110 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
111 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
112 | #define NEC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
113 | #define NEC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
114 | #define NEC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
115 | #define NEC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
116 | #define NEC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
117 | #define NEC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
6db2522c | 118 | // autodetect nec repetition frame within 50 msec:\r |
119 | // NEC seems to send the first repetition frame after 40ms, further repetition frames after 100 ms\r | |
120 | #if 0\r | |
121 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
122 | #else\r | |
123 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r | |
124 | #endif\r | |
fef942f6 | 125 | \r |
126 | #define SAMSUNG_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
127 | #define SAMSUNG_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
128 | #define SAMSUNG_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
129 | #define SAMSUNG_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
5b437ff6 | 130 | #define SAMSUNG_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r |
131 | #define SAMSUNG_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
132 | #define SAMSUNG_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
133 | #define SAMSUNG_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
134 | #define SAMSUNG_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
135 | #define SAMSUNG_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
fef942f6 | 136 | \r |
137 | #define MATSUSHITA_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
138 | #define MATSUSHITA_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
139 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
140 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
141 | #define MATSUSHITA_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
142 | #define MATSUSHITA_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
143 | #define MATSUSHITA_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
144 | #define MATSUSHITA_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
145 | #define MATSUSHITA_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
146 | #define MATSUSHITA_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
147 | \r | |
148 | #define KASEIKYO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
149 | #define KASEIKYO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
150 | #define KASEIKYO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
151 | #define KASEIKYO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
152 | #define KASEIKYO_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)\r | |
770a1a9d | 153 | #define KASEIKYO_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r |
154 | #define KASEIKYO_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
155 | #define KASEIKYO_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
fef942f6 | 156 | #define KASEIKYO_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)\r |
157 | #define KASEIKYO_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
158 | \r | |
e664a9f3 | 159 | #define RECS80_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
160 | #define RECS80_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
fef942f6 | 161 | #define RECS80_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
162 | #define RECS80_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
e664a9f3 | 163 | #define RECS80_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
164 | #define RECS80_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
fef942f6 | 165 | #define RECS80_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
166 | #define RECS80_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
167 | #define RECS80_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
168 | #define RECS80_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
169 | \r | |
3a7e26e1 | 170 | \r |
171 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1 // BOSE conflicts with RC5, so keep tolerance for RC5 minimal here:\r | |
172 | #define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
173 | #define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
174 | #else\r | |
02dbaeff | 175 | #define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
176 | #define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
3a7e26e1 | 177 | #endif\r |
31c1f035 | 178 | \r |
02dbaeff | 179 | #define RC5_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
180 | #define RC5_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
fef942f6 | 181 | \r |
b5ea7869 | 182 | #define DENON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
08f2dd9d | 183 | #define DENON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r |
b5ea7869 | 184 | #define DENON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
185 | #define DENON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
08f2dd9d | 186 | // RUWIDO (see t-home-mediareceiver-15kHz.txt) conflicts here with DENON\r |
187 | #define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
b5ea7869 | 188 | #define DENON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r |
08f2dd9d | 189 | #define DENON_AUTO_REPETITION_PAUSE_LEN ((uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r |
fef942f6 | 190 | \r |
beda975f | 191 | #define THOMSON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
192 | #define THOMSON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
193 | #define THOMSON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
194 | #define THOMSON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
195 | #define THOMSON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
196 | #define THOMSON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
197 | \r | |
fef942f6 | 198 | #define RC6_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
199 | #define RC6_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
200 | #define RC6_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
201 | #define RC6_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
202 | #define RC6_TOGGLE_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
203 | #define RC6_TOGGLE_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
c7a47e89 | 204 | #define RC6_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
31c1f035 | 205 | #define RC6_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_60 + 0.5) + 1) // pulses: 300 - 800\r |
206 | #define RC6_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
207 | #define RC6_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1) // pauses: 300 - 600\r | |
1aee56bc | 208 | \r |
e664a9f3 | 209 | #define RECS80EXT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
210 | #define RECS80EXT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
211 | #define RECS80EXT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
212 | #define RECS80EXT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
213 | #define RECS80EXT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
214 | #define RECS80EXT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
fef942f6 | 215 | #define RECS80EXT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
216 | #define RECS80EXT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
217 | #define RECS80EXT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
218 | #define RECS80EXT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
219 | \r | |
220 | #define NUBERT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
221 | #define NUBERT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
222 | #define NUBERT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
223 | #define NUBERT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
224 | #define NUBERT_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
225 | #define NUBERT_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
226 | #define NUBERT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
227 | #define NUBERT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
228 | #define NUBERT_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
229 | #define NUBERT_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
230 | #define NUBERT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
231 | #define NUBERT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
232 | \r | |
0a2f634b | 233 | #define SPEAKER_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
234 | #define SPEAKER_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
235 | #define SPEAKER_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
236 | #define SPEAKER_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
237 | #define SPEAKER_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
238 | #define SPEAKER_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
239 | #define SPEAKER_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
240 | #define SPEAKER_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
241 | #define SPEAKER_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
242 | #define SPEAKER_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
243 | #define SPEAKER_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
244 | #define SPEAKER_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
245 | \r | |
b5ea7869 | 246 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
247 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
248 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
249 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
250 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
251 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
252 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
253 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
254 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
255 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
256 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
2eab5ec9 | 257 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX ((PAUSE_LEN)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // value must be below IRMP_TIMEOUT\r |
b5ea7869 | 258 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
259 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
260 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
261 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
262 | #define BANG_OLUFSEN_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
263 | #define BANG_OLUFSEN_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
264 | #define BANG_OLUFSEN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
265 | #define BANG_OLUFSEN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
266 | #define BANG_OLUFSEN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
267 | #define BANG_OLUFSEN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
268 | #define BANG_OLUFSEN_R_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
269 | #define BANG_OLUFSEN_R_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
270 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
271 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
504d9df9 | 272 | \r |
89e8cafb | 273 | #define IR60_TIMEOUT_LEN ((uint8_t)(F_INTERRUPTS * IR60_TIMEOUT_TIME * 0.5))\r |
f60c4644 | 274 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
275 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
276 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
277 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
89e8cafb | 278 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) + 1)\r |
279 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
280 | \r | |
281 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
282 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
283 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
284 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
89e8cafb | 285 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
286 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
287 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
288 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
592411d1 | 289 | \r |
a42d1ee6 | 290 | #define FDC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1) // 5%: avoid conflict with NETBOX\r |
291 | #define FDC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
292 | #define FDC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
293 | #define FDC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
6f750020 | 294 | #define FDC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
295 | #define FDC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
296 | #define FDC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
297 | #define FDC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
298 | #if 0\r | |
299 | #define FDC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1) // could be negative: 255\r | |
300 | #else\r | |
301 | #define FDC_0_PAUSE_LEN_MIN (1) // simply use 1\r | |
302 | #endif\r | |
303 | #define FDC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
b5ea7869 | 304 | \r |
9e16d699 | 305 | #define RCCAR_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
306 | #define RCCAR_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
307 | #define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
308 | #define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
48664931 | 309 | #define RCCAR_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
310 | #define RCCAR_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
311 | #define RCCAR_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
312 | #define RCCAR_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
313 | #define RCCAR_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
314 | #define RCCAR_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
9e16d699 | 315 | \r |
770a1a9d | 316 | #define JVC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
317 | #define JVC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
318 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MIN_TOLERANCE_40 + 0.5) - 1) // HACK!\r | |
9405f84a | 319 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MAX_TOLERANCE_70 + 0.5) - 1) // HACK!\r |
770a1a9d | 320 | #define JVC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
321 | #define JVC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
322 | #define JVC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
323 | #define JVC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
324 | #define JVC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
325 | #define JVC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
326 | // autodetect JVC repetition frame within 50 msec:\r | |
327 | #define JVC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
328 | \r | |
9405f84a | 329 | #define NIKON_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
330 | #define NIKON_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
331 | #define NIKON_START_BIT_PAUSE_LEN_MIN ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
332 | #define NIKON_START_BIT_PAUSE_LEN_MAX ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
333 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
334 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
335 | #define NIKON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
336 | #define NIKON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
337 | #define NIKON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
338 | #define NIKON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
339 | #define NIKON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
340 | #define NIKON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
341 | #define NIKON_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
342 | \r | |
111d6191 | 343 | #define KATHREIN_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
344 | #define KATHREIN_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
345 | #define KATHREIN_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
346 | #define KATHREIN_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
347 | #define KATHREIN_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
348 | #define KATHREIN_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
349 | #define KATHREIN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
350 | #define KATHREIN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
351 | #define KATHREIN_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
352 | #define KATHREIN_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
353 | #define KATHREIN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
354 | #define KATHREIN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
355 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
356 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
357 | \r | |
deba2a0a | 358 | #define NETBOX_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
359 | #define NETBOX_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
360 | #define NETBOX_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
361 | #define NETBOX_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
362 | #define NETBOX_PULSE_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME))\r | |
363 | #define NETBOX_PAUSE_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME))\r | |
364 | #define NETBOX_PULSE_REST_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME / 4))\r | |
365 | #define NETBOX_PAUSE_REST_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME / 4))\r | |
366 | \r | |
f50e01e7 | 367 | #define LEGO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
368 | #define LEGO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
369 | #define LEGO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
370 | #define LEGO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
371 | #define LEGO_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
372 | #define LEGO_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
373 | #define LEGO_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
374 | #define LEGO_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
375 | #define LEGO_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
376 | #define LEGO_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
377 | \r | |
3a7e26e1 | 378 | #define BOSE_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r |
379 | #define BOSE_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
380 | #define BOSE_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
381 | #define BOSE_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
382 | #define BOSE_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
383 | #define BOSE_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
384 | #define BOSE_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
385 | #define BOSE_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
386 | #define BOSE_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
387 | #define BOSE_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
388 | #define BOSE_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r | |
389 | \r | |
2fb27bfe | 390 | #define A1TVBOX_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
391 | #define A1TVBOX_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
392 | #define A1TVBOX_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
393 | #define A1TVBOX_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
394 | #define A1TVBOX_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
395 | #define A1TVBOX_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
396 | #define A1TVBOX_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
397 | #define A1TVBOX_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
398 | \r | |
b85cb27d | 399 | #define ORTEK_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
400 | #define ORTEK_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
401 | #define ORTEK_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
402 | #define ORTEK_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
40ca4604 | 403 | #define ORTEK_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
404 | #define ORTEK_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
405 | #define ORTEK_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
406 | #define ORTEK_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
b85cb27d | 407 | \r |
408 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
409 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
410 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
411 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MAX_TOLERANCE_10 + 0.5) - 1)\r | |
412 | #define TELEFUNKEN_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
413 | #define TELEFUNKEN_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
414 | #define TELEFUNKEN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
415 | #define TELEFUNKEN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
416 | #define TELEFUNKEN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
417 | #define TELEFUNKEN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
418 | // autodetect TELEFUNKEN repetition frame within 50 msec:\r | |
419 | // #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
420 | \r | |
40ca4604 | 421 | #define ROOMBA_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
422 | #define ROOMBA_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
423 | #define ROOMBA_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
424 | #define ROOMBA_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
cb93f9e9 | 425 | #define ROOMBA_1_PAUSE_LEN_EXACT ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5))\r |
40ca4604 | 426 | #define ROOMBA_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
427 | #define ROOMBA_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
428 | #define ROOMBA_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
429 | #define ROOMBA_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
430 | #define ROOMBA_0_PAUSE_LEN ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME))\r | |
431 | #define ROOMBA_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
432 | #define ROOMBA_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
433 | #define ROOMBA_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
434 | #define ROOMBA_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
435 | \r | |
faf6479d | 436 | #define RCMM32_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r |
437 | #define RCMM32_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
438 | #define RCMM32_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
439 | #define RCMM32_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
440 | #define RCMM32_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
441 | #define RCMM32_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
442 | #define RCMM32_BIT_00_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
443 | #define RCMM32_BIT_00_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
444 | #define RCMM32_BIT_01_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
445 | #define RCMM32_BIT_01_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
446 | #define RCMM32_BIT_10_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
447 | #define RCMM32_BIT_10_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
448 | #define RCMM32_BIT_11_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
449 | #define RCMM32_BIT_11_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
450 | \r | |
451 | #define RADIO1_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RADIO1_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
452 | #define RADIO1_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RADIO1_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
453 | #define RADIO1_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RADIO1_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
454 | #define RADIO1_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RADIO1_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
455 | #define RADIO1_1_PAUSE_LEN_EXACT ((uint8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME + 0.5))\r | |
456 | #define RADIO1_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RADIO1_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
457 | #define RADIO1_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RADIO1_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
458 | #define RADIO1_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
459 | #define RADIO1_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
460 | #define RADIO1_0_PAUSE_LEN ((uint8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME))\r | |
461 | #define RADIO1_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RADIO1_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
462 | #define RADIO1_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RADIO1_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
463 | #define RADIO1_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
464 | #define RADIO1_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
cb93f9e9 | 465 | \r |
d155e9ab | 466 | #define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!\r |
4225a882 | 467 | \r |
48664931 | 468 | #ifdef ANALYZE\r |
08f2dd9d | 469 | # define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }\r |
470 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r | |
471 | # define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r | |
775fabfa | 472 | # define ANALYZE_ONLY_NORMAL_PRINTF(...) { if (! silent && !verbose) { printf (__VA_ARGS__); } }\r |
08f2dd9d | 473 | # define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }\r |
7644ac04 | 474 | static int silent;\r |
475 | static int time_counter;\r | |
476 | static int verbose;\r | |
4225a882 | 477 | #else\r |
08f2dd9d | 478 | # define ANALYZE_PUTCHAR(a)\r |
479 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a)\r | |
480 | # define ANALYZE_PRINTF(...)\r | |
775fabfa | 481 | # define ANALYZE_ONLY_NORMAL_PRINTF(...)\r |
08f2dd9d | 482 | # define ANALYZE_NEWLINE()\r |
4225a882 | 483 | #endif\r |
484 | \r | |
7644ac04 | 485 | #if IRMP_USE_CALLBACK == 1\r |
486 | static void (*irmp_callback_ptr) (uint8_t);\r | |
487 | #endif // IRMP_USE_CALLBACK == 1\r | |
488 | \r | |
40ca4604 | 489 | #define PARITY_CHECK_OK 1\r |
490 | #define PARITY_CHECK_FAILED 0\r | |
491 | \r | |
1f54e86c | 492 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
493 | * Protocol names\r | |
494 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
495 | */\r | |
775fabfa | 496 | #if defined(UNIX_OR_WINDOWS) || IRMP_PROTOCOL_NAMES == 1\r |
1f54e86c | 497 | char *\r |
498 | irmp_protocol_names[IRMP_N_PROTOCOLS + 1] =\r | |
499 | {\r | |
500 | "UNKNOWN",\r | |
501 | "SIRCS",\r | |
502 | "NEC",\r | |
503 | "SAMSUNG",\r | |
504 | "MATSUSH",\r | |
505 | "KASEIKYO",\r | |
506 | "RECS80",\r | |
507 | "RC5",\r | |
508 | "DENON",\r | |
509 | "RC6",\r | |
510 | "SAMSG32",\r | |
511 | "APPLE",\r | |
512 | "RECS80EX",\r | |
513 | "NUBERT",\r | |
514 | "BANG OLU",\r | |
515 | "GRUNDIG",\r | |
516 | "NOKIA",\r | |
517 | "SIEMENS",\r | |
518 | "FDC",\r | |
519 | "RCCAR",\r | |
520 | "JVC",\r | |
521 | "RC6A",\r | |
522 | "NIKON",\r | |
523 | "RUWIDO",\r | |
524 | "IR60",\r | |
525 | "KATHREIN",\r | |
526 | "NETBOX",\r | |
527 | "NEC16",\r | |
528 | "NEC42",\r | |
529 | "LEGO",\r | |
3a7e26e1 | 530 | "THOMSON",\r |
2fb27bfe | 531 | "BOSE",\r |
532 | "A1TVBOX",\r | |
b85cb27d | 533 | "ORTEK",\r |
40ca4604 | 534 | "TELEFUNKEN",\r |
cb93f9e9 | 535 | "ROOMBA",\r |
536 | "RCMM32",\r | |
537 | "RCMM24",\r | |
faf6479d | 538 | "RCMM12",\r |
0a2f634b | 539 | "SPEAKER",\r |
faf6479d | 540 | "RADIO1"\r |
1f54e86c | 541 | };\r |
40ca4604 | 542 | \r |
1f54e86c | 543 | #endif\r |
544 | \r | |
545 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
546 | * Logging\r | |
547 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
548 | */\r | |
6c3c57e6 | 549 | #if IRMP_LOGGING == 1 // logging via UART\r |
550 | \r | |
551 | #if IRMP_EXT_LOGGING == 1 // use external logging\r | |
552 | #include "irmpextlog.h"\r | |
553 | #else // normal UART log (IRMP_EXT_LOGGING == 0)\r | |
879b06c2 | 554 | #define BAUD 9600L\r |
775fabfa | 555 | #ifndef UNIX_OR_WINDOWS\r |
879b06c2 | 556 | #include <util/setbaud.h>\r |
775fabfa | 557 | #endif\r |
879b06c2 | 558 | \r |
559 | #ifdef UBRR0H\r | |
560 | \r | |
561 | #define UART0_UBRRH UBRR0H\r | |
562 | #define UART0_UBRRL UBRR0L\r | |
563 | #define UART0_UCSRA UCSR0A\r | |
564 | #define UART0_UCSRB UCSR0B\r | |
565 | #define UART0_UCSRC UCSR0C\r | |
566 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)\r | |
567 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)\r | |
568 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)\r | |
569 | #ifdef URSEL0\r | |
570 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)\r | |
571 | #else\r | |
572 | #define UART0_URSEL_BIT_VALUE (0)\r | |
573 | #endif\r | |
574 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r | |
e92413eb | 575 | #define UART0_UDR UDR0\r |
c7a47e89 | 576 | #define UART0_U2X U2X0\r |
cea96148 | 577 | \r |
879b06c2 | 578 | #else\r |
4225a882 | 579 | \r |
879b06c2 | 580 | #define UART0_UBRRH UBRRH\r |
581 | #define UART0_UBRRL UBRRL\r | |
582 | #define UART0_UCSRA UCSRA\r | |
583 | #define UART0_UCSRB UCSRB\r | |
584 | #define UART0_UCSRC UCSRC\r | |
585 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)\r | |
586 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)\r | |
587 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)\r | |
588 | #ifdef URSEL\r | |
589 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)\r | |
590 | #else\r | |
591 | #define UART0_URSEL_BIT_VALUE (0)\r | |
592 | #endif\r | |
593 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)\r | |
e92413eb | 594 | #define UART0_UDR UDR\r |
c7a47e89 | 595 | #define UART0_U2X U2X\r |
4225a882 | 596 | \r |
6c3c57e6 | 597 | #endif //UBRR0H\r |
598 | #endif //IRMP_EXT_LOGGING\r | |
4225a882 | 599 | \r |
4225a882 | 600 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
601 | * Initialize UART\r | |
602 | * @details Initializes UART\r | |
603 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
604 | */\r | |
605 | void\r | |
606 | irmp_uart_init (void)\r | |
607 | {\r | |
775fabfa | 608 | #ifndef UNIX_OR_WINDOWS\r |
6c3c57e6 | 609 | #if (IRMP_EXT_LOGGING == 0) // use UART\r |
879b06c2 | 610 | UART0_UBRRH = UBRRH_VALUE; // set baud rate\r |
611 | UART0_UBRRL = UBRRL_VALUE;\r | |
612 | \r | |
613 | #if USE_2X\r | |
c7a47e89 | 614 | UART0_UCSRA |= (1<<UART0_U2X);\r |
879b06c2 | 615 | #else\r |
c7a47e89 | 616 | UART0_UCSRA &= ~(1<<UART0_U2X);\r |
879b06c2 | 617 | #endif\r |
618 | \r | |
619 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;\r | |
620 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX\r | |
6c3c57e6 | 621 | #else // other log method\r |
cea96148 | 622 | initextlog(); \r |
6c3c57e6 | 623 | #endif //IRMP_EXT_LOGGING\r |
775fabfa | 624 | #endif // UNIX_OR_WINDOWS\r |
4225a882 | 625 | }\r |
626 | \r | |
627 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
628 | * Send character\r | |
629 | * @details Sends character\r | |
630 | * @param ch character to be transmitted\r | |
631 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
632 | */\r | |
633 | void\r | |
634 | irmp_uart_putc (unsigned char ch)\r | |
635 | {\r | |
775fabfa | 636 | #ifndef UNIX_OR_WINDOWS\r |
6c3c57e6 | 637 | #if (IRMP_EXT_LOGGING == 0)\r |
879b06c2 | 638 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))\r |
4225a882 | 639 | {\r |
640 | ;\r | |
641 | }\r | |
642 | \r | |
879b06c2 | 643 | UART0_UDR = ch;\r |
6c3c57e6 | 644 | #else\r |
645 | sendextlog(ch); //Use external log\r | |
646 | #endif\r | |
775fabfa | 647 | #else\r |
648 | fputc (ch, stderr);\r | |
649 | #endif // UNIX_OR_WINDOWS\r | |
4225a882 | 650 | }\r |
651 | \r | |
652 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
653 | * Log IR signal\r | |
654 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
655 | */\r | |
d155e9ab | 656 | \r |
657 | #define STARTCYCLES 2 // min count of zeros before start of logging\r | |
658 | #define ENDBITS 1000 // number of sequenced highbits to detect end\r | |
659 | #define DATALEN 700 // log buffer size\r | |
4225a882 | 660 | \r |
775fabfa | 661 | #if 0 // old log routine\r |
662 | \r | |
4225a882 | 663 | static void\r |
d155e9ab | 664 | irmp_log (uint8_t val)\r |
4225a882 | 665 | {\r |
d155e9ab | 666 | static uint8_t buf[DATALEN]; // logging buffer\r |
667 | static uint16_t buf_idx; // number of written bits\r | |
668 | static uint8_t startcycles; // current number of start-zeros\r | |
669 | static uint16_t cnt; // counts sequenced highbits - to detect end\r | |
4225a882 | 670 | \r |
d155e9ab | 671 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r |
4225a882 | 672 | {\r |
d155e9ab | 673 | startcycles++;\r |
4225a882 | 674 | }\r |
675 | else\r | |
676 | {\r | |
d155e9ab | 677 | startcycles = 0;\r |
4225a882 | 678 | \r |
d155e9ab | 679 | if (! val || (val && buf_idx != 0)) // start or continue logging on "0", "1" cannot init logging\r |
4225a882 | 680 | {\r |
d155e9ab | 681 | if (buf_idx < DATALEN * 8) // index in range?\r |
682 | { // yes\r | |
683 | if (val)\r | |
684 | {\r | |
685 | buf[(buf_idx / 8)] |= (1<<(buf_idx % 8)); // set bit\r | |
686 | }\r | |
687 | else\r | |
688 | {\r | |
689 | buf[(buf_idx / 8)] &= ~(1<<(buf_idx % 8)); // reset bit\r | |
690 | }\r | |
4225a882 | 691 | \r |
d155e9ab | 692 | buf_idx++;\r |
693 | }\r | |
4225a882 | 694 | \r |
695 | if (val)\r | |
46dd89b7 | 696 | { // if high received then look at log-stop condition\r |
d155e9ab | 697 | cnt++;\r |
4225a882 | 698 | \r |
d155e9ab | 699 | if (cnt > ENDBITS)\r |
700 | { // if stop condition is true, output on uart\r | |
4225a882 | 701 | uint16_t i;\r |
702 | \r | |
d155e9ab | 703 | for (i = 0; i < STARTCYCLES; i++)\r |
4225a882 | 704 | {\r |
46dd89b7 | 705 | irmp_uart_putc ('0'); // the ignored starting zeros\r |
4225a882 | 706 | }\r |
707 | \r | |
d155e9ab | 708 | for (i = 0; i < (buf_idx - ENDBITS + 20) / 8; i++) // transform bitset into uart chars\r |
4225a882 | 709 | {\r |
d155e9ab | 710 | uint8_t d = buf[i];\r |
4225a882 | 711 | uint8_t j;\r |
712 | \r | |
d155e9ab | 713 | for (j = 0; j < 8; j++)\r |
4225a882 | 714 | {\r |
715 | irmp_uart_putc ((d & 1) + '0');\r | |
716 | d >>= 1;\r | |
717 | }\r | |
718 | }\r | |
719 | \r | |
720 | irmp_uart_putc ('\n');\r | |
d155e9ab | 721 | buf_idx = 0;\r |
4225a882 | 722 | }\r |
723 | }\r | |
724 | else\r | |
725 | {\r | |
d155e9ab | 726 | cnt = 0;\r |
4225a882 | 727 | }\r |
728 | }\r | |
729 | }\r | |
730 | }\r | |
731 | \r | |
775fabfa | 732 | #else // new log routine\r |
733 | \r | |
734 | static void\r | |
735 | irmp_log (uint8_t val)\r | |
736 | {\r | |
737 | static uint8_t buf[DATALEN]; // logging buffer\r | |
738 | static uint16_t buf_idx; // index\r | |
739 | static uint8_t startcycles; // current number of start-zeros\r | |
740 | static uint16_t cnt; // counts sequenced highbits - to detect end\r | |
741 | static uint8_t last_val = 1;\r | |
742 | \r | |
743 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r | |
744 | {\r | |
745 | startcycles++;\r | |
746 | }\r | |
747 | else\r | |
748 | {\r | |
749 | startcycles = 0;\r | |
750 | \r | |
751 | if (! val || buf_idx != 0) // start or continue logging on "0", "1" cannot init logging\r | |
752 | {\r | |
753 | if (last_val == val)\r | |
754 | {\r | |
755 | cnt++;\r | |
756 | \r | |
757 | if (val && cnt > ENDBITS) // if high received then look at log-stop condition\r | |
758 | { // if stop condition is true, output on uart\r | |
759 | uint8_t i8;\r | |
760 | uint16_t i;\r | |
761 | uint16_t j;\r | |
762 | uint8_t v = '1';\r | |
763 | uint16_t d;\r | |
764 | \r | |
765 | for (i8 = 0; i8 < STARTCYCLES; i8++)\r | |
766 | {\r | |
767 | irmp_uart_putc ('0'); // the ignored starting zeros\r | |
768 | }\r | |
769 | \r | |
770 | for (i = 0; i < buf_idx; i++)\r | |
771 | {\r | |
772 | d = buf[i];\r | |
773 | \r | |
774 | if (d == 0xff)\r | |
775 | {\r | |
776 | i++;\r | |
777 | d = buf[i];\r | |
778 | i++;\r | |
779 | d |= ((uint16_t) buf[i] << 8);\r | |
780 | }\r | |
781 | \r | |
782 | for (j = 0; j < d; j++)\r | |
783 | {\r | |
784 | irmp_uart_putc (v);\r | |
785 | }\r | |
786 | \r | |
787 | v = (v == '1') ? '0' : '1';\r | |
788 | }\r | |
789 | \r | |
790 | for (i8 = 0; i8 < 20; i8++)\r | |
791 | {\r | |
792 | irmp_uart_putc ('1');\r | |
793 | }\r | |
794 | \r | |
795 | irmp_uart_putc ('\n');\r | |
796 | buf_idx = 0;\r | |
797 | last_val = 1;\r | |
798 | cnt = 0;\r | |
799 | }\r | |
800 | }\r | |
801 | else if (buf_idx < DATALEN - 3)\r | |
802 | {\r | |
803 | if (cnt >= 0xff)\r | |
804 | {\r | |
805 | buf[buf_idx++] = 0xff;\r | |
806 | buf[buf_idx++] = (cnt & 0xff);\r | |
807 | buf[buf_idx] = (cnt >> 8);\r | |
808 | }\r | |
809 | else\r | |
810 | {\r | |
811 | buf[buf_idx] = cnt;\r | |
812 | }\r | |
813 | \r | |
814 | buf_idx++;\r | |
815 | cnt = 1;\r | |
816 | last_val = val;\r | |
817 | }\r | |
818 | }\r | |
819 | }\r | |
820 | }\r | |
821 | \r | |
822 | #endif\r | |
823 | \r | |
4225a882 | 824 | #else\r |
d155e9ab | 825 | #define irmp_log(val)\r |
6c3c57e6 | 826 | #endif //IRMP_LOGGING\r |
4225a882 | 827 | \r |
828 | typedef struct\r | |
829 | {\r | |
830 | uint8_t protocol; // ir protocol\r | |
831 | uint8_t pulse_1_len_min; // minimum length of pulse with bit value 1\r | |
832 | uint8_t pulse_1_len_max; // maximum length of pulse with bit value 1\r | |
833 | uint8_t pause_1_len_min; // minimum length of pause with bit value 1\r | |
834 | uint8_t pause_1_len_max; // maximum length of pause with bit value 1\r | |
835 | uint8_t pulse_0_len_min; // minimum length of pulse with bit value 0\r | |
836 | uint8_t pulse_0_len_max; // maximum length of pulse with bit value 0\r | |
837 | uint8_t pause_0_len_min; // minimum length of pause with bit value 0\r | |
838 | uint8_t pause_0_len_max; // maximum length of pause with bit value 0\r | |
839 | uint8_t address_offset; // address offset\r | |
840 | uint8_t address_end; // end of address\r | |
841 | uint8_t command_offset; // command offset\r | |
842 | uint8_t command_end; // end of command\r | |
843 | uint8_t complete_len; // complete length of frame\r | |
844 | uint8_t stop_bit; // flag: frame has stop bit\r | |
845 | uint8_t lsb_first; // flag: LSB first\r | |
77f488bb | 846 | uint8_t flags; // some flags\r |
4225a882 | 847 | } IRMP_PARAMETER;\r |
848 | \r | |
849 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
850 | \r | |
63b94f48 | 851 | static const PROGMEM IRMP_PARAMETER sircs_param =\r |
4225a882 | 852 | {\r |
d155e9ab | 853 | IRMP_SIRCS_PROTOCOL, // protocol: ir protocol\r |
854 | SIRCS_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
855 | SIRCS_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
856 | SIRCS_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
857 | SIRCS_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
858 | SIRCS_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
859 | SIRCS_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
860 | SIRCS_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
861 | SIRCS_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
862 | SIRCS_ADDRESS_OFFSET, // address_offset: address offset\r | |
863 | SIRCS_ADDRESS_OFFSET + SIRCS_ADDRESS_LEN, // address_end: end of address\r | |
864 | SIRCS_COMMAND_OFFSET, // command_offset: command offset\r | |
865 | SIRCS_COMMAND_OFFSET + SIRCS_COMMAND_LEN, // command_end: end of command\r | |
866 | SIRCS_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
867 | SIRCS_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 868 | SIRCS_LSB, // lsb_first: flag: LSB first\r |
869 | SIRCS_FLAGS // flags: some flags\r | |
4225a882 | 870 | };\r |
871 | \r | |
872 | #endif\r | |
873 | \r | |
874 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
875 | \r | |
63b94f48 | 876 | static const PROGMEM IRMP_PARAMETER nec_param =\r |
4225a882 | 877 | {\r |
d155e9ab | 878 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
879 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
880 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
881 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
882 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
883 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
884 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
885 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
886 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
887 | NEC_ADDRESS_OFFSET, // address_offset: address offset\r | |
888 | NEC_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address\r | |
889 | NEC_COMMAND_OFFSET, // command_offset: command offset\r | |
890 | NEC_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command\r | |
891 | NEC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
892 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 893 | NEC_LSB, // lsb_first: flag: LSB first\r |
894 | NEC_FLAGS // flags: some flags\r | |
4225a882 | 895 | };\r |
896 | \r | |
63b94f48 | 897 | static const PROGMEM IRMP_PARAMETER nec_rep_param =\r |
46dd89b7 | 898 | {\r |
d155e9ab | 899 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
900 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
901 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
902 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
903 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
904 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
905 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
906 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
907 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
908 | 0, // address_offset: address offset\r | |
909 | 0, // address_end: end of address\r | |
910 | 0, // command_offset: command offset\r | |
911 | 0, // command_end: end of command\r | |
912 | 0, // complete_len: complete length of frame\r | |
913 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 914 | NEC_LSB, // lsb_first: flag: LSB first\r |
915 | NEC_FLAGS // flags: some flags\r | |
46dd89b7 | 916 | };\r |
917 | \r | |
4225a882 | 918 | #endif\r |
919 | \r | |
35213800 | 920 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
fc80d688 | 921 | \r |
63b94f48 | 922 | static const PROGMEM IRMP_PARAMETER nec42_param =\r |
fc80d688 | 923 | {\r |
35213800 | 924 | IRMP_NEC42_PROTOCOL, // protocol: ir protocol\r |
fc80d688 | 925 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r |
926 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
927 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
928 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
929 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
930 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
931 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
932 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
35213800 | 933 | NEC42_ADDRESS_OFFSET, // address_offset: address offset\r |
7644ac04 | 934 | NEC42_ADDRESS_OFFSET + NEC42_ADDRESS_LEN, // address_end: end of address\r |
35213800 | 935 | NEC42_COMMAND_OFFSET, // command_offset: command offset\r |
7644ac04 | 936 | NEC42_COMMAND_OFFSET + NEC42_COMMAND_LEN, // command_end: end of command\r |
35213800 | 937 | NEC42_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r |
938 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
939 | NEC_LSB, // lsb_first: flag: LSB first\r | |
940 | NEC_FLAGS // flags: some flags\r | |
fc80d688 | 941 | };\r |
942 | \r | |
943 | #endif\r | |
944 | \r | |
4225a882 | 945 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
946 | \r | |
63b94f48 | 947 | static const PROGMEM IRMP_PARAMETER samsung_param =\r |
4225a882 | 948 | {\r |
d155e9ab | 949 | IRMP_SAMSUNG_PROTOCOL, // protocol: ir protocol\r |
950 | SAMSUNG_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
951 | SAMSUNG_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
952 | SAMSUNG_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
953 | SAMSUNG_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
954 | SAMSUNG_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
955 | SAMSUNG_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
956 | SAMSUNG_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
957 | SAMSUNG_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
958 | SAMSUNG_ADDRESS_OFFSET, // address_offset: address offset\r | |
959 | SAMSUNG_ADDRESS_OFFSET + SAMSUNG_ADDRESS_LEN, // address_end: end of address\r | |
960 | SAMSUNG_COMMAND_OFFSET, // command_offset: command offset\r | |
961 | SAMSUNG_COMMAND_OFFSET + SAMSUNG_COMMAND_LEN, // command_end: end of command\r | |
962 | SAMSUNG_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
963 | SAMSUNG_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 964 | SAMSUNG_LSB, // lsb_first: flag: LSB first\r |
965 | SAMSUNG_FLAGS // flags: some flags\r | |
4225a882 | 966 | };\r |
967 | \r | |
968 | #endif\r | |
969 | \r | |
b85cb27d | 970 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
971 | \r | |
972 | static const PROGMEM IRMP_PARAMETER telefunken_param =\r | |
973 | {\r | |
974 | IRMP_TELEFUNKEN_PROTOCOL, // protocol: ir protocol\r | |
975 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
976 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
977 | TELEFUNKEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
978 | TELEFUNKEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
979 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
980 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
981 | TELEFUNKEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
982 | TELEFUNKEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
983 | TELEFUNKEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
984 | TELEFUNKEN_ADDRESS_OFFSET + TELEFUNKEN_ADDRESS_LEN, // address_end: end of address\r | |
985 | TELEFUNKEN_COMMAND_OFFSET, // command_offset: command offset\r | |
986 | TELEFUNKEN_COMMAND_OFFSET + TELEFUNKEN_COMMAND_LEN, // command_end: end of command\r | |
987 | TELEFUNKEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
988 | TELEFUNKEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
989 | TELEFUNKEN_LSB, // lsb_first: flag: LSB first\r | |
990 | TELEFUNKEN_FLAGS // flags: some flags\r | |
991 | };\r | |
992 | \r | |
993 | #endif\r | |
994 | \r | |
4225a882 | 995 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
996 | \r | |
63b94f48 | 997 | static const PROGMEM IRMP_PARAMETER matsushita_param =\r |
4225a882 | 998 | {\r |
d155e9ab | 999 | IRMP_MATSUSHITA_PROTOCOL, // protocol: ir protocol\r |
1000 | MATSUSHITA_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1001 | MATSUSHITA_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1002 | MATSUSHITA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1003 | MATSUSHITA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1004 | MATSUSHITA_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1005 | MATSUSHITA_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1006 | MATSUSHITA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1007 | MATSUSHITA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1008 | MATSUSHITA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1009 | MATSUSHITA_ADDRESS_OFFSET + MATSUSHITA_ADDRESS_LEN, // address_end: end of address\r | |
1010 | MATSUSHITA_COMMAND_OFFSET, // command_offset: command offset\r | |
1011 | MATSUSHITA_COMMAND_OFFSET + MATSUSHITA_COMMAND_LEN, // command_end: end of command\r | |
1012 | MATSUSHITA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1013 | MATSUSHITA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1014 | MATSUSHITA_LSB, // lsb_first: flag: LSB first\r |
1015 | MATSUSHITA_FLAGS // flags: some flags\r | |
4225a882 | 1016 | };\r |
1017 | \r | |
1018 | #endif\r | |
1019 | \r | |
1020 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1021 | \r | |
63b94f48 | 1022 | static const PROGMEM IRMP_PARAMETER kaseikyo_param =\r |
4225a882 | 1023 | {\r |
d155e9ab | 1024 | IRMP_KASEIKYO_PROTOCOL, // protocol: ir protocol\r |
1025 | KASEIKYO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1026 | KASEIKYO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1027 | KASEIKYO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1028 | KASEIKYO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1029 | KASEIKYO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1030 | KASEIKYO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1031 | KASEIKYO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1032 | KASEIKYO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1033 | KASEIKYO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1034 | KASEIKYO_ADDRESS_OFFSET + KASEIKYO_ADDRESS_LEN, // address_end: end of address\r | |
1035 | KASEIKYO_COMMAND_OFFSET, // command_offset: command offset\r | |
1036 | KASEIKYO_COMMAND_OFFSET + KASEIKYO_COMMAND_LEN, // command_end: end of command\r | |
1037 | KASEIKYO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1038 | KASEIKYO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1039 | KASEIKYO_LSB, // lsb_first: flag: LSB first\r |
1040 | KASEIKYO_FLAGS // flags: some flags\r | |
4225a882 | 1041 | };\r |
1042 | \r | |
1043 | #endif\r | |
1044 | \r | |
1045 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r | |
1046 | \r | |
63b94f48 | 1047 | static const PROGMEM IRMP_PARAMETER recs80_param =\r |
4225a882 | 1048 | {\r |
d155e9ab | 1049 | IRMP_RECS80_PROTOCOL, // protocol: ir protocol\r |
1050 | RECS80_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1051 | RECS80_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1052 | RECS80_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1053 | RECS80_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1054 | RECS80_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1055 | RECS80_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1056 | RECS80_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1057 | RECS80_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1058 | RECS80_ADDRESS_OFFSET, // address_offset: address offset\r | |
1059 | RECS80_ADDRESS_OFFSET + RECS80_ADDRESS_LEN, // address_end: end of address\r | |
1060 | RECS80_COMMAND_OFFSET, // command_offset: command offset\r | |
1061 | RECS80_COMMAND_OFFSET + RECS80_COMMAND_LEN, // command_end: end of command\r | |
1062 | RECS80_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1063 | RECS80_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1064 | RECS80_LSB, // lsb_first: flag: LSB first\r |
1065 | RECS80_FLAGS // flags: some flags\r | |
4225a882 | 1066 | };\r |
1067 | \r | |
1068 | #endif\r | |
1069 | \r | |
1070 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1071 | \r | |
63b94f48 | 1072 | static const PROGMEM IRMP_PARAMETER rc5_param =\r |
4225a882 | 1073 | {\r |
d155e9ab | 1074 | IRMP_RC5_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1075 | RC5_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1076 | RC5_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1077 | RC5_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1078 | RC5_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1079 | 0, // pulse_0_len_min: here: not used\r |
1080 | 0, // pulse_0_len_max: here: not used\r | |
1081 | 0, // pause_0_len_min: here: not used\r | |
1082 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1083 | RC5_ADDRESS_OFFSET, // address_offset: address offset\r |
1084 | RC5_ADDRESS_OFFSET + RC5_ADDRESS_LEN, // address_end: end of address\r | |
1085 | RC5_COMMAND_OFFSET, // command_offset: command offset\r | |
1086 | RC5_COMMAND_OFFSET + RC5_COMMAND_LEN, // command_end: end of command\r | |
1087 | RC5_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1088 | RC5_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1089 | RC5_LSB, // lsb_first: flag: LSB first\r |
1090 | RC5_FLAGS // flags: some flags\r | |
4225a882 | 1091 | };\r |
1092 | \r | |
1093 | #endif\r | |
1094 | \r | |
1095 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
1096 | \r | |
63b94f48 | 1097 | static const PROGMEM IRMP_PARAMETER denon_param =\r |
4225a882 | 1098 | {\r |
d155e9ab | 1099 | IRMP_DENON_PROTOCOL, // protocol: ir protocol\r |
1100 | DENON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1101 | DENON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1102 | DENON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1103 | DENON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1104 | DENON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1105 | DENON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1106 | DENON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1107 | DENON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1108 | DENON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1109 | DENON_ADDRESS_OFFSET + DENON_ADDRESS_LEN, // address_end: end of address\r | |
1110 | DENON_COMMAND_OFFSET, // command_offset: command offset\r | |
1111 | DENON_COMMAND_OFFSET + DENON_COMMAND_LEN, // command_end: end of command\r | |
1112 | DENON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1113 | DENON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1114 | DENON_LSB, // lsb_first: flag: LSB first\r |
1115 | DENON_FLAGS // flags: some flags\r | |
4225a882 | 1116 | };\r |
1117 | \r | |
1118 | #endif\r | |
1119 | \r | |
1120 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
1121 | \r | |
63b94f48 | 1122 | static const PROGMEM IRMP_PARAMETER rc6_param =\r |
4225a882 | 1123 | {\r |
d155e9ab | 1124 | IRMP_RC6_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1125 | \r |
1126 | RC6_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1127 | RC6_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1128 | RC6_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1129 | RC6_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1130 | 0, // pulse_0_len_min: here: not used\r |
1131 | 0, // pulse_0_len_max: here: not used\r | |
1132 | 0, // pause_0_len_min: here: not used\r | |
1133 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1134 | RC6_ADDRESS_OFFSET, // address_offset: address offset\r |
1135 | RC6_ADDRESS_OFFSET + RC6_ADDRESS_LEN, // address_end: end of address\r | |
1136 | RC6_COMMAND_OFFSET, // command_offset: command offset\r | |
1137 | RC6_COMMAND_OFFSET + RC6_COMMAND_LEN, // command_end: end of command\r | |
1138 | RC6_COMPLETE_DATA_LEN_SHORT, // complete_len: complete length of frame\r | |
1139 | RC6_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1140 | RC6_LSB, // lsb_first: flag: LSB first\r |
1141 | RC6_FLAGS // flags: some flags\r | |
4225a882 | 1142 | };\r |
1143 | \r | |
1144 | #endif\r | |
1145 | \r | |
1146 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
1147 | \r | |
63b94f48 | 1148 | static const PROGMEM IRMP_PARAMETER recs80ext_param =\r |
4225a882 | 1149 | {\r |
d155e9ab | 1150 | IRMP_RECS80EXT_PROTOCOL, // protocol: ir protocol\r |
1151 | RECS80EXT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1152 | RECS80EXT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1153 | RECS80EXT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1154 | RECS80EXT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1155 | RECS80EXT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1156 | RECS80EXT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1157 | RECS80EXT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1158 | RECS80EXT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1159 | RECS80EXT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1160 | RECS80EXT_ADDRESS_OFFSET + RECS80EXT_ADDRESS_LEN, // address_end: end of address\r | |
1161 | RECS80EXT_COMMAND_OFFSET, // command_offset: command offset\r | |
1162 | RECS80EXT_COMMAND_OFFSET + RECS80EXT_COMMAND_LEN, // command_end: end of command\r | |
1163 | RECS80EXT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1164 | RECS80EXT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1165 | RECS80EXT_LSB, // lsb_first: flag: LSB first\r |
1166 | RECS80EXT_FLAGS // flags: some flags\r | |
4225a882 | 1167 | };\r |
1168 | \r | |
1169 | #endif\r | |
1170 | \r | |
504d9df9 | 1171 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r |
4225a882 | 1172 | \r |
63b94f48 | 1173 | static const PROGMEM IRMP_PARAMETER nubert_param =\r |
4225a882 | 1174 | {\r |
d155e9ab | 1175 | IRMP_NUBERT_PROTOCOL, // protocol: ir protocol\r |
1176 | NUBERT_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1177 | NUBERT_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1178 | NUBERT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1179 | NUBERT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1180 | NUBERT_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1181 | NUBERT_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1182 | NUBERT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1183 | NUBERT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1184 | NUBERT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1185 | NUBERT_ADDRESS_OFFSET + NUBERT_ADDRESS_LEN, // address_end: end of address\r | |
1186 | NUBERT_COMMAND_OFFSET, // command_offset: command offset\r | |
1187 | NUBERT_COMMAND_OFFSET + NUBERT_COMMAND_LEN, // command_end: end of command\r | |
1188 | NUBERT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1189 | NUBERT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1190 | NUBERT_LSB, // lsb_first: flag: LSB first\r |
1191 | NUBERT_FLAGS // flags: some flags\r | |
4225a882 | 1192 | };\r |
1193 | \r | |
1194 | #endif\r | |
1195 | \r | |
0a2f634b | 1196 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
1197 | \r | |
1198 | static const PROGMEM IRMP_PARAMETER speaker_param =\r | |
1199 | {\r | |
1200 | IRMP_SPEAKER_PROTOCOL, // protocol: ir protocol\r | |
1201 | SPEAKER_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1202 | SPEAKER_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1203 | SPEAKER_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1204 | SPEAKER_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1205 | SPEAKER_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1206 | SPEAKER_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1207 | SPEAKER_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1208 | SPEAKER_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1209 | SPEAKER_ADDRESS_OFFSET, // address_offset: address offset\r | |
1210 | SPEAKER_ADDRESS_OFFSET + SPEAKER_ADDRESS_LEN, // address_end: end of address\r | |
1211 | SPEAKER_COMMAND_OFFSET, // command_offset: command offset\r | |
1212 | SPEAKER_COMMAND_OFFSET + SPEAKER_COMMAND_LEN, // command_end: end of command\r | |
1213 | SPEAKER_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1214 | SPEAKER_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1215 | SPEAKER_LSB, // lsb_first: flag: LSB first\r | |
1216 | SPEAKER_FLAGS // flags: some flags\r | |
1217 | };\r | |
1218 | \r | |
1219 | #endif\r | |
1220 | \r | |
504d9df9 | 1221 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
1222 | \r | |
63b94f48 | 1223 | static const PROGMEM IRMP_PARAMETER bang_olufsen_param =\r |
504d9df9 | 1224 | {\r |
d155e9ab | 1225 | IRMP_BANG_OLUFSEN_PROTOCOL, // protocol: ir protocol\r |
1226 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1227 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1228 | BANG_OLUFSEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1229 | BANG_OLUFSEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1230 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1231 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1232 | BANG_OLUFSEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1233 | BANG_OLUFSEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1234 | BANG_OLUFSEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1235 | BANG_OLUFSEN_ADDRESS_OFFSET + BANG_OLUFSEN_ADDRESS_LEN, // address_end: end of address\r | |
1236 | BANG_OLUFSEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1237 | BANG_OLUFSEN_COMMAND_OFFSET + BANG_OLUFSEN_COMMAND_LEN, // command_end: end of command\r | |
1238 | BANG_OLUFSEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1239 | BANG_OLUFSEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1240 | BANG_OLUFSEN_LSB, // lsb_first: flag: LSB first\r |
1241 | BANG_OLUFSEN_FLAGS // flags: some flags\r | |
504d9df9 | 1242 | };\r |
1243 | \r | |
1244 | #endif\r | |
1245 | \r | |
89e8cafb | 1246 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
1247 | \r | |
1248 | static uint8_t first_bit;\r | |
592411d1 | 1249 | \r |
63b94f48 | 1250 | static const PROGMEM IRMP_PARAMETER grundig_param =\r |
592411d1 | 1251 | {\r |
d155e9ab | 1252 | IRMP_GRUNDIG_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1253 | \r |
89e8cafb | 1254 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1255 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1256 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1257 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1258 | 0, // pulse_0_len_min: here: not used\r |
1259 | 0, // pulse_0_len_max: here: not used\r | |
1260 | 0, // pause_0_len_min: here: not used\r | |
1261 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1262 | GRUNDIG_ADDRESS_OFFSET, // address_offset: address offset\r |
1263 | GRUNDIG_ADDRESS_OFFSET + GRUNDIG_ADDRESS_LEN, // address_end: end of address\r | |
1264 | GRUNDIG_COMMAND_OFFSET, // command_offset: command offset\r | |
1265 | GRUNDIG_COMMAND_OFFSET + GRUNDIG_COMMAND_LEN + 1, // command_end: end of command (USE 1 bit MORE to STORE NOKIA DATA!)\r | |
1266 | NOKIA_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: NOKIA instead of GRUNDIG!\r | |
89e8cafb | 1267 | GRUNDIG_NOKIA_IR60_STOP_BIT, // stop_bit: flag: frame has stop bit\r |
1268 | GRUNDIG_NOKIA_IR60_LSB, // lsb_first: flag: LSB first\r | |
1269 | GRUNDIG_NOKIA_IR60_FLAGS // flags: some flags\r | |
592411d1 | 1270 | };\r |
1271 | \r | |
1272 | #endif\r | |
1273 | \r | |
12948cf3 | 1274 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
a7054daf | 1275 | \r |
63b94f48 | 1276 | static const PROGMEM IRMP_PARAMETER ruwido_param =\r |
a7054daf | 1277 | {\r |
12948cf3 | 1278 | IRMP_RUWIDO_PROTOCOL, // protocol: ir protocol\r |
1279 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1280 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1281 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1282 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1283 | 0, // pulse_0_len_min: here: not used\r |
1284 | 0, // pulse_0_len_max: here: not used\r | |
1285 | 0, // pause_0_len_min: here: not used\r | |
1286 | 0, // pause_0_len_max: here: not used\r | |
12948cf3 | 1287 | RUWIDO_ADDRESS_OFFSET, // address_offset: address offset\r |
1288 | RUWIDO_ADDRESS_OFFSET + RUWIDO_ADDRESS_LEN, // address_end: end of address\r | |
1289 | RUWIDO_COMMAND_OFFSET, // command_offset: command offset\r | |
1290 | RUWIDO_COMMAND_OFFSET + RUWIDO_COMMAND_LEN, // command_end: end of command\r | |
1291 | SIEMENS_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: SIEMENS instead of RUWIDO!\r | |
1292 | SIEMENS_OR_RUWIDO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1293 | SIEMENS_OR_RUWIDO_LSB, // lsb_first: flag: LSB first\r | |
1294 | SIEMENS_OR_RUWIDO_FLAGS // flags: some flags\r | |
a7054daf | 1295 | };\r |
1296 | \r | |
1297 | #endif\r | |
1298 | \r | |
48664931 | 1299 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
b5ea7869 | 1300 | \r |
63b94f48 | 1301 | static const PROGMEM IRMP_PARAMETER fdc_param =\r |
b5ea7869 | 1302 | {\r |
48664931 | 1303 | IRMP_FDC_PROTOCOL, // protocol: ir protocol\r |
1304 | FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1305 | FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1306 | FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1307 | FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1308 | FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1309 | FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1310 | FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1311 | FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1312 | FDC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1313 | FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address\r | |
1314 | FDC_COMMAND_OFFSET, // command_offset: command offset\r | |
1315 | FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command\r | |
1316 | FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1317 | FDC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1318 | FDC_LSB, // lsb_first: flag: LSB first\r | |
1319 | FDC_FLAGS // flags: some flags\r | |
b5ea7869 | 1320 | };\r |
1321 | \r | |
1322 | #endif\r | |
1323 | \r | |
9e16d699 | 1324 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
1325 | \r | |
63b94f48 | 1326 | static const PROGMEM IRMP_PARAMETER rccar_param =\r |
9e16d699 | 1327 | {\r |
1328 | IRMP_RCCAR_PROTOCOL, // protocol: ir protocol\r | |
1329 | RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1330 | RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1331 | RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1332 | RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1333 | RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1334 | RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1335 | RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1336 | RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1337 | RCCAR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1338 | RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address\r | |
1339 | RCCAR_COMMAND_OFFSET, // command_offset: command offset\r | |
1340 | RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command\r | |
1341 | RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1342 | RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1343 | RCCAR_LSB, // lsb_first: flag: LSB first\r | |
1344 | RCCAR_FLAGS // flags: some flags\r | |
1345 | };\r | |
1346 | \r | |
1347 | #endif\r | |
1348 | \r | |
9405f84a | 1349 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
1350 | \r | |
63b94f48 | 1351 | static const PROGMEM IRMP_PARAMETER nikon_param =\r |
9405f84a | 1352 | {\r |
1353 | IRMP_NIKON_PROTOCOL, // protocol: ir protocol\r | |
1354 | NIKON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1355 | NIKON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1356 | NIKON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1357 | NIKON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1358 | NIKON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1359 | NIKON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1360 | NIKON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1361 | NIKON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1362 | NIKON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1363 | NIKON_ADDRESS_OFFSET + NIKON_ADDRESS_LEN, // address_end: end of address\r | |
1364 | NIKON_COMMAND_OFFSET, // command_offset: command offset\r | |
1365 | NIKON_COMMAND_OFFSET + NIKON_COMMAND_LEN, // command_end: end of command\r | |
1366 | NIKON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1367 | NIKON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1368 | NIKON_LSB, // lsb_first: flag: LSB first\r | |
1369 | NIKON_FLAGS // flags: some flags\r | |
1370 | };\r | |
1371 | \r | |
1372 | #endif\r | |
1373 | \r | |
111d6191 | 1374 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
1375 | \r | |
63b94f48 | 1376 | static const PROGMEM IRMP_PARAMETER kathrein_param =\r |
111d6191 | 1377 | {\r |
1378 | IRMP_KATHREIN_PROTOCOL, // protocol: ir protocol\r | |
1379 | KATHREIN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1380 | KATHREIN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1381 | KATHREIN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1382 | KATHREIN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1383 | KATHREIN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1384 | KATHREIN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1385 | KATHREIN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1386 | KATHREIN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1387 | KATHREIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1388 | KATHREIN_ADDRESS_OFFSET + KATHREIN_ADDRESS_LEN, // address_end: end of address\r | |
1389 | KATHREIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1390 | KATHREIN_COMMAND_OFFSET + KATHREIN_COMMAND_LEN, // command_end: end of command\r | |
1391 | KATHREIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1392 | KATHREIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1393 | KATHREIN_LSB, // lsb_first: flag: LSB first\r | |
1394 | KATHREIN_FLAGS // flags: some flags\r | |
1395 | };\r | |
1396 | \r | |
1397 | #endif\r | |
1398 | \r | |
deba2a0a | 1399 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
1400 | \r | |
63b94f48 | 1401 | static const PROGMEM IRMP_PARAMETER netbox_param =\r |
deba2a0a | 1402 | {\r |
1403 | IRMP_NETBOX_PROTOCOL, // protocol: ir protocol\r | |
a42d1ee6 | 1404 | NETBOX_PULSE_LEN, // pulse_1_len_min: minimum length of pulse with bit value 1, here: exact value\r |
1405 | NETBOX_PULSE_REST_LEN, // pulse_1_len_max: maximum length of pulse with bit value 1, here: rest value\r | |
1406 | NETBOX_PAUSE_LEN, // pause_1_len_min: minimum length of pause with bit value 1, here: exact value\r | |
1407 | NETBOX_PAUSE_REST_LEN, // pause_1_len_max: maximum length of pause with bit value 1, here: rest value\r | |
1408 | NETBOX_PULSE_LEN, // pulse_0_len_min: minimum length of pulse with bit value 0, here: exact value\r | |
1409 | NETBOX_PULSE_REST_LEN, // pulse_0_len_max: maximum length of pulse with bit value 0, here: rest value\r | |
1410 | NETBOX_PAUSE_LEN, // pause_0_len_min: minimum length of pause with bit value 0, here: exact value\r | |
1411 | NETBOX_PAUSE_REST_LEN, // pause_0_len_max: maximum length of pause with bit value 0, here: rest value\r | |
deba2a0a | 1412 | NETBOX_ADDRESS_OFFSET, // address_offset: address offset\r |
1413 | NETBOX_ADDRESS_OFFSET + NETBOX_ADDRESS_LEN, // address_end: end of address\r | |
1414 | NETBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1415 | NETBOX_COMMAND_OFFSET + NETBOX_COMMAND_LEN, // command_end: end of command\r | |
1416 | NETBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1417 | NETBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1418 | NETBOX_LSB, // lsb_first: flag: LSB first\r | |
1419 | NETBOX_FLAGS // flags: some flags\r | |
1420 | };\r | |
1421 | \r | |
1422 | #endif\r | |
1423 | \r | |
f50e01e7 | 1424 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
1425 | \r | |
63b94f48 | 1426 | static const PROGMEM IRMP_PARAMETER lego_param =\r |
f50e01e7 | 1427 | {\r |
1428 | IRMP_LEGO_PROTOCOL, // protocol: ir protocol\r | |
1429 | LEGO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1430 | LEGO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1431 | LEGO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1432 | LEGO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1433 | LEGO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1434 | LEGO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1435 | LEGO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1436 | LEGO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1437 | LEGO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1438 | LEGO_ADDRESS_OFFSET + LEGO_ADDRESS_LEN, // address_end: end of address\r | |
1439 | LEGO_COMMAND_OFFSET, // command_offset: command offset\r | |
1440 | LEGO_COMMAND_OFFSET + LEGO_COMMAND_LEN, // command_end: end of command\r | |
1441 | LEGO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1442 | LEGO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1443 | LEGO_LSB, // lsb_first: flag: LSB first\r | |
1444 | LEGO_FLAGS // flags: some flags\r | |
1445 | };\r | |
1446 | \r | |
1447 | #endif\r | |
1448 | \r | |
beda975f | 1449 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
1450 | \r | |
63b94f48 | 1451 | static const PROGMEM IRMP_PARAMETER thomson_param =\r |
beda975f | 1452 | {\r |
1453 | IRMP_THOMSON_PROTOCOL, // protocol: ir protocol\r | |
1454 | THOMSON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1455 | THOMSON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1456 | THOMSON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1457 | THOMSON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1458 | THOMSON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1459 | THOMSON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1460 | THOMSON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1461 | THOMSON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1462 | THOMSON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1463 | THOMSON_ADDRESS_OFFSET + THOMSON_ADDRESS_LEN, // address_end: end of address\r | |
1464 | THOMSON_COMMAND_OFFSET, // command_offset: command offset\r | |
1465 | THOMSON_COMMAND_OFFSET + THOMSON_COMMAND_LEN, // command_end: end of command\r | |
1466 | THOMSON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1467 | THOMSON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1468 | THOMSON_LSB, // lsb_first: flag: LSB first\r | |
1469 | THOMSON_FLAGS // flags: some flags\r | |
1470 | };\r | |
1471 | \r | |
1472 | #endif\r | |
1473 | \r | |
3a7e26e1 | 1474 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
1475 | \r | |
1476 | static const PROGMEM IRMP_PARAMETER bose_param =\r | |
1477 | {\r | |
1478 | IRMP_BOSE_PROTOCOL, // protocol: ir protocol\r | |
1479 | BOSE_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1480 | BOSE_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1481 | BOSE_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1482 | BOSE_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1483 | BOSE_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1484 | BOSE_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1485 | BOSE_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1486 | BOSE_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1487 | BOSE_ADDRESS_OFFSET, // address_offset: address offset\r | |
1488 | BOSE_ADDRESS_OFFSET + BOSE_ADDRESS_LEN, // address_end: end of address\r | |
1489 | BOSE_COMMAND_OFFSET, // command_offset: command offset\r | |
1490 | BOSE_COMMAND_OFFSET + BOSE_COMMAND_LEN, // command_end: end of command\r | |
1491 | BOSE_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1492 | BOSE_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1493 | BOSE_LSB, // lsb_first: flag: LSB first\r | |
1494 | BOSE_FLAGS // flags: some flags\r | |
1495 | };\r | |
1496 | \r | |
1497 | #endif\r | |
1498 | \r | |
2fb27bfe | 1499 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
1500 | \r | |
1501 | static const PROGMEM IRMP_PARAMETER a1tvbox_param =\r | |
1502 | {\r | |
1503 | IRMP_A1TVBOX_PROTOCOL, // protocol: ir protocol\r | |
1504 | \r | |
1505 | A1TVBOX_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1506 | A1TVBOX_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1507 | A1TVBOX_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1508 | A1TVBOX_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1509 | 0, // pulse_0_len_min: here: not used\r | |
1510 | 0, // pulse_0_len_max: here: not used\r | |
1511 | 0, // pause_0_len_min: here: not used\r | |
1512 | 0, // pause_0_len_max: here: not used\r | |
1513 | A1TVBOX_ADDRESS_OFFSET, // address_offset: address offset\r | |
1514 | A1TVBOX_ADDRESS_OFFSET + A1TVBOX_ADDRESS_LEN, // address_end: end of address\r | |
1515 | A1TVBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1516 | A1TVBOX_COMMAND_OFFSET + A1TVBOX_COMMAND_LEN, // command_end: end of command\r | |
1517 | A1TVBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1518 | A1TVBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1519 | A1TVBOX_LSB, // lsb_first: flag: LSB first\r | |
1520 | A1TVBOX_FLAGS // flags: some flags\r | |
1521 | };\r | |
1522 | \r | |
1523 | #endif\r | |
1524 | \r | |
b85cb27d | 1525 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1526 | \r | |
1527 | static const PROGMEM IRMP_PARAMETER ortek_param =\r | |
1528 | {\r | |
1529 | IRMP_ORTEK_PROTOCOL, // protocol: ir protocol\r | |
1530 | \r | |
1531 | ORTEK_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1532 | ORTEK_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1533 | ORTEK_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1534 | ORTEK_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1535 | 0, // pulse_0_len_min: here: not used\r | |
1536 | 0, // pulse_0_len_max: here: not used\r | |
1537 | 0, // pause_0_len_min: here: not used\r | |
1538 | 0, // pause_0_len_max: here: not used\r | |
1539 | ORTEK_ADDRESS_OFFSET, // address_offset: address offset\r | |
1540 | ORTEK_ADDRESS_OFFSET + ORTEK_ADDRESS_LEN, // address_end: end of address\r | |
1541 | ORTEK_COMMAND_OFFSET, // command_offset: command offset\r | |
1542 | ORTEK_COMMAND_OFFSET + ORTEK_COMMAND_LEN, // command_end: end of command\r | |
1543 | ORTEK_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1544 | ORTEK_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1545 | ORTEK_LSB, // lsb_first: flag: LSB first\r | |
1546 | ORTEK_FLAGS // flags: some flags\r | |
1547 | };\r | |
1548 | \r | |
1549 | #endif\r | |
1550 | \r | |
40ca4604 | 1551 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
1552 | \r | |
1553 | static const PROGMEM IRMP_PARAMETER roomba_param =\r | |
1554 | {\r | |
1555 | IRMP_ROOMBA_PROTOCOL, // protocol: ir protocol\r | |
1556 | ROOMBA_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1557 | ROOMBA_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1558 | ROOMBA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1559 | ROOMBA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1560 | ROOMBA_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1561 | ROOMBA_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1562 | ROOMBA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1563 | ROOMBA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1564 | ROOMBA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1565 | ROOMBA_ADDRESS_OFFSET + ROOMBA_ADDRESS_LEN, // address_end: end of address\r | |
1566 | ROOMBA_COMMAND_OFFSET, // command_offset: command offset\r | |
1567 | ROOMBA_COMMAND_OFFSET + ROOMBA_COMMAND_LEN, // command_end: end of command\r | |
1568 | ROOMBA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1569 | ROOMBA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1570 | ROOMBA_LSB, // lsb_first: flag: LSB first\r | |
1571 | ROOMBA_FLAGS // flags: some flags\r | |
1572 | };\r | |
1573 | \r | |
1574 | #endif\r | |
1575 | \r | |
cb93f9e9 | 1576 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
1577 | \r | |
1578 | static const PROGMEM IRMP_PARAMETER rcmm_param =\r | |
1579 | {\r | |
faf6479d | 1580 | IRMP_RCMM32_PROTOCOL, // protocol: ir protocol\r |
cb93f9e9 | 1581 | \r |
faf6479d | 1582 | RCMM32_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1583 | RCMM32_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
cb93f9e9 | 1584 | 0, // pause_1_len_min: here: minimum length of short pause\r |
1585 | 0, // pause_1_len_max: here: maximum length of short pause\r | |
faf6479d | 1586 | RCMM32_BIT_PULSE_LEN_MIN, // pulse_0_len_min: here: not used\r |
1587 | RCMM32_BIT_PULSE_LEN_MAX, // pulse_0_len_max: here: not used\r | |
cb93f9e9 | 1588 | 0, // pause_0_len_min: here: not used\r |
1589 | 0, // pause_0_len_max: here: not used\r | |
faf6479d | 1590 | RCMM32_ADDRESS_OFFSET, // address_offset: address offset\r |
1591 | RCMM32_ADDRESS_OFFSET + RCMM32_ADDRESS_LEN, // address_end: end of address\r | |
1592 | RCMM32_COMMAND_OFFSET, // command_offset: command offset\r | |
1593 | RCMM32_COMMAND_OFFSET + RCMM32_COMMAND_LEN, // command_end: end of command\r | |
1594 | RCMM32_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1595 | RCMM32_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1596 | RCMM32_LSB, // lsb_first: flag: LSB first\r | |
1597 | RCMM32_FLAGS // flags: some flags\r | |
1598 | };\r | |
1599 | \r | |
1600 | #endif\r | |
1601 | \r | |
1602 | #if IRMP_SUPPORT_RADIO1_PROTOCOL == 1\r | |
1603 | \r | |
1604 | static const PROGMEM IRMP_PARAMETER radio1_param =\r | |
1605 | {\r | |
1606 | IRMP_RADIO1_PROTOCOL, // protocol: ir protocol\r | |
1607 | \r | |
1608 | RADIO1_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1609 | RADIO1_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1610 | RADIO1_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1611 | RADIO1_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1612 | RADIO1_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1613 | RADIO1_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1614 | RADIO1_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1615 | RADIO1_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1616 | RADIO1_ADDRESS_OFFSET, // address_offset: address offset\r | |
1617 | RADIO1_ADDRESS_OFFSET + RADIO1_ADDRESS_LEN, // address_end: end of address\r | |
1618 | RADIO1_COMMAND_OFFSET, // command_offset: command offset\r | |
1619 | RADIO1_COMMAND_OFFSET + RADIO1_COMMAND_LEN, // command_end: end of command\r | |
1620 | RADIO1_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1621 | RADIO1_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1622 | RADIO1_LSB, // lsb_first: flag: LSB first\r | |
1623 | RADIO1_FLAGS // flags: some flags\r | |
cb93f9e9 | 1624 | };\r |
1625 | \r | |
1626 | #endif\r | |
1627 | \r | |
d155e9ab | 1628 | static uint8_t irmp_bit; // current bit position\r |
4225a882 | 1629 | static IRMP_PARAMETER irmp_param;\r |
1630 | \r | |
6f750020 | 1631 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
1632 | static IRMP_PARAMETER irmp_param2;\r | |
1633 | #endif\r | |
1634 | \r | |
4225a882 | 1635 | static volatile uint8_t irmp_ir_detected;\r |
1636 | static volatile uint8_t irmp_protocol;\r | |
1637 | static volatile uint16_t irmp_address;\r | |
1638 | static volatile uint16_t irmp_command;\r | |
d155e9ab | 1639 | static volatile uint16_t irmp_id; // only used for SAMSUNG protocol\r |
4225a882 | 1640 | static volatile uint8_t irmp_flags;\r |
08f2dd9d | 1641 | // static volatile uint8_t irmp_busy_flag;\r |
4225a882 | 1642 | \r |
48664931 | 1643 | #ifdef ANALYZE\r |
08f2dd9d | 1644 | #define input(x) (x)\r |
4225a882 | 1645 | static uint8_t IRMP_PIN;\r |
faf6479d | 1646 | static uint8_t radio;\r |
4225a882 | 1647 | #endif\r |
1648 | \r | |
1649 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1650 | * Initialize IRMP decoder\r | |
1651 | * @details Configures IRMP input pin\r | |
1652 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1653 | */\r | |
48664931 | 1654 | #ifndef ANALYZE\r |
4225a882 | 1655 | void\r |
1656 | irmp_init (void)\r | |
1657 | {\r | |
08f2dd9d | 1658 | #if defined(PIC_CCS) || defined(PIC_C18) // PIC: do nothing\r |
1659 | #elif defined (ARM_STM32) // STM32\r | |
1660 | GPIO_InitTypeDef GPIO_InitStructure;\r | |
1661 | \r | |
1662 | /* GPIOx clock enable */\r | |
1663 | #if defined (ARM_STM32L1XX)\r | |
1664 | RCC_AHBPeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
1665 | #elif defined (ARM_STM32F10X)\r | |
1666 | RCC_APB2PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
1667 | #elif defined (ARM_STM32F4XX)\r | |
1668 | RCC_AHB1PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
1669 | #endif\r | |
1670 | \r | |
1671 | /* GPIO Configuration */\r | |
1672 | GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r | |
1673 | #if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r | |
37b29f94 | 1674 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;\r |
08f2dd9d | 1675 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r |
1676 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r | |
1677 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r | |
1678 | #elif defined (ARM_STM32F10X)\r | |
1679 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r | |
37b29f94 | 1680 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r |
08f2dd9d | 1681 | #endif\r |
1682 | GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r | |
afd1e690 | 1683 | #elif defined(STELLARIS_ARM_CORTEX_M4)\r |
1684 | // Enable the GPIO port\r | |
1685 | ROM_SysCtlPeripheralEnable(IRMP_PORT_PERIPH);\r | |
1686 | \r | |
1687 | // Set as an input\r | |
1688 | ROM_GPIODirModeSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_DIR_MODE_IN);\r | |
1689 | ROM_GPIOPadConfigSet(IRMP_PORT_BASE, IRMP_PORT_PIN,\r | |
1690 | GPIO_STRENGTH_2MA,\r | |
1691 | GPIO_PIN_TYPE_STD_WPU);\r | |
08f2dd9d | 1692 | #else // AVR\r |
d155e9ab | 1693 | IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup\r |
1694 | IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input\r | |
93ba2e01 | 1695 | #endif\r |
4225a882 | 1696 | \r |
1697 | #if IRMP_LOGGING == 1\r | |
1698 | irmp_uart_init ();\r | |
1699 | #endif\r | |
1700 | }\r | |
1701 | #endif\r | |
1702 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1703 | * Get IRMP data\r | |
1704 | * @details gets decoded IRMP data\r | |
1705 | * @param pointer in order to store IRMP data\r | |
1706 | * @return TRUE: successful, FALSE: failed\r | |
1707 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1708 | */\r | |
1709 | uint8_t\r | |
1710 | irmp_get_data (IRMP_DATA * irmp_data_p)\r | |
1711 | {\r | |
1712 | uint8_t rtc = FALSE;\r | |
1713 | \r | |
1714 | if (irmp_ir_detected)\r | |
1715 | {\r | |
1716 | switch (irmp_protocol)\r | |
1717 | {\r | |
1718 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
1719 | case IRMP_SAMSUNG_PROTOCOL:\r | |
1720 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
1721 | {\r | |
1722 | irmp_command &= 0xff;\r | |
1723 | irmp_command |= irmp_id << 8;\r | |
1724 | rtc = TRUE;\r | |
1725 | }\r | |
1726 | break;\r | |
1727 | #endif\r | |
1728 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
1729 | case IRMP_NEC_PROTOCOL:\r | |
1730 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
1731 | {\r | |
1732 | irmp_command &= 0xff;\r | |
1733 | rtc = TRUE;\r | |
1734 | }\r | |
770a1a9d | 1735 | else if (irmp_address == 0x87EE)\r |
4225a882 | 1736 | {\r |
48664931 | 1737 | ANALYZE_PRINTF ("Switching to APPLE protocol\n");\r |
4225a882 | 1738 | irmp_protocol = IRMP_APPLE_PROTOCOL;\r |
770a1a9d | 1739 | irmp_address = (irmp_command & 0xFF00) >> 8;\r |
1740 | irmp_command &= 0x00FF;\r | |
4225a882 | 1741 | rtc = TRUE;\r |
1742 | }\r | |
1743 | break;\r | |
48664931 | 1744 | #endif\r |
3a7e26e1 | 1745 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
1746 | case IRMP_BOSE_PROTOCOL:\r | |
1747 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
1748 | {\r | |
1749 | irmp_command &= 0xff;\r | |
1750 | rtc = TRUE;\r | |
1751 | }\r | |
1752 | break;\r | |
1753 | #endif\r | |
12948cf3 | 1754 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
9405f84a | 1755 | case IRMP_SIEMENS_PROTOCOL:\r |
12948cf3 | 1756 | case IRMP_RUWIDO_PROTOCOL:\r |
9405f84a | 1757 | if (((irmp_command >> 1) & 0x0001) == (~irmp_command & 0x0001))\r |
1758 | {\r | |
1759 | irmp_command >>= 1;\r | |
1760 | rtc = TRUE;\r | |
1761 | }\r | |
1762 | break;\r | |
1763 | #endif\r | |
111d6191 | 1764 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
1765 | case IRMP_KATHREIN_PROTOCOL:\r | |
2cfc146d | 1766 | if (irmp_command != 0x0000)\r |
111d6191 | 1767 | {\r |
1768 | rtc = TRUE;\r | |
1769 | }\r | |
1770 | break;\r | |
1771 | #endif\r | |
03780b34 | 1772 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
1773 | case IRMP_RC5_PROTOCOL:\r | |
1774 | irmp_address &= ~0x20; // clear toggle bit\r | |
1775 | rtc = TRUE;\r | |
1776 | break;\r | |
1777 | #endif\r | |
89e8cafb | 1778 | #if IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
1779 | case IRMP_IR60_PROTOCOL:\r | |
1780 | if (irmp_command != 0x007d) // 0x007d (== 62<<1 + 1) is start instruction frame\r | |
1781 | {\r | |
1782 | rtc = TRUE;\r | |
1783 | }\r | |
f60c4644 | 1784 | else\r |
1785 | {\r | |
1786 | ANALYZE_PRINTF("Info IR60: got start instruction frame\n");\r | |
1787 | }\r | |
89e8cafb | 1788 | break;\r |
1789 | #endif\r | |
48664931 | 1790 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
1791 | case IRMP_RCCAR_PROTOCOL:\r | |
1792 | // frame in irmp_data:\r | |
1793 | // Bit 12 11 10 9 8 7 6 5 4 3 2 1 0\r | |
1794 | // V D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 C1 C0 // 10 9 8 7 6 5 4 3 2 1 0\r | |
1795 | irmp_address = (irmp_command & 0x000C) >> 2; // addr: 0 0 0 0 0 0 0 0 0 A1 A0\r | |
1796 | irmp_command = ((irmp_command & 0x1000) >> 2) | // V-Bit: V 0 0 0 0 0 0 0 0 0 0\r | |
1797 | ((irmp_command & 0x0003) << 8) | // C-Bits: 0 C1 C0 0 0 0 0 0 0 0 0\r | |
1798 | ((irmp_command & 0x0FF0) >> 4); // D-Bits: D7 D6 D5 D4 D3 D2 D1 D0\r | |
1799 | rtc = TRUE; // Summe: V C1 C0 D7 D6 D5 D4 D3 D2 D1 D0\r | |
1800 | break;\r | |
4225a882 | 1801 | #endif\r |
beda975f | 1802 | \r |
1803 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1 // squeeze code to 8 bit, upper bit indicates release-key\r | |
deba2a0a | 1804 | case IRMP_NETBOX_PROTOCOL:\r |
1805 | if (irmp_command & 0x1000) // last bit set?\r | |
1806 | {\r | |
1807 | if ((irmp_command & 0x1f) == 0x15) // key pressed: 101 01 (LSB)\r | |
1808 | {\r | |
1809 | irmp_command >>= 5;\r | |
1810 | irmp_command &= 0x7F;\r | |
1811 | rtc = TRUE;\r | |
1812 | }\r | |
1813 | else if ((irmp_command & 0x1f) == 0x10) // key released: 000 01 (LSB)\r | |
1814 | {\r | |
1815 | irmp_command >>= 5;\r | |
1816 | irmp_command |= 0x80;\r | |
1817 | rtc = TRUE;\r | |
1818 | }\r | |
1819 | else\r | |
1820 | {\r | |
1821 | ANALYZE_PRINTF("error NETBOX: bit6/7 must be 0/1\n");\r | |
1822 | }\r | |
1823 | }\r | |
1824 | else\r | |
1825 | {\r | |
1826 | ANALYZE_PRINTF("error NETBOX: last bit not set\n");\r | |
1827 | }\r | |
1828 | break;\r | |
1829 | #endif\r | |
f50e01e7 | 1830 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
1831 | case IRMP_LEGO_PROTOCOL:\r | |
1832 | {\r | |
1833 | uint8_t crc = 0x0F ^ ((irmp_command & 0xF000) >> 12) ^ ((irmp_command & 0x0F00) >> 8) ^ ((irmp_command & 0x00F0) >> 4);\r | |
1834 | \r | |
1835 | if ((irmp_command & 0x000F) == crc)\r | |
1836 | {\r | |
1837 | irmp_command >>= 4;\r | |
1838 | rtc = TRUE;\r | |
1839 | }\r | |
1840 | else\r | |
1841 | {\r | |
1842 | ANALYZE_PRINTF ("CRC error in LEGO protocol\n");\r | |
f874da09 | 1843 | // rtc = TRUE; // don't accept codes with CRC errors\r |
f50e01e7 | 1844 | }\r |
1845 | break;\r | |
1846 | }\r | |
1847 | #endif\r | |
cb93f9e9 | 1848 | \r |
4225a882 | 1849 | default:\r |
08f2dd9d | 1850 | {\r |
4225a882 | 1851 | rtc = TRUE;\r |
08f2dd9d | 1852 | break;\r |
1853 | }\r | |
4225a882 | 1854 | }\r |
1855 | \r | |
1856 | if (rtc)\r | |
1857 | {\r | |
1858 | irmp_data_p->protocol = irmp_protocol;\r | |
1859 | irmp_data_p->address = irmp_address;\r | |
1860 | irmp_data_p->command = irmp_command;\r | |
1861 | irmp_data_p->flags = irmp_flags;\r | |
1862 | irmp_command = 0;\r | |
1863 | irmp_address = 0;\r | |
1864 | irmp_flags = 0;\r | |
1865 | }\r | |
1866 | \r | |
1867 | irmp_ir_detected = FALSE;\r | |
1868 | }\r | |
1869 | \r | |
1870 | return rtc;\r | |
1871 | }\r | |
1872 | \r | |
1f54e86c | 1873 | // uint8_t\r |
1874 | // irmp_is_busy (void)\r | |
1875 | // {\r | |
1876 | // return irmp_busy_flag;\r | |
1877 | // }\r | |
1878 | \r | |
7644ac04 | 1879 | #if IRMP_USE_CALLBACK == 1\r |
1880 | void\r | |
1881 | irmp_set_callback_ptr (void (*cb)(uint8_t))\r | |
1882 | {\r | |
1883 | irmp_callback_ptr = cb;\r | |
1884 | }\r | |
1885 | #endif // IRMP_USE_CALLBACK == 1\r | |
1886 | \r | |
4225a882 | 1887 | // these statics must not be volatile, because they are only used by irmp_store_bit(), which is called by irmp_ISR()\r |
770a1a9d | 1888 | static uint16_t irmp_tmp_address; // ir address\r |
1889 | static uint16_t irmp_tmp_command; // ir command\r | |
6f750020 | 1890 | \r |
35213800 | 1891 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
770a1a9d | 1892 | static uint16_t irmp_tmp_address2; // ir address\r |
1893 | static uint16_t irmp_tmp_command2; // ir command\r | |
6f750020 | 1894 | #endif\r |
1895 | \r | |
4225a882 | 1896 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
770a1a9d | 1897 | static uint16_t irmp_tmp_id; // ir id (only SAMSUNG)\r |
1898 | #endif\r | |
1899 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1900 | static uint8_t xor_check[6]; // check kaseikyo "parity" bits\r | |
0f700c8e | 1901 | static uint8_t genre2; // save genre2 bits here, later copied to MSB in flags\r |
4225a882 | 1902 | #endif\r |
1903 | \r | |
40ca4604 | 1904 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1905 | static uint8_t parity; // number of '1' of the first 14 bits, check if even.\r | |
1906 | #endif\r | |
1907 | \r | |
4225a882 | 1908 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
1909 | * store bit\r | |
1910 | * @details store bit in temp address or temp command\r | |
1911 | * @param value to store: 0 or 1\r | |
1912 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1913 | */\r | |
d823e852 | 1914 | // verhindert, dass irmp_store_bit() inline compiliert wird:\r |
1915 | // static void irmp_store_bit (uint8_t) __attribute__ ((noinline));\r | |
1916 | \r | |
4225a882 | 1917 | static void\r |
1918 | irmp_store_bit (uint8_t value)\r | |
1919 | {\r | |
40ca4604 | 1920 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1921 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r | |
1922 | {\r | |
1923 | if (irmp_bit < 14)\r | |
1924 | {\r | |
1925 | if (value)\r | |
1926 | {\r | |
1927 | parity++;\r | |
1928 | }\r | |
1929 | }\r | |
1930 | else if (irmp_bit == 14)\r | |
1931 | {\r | |
1932 | if (value) // value == 1: even parity\r | |
1933 | {\r | |
1934 | if (parity & 0x01)\r | |
1935 | {\r | |
1936 | parity = PARITY_CHECK_FAILED;\r | |
1937 | }\r | |
1938 | else\r | |
1939 | {\r | |
1940 | parity = PARITY_CHECK_OK;\r | |
1941 | }\r | |
1942 | }\r | |
1943 | else\r | |
1944 | {\r | |
1945 | if (parity & 0x01) // value == 0: odd parity\r | |
1946 | {\r | |
1947 | parity = PARITY_CHECK_OK;\r | |
1948 | }\r | |
1949 | else\r | |
1950 | {\r | |
1951 | parity = PARITY_CHECK_FAILED;\r | |
1952 | }\r | |
1953 | }\r | |
1954 | }\r | |
1955 | }\r | |
1956 | #endif\r | |
1957 | \r | |
89e8cafb | 1958 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
1959 | if (irmp_bit == 0 && irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL)\r | |
1960 | {\r | |
1961 | first_bit = value;\r | |
1962 | }\r | |
1963 | else\r | |
1964 | #endif\r | |
770a1a9d | 1965 | \r |
4225a882 | 1966 | if (irmp_bit >= irmp_param.address_offset && irmp_bit < irmp_param.address_end)\r |
1967 | {\r | |
1968 | if (irmp_param.lsb_first)\r | |
1969 | {\r | |
1970 | irmp_tmp_address |= (((uint16_t) (value)) << (irmp_bit - irmp_param.address_offset)); // CV wants cast\r | |
1971 | }\r | |
1972 | else\r | |
1973 | {\r | |
1974 | irmp_tmp_address <<= 1;\r | |
1975 | irmp_tmp_address |= value;\r | |
1976 | }\r | |
1977 | }\r | |
1978 | else if (irmp_bit >= irmp_param.command_offset && irmp_bit < irmp_param.command_end)\r | |
1979 | {\r | |
1980 | if (irmp_param.lsb_first)\r | |
1981 | {\r | |
1982 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - irmp_param.command_offset)); // CV wants cast\r | |
1983 | }\r | |
1984 | else\r | |
1985 | {\r | |
1986 | irmp_tmp_command <<= 1;\r | |
1987 | irmp_tmp_command |= value;\r | |
1988 | }\r | |
1989 | }\r | |
770a1a9d | 1990 | \r |
35213800 | 1991 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
f60c4644 | 1992 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit >= 13 && irmp_bit < 26)\r |
35213800 | 1993 | {\r |
1994 | irmp_tmp_address2 |= (((uint16_t) (value)) << (irmp_bit - 13)); // CV wants cast\r | |
1995 | }\r | |
f60c4644 | 1996 | else\r |
35213800 | 1997 | #endif\r |
1998 | \r | |
4225a882 | 1999 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
f60c4644 | 2000 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit >= SAMSUNG_ID_OFFSET && irmp_bit < SAMSUNG_ID_OFFSET + SAMSUNG_ID_LEN)\r |
4225a882 | 2001 | {\r |
2002 | irmp_tmp_id |= (((uint16_t) (value)) << (irmp_bit - SAMSUNG_ID_OFFSET)); // store with LSB first\r | |
2003 | }\r | |
f60c4644 | 2004 | else\r |
4225a882 | 2005 | #endif\r |
770a1a9d | 2006 | \r |
2007 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
f60c4644 | 2008 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r |
770a1a9d | 2009 | {\r |
0f700c8e | 2010 | if (irmp_bit >= 20 && irmp_bit < 24)\r |
770a1a9d | 2011 | {\r |
0f700c8e | 2012 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - 8)); // store 4 system bits (genre 1) in upper nibble with LSB first\r |
770a1a9d | 2013 | }\r |
cea96148 | 2014 | else if (irmp_bit >= 24 && irmp_bit < 28)\r |
770a1a9d | 2015 | {\r |
0f700c8e | 2016 | genre2 |= (((uint8_t) (value)) << (irmp_bit - 20)); // store 4 system bits (genre 2) in upper nibble with LSB first\r |
770a1a9d | 2017 | }\r |
770a1a9d | 2018 | \r |
0f700c8e | 2019 | if (irmp_bit < KASEIKYO_COMPLETE_DATA_LEN)\r |
2020 | {\r | |
2021 | if (value)\r | |
2022 | {\r | |
2023 | xor_check[irmp_bit / 8] |= 1 << (irmp_bit % 8);\r | |
2024 | }\r | |
2025 | else\r | |
2026 | {\r | |
2027 | xor_check[irmp_bit / 8] &= ~(1 << (irmp_bit % 8));\r | |
2028 | }\r | |
2029 | }\r | |
2030 | }\r | |
26b6c304 | 2031 | else\r |
770a1a9d | 2032 | #endif\r |
26b6c304 | 2033 | {\r |
2034 | ;\r | |
2035 | }\r | |
770a1a9d | 2036 | \r |
4225a882 | 2037 | irmp_bit++;\r |
2038 | }\r | |
2039 | \r | |
6f750020 | 2040 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2041 | * store bit\r | |
2042 | * @details store bit in temp address or temp command\r | |
2043 | * @param value to store: 0 or 1\r | |
2044 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2045 | */\r | |
2046 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2047 | static void\r | |
2048 | irmp_store_bit2 (uint8_t value)\r | |
2049 | {\r | |
2050 | uint8_t irmp_bit2;\r | |
2051 | \r | |
2052 | if (irmp_param.protocol)\r | |
2053 | {\r | |
2054 | irmp_bit2 = irmp_bit - 2;\r | |
2055 | }\r | |
2056 | else\r | |
2057 | {\r | |
2058 | irmp_bit2 = irmp_bit - 1;\r | |
2059 | }\r | |
2060 | \r | |
2061 | if (irmp_bit2 >= irmp_param2.address_offset && irmp_bit2 < irmp_param2.address_end)\r | |
2062 | {\r | |
2063 | irmp_tmp_address2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.address_offset)); // CV wants cast\r | |
2064 | }\r | |
2065 | else if (irmp_bit2 >= irmp_param2.command_offset && irmp_bit2 < irmp_param2.command_end)\r | |
2066 | {\r | |
2067 | irmp_tmp_command2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.command_offset)); // CV wants cast\r | |
2068 | }\r | |
2069 | }\r | |
2070 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2071 | \r | |
4225a882 | 2072 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2073 | * ISR routine\r | |
2074 | * @details ISR routine, called 10000 times per second\r | |
2075 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2076 | */\r | |
879b06c2 | 2077 | uint8_t\r |
4225a882 | 2078 | irmp_ISR (void)\r |
2079 | {\r | |
48664931 | 2080 | static uint8_t irmp_start_bit_detected; // flag: start bit detected\r |
2081 | static uint8_t wait_for_space; // flag: wait for data bit space\r | |
2082 | static uint8_t wait_for_start_space; // flag: wait for start bit space\r | |
2083 | static uint8_t irmp_pulse_time; // count bit time for pulse\r | |
2084 | static PAUSE_LEN irmp_pause_time; // count bit time for pause\r | |
2085 | static uint16_t last_irmp_address = 0xFFFF; // save last irmp address to recognize key repetition\r | |
2086 | static uint16_t last_irmp_command = 0xFFFF; // save last irmp command to recognize key repetition\r | |
775fabfa | 2087 | static uint16_t key_repetition_len; // SIRCS repeats frame 2-5 times with 45 ms pause\r |
48664931 | 2088 | static uint8_t repetition_frame_number;\r |
4225a882 | 2089 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
48664931 | 2090 | static uint16_t last_irmp_denon_command; // save last irmp command to recognize DENON frame repetition\r |
775fabfa | 2091 | static uint16_t denon_repetition_len = 0xFFFF; // denon repetition len of 2nd auto generated frame\r |
4225a882 | 2092 | #endif\r |
2093 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
48664931 | 2094 | static uint8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit\r |
4225a882 | 2095 | #endif\r |
77f488bb | 2096 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
48664931 | 2097 | static PAUSE_LEN last_pause; // last pause value\r |
504d9df9 | 2098 | #endif\r |
77f488bb | 2099 | #if IRMP_SUPPORT_MANCHESTER == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
48664931 | 2100 | static uint8_t last_value; // last bit value\r |
4225a882 | 2101 | #endif\r |
48664931 | 2102 | uint8_t irmp_input; // input value\r |
4225a882 | 2103 | \r |
48664931 | 2104 | #ifdef ANALYZE\r |
592411d1 | 2105 | time_counter++;\r |
2106 | #endif\r | |
2107 | \r | |
4225a882 | 2108 | irmp_input = input(IRMP_PIN);\r |
2109 | \r | |
7644ac04 | 2110 | #if IRMP_USE_CALLBACK == 1\r |
2111 | if (irmp_callback_ptr)\r | |
2112 | {\r | |
2113 | static uint8_t last_inverted_input;\r | |
2114 | \r | |
2115 | if (last_inverted_input != !irmp_input)\r | |
2116 | {\r | |
2117 | (*irmp_callback_ptr) (! irmp_input);\r | |
2118 | last_inverted_input = !irmp_input;\r | |
2119 | }\r | |
2120 | }\r | |
2121 | #endif // IRMP_USE_CALLBACK == 1\r | |
2122 | \r | |
d155e9ab | 2123 | irmp_log(irmp_input); // log ir signal, if IRMP_LOGGING defined\r |
4225a882 | 2124 | \r |
2125 | if (! irmp_ir_detected) // ir code already detected?\r | |
2126 | { // no...\r | |
2127 | if (! irmp_start_bit_detected) // start bit detected?\r | |
2128 | { // no...\r | |
d155e9ab | 2129 | if (! irmp_input) // receiving burst?\r |
4225a882 | 2130 | { // yes...\r |
1f54e86c | 2131 | // irmp_busy_flag = TRUE;\r |
48664931 | 2132 | #ifdef ANALYZE\r |
d155e9ab | 2133 | if (! irmp_pulse_time)\r |
2134 | {\r | |
0f700c8e | 2135 | ANALYZE_PRINTF("%8.3fms [starting pulse]\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r |
d155e9ab | 2136 | }\r |
2137 | #endif\r | |
4225a882 | 2138 | irmp_pulse_time++; // increment counter\r |
2139 | }\r | |
2140 | else\r | |
2141 | { // no...\r | |
2142 | if (irmp_pulse_time) // it's dark....\r | |
2143 | { // set flags for counting the time of darkness...\r | |
2144 | irmp_start_bit_detected = 1;\r | |
2145 | wait_for_start_space = 1;\r | |
2146 | wait_for_space = 0;\r | |
2147 | irmp_tmp_command = 0;\r | |
2148 | irmp_tmp_address = 0;\r | |
0f700c8e | 2149 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
2150 | genre2 = 0;\r | |
2151 | #endif\r | |
6f750020 | 2152 | \r |
35213800 | 2153 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
6f750020 | 2154 | irmp_tmp_command2 = 0;\r |
2155 | irmp_tmp_address2 = 0;\r | |
2156 | #endif\r | |
2157 | \r | |
4225a882 | 2158 | irmp_bit = 0xff;\r |
2159 | irmp_pause_time = 1; // 1st pause: set to 1, not to 0!\r | |
2160 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
2161 | rc5_cmd_bit6 = 0; // fm 2010-03-07: bugfix: reset it after incomplete RC5 frame!\r | |
2162 | #endif\r | |
2163 | }\r | |
2164 | else\r | |
2165 | {\r | |
775fabfa | 2166 | if (key_repetition_len < 0xFFFF) // avoid overflow of counter\r |
6db2522c | 2167 | {\r |
775fabfa | 2168 | key_repetition_len++;\r |
08f2dd9d | 2169 | \r |
2170 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
775fabfa | 2171 | if (denon_repetition_len < 0xFFFF) // avoid overflow of counter\r |
08f2dd9d | 2172 | {\r |
775fabfa | 2173 | denon_repetition_len++;\r |
2174 | \r | |
2175 | if (denon_repetition_len >= DENON_AUTO_REPETITION_PAUSE_LEN && last_irmp_denon_command != 0)\r | |
2176 | {\r | |
e522639e | 2177 | ANALYZE_PRINTF ("%8.3fms warning: did not receive inverted command repetition\n",\r |
775fabfa | 2178 | (double) (time_counter * 1000) / F_INTERRUPTS);\r |
2179 | last_irmp_denon_command = 0;\r | |
2180 | denon_repetition_len = 0xFFFF;\r | |
2181 | }\r | |
08f2dd9d | 2182 | }\r |
2183 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
6db2522c | 2184 | }\r |
4225a882 | 2185 | }\r |
2186 | }\r | |
2187 | }\r | |
2188 | else\r | |
2189 | {\r | |
2190 | if (wait_for_start_space) // we have received start bit...\r | |
2191 | { // ...and are counting the time of darkness\r | |
2192 | if (irmp_input) // still dark?\r | |
2193 | { // yes\r | |
2194 | irmp_pause_time++; // increment counter\r | |
2195 | \r | |
9405f84a | 2196 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
2197 | if (((irmp_pulse_time < NIKON_START_BIT_PULSE_LEN_MIN || irmp_pulse_time > NIKON_START_BIT_PULSE_LEN_MAX) && irmp_pause_time > IRMP_TIMEOUT_LEN) ||\r | |
2198 | irmp_pause_time > IRMP_TIMEOUT_NIKON_LEN)\r | |
2199 | #else\r | |
504d9df9 | 2200 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
9405f84a | 2201 | #endif\r |
4225a882 | 2202 | { // yes...\r |
c7a47e89 | 2203 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2204 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // don't show eror if JVC protocol, irmp_pulse_time has been set below!\r | |
2205 | {\r | |
2206 | ;\r | |
2207 | }\r | |
2208 | else\r | |
2209 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2210 | {\r | |
0f700c8e | 2211 | ANALYZE_PRINTF ("%8.3fms error 1: pause after start bit pulse %d too long: %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
c7a47e89 | 2212 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r |
2213 | }\r | |
1f54e86c | 2214 | // irmp_busy_flag = FALSE;\r |
4225a882 | 2215 | irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit\r |
2216 | irmp_pulse_time = 0;\r | |
2217 | irmp_pause_time = 0;\r | |
2218 | }\r | |
2219 | }\r | |
2220 | else\r | |
2221 | { // receiving first data pulse!\r | |
46dd89b7 | 2222 | IRMP_PARAMETER * irmp_param_p = (IRMP_PARAMETER *) 0;\r |
2223 | \r | |
6f750020 | 2224 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
2225 | irmp_param2.protocol = 0;\r | |
2226 | #endif\r | |
2227 | \r | |
0f700c8e | 2228 | ANALYZE_PRINTF ("%8.3fms [start-bit: pulse = %2d, pause = %2d]\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
4225a882 | 2229 | \r |
2230 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
2231 | if (irmp_pulse_time >= SIRCS_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIRCS_START_BIT_PULSE_LEN_MAX &&\r | |
2232 | irmp_pause_time >= SIRCS_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIRCS_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2233 | { // it's SIRCS\r |
48664931 | 2234 | ANALYZE_PRINTF ("protocol = SIRCS, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2235 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX,\r |
2236 | SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2237 | irmp_param_p = (IRMP_PARAMETER *) (IRMP_PARAMETER *) &sircs_param;\r |
4225a882 | 2238 | }\r |
2239 | else\r | |
2240 | #endif // IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
2241 | \r | |
770a1a9d | 2242 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2243 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r | |
2244 | irmp_pulse_time >= JVC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= JVC_START_BIT_PULSE_LEN_MAX &&\r | |
2245 | irmp_pause_time >= JVC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= JVC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2246 | {\r | |
93ba2e01 | 2247 | ANALYZE_PRINTF ("protocol = NEC or JVC (type 1) repeat frame, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
770a1a9d | 2248 | JVC_START_BIT_PULSE_LEN_MIN, JVC_START_BIT_PULSE_LEN_MAX,\r |
2249 | JVC_REPEAT_START_BIT_PAUSE_LEN_MIN, JVC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
35213800 | 2250 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r |
770a1a9d | 2251 | }\r |
2252 | else\r | |
2253 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2254 | \r | |
4225a882 | 2255 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
2256 | if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
46dd89b7 | 2257 | irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r |
2258 | {\r | |
35213800 | 2259 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
2260 | ANALYZE_PRINTF ("protocol = NEC42, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2261 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2262 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
2263 | irmp_param_p = (IRMP_PARAMETER *) &nec42_param;\r | |
2264 | #else\r | |
48664931 | 2265 | ANALYZE_PRINTF ("protocol = NEC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
46dd89b7 | 2266 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r |
2267 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
2268 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
35213800 | 2269 | #endif\r |
2270 | \r | |
46dd89b7 | 2271 | }\r |
2272 | else if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2273 | irmp_pause_time >= NEC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2274 | { // it's NEC\r | |
93ba2e01 | 2275 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2276 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // last protocol was JVC, awaiting repeat frame\r | |
2277 | { // some jvc remote controls use nec repetition frame for jvc repetition frame\r | |
2278 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 2, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2279 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2280 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
2281 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
2282 | }\r | |
2283 | else\r | |
2284 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2285 | {\r | |
2286 | ANALYZE_PRINTF ("protocol = NEC (repetition frame), start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2287 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2288 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2289 | \r |
93ba2e01 | 2290 | irmp_param_p = (IRMP_PARAMETER *) &nec_rep_param;\r |
2291 | }\r | |
2292 | }\r | |
2293 | else\r | |
2294 | \r | |
2295 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2296 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r | |
2297 | irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2298 | irmp_pause_time >= NEC_0_PAUSE_LEN_MIN && irmp_pause_time <= NEC_0_PAUSE_LEN_MAX)\r | |
2299 | { // it's JVC repetition type 3\r | |
2300 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 3, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2301 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2302 | NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX);\r | |
2303 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
4225a882 | 2304 | }\r |
2305 | else\r | |
93ba2e01 | 2306 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2307 | \r | |
4225a882 | 2308 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
2309 | \r | |
b85cb27d | 2310 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
2311 | if (irmp_pulse_time >= TELEFUNKEN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= TELEFUNKEN_START_BIT_PULSE_LEN_MAX &&\r | |
2312 | irmp_pause_time >= TELEFUNKEN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= TELEFUNKEN_START_BIT_PAUSE_LEN_MAX)\r | |
2313 | {\r | |
2314 | ANALYZE_PRINTF ("protocol = TELEFUNKEN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2315 | TELEFUNKEN_START_BIT_PULSE_LEN_MIN, TELEFUNKEN_START_BIT_PULSE_LEN_MAX,\r | |
2316 | TELEFUNKEN_START_BIT_PAUSE_LEN_MIN, TELEFUNKEN_START_BIT_PAUSE_LEN_MAX);\r | |
2317 | irmp_param_p = (IRMP_PARAMETER *) &telefunken_param;\r | |
2318 | }\r | |
2319 | else\r | |
2320 | #endif // IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r | |
2321 | \r | |
40ca4604 | 2322 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
2323 | if (irmp_pulse_time >= ROOMBA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_START_BIT_PULSE_LEN_MAX &&\r | |
2324 | irmp_pause_time >= ROOMBA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ROOMBA_START_BIT_PAUSE_LEN_MAX)\r | |
2325 | {\r | |
2326 | ANALYZE_PRINTF ("protocol = ROOMBA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2327 | ROOMBA_START_BIT_PULSE_LEN_MIN, ROOMBA_START_BIT_PULSE_LEN_MAX,\r | |
2328 | ROOMBA_START_BIT_PAUSE_LEN_MIN, ROOMBA_START_BIT_PAUSE_LEN_MAX);\r | |
2329 | irmp_param_p = (IRMP_PARAMETER *) &roomba_param;\r | |
2330 | }\r | |
2331 | else\r | |
2332 | #endif // IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r | |
2333 | \r | |
9405f84a | 2334 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
2335 | if (irmp_pulse_time >= NIKON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NIKON_START_BIT_PULSE_LEN_MAX &&\r | |
2336 | irmp_pause_time >= NIKON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NIKON_START_BIT_PAUSE_LEN_MAX)\r | |
2337 | {\r | |
2338 | ANALYZE_PRINTF ("protocol = NIKON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2339 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX,\r | |
2340 | NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX);\r | |
2341 | irmp_param_p = (IRMP_PARAMETER *) &nikon_param;\r | |
2342 | }\r | |
2343 | else\r | |
2344 | #endif // IRMP_SUPPORT_NIKON_PROTOCOL == 1\r | |
2345 | \r | |
4225a882 | 2346 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
2347 | if (irmp_pulse_time >= SAMSUNG_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_START_BIT_PULSE_LEN_MAX &&\r | |
2348 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2349 | { // it's SAMSUNG\r |
48664931 | 2350 | ANALYZE_PRINTF ("protocol = SAMSUNG, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2351 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX,\r |
2352 | SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2353 | irmp_param_p = (IRMP_PARAMETER *) &samsung_param;\r |
4225a882 | 2354 | }\r |
2355 | else\r | |
2356 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
2357 | \r | |
2358 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
2359 | if (irmp_pulse_time >= MATSUSHITA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MATSUSHITA_START_BIT_PULSE_LEN_MAX &&\r | |
2360 | irmp_pause_time >= MATSUSHITA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MATSUSHITA_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2361 | { // it's MATSUSHITA\r |
48664931 | 2362 | ANALYZE_PRINTF ("protocol = MATSUSHITA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2363 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX,\r |
2364 | MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2365 | irmp_param_p = (IRMP_PARAMETER *) &matsushita_param;\r |
4225a882 | 2366 | }\r |
2367 | else\r | |
2368 | #endif // IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
2369 | \r | |
2370 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
2371 | if (irmp_pulse_time >= KASEIKYO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KASEIKYO_START_BIT_PULSE_LEN_MAX &&\r | |
2372 | irmp_pause_time >= KASEIKYO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KASEIKYO_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2373 | { // it's KASEIKYO\r |
48664931 | 2374 | ANALYZE_PRINTF ("protocol = KASEIKYO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2375 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX,\r |
2376 | KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2377 | irmp_param_p = (IRMP_PARAMETER *) &kaseikyo_param;\r |
4225a882 | 2378 | }\r |
2379 | else\r | |
2380 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
2381 | \r | |
faf6479d | 2382 | #if IRMP_SUPPORT_RADIO1_PROTOCOL == 1\r |
2383 | if (irmp_pulse_time >= RADIO1_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RADIO1_START_BIT_PULSE_LEN_MAX &&\r | |
2384 | irmp_pause_time >= RADIO1_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RADIO1_START_BIT_PAUSE_LEN_MAX)\r | |
2385 | {\r | |
2386 | ANALYZE_PRINTF ("protocol = RADIO1, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2387 | RADIO1_START_BIT_PULSE_LEN_MIN, RADIO1_START_BIT_PULSE_LEN_MAX,\r | |
2388 | RADIO1_START_BIT_PAUSE_LEN_MIN, RADIO1_START_BIT_PAUSE_LEN_MAX);\r | |
2389 | irmp_param_p = (IRMP_PARAMETER *) &radio1_param;\r | |
2390 | }\r | |
2391 | else\r | |
2392 | #endif // IRMP_SUPPORT_RRADIO1_PROTOCOL == 1\r | |
2393 | \r | |
4225a882 | 2394 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
2395 | if (irmp_pulse_time >= RECS80_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80_START_BIT_PULSE_LEN_MAX &&\r | |
2396 | irmp_pause_time >= RECS80_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2397 | { // it's RECS80\r |
48664931 | 2398 | ANALYZE_PRINTF ("protocol = RECS80, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2399 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX,\r |
2400 | RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2401 | irmp_param_p = (IRMP_PARAMETER *) &recs80_param;\r |
4225a882 | 2402 | }\r |
2403 | else\r | |
2404 | #endif // IRMP_SUPPORT_RECS80_PROTOCOL == 1\r | |
2405 | \r | |
2406 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
31c1f035 | 2407 | if (((irmp_pulse_time >= RC5_START_BIT_LEN_MIN && irmp_pulse_time <= RC5_START_BIT_LEN_MAX) ||\r |
2408 | (irmp_pulse_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX)) &&\r | |
2409 | ((irmp_pause_time >= RC5_START_BIT_LEN_MIN && irmp_pause_time <= RC5_START_BIT_LEN_MAX) ||\r | |
2410 | (irmp_pause_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX)))\r | |
46dd89b7 | 2411 | { // it's RC5\r |
6f750020 | 2412 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
2413 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r | |
2414 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
2415 | {\r | |
2416 | ANALYZE_PRINTF ("protocol = RC5 or FDC\n");\r | |
2417 | ANALYZE_PRINTF ("FDC start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2418 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
2419 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
2420 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2421 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
2422 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
2423 | memcpy_P (&irmp_param2, &fdc_param, sizeof (IRMP_PARAMETER));\r | |
2424 | }\r | |
2425 | else\r | |
2426 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
12948cf3 | 2427 | \r |
6f750020 | 2428 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
2429 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r | |
2430 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
2431 | {\r | |
2432 | ANALYZE_PRINTF ("protocol = RC5 or RCCAR\n");\r | |
2433 | ANALYZE_PRINTF ("RCCAR start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2434 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
2435 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
2436 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2437 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
2438 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
2439 | memcpy_P (&irmp_param2, &rccar_param, sizeof (IRMP_PARAMETER));\r | |
2440 | }\r | |
2441 | else\r | |
2442 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2443 | {\r | |
1aee56bc | 2444 | ANALYZE_PRINTF ("protocol = RC5, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r |
6f750020 | 2445 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r |
31c1f035 | 2446 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX,\r |
1aee56bc | 2447 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r |
31c1f035 | 2448 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX);\r |
6f750020 | 2449 | }\r |
2450 | \r | |
46dd89b7 | 2451 | irmp_param_p = (IRMP_PARAMETER *) &rc5_param;\r |
504d9df9 | 2452 | last_pause = irmp_pause_time;\r |
4225a882 | 2453 | \r |
31c1f035 | 2454 | if ((irmp_pulse_time > RC5_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX) ||\r |
2455 | (irmp_pause_time > RC5_START_BIT_LEN_MAX && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX))\r | |
4225a882 | 2456 | {\r |
504d9df9 | 2457 | last_value = 0;\r |
4225a882 | 2458 | rc5_cmd_bit6 = 1<<6;\r |
2459 | }\r | |
2460 | else\r | |
2461 | {\r | |
504d9df9 | 2462 | last_value = 1;\r |
4225a882 | 2463 | }\r |
2464 | }\r | |
2465 | else\r | |
2466 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
2467 | \r | |
2468 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
2469 | if ( (irmp_pulse_time >= DENON_PULSE_LEN_MIN && irmp_pulse_time <= DENON_PULSE_LEN_MAX) &&\r | |
2470 | ((irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX) ||\r | |
2471 | (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)))\r | |
2472 | { // it's DENON\r | |
48664931 | 2473 | ANALYZE_PRINTF ("protocol = DENON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r |
4225a882 | 2474 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r |
2475 | DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX,\r | |
2476 | DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2477 | irmp_param_p = (IRMP_PARAMETER *) &denon_param;\r |
4225a882 | 2478 | }\r |
2479 | else\r | |
2480 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
2481 | \r | |
beda975f | 2482 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
2483 | if ( (irmp_pulse_time >= THOMSON_PULSE_LEN_MIN && irmp_pulse_time <= THOMSON_PULSE_LEN_MAX) &&\r | |
2484 | ((irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX) ||\r | |
2485 | (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)))\r | |
2486 | { // it's THOMSON\r | |
2487 | ANALYZE_PRINTF ("protocol = THOMSON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
2488 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX,\r | |
2489 | THOMSON_1_PAUSE_LEN_MIN, THOMSON_1_PAUSE_LEN_MAX,\r | |
2490 | THOMSON_0_PAUSE_LEN_MIN, THOMSON_0_PAUSE_LEN_MAX);\r | |
2491 | irmp_param_p = (IRMP_PARAMETER *) &thomson_param;\r | |
2492 | }\r | |
2493 | else\r | |
2494 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r | |
2495 | \r | |
3a7e26e1 | 2496 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
2497 | if (irmp_pulse_time >= BOSE_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= BOSE_START_BIT_PULSE_LEN_MAX &&\r | |
2498 | irmp_pause_time >= BOSE_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BOSE_START_BIT_PAUSE_LEN_MAX)\r | |
2499 | {\r | |
2500 | ANALYZE_PRINTF ("protocol = BOSE, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2501 | BOSE_START_BIT_PULSE_LEN_MIN, BOSE_START_BIT_PULSE_LEN_MAX,\r | |
2502 | BOSE_START_BIT_PAUSE_LEN_MIN, BOSE_START_BIT_PAUSE_LEN_MAX);\r | |
2503 | irmp_param_p = (IRMP_PARAMETER *) &bose_param;\r | |
2504 | }\r | |
2505 | else\r | |
2506 | #endif // IRMP_SUPPORT_BOSE_PROTOCOL == 1\r | |
2507 | \r | |
4225a882 | 2508 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
2509 | if (irmp_pulse_time >= RC6_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RC6_START_BIT_PULSE_LEN_MAX &&\r | |
2510 | irmp_pause_time >= RC6_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RC6_START_BIT_PAUSE_LEN_MAX)\r | |
2511 | { // it's RC6\r | |
48664931 | 2512 | ANALYZE_PRINTF ("protocol = RC6, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2513 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX,\r |
2514 | RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2515 | irmp_param_p = (IRMP_PARAMETER *) &rc6_param;\r |
504d9df9 | 2516 | last_pause = 0;\r |
c7a47e89 | 2517 | last_value = 1;\r |
4225a882 | 2518 | }\r |
2519 | else\r | |
2520 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2521 | \r | |
2522 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
2523 | if (irmp_pulse_time >= RECS80EXT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80EXT_START_BIT_PULSE_LEN_MAX &&\r | |
2524 | irmp_pause_time >= RECS80EXT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80EXT_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2525 | { // it's RECS80EXT\r |
48664931 | 2526 | ANALYZE_PRINTF ("protocol = RECS80EXT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2527 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX,\r |
2528 | RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2529 | irmp_param_p = (IRMP_PARAMETER *) &recs80ext_param;\r |
4225a882 | 2530 | }\r |
2531 | else\r | |
2532 | #endif // IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
2533 | \r | |
2534 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
2535 | if (irmp_pulse_time >= NUBERT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NUBERT_START_BIT_PULSE_LEN_MAX &&\r | |
2536 | irmp_pause_time >= NUBERT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NUBERT_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2537 | { // it's NUBERT\r |
48664931 | 2538 | ANALYZE_PRINTF ("protocol = NUBERT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2539 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX,\r |
2540 | NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2541 | irmp_param_p = (IRMP_PARAMETER *) &nubert_param;\r |
4225a882 | 2542 | }\r |
2543 | else\r | |
2544 | #endif // IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
2545 | \r | |
0a2f634b | 2546 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
2547 | if (irmp_pulse_time >= SPEAKER_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SPEAKER_START_BIT_PULSE_LEN_MAX &&\r | |
2548 | irmp_pause_time >= SPEAKER_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SPEAKER_START_BIT_PAUSE_LEN_MAX)\r | |
2549 | { // it's SPEAKER\r | |
2550 | ANALYZE_PRINTF ("protocol = SPEAKER, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2551 | SPEAKER_START_BIT_PULSE_LEN_MIN, SPEAKER_START_BIT_PULSE_LEN_MAX,\r | |
2552 | SPEAKER_START_BIT_PAUSE_LEN_MIN, SPEAKER_START_BIT_PAUSE_LEN_MAX);\r | |
2553 | irmp_param_p = (IRMP_PARAMETER *) &speaker_param;\r | |
2554 | }\r | |
2555 | else\r | |
2556 | #endif // IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r | |
2557 | \r | |
504d9df9 | 2558 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
2559 | if (irmp_pulse_time >= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX &&\r | |
2560 | irmp_pause_time >= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2561 | { // it's BANG_OLUFSEN\r |
48664931 | 2562 | ANALYZE_PRINTF ("protocol = BANG_OLUFSEN\n");\r |
2563 | ANALYZE_PRINTF ("start bit 1 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
504d9df9 | 2564 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r |
2565 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
48664931 | 2566 | ANALYZE_PRINTF ("start bit 2 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
504d9df9 | 2567 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r |
2568 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
48664931 | 2569 | ANALYZE_PRINTF ("start bit 3 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
504d9df9 | 2570 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r |
2571 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
48664931 | 2572 | ANALYZE_PRINTF ("start bit 4 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
504d9df9 | 2573 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r |
2574 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2575 | irmp_param_p = (IRMP_PARAMETER *) &bang_olufsen_param;\r |
504d9df9 | 2576 | last_value = 0;\r |
2577 | }\r | |
2578 | else\r | |
2579 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
2580 | \r | |
89e8cafb | 2581 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
2582 | if (irmp_pulse_time >= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN && irmp_pulse_time <= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX &&\r | |
2583 | irmp_pause_time >= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN && irmp_pause_time <= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX)\r | |
592411d1 | 2584 | { // it's GRUNDIG\r |
48664931 | 2585 | ANALYZE_PRINTF ("protocol = GRUNDIG, pre bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
89e8cafb | 2586 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r |
2587 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX);\r | |
592411d1 | 2588 | irmp_param_p = (IRMP_PARAMETER *) &grundig_param;\r |
2589 | last_pause = irmp_pause_time;\r | |
2590 | last_value = 1;\r | |
2591 | }\r | |
2592 | else\r | |
89e8cafb | 2593 | #endif // IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
592411d1 | 2594 | \r |
12948cf3 | 2595 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
2596 | if (((irmp_pulse_time >= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX) ||\r | |
31c1f035 | 2597 | (irmp_pulse_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX)) &&\r |
fc80d688 | 2598 | ((irmp_pause_time >= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX) || \r |
31c1f035 | 2599 | (irmp_pause_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX)))\r |
12948cf3 | 2600 | { // it's RUWIDO or SIEMENS\r |
2601 | ANALYZE_PRINTF ("protocol = RUWIDO, start bit timings: pulse: %3d - %3d or %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
2602 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
31c1f035 | 2603 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r |
12948cf3 | 2604 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r |
31c1f035 | 2605 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX);\r |
12948cf3 | 2606 | irmp_param_p = (IRMP_PARAMETER *) &ruwido_param;\r |
a7054daf | 2607 | last_pause = irmp_pause_time;\r |
2608 | last_value = 1;\r | |
2609 | }\r | |
2610 | else\r | |
12948cf3 | 2611 | #endif // IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
2612 | \r | |
48664931 | 2613 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
2614 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r | |
2615 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
eaaf80c3 | 2616 | {\r |
48664931 | 2617 | ANALYZE_PRINTF ("protocol = FDC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2618 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
2619 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
2620 | irmp_param_p = (IRMP_PARAMETER *) &fdc_param;\r | |
eaaf80c3 | 2621 | }\r |
2622 | else\r | |
48664931 | 2623 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
12948cf3 | 2624 | \r |
9e16d699 | 2625 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
2626 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r | |
2627 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
2628 | {\r | |
48664931 | 2629 | ANALYZE_PRINTF ("protocol = RCCAR, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
9e16d699 | 2630 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r |
2631 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
2632 | irmp_param_p = (IRMP_PARAMETER *) &rccar_param;\r | |
2633 | }\r | |
2634 | else\r | |
2635 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
89e8cafb | 2636 | \r |
111d6191 | 2637 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
2638 | if (irmp_pulse_time >= KATHREIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_START_BIT_PULSE_LEN_MAX &&\r | |
2639 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)\r | |
2640 | { // it's KATHREIN\r | |
2641 | ANALYZE_PRINTF ("protocol = KATHREIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2642 | KATHREIN_START_BIT_PULSE_LEN_MIN, KATHREIN_START_BIT_PULSE_LEN_MAX,\r | |
2643 | KATHREIN_START_BIT_PAUSE_LEN_MIN, KATHREIN_START_BIT_PAUSE_LEN_MAX);\r | |
2644 | irmp_param_p = (IRMP_PARAMETER *) &kathrein_param;\r | |
2645 | }\r | |
2646 | else\r | |
2647 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r | |
2648 | \r | |
deba2a0a | 2649 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
2650 | if (irmp_pulse_time >= NETBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NETBOX_START_BIT_PULSE_LEN_MAX &&\r | |
2651 | irmp_pause_time >= NETBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NETBOX_START_BIT_PAUSE_LEN_MAX)\r | |
2652 | { // it's NETBOX\r | |
2653 | ANALYZE_PRINTF ("protocol = NETBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2654 | NETBOX_START_BIT_PULSE_LEN_MIN, NETBOX_START_BIT_PULSE_LEN_MAX,\r | |
2655 | NETBOX_START_BIT_PAUSE_LEN_MIN, NETBOX_START_BIT_PAUSE_LEN_MAX);\r | |
2656 | irmp_param_p = (IRMP_PARAMETER *) &netbox_param;\r | |
2657 | }\r | |
2658 | else\r | |
2659 | #endif // IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r | |
2660 | \r | |
f50e01e7 | 2661 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
2662 | if (irmp_pulse_time >= LEGO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= LEGO_START_BIT_PULSE_LEN_MAX &&\r | |
2663 | irmp_pause_time >= LEGO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= LEGO_START_BIT_PAUSE_LEN_MAX)\r | |
2664 | {\r | |
2665 | ANALYZE_PRINTF ("protocol = LEGO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2666 | LEGO_START_BIT_PULSE_LEN_MIN, LEGO_START_BIT_PULSE_LEN_MAX,\r | |
2667 | LEGO_START_BIT_PAUSE_LEN_MIN, LEGO_START_BIT_PAUSE_LEN_MAX);\r | |
2668 | irmp_param_p = (IRMP_PARAMETER *) &lego_param;\r | |
2669 | }\r | |
2670 | else\r | |
93ba2e01 | 2671 | #endif // IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
f50e01e7 | 2672 | \r |
2fb27bfe | 2673 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
2674 | if (irmp_pulse_time >= A1TVBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= A1TVBOX_START_BIT_PULSE_LEN_MAX &&\r | |
2675 | irmp_pause_time >= A1TVBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= A1TVBOX_START_BIT_PAUSE_LEN_MAX)\r | |
2676 | { // it's A1TVBOX\r | |
2677 | ANALYZE_PRINTF ("protocol = A1TVBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2678 | A1TVBOX_START_BIT_PULSE_LEN_MIN, A1TVBOX_START_BIT_PULSE_LEN_MAX,\r | |
2679 | A1TVBOX_START_BIT_PAUSE_LEN_MIN, A1TVBOX_START_BIT_PAUSE_LEN_MAX);\r | |
2680 | irmp_param_p = (IRMP_PARAMETER *) &a1tvbox_param;\r | |
2681 | last_pause = 0;\r | |
2682 | last_value = 1;\r | |
2683 | }\r | |
2684 | else\r | |
b85cb27d | 2685 | #endif // IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
2686 | \r | |
2687 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
2688 | if (irmp_pulse_time >= ORTEK_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ORTEK_START_BIT_PULSE_LEN_MAX &&\r | |
2689 | irmp_pause_time >= ORTEK_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ORTEK_START_BIT_PAUSE_LEN_MAX)\r | |
2690 | { // it's ORTEK (Hama)\r | |
2691 | ANALYZE_PRINTF ("protocol = ORTEK, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2692 | ORTEK_START_BIT_PULSE_LEN_MIN, ORTEK_START_BIT_PULSE_LEN_MAX,\r | |
2693 | ORTEK_START_BIT_PAUSE_LEN_MIN, ORTEK_START_BIT_PAUSE_LEN_MAX);\r | |
2694 | irmp_param_p = (IRMP_PARAMETER *) &ortek_param;\r | |
40ca4604 | 2695 | last_pause = 0;\r |
2696 | last_value = 1;\r | |
2697 | parity = 0;\r | |
b85cb27d | 2698 | }\r |
2699 | else\r | |
cb93f9e9 | 2700 | #endif // IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
2fb27bfe | 2701 | \r |
cb93f9e9 | 2702 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
2703 | if (irmp_pulse_time >= RCMM32_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCMM32_START_BIT_PULSE_LEN_MAX &&\r | |
2704 | irmp_pause_time >= RCMM32_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_START_BIT_PAUSE_LEN_MAX)\r | |
2705 | { // it's RCMM\r | |
2706 | ANALYZE_PRINTF ("protocol = RCMM, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2707 | RCMM32_START_BIT_PULSE_LEN_MIN, RCMM32_START_BIT_PULSE_LEN_MAX,\r | |
2708 | RCMM32_START_BIT_PAUSE_LEN_MIN, RCMM32_START_BIT_PAUSE_LEN_MAX);\r | |
2709 | irmp_param_p = (IRMP_PARAMETER *) &rcmm_param;\r | |
2710 | }\r | |
2711 | else\r | |
2712 | #endif // IRMP_SUPPORT_RCMM_PROTOCOL == 1\r | |
4225a882 | 2713 | {\r |
48664931 | 2714 | ANALYZE_PRINTF ("protocol = UNKNOWN\n");\r |
1f54e86c | 2715 | // irmp_busy_flag = FALSE;\r |
4225a882 | 2716 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
2717 | }\r | |
2718 | \r | |
2719 | if (irmp_start_bit_detected)\r | |
2720 | {\r | |
46dd89b7 | 2721 | memcpy_P (&irmp_param, irmp_param_p, sizeof (IRMP_PARAMETER));\r |
2722 | \r | |
48664931 | 2723 | #ifdef ANALYZE\r |
77f488bb | 2724 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
2725 | {\r | |
48664931 | 2726 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max);\r |
2727 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max);\r | |
77f488bb | 2728 | }\r |
2729 | else\r | |
2730 | {\r | |
48664931 | 2731 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max,\r |
31c1f035 | 2732 | 2 * irmp_param.pulse_1_len_min, 2 * irmp_param.pulse_1_len_max);\r |
48664931 | 2733 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max,\r |
31c1f035 | 2734 | 2 * irmp_param.pause_1_len_min, 2 * irmp_param.pause_1_len_max);\r |
77f488bb | 2735 | }\r |
46dd89b7 | 2736 | \r |
6f750020 | 2737 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
2738 | if (irmp_param2.protocol)\r | |
2739 | {\r | |
2740 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param2.pulse_0_len_min, irmp_param2.pulse_0_len_max);\r | |
2741 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param2.pause_0_len_min, irmp_param2.pause_0_len_max);\r | |
2742 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param2.pulse_1_len_min, irmp_param2.pulse_1_len_max);\r | |
2743 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param2.pause_1_len_min, irmp_param2.pause_1_len_max);\r | |
2744 | }\r | |
2745 | #endif\r | |
2746 | \r | |
d823e852 | 2747 | \r |
504d9df9 | 2748 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
4225a882 | 2749 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL)\r |
2750 | {\r | |
48664931 | 2751 | ANALYZE_PRINTF ("pulse_toggle: %3d - %3d\n", RC6_TOGGLE_BIT_LEN_MIN, RC6_TOGGLE_BIT_LEN_MAX);\r |
4225a882 | 2752 | }\r |
504d9df9 | 2753 | #endif\r |
77f488bb | 2754 | \r |
2755 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r | |
2756 | {\r | |
93ba2e01 | 2757 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r |
2758 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max);\r | |
2759 | }\r | |
2760 | else\r | |
2761 | {\r | |
2762 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max,\r | |
2763 | 2 * irmp_param.pulse_0_len_min, 2 * irmp_param.pulse_0_len_max);\r | |
2764 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max,\r | |
2765 | 2 * irmp_param.pause_0_len_min, 2 * irmp_param.pause_0_len_max);\r | |
77f488bb | 2766 | }\r |
46dd89b7 | 2767 | \r |
504d9df9 | 2768 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
2769 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r | |
2770 | {\r | |
48664931 | 2771 | ANALYZE_PRINTF ("pulse_r: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r |
2772 | ANALYZE_PRINTF ("pause_r: %3d - %3d\n", BANG_OLUFSEN_R_PAUSE_LEN_MIN, BANG_OLUFSEN_R_PAUSE_LEN_MAX);\r | |
504d9df9 | 2773 | }\r |
2774 | #endif\r | |
2775 | \r | |
48664931 | 2776 | ANALYZE_PRINTF ("command_offset: %2d\n", irmp_param.command_offset);\r |
2777 | ANALYZE_PRINTF ("command_len: %3d\n", irmp_param.command_end - irmp_param.command_offset);\r | |
2778 | ANALYZE_PRINTF ("complete_len: %3d\n", irmp_param.complete_len);\r | |
2779 | ANALYZE_PRINTF ("stop_bit: %3d\n", irmp_param.stop_bit);\r | |
2780 | #endif // ANALYZE\r | |
4225a882 | 2781 | }\r |
2782 | \r | |
2783 | irmp_bit = 0;\r | |
2784 | \r | |
77f488bb | 2785 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
12948cf3 | 2786 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r |
2787 | irmp_param.protocol != IRMP_RUWIDO_PROTOCOL && // Manchester, but not RUWIDO\r | |
2788 | irmp_param.protocol != IRMP_RC6_PROTOCOL) // Manchester, but not RC6\r | |
4225a882 | 2789 | {\r |
31c1f035 | 2790 | if (irmp_pause_time > irmp_param.pulse_1_len_max && irmp_pause_time <= 2 * irmp_param.pulse_1_len_max)\r |
4225a882 | 2791 | {\r |
0f700c8e | 2792 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
48664931 | 2793 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r |
2794 | ANALYZE_NEWLINE ();\r | |
77f488bb | 2795 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1);\r |
592411d1 | 2796 | }\r |
6f750020 | 2797 | else if (! last_value) // && irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r |
592411d1 | 2798 | {\r |
0f700c8e | 2799 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
592411d1 | 2800 | \r |
48664931 | 2801 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r |
2802 | ANALYZE_NEWLINE ();\r | |
77f488bb | 2803 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0);\r |
a7054daf | 2804 | }\r |
2805 | }\r | |
2806 | else\r | |
77f488bb | 2807 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
a7054daf | 2808 | \r |
deba2a0a | 2809 | #if IRMP_SUPPORT_SERIAL == 1\r |
2810 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r | |
2811 | {\r | |
2812 | ; // do nothing\r | |
2813 | }\r | |
2814 | else\r | |
2815 | #endif // IRMP_SUPPORT_SERIAL == 1\r | |
2816 | \r | |
2817 | \r | |
4225a882 | 2818 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
2819 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r | |
2820 | {\r | |
0f700c8e | 2821 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
4225a882 | 2822 | \r |
2823 | if (irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX)\r | |
2824 | { // pause timings correct for "1"?\r | |
48664931 | 2825 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r |
2826 | ANALYZE_NEWLINE ();\r | |
4225a882 | 2827 | irmp_store_bit (1);\r |
2828 | }\r | |
2829 | else // if (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)\r | |
2830 | { // pause timings correct for "0"?\r | |
48664931 | 2831 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r |
2832 | ANALYZE_NEWLINE ();\r | |
4225a882 | 2833 | irmp_store_bit (0);\r |
2834 | }\r | |
2835 | }\r | |
881dbf79 | 2836 | else\r |
4225a882 | 2837 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
beda975f | 2838 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
2839 | if (irmp_param.protocol == IRMP_THOMSON_PROTOCOL)\r | |
2840 | {\r | |
0f700c8e | 2841 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
beda975f | 2842 | \r |
2843 | if (irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX)\r | |
2844 | { // pause timings correct for "1"?\r | |
2845 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r | |
2846 | ANALYZE_NEWLINE ();\r | |
2847 | irmp_store_bit (1);\r | |
2848 | }\r | |
2849 | else // if (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)\r | |
2850 | { // pause timings correct for "0"?\r | |
2851 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r | |
2852 | ANALYZE_NEWLINE ();\r | |
2853 | irmp_store_bit (0);\r | |
2854 | }\r | |
2855 | }\r | |
2856 | else\r | |
2857 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r | |
881dbf79 | 2858 | {\r |
2859 | ; // else do nothing\r | |
2860 | }\r | |
4225a882 | 2861 | \r |
2862 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
2863 | irmp_pause_time = 0;\r | |
2864 | wait_for_start_space = 0;\r | |
2865 | }\r | |
2866 | }\r | |
2867 | else if (wait_for_space) // the data section....\r | |
2868 | { // counting the time of darkness....\r | |
2869 | uint8_t got_light = FALSE;\r | |
2870 | \r | |
2871 | if (irmp_input) // still dark?\r | |
2872 | { // yes...\r | |
2873 | if (irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 1)\r | |
2874 | {\r | |
a42d1ee6 | 2875 | if (\r |
2876 | #if IRMP_SUPPORT_MANCHESTER == 1\r | |
2877 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) ||\r | |
2878 | #endif\r | |
2879 | #if IRMP_SUPPORT_SERIAL == 1\r | |
deba2a0a | 2880 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) ||\r |
a42d1ee6 | 2881 | #endif\r |
1aee56bc | 2882 | (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max))\r |
4225a882 | 2883 | {\r |
48664931 | 2884 | #ifdef ANALYZE\r |
77f488bb | 2885 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
4225a882 | 2886 | {\r |
48664931 | 2887 | ANALYZE_PRINTF ("stop bit detected\n");\r |
4225a882 | 2888 | }\r |
2889 | #endif\r | |
2890 | irmp_param.stop_bit = 0;\r | |
2891 | }\r | |
2892 | else\r | |
2893 | {\r | |
93ba2e01 | 2894 | ANALYZE_PRINTF ("error: stop bit timing wrong, irmp_bit = %d, irmp_pulse_time = %d, pulse_0_len_min = %d, pulse_0_len_max = %d\n",\r |
2895 | irmp_bit, irmp_pulse_time, irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
4225a882 | 2896 | \r |
1f54e86c | 2897 | // irmp_busy_flag = FALSE;\r |
4225a882 | 2898 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
2899 | irmp_pulse_time = 0;\r | |
2900 | irmp_pause_time = 0;\r | |
2901 | }\r | |
2902 | }\r | |
2903 | else\r | |
2904 | {\r | |
9547ee89 | 2905 | irmp_pause_time++; // increment counter\r |
4225a882 | 2906 | \r |
2907 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
9547ee89 | 2908 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && // Sony has a variable number of bits:\r |
2909 | irmp_pause_time > SIRCS_PAUSE_LEN_MAX && // minimum is 12\r | |
2910 | irmp_bit >= 12 - 1) // pause too long?\r | |
2911 | { // yes, break and close this frame\r | |
2912 | irmp_param.complete_len = irmp_bit + 1; // set new complete length\r | |
2913 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
2914 | irmp_tmp_address |= (irmp_bit - SIRCS_MINIMUM_DATA_LEN + 1) << 8; // new: store number of additional bits in upper byte of address!\r | |
2915 | irmp_param.command_end = irmp_param.command_offset + irmp_bit + 1; // correct command length\r | |
2916 | irmp_pause_time = SIRCS_PAUSE_LEN_MAX - 1; // correct pause length\r | |
4225a882 | 2917 | }\r |
2918 | else\r | |
2919 | #endif\r | |
deba2a0a | 2920 | #if IRMP_SUPPORT_SERIAL == 1\r |
a42d1ee6 | 2921 | // NETBOX generates no stop bit, here is the timeout condition:\r |
deba2a0a | 2922 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) && irmp_param.protocol == IRMP_NETBOX_PROTOCOL &&\r |
a42d1ee6 | 2923 | irmp_pause_time >= NETBOX_PULSE_LEN * (NETBOX_COMPLETE_DATA_LEN - irmp_bit))\r |
deba2a0a | 2924 | {\r |
2925 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
2926 | }\r | |
2927 | else\r | |
2928 | #endif\r | |
89e8cafb | 2929 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
77f488bb | 2930 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && !irmp_param.stop_bit)\r |
d155e9ab | 2931 | {\r |
f60c4644 | 2932 | if (irmp_pause_time > IR60_TIMEOUT_LEN && (irmp_bit == 5 || irmp_bit == 6))\r |
89e8cafb | 2933 | {\r |
2934 | ANALYZE_PRINTF ("Switching to IR60 protocol\n");\r | |
2935 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2936 | irmp_param.stop_bit = TRUE; // set flag\r | |
2937 | \r | |
2938 | irmp_param.protocol = IRMP_IR60_PROTOCOL; // change protocol\r | |
2939 | irmp_param.complete_len = IR60_COMPLETE_DATA_LEN; // correct complete len\r | |
2940 | irmp_param.address_offset = IR60_ADDRESS_OFFSET;\r | |
2941 | irmp_param.address_end = IR60_ADDRESS_OFFSET + IR60_ADDRESS_LEN;\r | |
2942 | irmp_param.command_offset = IR60_COMMAND_OFFSET;\r | |
2943 | irmp_param.command_end = IR60_COMMAND_OFFSET + IR60_COMMAND_LEN;\r | |
2944 | \r | |
2945 | irmp_tmp_command <<= 1;\r | |
2946 | irmp_tmp_command |= first_bit;\r | |
2947 | }\r | |
31c1f035 | 2948 | else if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN - 2)\r |
77f488bb | 2949 | { // special manchester decoder\r |
2950 | irmp_param.complete_len = GRUNDIG_COMPLETE_DATA_LEN; // correct complete len\r | |
2951 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2952 | irmp_param.stop_bit = TRUE; // set flag\r | |
2953 | }\r | |
2954 | else if (irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN)\r | |
d155e9ab | 2955 | {\r |
48664931 | 2956 | ANALYZE_PRINTF ("Switching to NOKIA protocol\n");\r |
77f488bb | 2957 | irmp_param.protocol = IRMP_NOKIA_PROTOCOL; // change protocol\r |
2958 | irmp_param.address_offset = NOKIA_ADDRESS_OFFSET;\r | |
2959 | irmp_param.address_end = NOKIA_ADDRESS_OFFSET + NOKIA_ADDRESS_LEN;\r | |
2960 | irmp_param.command_offset = NOKIA_COMMAND_OFFSET;\r | |
2961 | irmp_param.command_end = NOKIA_COMMAND_OFFSET + NOKIA_COMMAND_LEN;\r | |
2962 | \r | |
2963 | if (irmp_tmp_command & 0x300)\r | |
2964 | {\r | |
2965 | irmp_tmp_address = (irmp_tmp_command >> 8);\r | |
2966 | irmp_tmp_command &= 0xFF;\r | |
2967 | }\r | |
d155e9ab | 2968 | }\r |
2969 | }\r | |
2970 | else\r | |
2971 | #endif\r | |
12948cf3 | 2972 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
2973 | if (irmp_param.protocol == IRMP_RUWIDO_PROTOCOL && !irmp_param.stop_bit)\r | |
2974 | {\r | |
31c1f035 | 2975 | if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= RUWIDO_COMPLETE_DATA_LEN - 2)\r |
12948cf3 | 2976 | { // special manchester decoder\r |
2977 | irmp_param.complete_len = RUWIDO_COMPLETE_DATA_LEN; // correct complete len\r | |
2978 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2979 | irmp_param.stop_bit = TRUE; // set flag\r | |
2980 | }\r | |
2981 | else if (irmp_bit >= RUWIDO_COMPLETE_DATA_LEN)\r | |
2982 | {\r | |
2983 | ANALYZE_PRINTF ("Switching to SIEMENS protocol\n");\r | |
2984 | irmp_param.protocol = IRMP_SIEMENS_PROTOCOL; // change protocol\r | |
2985 | irmp_param.address_offset = SIEMENS_ADDRESS_OFFSET;\r | |
2986 | irmp_param.address_end = SIEMENS_ADDRESS_OFFSET + SIEMENS_ADDRESS_LEN;\r | |
2987 | irmp_param.command_offset = SIEMENS_COMMAND_OFFSET;\r | |
2988 | irmp_param.command_end = SIEMENS_COMMAND_OFFSET + SIEMENS_COMMAND_LEN;\r | |
2989 | \r | |
2990 | // 76543210\r | |
2991 | // RUWIDO: AAAAAAAAACCCCCCCp\r | |
2992 | // SIEMENS: AAAAAAAAAAACCCCCCCCCCp\r | |
2993 | irmp_tmp_address <<= 2;\r | |
2994 | irmp_tmp_address |= (irmp_tmp_command >> 6);\r | |
2995 | irmp_tmp_command &= 0x003F;\r | |
cb93f9e9 | 2996 | // irmp_tmp_command <<= 4;\r |
12948cf3 | 2997 | irmp_tmp_command |= last_value;\r |
2998 | }\r | |
2999 | }\r | |
3000 | else\r | |
3001 | #endif\r | |
40ca4604 | 3002 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
3003 | if (irmp_param.protocol == IRMP_ROOMBA_PROTOCOL && // Roomba has no stop bit\r | |
cb93f9e9 | 3004 | irmp_bit >= ROOMBA_COMPLETE_DATA_LEN - 1) // it's the last data bit...\r |
40ca4604 | 3005 | { // break and close this frame\r |
3006 | if (irmp_pulse_time >= ROOMBA_1_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_1_PULSE_LEN_MAX)\r | |
3007 | {\r | |
cb93f9e9 | 3008 | irmp_pause_time = ROOMBA_1_PAUSE_LEN_EXACT;\r |
40ca4604 | 3009 | }\r |
3010 | else if (irmp_pulse_time >= ROOMBA_0_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_0_PULSE_LEN_MAX)\r | |
3011 | {\r | |
3012 | irmp_pause_time = ROOMBA_0_PAUSE_LEN;\r | |
3013 | }\r | |
3014 | \r | |
3015 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3016 | }\r | |
3017 | else\r | |
3018 | #endif\r | |
77f488bb | 3019 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
3020 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r | |
31c1f035 | 3021 | irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= irmp_param.complete_len - 2 && !irmp_param.stop_bit)\r |
77f488bb | 3022 | { // special manchester decoder\r |
a7054daf | 3023 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r |
3024 | irmp_param.stop_bit = TRUE; // set flag\r | |
3025 | }\r | |
3026 | else\r | |
77f488bb | 3027 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
504d9df9 | 3028 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
4225a882 | 3029 | { // yes...\r |
3030 | if (irmp_bit == irmp_param.complete_len - 1 && irmp_param.stop_bit == 0)\r | |
3031 | {\r | |
3032 | irmp_bit++;\r | |
3033 | }\r | |
770a1a9d | 3034 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
3035 | else if (irmp_param.protocol == IRMP_NEC_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r | |
3036 | {\r | |
93ba2e01 | 3037 | ANALYZE_PRINTF ("Switching to JVC protocol, irmp_bit = %d\n", irmp_bit);\r |
770a1a9d | 3038 | irmp_param.stop_bit = TRUE; // set flag\r |
3039 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
3040 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
3041 | irmp_tmp_command = (irmp_tmp_address >> 4); // set command: upper 12 bits are command bits\r | |
3042 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
3043 | irmp_start_bit_detected = 1; // tricky: don't wait for another start bit...\r | |
3044 | }\r | |
3045 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
35213800 | 3046 | \r |
3047 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
3048 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
3049 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit == 32) // it was a NEC stop bit\r | |
3050 | {\r | |
3051 | ANALYZE_PRINTF ("Switching to NEC protocol\n");\r | |
3052 | irmp_param.stop_bit = TRUE; // set flag\r | |
3053 | irmp_param.protocol = IRMP_NEC_PROTOCOL; // switch protocol\r | |
3054 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
3055 | \r | |
3056 | // 0123456789ABC0123456789ABC0123456701234567\r | |
3057 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
3058 | // NEC: AAAAAAAAaaaaaaaaCCCCCCCCcccccccc\r | |
0f700c8e | 3059 | irmp_tmp_address |= (irmp_tmp_address2 & 0x0007) << 13; // fm 2012-02-13: 12 -> 13\r |
35213800 | 3060 | irmp_tmp_command = (irmp_tmp_address2 >> 3) | (irmp_tmp_command << 10);\r |
3061 | }\r | |
3062 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
3063 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
93ba2e01 | 3064 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r |
35213800 | 3065 | {\r |
93ba2e01 | 3066 | ANALYZE_PRINTF ("Switching to JVC protocol, irmp_bit = %d\n", irmp_bit);\r |
35213800 | 3067 | irmp_param.stop_bit = TRUE; // set flag\r |
3068 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
3069 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
3070 | \r | |
3071 | // 0123456789ABC0123456789ABC0123456701234567\r | |
3072 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
3073 | // JVC: AAAACCCCCCCCCCCC\r | |
3074 | irmp_tmp_command = (irmp_tmp_address >> 4) | (irmp_tmp_address2 << 9); // set command: upper 12 bits are command bits\r | |
3075 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
3076 | }\r | |
3077 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
3078 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
cb93f9e9 | 3079 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
3080 | else if (irmp_param.protocol == IRMP_RCMM32_PROTOCOL && (irmp_bit == 12 || irmp_bit == 24)) // it was a RCMM stop bit\r | |
3081 | {\r | |
3082 | if (irmp_bit == 12)\r | |
3083 | {\r | |
3084 | irmp_tmp_command = (irmp_tmp_address & 0xFF); // set command: lower 8 bits are command bits\r | |
3085 | irmp_tmp_address >>= 8; // upper 4 bits are address bits\r | |
3086 | \r | |
3087 | ANALYZE_PRINTF ("Switching to RCMM12 protocol, irmp_bit = %d\n", irmp_bit);\r | |
3088 | irmp_param.protocol = IRMP_RCMM12_PROTOCOL; // switch protocol\r | |
3089 | }\r | |
3090 | else // if ((irmp_bit == 24)\r | |
3091 | {\r | |
3092 | ANALYZE_PRINTF ("Switching to RCMM24 protocol, irmp_bit = %d\n", irmp_bit);\r | |
3093 | irmp_param.protocol = IRMP_RCMM24_PROTOCOL; // switch protocol\r | |
3094 | }\r | |
3095 | irmp_param.stop_bit = TRUE; // set flag\r | |
3096 | irmp_param.complete_len = irmp_bit; // patch length\r | |
3097 | }\r | |
3098 | #endif // IRMP_SUPPORT_RCMM_PROTOCOL == 1\r | |
4225a882 | 3099 | else\r |
3100 | {\r | |
48664931 | 3101 | ANALYZE_PRINTF ("error 2: pause %d after data bit %d too long\n", irmp_pause_time, irmp_bit);\r |
3102 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4225a882 | 3103 | \r |
1f54e86c | 3104 | // irmp_busy_flag = FALSE;\r |
4225a882 | 3105 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
3106 | irmp_pulse_time = 0;\r | |
3107 | irmp_pause_time = 0;\r | |
3108 | }\r | |
3109 | }\r | |
3110 | }\r | |
3111 | }\r | |
3112 | else\r | |
3113 | { // got light now!\r | |
3114 | got_light = TRUE;\r | |
3115 | }\r | |
3116 | \r | |
3117 | if (got_light)\r | |
3118 | {\r | |
0f700c8e | 3119 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
4225a882 | 3120 | \r |
77f488bb | 3121 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
d823e852 | 3122 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER)) // Manchester\r |
4225a882 | 3123 | {\r |
31c1f035 | 3124 | #if 1\r |
3125 | if (irmp_pulse_time > irmp_param.pulse_1_len_max /* && irmp_pulse_time <= 2 * irmp_param.pulse_1_len_max */)\r | |
3126 | #else // better, but some IR-RCs use asymmetric timings :-/\r | |
3127 | if (irmp_pulse_time > irmp_param.pulse_1_len_max && irmp_pulse_time <= 2 * irmp_param.pulse_1_len_max &&\r | |
3128 | irmp_pause_time <= 2 * irmp_param.pause_1_len_max)\r | |
fc80d688 | 3129 | #endif\r |
4225a882 | 3130 | {\r |
c7a47e89 | 3131 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
3132 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r | |
4225a882 | 3133 | {\r |
c7a47e89 | 3134 | ANALYZE_PUTCHAR ('T');\r |
3135 | if (irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode 6A\r | |
3136 | {\r | |
3137 | irmp_store_bit (1);\r | |
3138 | last_value = 1;\r | |
3139 | }\r | |
3140 | else // RC6 mode 0\r | |
3141 | {\r | |
3142 | irmp_store_bit (0);\r | |
3143 | last_value = 0;\r | |
3144 | }\r | |
3145 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3146 | }\r |
c7a47e89 | 3147 | else\r |
3148 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
3149 | {\r | |
3150 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r | |
3151 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1 );\r | |
4225a882 | 3152 | \r |
c7a47e89 | 3153 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
3154 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r | |
3155 | {\r | |
3156 | ANALYZE_PUTCHAR ('T');\r | |
3157 | irmp_store_bit (1);\r | |
3158 | \r | |
31c1f035 | 3159 | if (irmp_pause_time > 2 * irmp_param.pause_1_len_max)\r |
c7a47e89 | 3160 | {\r |
3161 | last_value = 0;\r | |
3162 | }\r | |
3163 | else\r | |
3164 | {\r | |
3165 | last_value = 1;\r | |
3166 | }\r | |
3167 | ANALYZE_NEWLINE ();\r | |
3168 | }\r | |
3169 | else\r | |
77f488bb | 3170 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
c7a47e89 | 3171 | {\r |
3172 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r | |
3173 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0 );\r | |
6f750020 | 3174 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
c7a47e89 | 3175 | if (! irmp_param2.protocol)\r |
6f750020 | 3176 | #endif\r |
c7a47e89 | 3177 | {\r |
3178 | ANALYZE_NEWLINE ();\r | |
3179 | }\r | |
3180 | last_value = (irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0;\r | |
3181 | }\r | |
6f750020 | 3182 | }\r |
592411d1 | 3183 | }\r |
31c1f035 | 3184 | else if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max\r |
3185 | /* && irmp_pause_time <= 2 * irmp_param.pause_1_len_max */)\r | |
592411d1 | 3186 | {\r |
77f488bb | 3187 | uint8_t manchester_value;\r |
592411d1 | 3188 | \r |
31c1f035 | 3189 | if (last_pause > irmp_param.pause_1_len_max && last_pause <= 2 * irmp_param.pause_1_len_max)\r |
592411d1 | 3190 | {\r |
77f488bb | 3191 | manchester_value = last_value ? 0 : 1;\r |
3192 | last_value = manchester_value;\r | |
592411d1 | 3193 | }\r |
3194 | else\r | |
3195 | {\r | |
77f488bb | 3196 | manchester_value = last_value;\r |
592411d1 | 3197 | }\r |
3198 | \r | |
48664931 | 3199 | ANALYZE_PUTCHAR (manchester_value + '0');\r |
c7a47e89 | 3200 | \r |
6f750020 | 3201 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
3202 | if (! irmp_param2.protocol)\r | |
3203 | #endif\r | |
3204 | {\r | |
3205 | ANALYZE_NEWLINE ();\r | |
3206 | }\r | |
c7a47e89 | 3207 | \r |
3208 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
3209 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 1 && manchester_value == 1) // RC6 mode != 0 ???\r | |
3210 | {\r | |
3211 | ANALYZE_PRINTF ("Switching to RC6A protocol\n");\r | |
3212 | irmp_param.complete_len = RC6_COMPLETE_DATA_LEN_LONG;\r | |
3213 | irmp_param.address_offset = 5;\r | |
3214 | irmp_param.address_end = irmp_param.address_offset + 15;\r | |
3215 | irmp_param.command_offset = irmp_param.address_end + 1; // skip 1 system bit, changes like a toggle bit\r | |
3216 | irmp_param.command_end = irmp_param.command_offset + 16 - 1;\r | |
9547ee89 | 3217 | irmp_tmp_address = 0;\r |
c7a47e89 | 3218 | }\r |
3219 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
3220 | \r | |
77f488bb | 3221 | irmp_store_bit (manchester_value);\r |
a7054daf | 3222 | }\r |
6f750020 | 3223 | else\r |
3224 | {\r | |
3225 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3226 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL &&\r | |
3227 | irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX &&\r | |
3228 | ((irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX) ||\r | |
3229 | (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)))\r | |
3230 | {\r | |
3231 | ANALYZE_PUTCHAR ('?');\r | |
d823e852 | 3232 | irmp_param.protocol = 0; // switch to FDC, see below\r |
6f750020 | 3233 | }\r |
3234 | else\r | |
3235 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3236 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
3237 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL &&\r | |
3238 | irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX &&\r | |
3239 | ((irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX) ||\r | |
3240 | (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)))\r | |
3241 | {\r | |
3242 | ANALYZE_PUTCHAR ('?');\r | |
d823e852 | 3243 | irmp_param.protocol = 0; // switch to RCCAR, see below\r |
6f750020 | 3244 | }\r |
3245 | else\r | |
3246 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
3247 | {\r | |
3248 | ANALYZE_PUTCHAR ('?');\r | |
3249 | ANALYZE_NEWLINE ();\r | |
c7a47e89 | 3250 | ANALYZE_PRINTF ("error 3 manchester: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
6f750020 | 3251 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r |
1f54e86c | 3252 | // irmp_busy_flag = FALSE;\r |
6f750020 | 3253 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
3254 | irmp_pause_time = 0;\r | |
3255 | }\r | |
3256 | }\r | |
3257 | \r | |
3258 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3259 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL && irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX)\r | |
3260 | {\r | |
3261 | if (irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX)\r | |
3262 | {\r | |
3263 | ANALYZE_PRINTF (" 1 (FDC)\n");\r | |
3264 | irmp_store_bit2 (1);\r | |
3265 | }\r | |
3266 | else if (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)\r | |
3267 | {\r | |
3268 | ANALYZE_PRINTF (" 0 (FDC)\n");\r | |
3269 | irmp_store_bit2 (0);\r | |
3270 | }\r | |
3271 | \r | |
3272 | if (! irmp_param.protocol)\r | |
3273 | {\r | |
3274 | ANALYZE_PRINTF ("Switching to FDC protocol\n");\r | |
3275 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r | |
3276 | irmp_param2.protocol = 0;\r | |
3277 | irmp_tmp_address = irmp_tmp_address2;\r | |
3278 | irmp_tmp_command = irmp_tmp_command2;\r | |
3279 | }\r | |
3280 | }\r | |
3281 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3282 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
3283 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL && irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX)\r | |
3284 | {\r | |
3285 | if (irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX)\r | |
3286 | {\r | |
3287 | ANALYZE_PRINTF (" 1 (RCCAR)\n");\r | |
3288 | irmp_store_bit2 (1);\r | |
3289 | }\r | |
3290 | else if (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)\r | |
3291 | {\r | |
3292 | ANALYZE_PRINTF (" 0 (RCCAR)\n");\r | |
3293 | irmp_store_bit2 (0);\r | |
3294 | }\r | |
3295 | \r | |
3296 | if (! irmp_param.protocol)\r | |
3297 | {\r | |
3298 | ANALYZE_PRINTF ("Switching to RCCAR protocol\n");\r | |
3299 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r | |
3300 | irmp_param2.protocol = 0;\r | |
3301 | irmp_tmp_address = irmp_tmp_address2;\r | |
3302 | irmp_tmp_command = irmp_tmp_command2;\r | |
3303 | }\r | |
3304 | }\r | |
3305 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
a7054daf | 3306 | \r |
77f488bb | 3307 | last_pause = irmp_pause_time;\r |
3308 | wait_for_space = 0;\r | |
a7054daf | 3309 | }\r |
3310 | else\r | |
77f488bb | 3311 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
3312 | \r | |
deba2a0a | 3313 | #if IRMP_SUPPORT_SERIAL == 1\r |
3314 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r | |
3315 | {\r | |
3316 | while (irmp_bit < irmp_param.complete_len && irmp_pulse_time > irmp_param.pulse_1_len_max)\r | |
3317 | {\r | |
3318 | ANALYZE_PUTCHAR ('1');\r | |
3319 | irmp_store_bit (1);\r | |
3320 | \r | |
3321 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min)\r | |
3322 | {\r | |
3323 | irmp_pulse_time -= irmp_param.pulse_1_len_min;\r | |
3324 | }\r | |
3325 | else\r | |
3326 | {\r | |
3327 | irmp_pulse_time = 0;\r | |
3328 | }\r | |
3329 | }\r | |
3330 | \r | |
3331 | while (irmp_bit < irmp_param.complete_len && irmp_pause_time > irmp_param.pause_1_len_max)\r | |
3332 | {\r | |
3333 | ANALYZE_PUTCHAR ('0');\r | |
3334 | irmp_store_bit (0);\r | |
3335 | \r | |
3336 | if (irmp_pause_time >= irmp_param.pause_1_len_min)\r | |
3337 | {\r | |
3338 | irmp_pause_time -= irmp_param.pause_1_len_min;\r | |
3339 | }\r | |
3340 | else\r | |
3341 | {\r | |
3342 | irmp_pause_time = 0;\r | |
3343 | }\r | |
3344 | }\r | |
3345 | ANALYZE_NEWLINE ();\r | |
3346 | wait_for_space = 0;\r | |
3347 | }\r | |
3348 | else\r | |
3349 | #endif // IRMP_SUPPORT_SERIAL == 1\r | |
a7054daf | 3350 | \r |
4225a882 | 3351 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
3352 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit == 16) // Samsung: 16th bit\r | |
3353 | {\r | |
3354 | if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX &&\r | |
3355 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
3356 | {\r | |
48664931 | 3357 | ANALYZE_PRINTF ("SYNC\n");\r |
4225a882 | 3358 | wait_for_space = 0;\r |
3359 | irmp_tmp_id = 0;\r | |
3360 | irmp_bit++;\r | |
3361 | }\r | |
3362 | else if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX)\r | |
3363 | {\r | |
5b437ff6 | 3364 | irmp_param.protocol = IRMP_SAMSUNG32_PROTOCOL;\r |
3365 | irmp_param.command_offset = SAMSUNG32_COMMAND_OFFSET;\r | |
3366 | irmp_param.command_end = SAMSUNG32_COMMAND_OFFSET + SAMSUNG32_COMMAND_LEN;\r | |
3367 | irmp_param.complete_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
3368 | \r | |
4225a882 | 3369 | if (irmp_pause_time >= SAMSUNG_1_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_1_PAUSE_LEN_MAX)\r |
3370 | {\r | |
48664931 | 3371 | ANALYZE_PUTCHAR ('1');\r |
3372 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3373 | irmp_store_bit (1);\r |
3374 | wait_for_space = 0;\r | |
3375 | }\r | |
3376 | else\r | |
3377 | {\r | |
48664931 | 3378 | ANALYZE_PUTCHAR ('0');\r |
3379 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3380 | irmp_store_bit (0);\r |
3381 | wait_for_space = 0;\r | |
3382 | }\r | |
3383 | \r | |
48664931 | 3384 | ANALYZE_PRINTF ("Switching to SAMSUNG32 protocol\n");\r |
4225a882 | 3385 | }\r |
3386 | else\r | |
3387 | { // timing incorrect!\r | |
48664931 | 3388 | ANALYZE_PRINTF ("error 3 Samsung: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3389 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3390 | // irmp_busy_flag = FALSE;\r |
504d9df9 | 3391 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
4225a882 | 3392 | irmp_pause_time = 0;\r |
3393 | }\r | |
4225a882 | 3394 | }\r |
3395 | else\r | |
3396 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL\r | |
3397 | \r | |
fc80d688 | 3398 | #if IRMP_SUPPORT_NEC16_PROTOCOL\r |
35213800 | 3399 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
3400 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL &&\r | |
3401 | #else // IRMP_SUPPORT_NEC_PROTOCOL instead\r | |
3402 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL &&\r | |
3403 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
3404 | irmp_bit == 8 && irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r | |
fc80d688 | 3405 | {\r |
3406 | ANALYZE_PRINTF ("Switching to NEC16 protocol\n");\r | |
7644ac04 | 3407 | irmp_param.protocol = IRMP_NEC16_PROTOCOL;\r |
35213800 | 3408 | irmp_param.address_offset = NEC16_ADDRESS_OFFSET;\r |
3409 | irmp_param.address_end = NEC16_ADDRESS_OFFSET + NEC16_ADDRESS_LEN;\r | |
3410 | irmp_param.command_offset = NEC16_COMMAND_OFFSET;\r | |
3411 | irmp_param.command_end = NEC16_COMMAND_OFFSET + NEC16_COMMAND_LEN;\r | |
3412 | irmp_param.complete_len = NEC16_COMPLETE_DATA_LEN;\r | |
fc80d688 | 3413 | wait_for_space = 0;\r |
3414 | }\r | |
3415 | else\r | |
3416 | #endif // IRMP_SUPPORT_NEC16_PROTOCOL\r | |
3417 | \r | |
504d9df9 | 3418 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
3419 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r | |
3420 | {\r | |
3421 | if (irmp_pulse_time >= BANG_OLUFSEN_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_PULSE_LEN_MAX)\r | |
3422 | {\r | |
46dd89b7 | 3423 | if (irmp_bit == 1) // Bang & Olufsen: 3rd bit\r |
504d9df9 | 3424 | {\r |
3425 | if (irmp_pause_time >= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX)\r | |
3426 | {\r | |
48664931 | 3427 | ANALYZE_PRINTF ("3rd start bit\n");\r |
504d9df9 | 3428 | wait_for_space = 0;\r |
504d9df9 | 3429 | irmp_bit++;\r |
3430 | }\r | |
3431 | else\r | |
d155e9ab | 3432 | { // timing incorrect!\r |
48664931 | 3433 | ANALYZE_PRINTF ("error 3a B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3434 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3435 | // irmp_busy_flag = FALSE;\r |
46dd89b7 | 3436 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
504d9df9 | 3437 | irmp_pause_time = 0;\r |
3438 | }\r | |
504d9df9 | 3439 | }\r |
46dd89b7 | 3440 | else if (irmp_bit == 19) // Bang & Olufsen: trailer bit\r |
504d9df9 | 3441 | {\r |
3442 | if (irmp_pause_time >= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX)\r | |
3443 | {\r | |
48664931 | 3444 | ANALYZE_PRINTF ("trailer bit\n");\r |
504d9df9 | 3445 | wait_for_space = 0;\r |
504d9df9 | 3446 | irmp_bit++;\r |
3447 | }\r | |
3448 | else\r | |
46dd89b7 | 3449 | { // timing incorrect!\r |
48664931 | 3450 | ANALYZE_PRINTF ("error 3b B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3451 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3452 | // irmp_busy_flag = FALSE;\r |
46dd89b7 | 3453 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
504d9df9 | 3454 | irmp_pause_time = 0;\r |
3455 | }\r | |
504d9df9 | 3456 | }\r |
3457 | else\r | |
3458 | {\r | |
46dd89b7 | 3459 | if (irmp_pause_time >= BANG_OLUFSEN_1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_1_PAUSE_LEN_MAX)\r |
3460 | { // pulse & pause timings correct for "1"?\r | |
48664931 | 3461 | ANALYZE_PUTCHAR ('1');\r |
3462 | ANALYZE_NEWLINE ();\r | |
504d9df9 | 3463 | irmp_store_bit (1);\r |
3464 | last_value = 1;\r | |
3465 | wait_for_space = 0;\r | |
3466 | }\r | |
46dd89b7 | 3467 | else if (irmp_pause_time >= BANG_OLUFSEN_0_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_0_PAUSE_LEN_MAX)\r |
3468 | { // pulse & pause timings correct for "0"?\r | |
48664931 | 3469 | ANALYZE_PUTCHAR ('0');\r |
3470 | ANALYZE_NEWLINE ();\r | |
504d9df9 | 3471 | irmp_store_bit (0);\r |
3472 | last_value = 0;\r | |
3473 | wait_for_space = 0;\r | |
3474 | }\r | |
3475 | else if (irmp_pause_time >= BANG_OLUFSEN_R_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_R_PAUSE_LEN_MAX)\r | |
3476 | {\r | |
48664931 | 3477 | ANALYZE_PUTCHAR (last_value + '0');\r |
3478 | ANALYZE_NEWLINE ();\r | |
504d9df9 | 3479 | irmp_store_bit (last_value);\r |
3480 | wait_for_space = 0;\r | |
3481 | }\r | |
3482 | else\r | |
46dd89b7 | 3483 | { // timing incorrect!\r |
48664931 | 3484 | ANALYZE_PRINTF ("error 3c B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3485 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3486 | // irmp_busy_flag = FALSE;\r |
46dd89b7 | 3487 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
504d9df9 | 3488 | irmp_pause_time = 0;\r |
3489 | }\r | |
3490 | }\r | |
3491 | }\r | |
3492 | else\r | |
46dd89b7 | 3493 | { // timing incorrect!\r |
48664931 | 3494 | ANALYZE_PRINTF ("error 3d B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3495 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3496 | // irmp_busy_flag = FALSE;\r |
46dd89b7 | 3497 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
504d9df9 | 3498 | irmp_pause_time = 0;\r |
3499 | }\r | |
3500 | }\r | |
3501 | else\r | |
3502 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL\r | |
3503 | \r | |
cb93f9e9 | 3504 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
3505 | if (irmp_param.protocol == IRMP_RCMM32_PROTOCOL)\r | |
3506 | {\r | |
3507 | if (irmp_pause_time >= RCMM32_BIT_00_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_00_PAUSE_LEN_MAX)\r | |
3508 | {\r | |
3509 | ANALYZE_PUTCHAR ('0');\r | |
3510 | ANALYZE_PUTCHAR ('0');\r | |
3511 | irmp_store_bit (0);\r | |
3512 | irmp_store_bit (0);\r | |
3513 | }\r | |
3514 | else if (irmp_pause_time >= RCMM32_BIT_01_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_01_PAUSE_LEN_MAX)\r | |
3515 | {\r | |
3516 | ANALYZE_PUTCHAR ('0');\r | |
3517 | ANALYZE_PUTCHAR ('1');\r | |
3518 | irmp_store_bit (0);\r | |
3519 | irmp_store_bit (1);\r | |
3520 | }\r | |
3521 | else if (irmp_pause_time >= RCMM32_BIT_10_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_10_PAUSE_LEN_MAX)\r | |
3522 | {\r | |
3523 | ANALYZE_PUTCHAR ('1');\r | |
3524 | ANALYZE_PUTCHAR ('0');\r | |
3525 | irmp_store_bit (1);\r | |
3526 | irmp_store_bit (0);\r | |
3527 | }\r | |
3528 | else if (irmp_pause_time >= RCMM32_BIT_11_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_11_PAUSE_LEN_MAX)\r | |
3529 | {\r | |
3530 | ANALYZE_PUTCHAR ('1');\r | |
3531 | ANALYZE_PUTCHAR ('1');\r | |
3532 | irmp_store_bit (1);\r | |
3533 | irmp_store_bit (1);\r | |
3534 | }\r | |
3535 | ANALYZE_PRINTF ("\n");\r | |
3536 | wait_for_space = 0;\r | |
3537 | }\r | |
3538 | else\r | |
3539 | #endif\r | |
3540 | \r | |
4225a882 | 3541 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max &&\r |
3542 | irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
3543 | { // pulse & pause timings correct for "1"?\r | |
48664931 | 3544 | ANALYZE_PUTCHAR ('1');\r |
3545 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3546 | irmp_store_bit (1);\r |
3547 | wait_for_space = 0;\r | |
3548 | }\r | |
3549 | else if (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max &&\r | |
3550 | irmp_pause_time >= irmp_param.pause_0_len_min && irmp_pause_time <= irmp_param.pause_0_len_max)\r | |
3551 | { // pulse & pause timings correct for "0"?\r | |
48664931 | 3552 | ANALYZE_PUTCHAR ('0');\r |
3553 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3554 | irmp_store_bit (0);\r |
3555 | wait_for_space = 0;\r | |
3556 | }\r | |
3557 | else\r | |
111d6191 | 3558 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL\r |
3559 | \r | |
3560 | if (irmp_param.protocol == IRMP_KATHREIN_PROTOCOL &&\r | |
3561 | irmp_pulse_time >= KATHREIN_1_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_1_PULSE_LEN_MAX &&\r | |
3562 | (((irmp_bit == 8 || irmp_bit == 6) &&\r | |
3563 | irmp_pause_time >= KATHREIN_SYNC_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_SYNC_BIT_PAUSE_LEN_MAX) ||\r | |
3564 | (irmp_bit == 12 &&\r | |
3565 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)))\r | |
3566 | \r | |
3567 | {\r | |
3568 | if (irmp_bit == 8)\r | |
3569 | {\r | |
3570 | irmp_bit++;\r | |
3571 | ANALYZE_PUTCHAR ('S');\r | |
3572 | ANALYZE_NEWLINE ();\r | |
111d6191 | 3573 | irmp_tmp_command <<= 1;\r |
3574 | }\r | |
3575 | else\r | |
3576 | {\r | |
3577 | ANALYZE_PUTCHAR ('S');\r | |
3578 | ANALYZE_NEWLINE ();\r | |
3579 | irmp_store_bit (1);\r | |
3580 | }\r | |
3581 | wait_for_space = 0;\r | |
3582 | }\r | |
3583 | else\r | |
3584 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL\r | |
4225a882 | 3585 | { // timing incorrect!\r |
48664931 | 3586 | ANALYZE_PRINTF ("error 3: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3587 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3588 | // irmp_busy_flag = FALSE;\r |
4225a882 | 3589 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
3590 | irmp_pause_time = 0;\r | |
3591 | }\r | |
3592 | \r | |
3593 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
3594 | }\r | |
3595 | }\r | |
3596 | else\r | |
3597 | { // counting the pulse length ...\r | |
d155e9ab | 3598 | if (! irmp_input) // still light?\r |
4225a882 | 3599 | { // yes...\r |
3600 | irmp_pulse_time++; // increment counter\r | |
3601 | }\r | |
3602 | else\r | |
3603 | { // now it's dark!\r | |
3604 | wait_for_space = 1; // let's count the time (see above)\r | |
3605 | irmp_pause_time = 1; // set pause counter to 1, not 0\r | |
3606 | }\r | |
3607 | }\r | |
3608 | \r | |
881dbf79 | 3609 | if (irmp_start_bit_detected && irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 0) // enough bits received?\r |
4225a882 | 3610 | {\r |
775fabfa | 3611 | if (last_irmp_command == irmp_tmp_command && key_repetition_len < AUTO_FRAME_REPETITION_LEN)\r |
592411d1 | 3612 | {\r |
3613 | repetition_frame_number++;\r | |
3614 | }\r | |
3615 | else\r | |
4225a882 | 3616 | {\r |
592411d1 | 3617 | repetition_frame_number = 0;\r |
3618 | }\r | |
3619 | \r | |
3620 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
3621 | // if SIRCS protocol and the code will be repeated within 50 ms, we will ignore 2nd and 3rd repetition frame\r | |
3622 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && (repetition_frame_number == 1 || repetition_frame_number == 2))\r | |
3623 | {\r | |
48664931 | 3624 | ANALYZE_PRINTF ("code skipped: SIRCS auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
775fabfa | 3625 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r |
3626 | key_repetition_len = 0;\r | |
592411d1 | 3627 | }\r |
3628 | else\r | |
3629 | #endif\r | |
3630 | \r | |
40ca4604 | 3631 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
3632 | // if ORTEK protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r | |
3633 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL && repetition_frame_number == 1)\r | |
3634 | {\r | |
3635 | ANALYZE_PRINTF ("code skipped: ORTEK auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
3636 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
3637 | key_repetition_len = 0;\r | |
3638 | }\r | |
3639 | else\r | |
3640 | #endif\r | |
3641 | \r | |
770a1a9d | 3642 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
3643 | // if KASEIKYO protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r | |
3644 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && repetition_frame_number == 1)\r | |
3645 | {\r | |
3646 | ANALYZE_PRINTF ("code skipped: KASEIKYO auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
775fabfa | 3647 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r |
3648 | key_repetition_len = 0;\r | |
770a1a9d | 3649 | }\r |
3650 | else\r | |
3651 | #endif\r | |
3652 | \r | |
592411d1 | 3653 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
3654 | // if SAMSUNG32 protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r | |
3655 | if (irmp_param.protocol == IRMP_SAMSUNG32_PROTOCOL && (repetition_frame_number & 0x01))\r | |
3656 | {\r | |
48664931 | 3657 | ANALYZE_PRINTF ("code skipped: SAMSUNG32 auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
775fabfa | 3658 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r |
3659 | key_repetition_len = 0;\r | |
592411d1 | 3660 | }\r |
3661 | else\r | |
3662 | #endif\r | |
3663 | \r | |
3664 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
d155e9ab | 3665 | // if NUBERT protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r |
592411d1 | 3666 | if (irmp_param.protocol == IRMP_NUBERT_PROTOCOL && (repetition_frame_number & 0x01))\r |
3667 | {\r | |
48664931 | 3668 | ANALYZE_PRINTF ("code skipped: NUBERT auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
775fabfa | 3669 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r |
3670 | key_repetition_len = 0;\r | |
4225a882 | 3671 | }\r |
3672 | else\r | |
592411d1 | 3673 | #endif\r |
3674 | \r | |
0a2f634b | 3675 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
3676 | // if SPEAKER protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r | |
3677 | if (irmp_param.protocol == IRMP_SPEAKER_PROTOCOL && (repetition_frame_number & 0x01))\r | |
3678 | {\r | |
3679 | ANALYZE_PRINTF ("code skipped: SPEAKER auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
3680 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
3681 | key_repetition_len = 0;\r | |
3682 | }\r | |
3683 | else\r | |
3684 | #endif\r | |
3685 | \r | |
4225a882 | 3686 | {\r |
0f700c8e | 3687 | ANALYZE_PRINTF ("%8.3fms code detected, length = %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit);\r |
4225a882 | 3688 | irmp_ir_detected = TRUE;\r |
3689 | \r | |
3690 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
3691 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r | |
3692 | { // check for repetition frame\r | |
3693 | if ((~irmp_tmp_command & 0x3FF) == last_irmp_denon_command) // command bits must be inverted\r | |
3694 | {\r | |
3695 | irmp_tmp_command = last_irmp_denon_command; // use command received before!\r | |
08f2dd9d | 3696 | last_irmp_denon_command = 0;\r |
4225a882 | 3697 | \r |
3698 | irmp_protocol = irmp_param.protocol; // store protocol\r | |
3699 | irmp_address = irmp_tmp_address; // store address\r | |
2ac088b2 | 3700 | irmp_command = irmp_tmp_command; // store command\r |
4225a882 | 3701 | }\r |
3702 | else\r | |
3703 | {\r | |
e522639e | 3704 | if ((irmp_tmp_command & 0x01) == 0x00)\r |
95eab03c | 3705 | {\r |
2ac088b2 | 3706 | ANALYZE_PRINTF ("%8.3fms info Denon: waiting for inverted command repetition\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r |
95eab03c | 3707 | last_irmp_denon_command = irmp_tmp_command;\r |
775fabfa | 3708 | denon_repetition_len = 0;\r |
2ac088b2 | 3709 | irmp_ir_detected = FALSE;\r |
95eab03c | 3710 | }\r |
e522639e | 3711 | else\r |
95eab03c | 3712 | {\r |
e522639e | 3713 | ANALYZE_PRINTF ("%8.3fms warning Denon: got unexpected inverted command, ignoring it\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r |
95eab03c | 3714 | last_irmp_denon_command = 0;\r |
2ac088b2 | 3715 | irmp_ir_detected = FALSE;\r |
3716 | }\r | |
4225a882 | 3717 | }\r |
3718 | }\r | |
3719 | else\r | |
3720 | #endif // IRMP_SUPPORT_DENON_PROTOCOL\r | |
592411d1 | 3721 | \r |
3722 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
d155e9ab | 3723 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && irmp_tmp_command == 0x01ff)\r |
3724 | { // Grundig start frame?\r | |
48664931 | 3725 | ANALYZE_PRINTF ("Detected GRUNDIG start frame, ignoring it\n");\r |
592411d1 | 3726 | irmp_ir_detected = FALSE;\r |
592411d1 | 3727 | }\r |
3728 | else\r | |
d155e9ab | 3729 | #endif // IRMP_SUPPORT_GRUNDIG_PROTOCOL\r |
3730 | \r | |
3731 | #if IRMP_SUPPORT_NOKIA_PROTOCOL == 1\r | |
3732 | if (irmp_param.protocol == IRMP_NOKIA_PROTOCOL && irmp_tmp_address == 0x00ff && irmp_tmp_command == 0x00fe)\r | |
3733 | { // Nokia start frame?\r | |
48664931 | 3734 | ANALYZE_PRINTF ("Detected NOKIA start frame, ignoring it\n");\r |
d155e9ab | 3735 | irmp_ir_detected = FALSE;\r |
3736 | }\r | |
3737 | else\r | |
3738 | #endif // IRMP_SUPPORT_NOKIA_PROTOCOL\r | |
4225a882 | 3739 | {\r |
cb8474cc | 3740 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
3741 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL && irmp_bit == 0) // repetition frame\r | |
3742 | {\r | |
775fabfa | 3743 | if (key_repetition_len < NEC_FRAME_REPEAT_PAUSE_LEN_MAX)\r |
6db2522c | 3744 | {\r |
775fabfa | 3745 | ANALYZE_PRINTF ("Detected NEC repetition frame, key_repetition_len = %d\n", key_repetition_len);\r |
3746 | ANALYZE_ONLY_NORMAL_PRINTF("REPETETION FRAME ");\r | |
6db2522c | 3747 | irmp_tmp_address = last_irmp_address; // address is last address\r |
3748 | irmp_tmp_command = last_irmp_command; // command is last command\r | |
3749 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
775fabfa | 3750 | key_repetition_len = 0;\r |
6db2522c | 3751 | }\r |
3752 | else\r | |
3753 | {\r | |
775fabfa | 3754 | ANALYZE_PRINTF ("Detected NEC repetition frame, ignoring it: timeout occured, key_repetition_len = %d > %d\n",\r |
3755 | key_repetition_len, NEC_FRAME_REPEAT_PAUSE_LEN_MAX);\r | |
6db2522c | 3756 | irmp_ir_detected = FALSE;\r |
3757 | }\r | |
cb8474cc | 3758 | }\r |
4225a882 | 3759 | #endif // IRMP_SUPPORT_NEC_PROTOCOL\r |
770a1a9d | 3760 | \r |
3761 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
3762 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r | |
3763 | {\r | |
a03ad359 | 3764 | uint8_t xor_value;\r |
770a1a9d | 3765 | // ANALYZE_PRINTF ("0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",\r |
3766 | // xor_check[0], xor_check[1], xor_check[2], xor_check[3], xor_check[4], xor_check[5]);\r | |
3767 | \r | |
a03ad359 | 3768 | xor_value = (xor_check[0] & 0x0F) ^ ((xor_check[0] & 0xF0) >> 4) ^ (xor_check[1] & 0x0F) ^ ((xor_check[1] & 0xF0) >> 4);\r |
770a1a9d | 3769 | \r |
a03ad359 | 3770 | if (xor_value != (xor_check[2] & 0x0F))\r |
770a1a9d | 3771 | {\r |
a03ad359 | 3772 | ANALYZE_PRINTF ("error 4: wrong XOR check for customer id: 0x%1x 0x%1x\n", xor_value, xor_check[2] & 0x0F);\r |
770a1a9d | 3773 | irmp_ir_detected = FALSE;\r |
3774 | }\r | |
3775 | \r | |
a03ad359 | 3776 | xor_value = xor_check[2] ^ xor_check[3] ^ xor_check[4];\r |
770a1a9d | 3777 | \r |
a03ad359 | 3778 | if (xor_value != xor_check[5])\r |
770a1a9d | 3779 | {\r |
a03ad359 | 3780 | ANALYZE_PRINTF ("error 5: wrong XOR check for data bits: 0x%02x 0x%02x\n", xor_value, xor_check[5]);\r |
770a1a9d | 3781 | irmp_ir_detected = FALSE;\r |
3782 | }\r | |
0f700c8e | 3783 | \r |
cea96148 | 3784 | irmp_flags |= genre2; // write the genre2 bits into MSB of the flag byte\r |
770a1a9d | 3785 | }\r |
3786 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
3787 | \r | |
40ca4604 | 3788 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
3789 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r | |
3790 | {\r | |
3791 | if (parity == PARITY_CHECK_FAILED)\r | |
3792 | {\r | |
3793 | ANALYZE_PRINTF ("error 6: parity check failed\n");\r | |
3794 | irmp_ir_detected = FALSE;\r | |
3795 | }\r | |
3796 | \r | |
3797 | if ((irmp_tmp_address & 0x03) == 0x02)\r | |
3798 | {\r | |
3799 | ANALYZE_PRINTF ("code skipped: ORTEK end of transmission frame (key release)\n");\r | |
3800 | irmp_ir_detected = FALSE;\r | |
3801 | }\r | |
3802 | irmp_tmp_address >>= 2;\r | |
3803 | }\r | |
3804 | #endif // IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
3805 | \r | |
c7a47e89 | 3806 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
3807 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode = 6?\r | |
3808 | {\r | |
3809 | irmp_protocol = IRMP_RC6A_PROTOCOL;\r | |
3810 | }\r | |
3811 | else\r | |
3812 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
26b6c304 | 3813 | {\r |
3814 | irmp_protocol = irmp_param.protocol;\r | |
3815 | }\r | |
d823e852 | 3816 | \r |
3817 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3818 | if (irmp_param.protocol == IRMP_FDC_PROTOCOL)\r | |
3819 | {\r | |
3820 | if (irmp_tmp_command & 0x000F) // released key?\r | |
3821 | {\r | |
3822 | irmp_tmp_command = (irmp_tmp_command >> 4) | 0x80; // yes, set bit 7\r | |
3823 | }\r | |
3824 | else\r | |
3825 | {\r | |
3826 | irmp_tmp_command >>= 4; // no, it's a pressed key\r | |
3827 | }\r | |
3828 | irmp_tmp_command |= (irmp_tmp_address << 2) & 0x0F00; // 000000CCCCAAAAAA -> 0000CCCC00000000\r | |
3829 | irmp_tmp_address &= 0x003F;\r | |
3830 | }\r | |
3831 | #endif\r | |
3832 | \r | |
4225a882 | 3833 | irmp_address = irmp_tmp_address; // store address\r |
3834 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
03780b34 | 3835 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL)\r |
3836 | {\r | |
3837 | last_irmp_address = irmp_tmp_address; // store as last address, too\r | |
3838 | }\r | |
4225a882 | 3839 | #endif\r |
3840 | \r | |
3841 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
6f750020 | 3842 | if (irmp_param.protocol == IRMP_RC5_PROTOCOL)\r |
3843 | {\r | |
3844 | irmp_tmp_command |= rc5_cmd_bit6; // store bit 6\r | |
3845 | }\r | |
4225a882 | 3846 | #endif\r |
3847 | irmp_command = irmp_tmp_command; // store command\r | |
3848 | \r | |
3849 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
3850 | irmp_id = irmp_tmp_id;\r | |
3851 | #endif\r | |
3852 | }\r | |
3853 | }\r | |
3854 | \r | |
3855 | if (irmp_ir_detected)\r | |
3856 | {\r | |
03780b34 | 3857 | if (last_irmp_command == irmp_tmp_command &&\r |
3858 | last_irmp_address == irmp_tmp_address &&\r | |
775fabfa | 3859 | key_repetition_len < IRMP_KEY_REPETITION_LEN)\r |
4225a882 | 3860 | {\r |
3861 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
3862 | }\r | |
3863 | \r | |
3864 | last_irmp_address = irmp_tmp_address; // store as last address, too\r | |
3865 | last_irmp_command = irmp_tmp_command; // store as last command, too\r | |
3866 | \r | |
775fabfa | 3867 | key_repetition_len = 0;\r |
4225a882 | 3868 | }\r |
879b06c2 | 3869 | else\r |
3870 | {\r | |
48664931 | 3871 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r |
879b06c2 | 3872 | }\r |
4225a882 | 3873 | \r |
1f54e86c | 3874 | // irmp_busy_flag = FALSE;\r |
4225a882 | 3875 | irmp_start_bit_detected = 0; // and wait for next start bit\r |
3876 | irmp_tmp_command = 0;\r | |
3877 | irmp_pulse_time = 0;\r | |
3878 | irmp_pause_time = 0;\r | |
770a1a9d | 3879 | \r |
3880 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
3881 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // the stop bit of JVC frame is also start bit of next frame\r | |
3882 | { // set pulse time here!\r | |
3883 | irmp_pulse_time = ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME));\r | |
3884 | }\r | |
3885 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
4225a882 | 3886 | }\r |
3887 | }\r | |
3888 | }\r | |
afd1e690 | 3889 | \r |
3890 | #if defined(STELLARIS_ARM_CORTEX_M4)\r | |
3891 | // Clear the timer interrupt\r | |
3892 | TimerIntClear(TIMER1_BASE, TIMER_TIMA_TIMEOUT);\r | |
3893 | #endif\r | |
3894 | \r | |
879b06c2 | 3895 | return (irmp_ir_detected);\r |
4225a882 | 3896 | }\r |
3897 | \r | |
48664931 | 3898 | #ifdef ANALYZE\r |
4225a882 | 3899 | \r |
2eab5ec9 | 3900 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
3901 | * main functions - for Unix/Linux + Windows only!\r | |
3902 | *\r | |
3903 | * AVR: see main.c!\r | |
3904 | *\r | |
3905 | * Compile it under linux with:\r | |
3906 | * cc irmp.c -o irmp\r | |
3907 | *\r | |
3908 | * usage: ./irmp [-v|-s|-a|-l|-p] < file\r | |
3909 | *\r | |
3910 | * options:\r | |
3911 | * -v verbose\r | |
3912 | * -s silent\r | |
3913 | * -a analyze\r | |
3914 | * -l list pulse/pauses\r | |
3915 | * -p print timings\r | |
3916 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
3917 | */\r | |
4225a882 | 3918 | \r |
fef942f6 | 3919 | static void\r |
3920 | print_timings (void)\r | |
3921 | {\r | |
c7a47e89 | 3922 | printf ("IRMP_TIMEOUT_LEN: %d [%d byte(s)]\n", IRMP_TIMEOUT_LEN, sizeof (PAUSE_LEN));\r |
2eab5ec9 | 3923 | printf ("IRMP_KEY_REPETITION_LEN %d\n", IRMP_KEY_REPETITION_LEN);\r |
3924 | puts ("");\r | |
6f750020 | 3925 | printf ("PROTOCOL S S-PULSE S-PAUSE PULSE-0 PAUSE-0 PULSE-1 PAUSE-1\n");\r |
fef942f6 | 3926 | printf ("====================================================================================\n");\r |
6f750020 | 3927 | printf ("SIRCS 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
3928 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX, SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX,\r | |
3929 | SIRCS_0_PULSE_LEN_MIN, SIRCS_0_PULSE_LEN_MAX, SIRCS_PAUSE_LEN_MIN, SIRCS_PAUSE_LEN_MAX,\r | |
3930 | SIRCS_1_PULSE_LEN_MIN, SIRCS_1_PULSE_LEN_MAX, SIRCS_PAUSE_LEN_MIN, SIRCS_PAUSE_LEN_MAX);\r | |
3931 | \r | |
3932 | printf ("NEC 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3933 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX,\r | |
3934 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX,\r | |
3935 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_1_PAUSE_LEN_MIN, NEC_1_PAUSE_LEN_MAX);\r | |
3936 | \r | |
3937 | printf ("NEC (rep) 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3938 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX,\r | |
3939 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX,\r | |
3940 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_1_PAUSE_LEN_MIN, NEC_1_PAUSE_LEN_MAX);\r | |
3941 | \r | |
3942 | printf ("SAMSUNG 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3943 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX, SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX,\r | |
3944 | SAMSUNG_PULSE_LEN_MIN, SAMSUNG_PULSE_LEN_MAX, SAMSUNG_0_PAUSE_LEN_MIN, SAMSUNG_0_PAUSE_LEN_MAX,\r | |
3945 | SAMSUNG_PULSE_LEN_MIN, SAMSUNG_PULSE_LEN_MAX, SAMSUNG_1_PAUSE_LEN_MIN, SAMSUNG_1_PAUSE_LEN_MAX);\r | |
3946 | \r | |
3947 | printf ("MATSUSHITA 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3948 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX, MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX,\r | |
3949 | MATSUSHITA_PULSE_LEN_MIN, MATSUSHITA_PULSE_LEN_MAX, MATSUSHITA_0_PAUSE_LEN_MIN, MATSUSHITA_0_PAUSE_LEN_MAX,\r | |
3950 | MATSUSHITA_PULSE_LEN_MIN, MATSUSHITA_PULSE_LEN_MAX, MATSUSHITA_1_PAUSE_LEN_MIN, MATSUSHITA_1_PAUSE_LEN_MAX);\r | |
3951 | \r | |
3952 | printf ("KASEIKYO 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3953 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX, KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX,\r | |
3954 | KASEIKYO_PULSE_LEN_MIN, KASEIKYO_PULSE_LEN_MAX, KASEIKYO_0_PAUSE_LEN_MIN, KASEIKYO_0_PAUSE_LEN_MAX,\r | |
3955 | KASEIKYO_PULSE_LEN_MIN, KASEIKYO_PULSE_LEN_MAX, KASEIKYO_1_PAUSE_LEN_MIN, KASEIKYO_1_PAUSE_LEN_MAX);\r | |
3956 | \r | |
3957 | printf ("RECS80 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3958 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX, RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX,\r | |
3959 | RECS80_PULSE_LEN_MIN, RECS80_PULSE_LEN_MAX, RECS80_0_PAUSE_LEN_MIN, RECS80_0_PAUSE_LEN_MAX,\r | |
3960 | RECS80_PULSE_LEN_MIN, RECS80_PULSE_LEN_MAX, RECS80_1_PAUSE_LEN_MIN, RECS80_1_PAUSE_LEN_MAX);\r | |
3961 | \r | |
3962 | printf ("RC5 1 %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3963 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3964 | RC5_BIT_LEN_MIN, RC5_BIT_LEN_MAX);\r | |
3965 | \r | |
3966 | printf ("DENON 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3967 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r | |
3968 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX, DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX,\r | |
3969 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX, DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX);\r | |
3970 | \r | |
beda975f | 3971 | printf ("THOMSON 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
3972 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX,\r | |
3973 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX, THOMSON_0_PAUSE_LEN_MIN, THOMSON_0_PAUSE_LEN_MAX,\r | |
3974 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX, THOMSON_1_PAUSE_LEN_MIN, THOMSON_1_PAUSE_LEN_MAX);\r | |
3975 | \r | |
c7a47e89 | 3976 | printf ("RC6 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
6f750020 | 3977 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX, RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX,\r |
c7a47e89 | 3978 | RC6_BIT_PULSE_LEN_MIN, RC6_BIT_PULSE_LEN_MAX, RC6_BIT_PAUSE_LEN_MIN, RC6_BIT_PAUSE_LEN_MAX);\r |
6f750020 | 3979 | \r |
3980 | printf ("RECS80EXT 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3981 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX, RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX,\r | |
3982 | RECS80EXT_PULSE_LEN_MIN, RECS80EXT_PULSE_LEN_MAX, RECS80EXT_0_PAUSE_LEN_MIN, RECS80EXT_0_PAUSE_LEN_MAX,\r | |
3983 | RECS80EXT_PULSE_LEN_MIN, RECS80EXT_PULSE_LEN_MAX, RECS80EXT_1_PAUSE_LEN_MIN, RECS80EXT_1_PAUSE_LEN_MAX);\r | |
3984 | \r | |
3985 | printf ("NUBERT 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3986 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX, NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX,\r | |
3987 | NUBERT_0_PULSE_LEN_MIN, NUBERT_0_PULSE_LEN_MAX, NUBERT_0_PAUSE_LEN_MIN, NUBERT_0_PAUSE_LEN_MAX,\r | |
3988 | NUBERT_1_PULSE_LEN_MIN, NUBERT_1_PULSE_LEN_MAX, NUBERT_1_PAUSE_LEN_MIN, NUBERT_1_PAUSE_LEN_MAX);\r | |
3989 | \r | |
0a2f634b | 3990 | printf ("SPEAKER 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
3991 | SPEAKER_START_BIT_PULSE_LEN_MIN, SPEAKER_START_BIT_PULSE_LEN_MAX, SPEAKER_START_BIT_PAUSE_LEN_MIN, SPEAKER_START_BIT_PAUSE_LEN_MAX,\r | |
3992 | SPEAKER_0_PULSE_LEN_MIN, SPEAKER_0_PULSE_LEN_MAX, SPEAKER_0_PAUSE_LEN_MIN, SPEAKER_0_PAUSE_LEN_MAX,\r | |
3993 | SPEAKER_1_PULSE_LEN_MIN, SPEAKER_1_PULSE_LEN_MAX, SPEAKER_1_PAUSE_LEN_MIN, SPEAKER_1_PAUSE_LEN_MAX);\r | |
3994 | \r | |
6f750020 | 3995 | printf ("BANG_OLUFSEN 1 %3d - %3d %3d - %3d\n",\r |
3996 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r | |
3997 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
3998 | \r | |
2eab5ec9 | 3999 | printf ("BANG_OLUFSEN 2 %3d - %3d %3d - %3d\n",\r |
4000 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r | |
4001 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
4002 | \r | |
6f750020 | 4003 | printf ("BANG_OLUFSEN 3 %3d - %3d %3d - %3d\n",\r |
4004 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r | |
4005 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
4006 | \r | |
4007 | printf ("BANG_OLUFSEN 4 %3d - %3d %3d - %3d\n",\r | |
4008 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r | |
4009 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
4010 | \r | |
4011 | printf ("BANG_OLUFSEN - %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
4012 | BANG_OLUFSEN_PULSE_LEN_MIN, BANG_OLUFSEN_PULSE_LEN_MAX, BANG_OLUFSEN_0_PAUSE_LEN_MIN, BANG_OLUFSEN_0_PAUSE_LEN_MAX,\r | |
4013 | BANG_OLUFSEN_PULSE_LEN_MIN, BANG_OLUFSEN_PULSE_LEN_MAX, BANG_OLUFSEN_1_PAUSE_LEN_MIN, BANG_OLUFSEN_1_PAUSE_LEN_MAX);\r | |
4014 | \r | |
4015 | printf ("GRUNDIG/NOKIA 1 %3d - %3d %3d - %3d %3d - %3d\n",\r | |
89e8cafb | 4016 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r |
4017 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX,\r | |
4018 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_BIT_LEN_MAX);\r | |
6f750020 | 4019 | \r |
12948cf3 | 4020 | printf ("SIEMENS/RUWIDO 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
4021 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
4022 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r | |
4023 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX,\r | |
4024 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX,\r | |
31c1f035 | 4025 | 2 * SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX,\r |
4026 | 2 * SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX);\r | |
6f750020 | 4027 | \r |
4028 | printf ("FDC 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
4029 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX, FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX,\r | |
4030 | FDC_PULSE_LEN_MIN, FDC_PULSE_LEN_MAX, FDC_0_PAUSE_LEN_MIN, FDC_0_PAUSE_LEN_MAX,\r | |
4031 | FDC_PULSE_LEN_MIN, FDC_PULSE_LEN_MAX, FDC_1_PAUSE_LEN_MIN, FDC_1_PAUSE_LEN_MAX);\r | |
4032 | \r | |
4033 | printf ("RCCAR 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
4034 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX, RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX,\r | |
4035 | RCCAR_PULSE_LEN_MIN, RCCAR_PULSE_LEN_MAX, RCCAR_0_PAUSE_LEN_MIN, RCCAR_0_PAUSE_LEN_MAX,\r | |
4036 | RCCAR_PULSE_LEN_MIN, RCCAR_PULSE_LEN_MAX, RCCAR_1_PAUSE_LEN_MIN, RCCAR_1_PAUSE_LEN_MAX);\r | |
9405f84a | 4037 | \r |
4038 | printf ("NIKON 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
4039 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX, NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX,\r | |
4040 | NIKON_PULSE_LEN_MIN, NIKON_PULSE_LEN_MAX, NIKON_0_PAUSE_LEN_MIN, NIKON_0_PAUSE_LEN_MAX,\r | |
4041 | NIKON_PULSE_LEN_MIN, NIKON_PULSE_LEN_MAX, NIKON_1_PAUSE_LEN_MIN, NIKON_1_PAUSE_LEN_MAX);\r | |
f50e01e7 | 4042 | \r |
4043 | printf ("LEGO 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
4044 | LEGO_START_BIT_PULSE_LEN_MIN, LEGO_START_BIT_PULSE_LEN_MAX, LEGO_START_BIT_PAUSE_LEN_MIN, LEGO_START_BIT_PAUSE_LEN_MAX,\r | |
4045 | LEGO_PULSE_LEN_MIN, LEGO_PULSE_LEN_MAX, LEGO_0_PAUSE_LEN_MIN, LEGO_0_PAUSE_LEN_MAX,\r | |
4046 | LEGO_PULSE_LEN_MIN, LEGO_PULSE_LEN_MAX, LEGO_1_PAUSE_LEN_MIN, LEGO_1_PAUSE_LEN_MAX);\r | |
4047 | \r | |
cb93f9e9 | 4048 | printf ("\n");\r |
4049 | printf ("PROTOCOL S S-PULSE S-PAUSE PULSE PAUSE-00 PAUSE-01 PAUSE-10 PAUSE-11\n");\r | |
4050 | printf ("================================================================================================\n");\r | |
4051 | printf ("RCMM 1 %3d %3d %3d %3d %3d %3d %3d\n",\r | |
4052 | (uint8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME), (uint8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME),\r | |
4053 | (uint8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME),\r | |
4054 | (uint8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME), (uint8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME),\r | |
4055 | (uint8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME), (uint8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME));\r | |
4056 | printf ("RCMM 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
4057 | RCMM32_START_BIT_PULSE_LEN_MIN, RCMM32_START_BIT_PULSE_LEN_MAX, RCMM32_START_BIT_PAUSE_LEN_MIN, RCMM32_START_BIT_PAUSE_LEN_MAX,\r | |
4058 | RCMM32_BIT_PULSE_LEN_MIN, RCMM32_BIT_PULSE_LEN_MAX, RCMM32_BIT_00_PAUSE_LEN_MIN, RCMM32_BIT_00_PAUSE_LEN_MAX,\r | |
4059 | RCMM32_BIT_01_PAUSE_LEN_MIN, RCMM32_BIT_01_PAUSE_LEN_MAX, RCMM32_BIT_10_PAUSE_LEN_MIN, RCMM32_BIT_10_PAUSE_LEN_MAX,\r | |
4060 | RCMM32_BIT_11_PAUSE_LEN_MIN, RCMM32_BIT_11_PAUSE_LEN_MAX);\r | |
fef942f6 | 4061 | }\r |
4062 | \r | |
77f488bb | 4063 | void\r |
48664931 | 4064 | print_spectrum (char * text, int * buf, int is_pulse)\r |
77f488bb | 4065 | {\r |
4066 | int i;\r | |
4067 | int j;\r | |
48664931 | 4068 | int min;\r |
4069 | int max;\r | |
4070 | int max_value = 0;\r | |
77f488bb | 4071 | int value;\r |
4072 | int sum = 0;\r | |
4073 | int counter = 0;\r | |
4074 | double average = 0;\r | |
48664931 | 4075 | double tolerance;\r |
77f488bb | 4076 | \r |
48664931 | 4077 | puts ("-------------------------------------------------------------------------------");\r |
77f488bb | 4078 | printf ("%s:\n", text);\r |
4079 | \r | |
4080 | for (i = 0; i < 256; i++)\r | |
4081 | {\r | |
48664931 | 4082 | if (buf[i] > max_value)\r |
77f488bb | 4083 | {\r |
48664931 | 4084 | max_value = buf[i];\r |
77f488bb | 4085 | }\r |
4086 | }\r | |
4087 | \r | |
faf6479d | 4088 | for (i = 1; i < 200; i++)\r |
77f488bb | 4089 | {\r |
4090 | if (buf[i] > 0)\r | |
4091 | {\r | |
4092 | printf ("%3d ", i);\r | |
48664931 | 4093 | value = (buf[i] * 60) / max_value;\r |
77f488bb | 4094 | \r |
4095 | for (j = 0; j < value; j++)\r | |
4096 | {\r | |
4097 | putchar ('o');\r | |
4098 | }\r | |
4099 | printf (" %d\n", buf[i]);\r | |
4100 | \r | |
4101 | sum += i * buf[i];\r | |
4102 | counter += buf[i];\r | |
4103 | }\r | |
4104 | else\r | |
4105 | {\r | |
48664931 | 4106 | max = i - 1;\r |
4107 | \r | |
77f488bb | 4108 | if (counter > 0)\r |
4109 | {\r | |
4110 | average = (float) sum / (float) counter;\r | |
48664931 | 4111 | \r |
4112 | if (is_pulse)\r | |
4113 | {\r | |
4114 | printf ("pulse ");\r | |
4115 | }\r | |
4116 | else\r | |
4117 | {\r | |
4118 | printf ("pause ");\r | |
4119 | }\r | |
4120 | \r | |
4121 | printf ("avg: %4.1f=%6.1f us, ", average, (1000000. * average) / (float) F_INTERRUPTS);\r | |
4122 | printf ("min: %2d=%6.1f us, ", min, (1000000. * min) / (float) F_INTERRUPTS);\r | |
4123 | printf ("max: %2d=%6.1f us, ", max, (1000000. * max) / (float) F_INTERRUPTS);\r | |
4124 | \r | |
4125 | tolerance = (max - average);\r | |
4126 | \r | |
4127 | if (average - min > tolerance)\r | |
4128 | {\r | |
4129 | tolerance = average - min;\r | |
4130 | }\r | |
4131 | \r | |
4132 | tolerance = tolerance * 100 / average;\r | |
4133 | printf ("tol: %4.1f%%\n", tolerance);\r | |
77f488bb | 4134 | }\r |
48664931 | 4135 | \r |
77f488bb | 4136 | counter = 0;\r |
4137 | sum = 0;\r | |
48664931 | 4138 | min = i + 1;\r |
77f488bb | 4139 | }\r |
4140 | }\r | |
4141 | }\r | |
4142 | \r | |
d823e852 | 4143 | #define STATE_LEFT_SHIFT 0x01\r |
4144 | #define STATE_RIGHT_SHIFT 0x02\r | |
4145 | #define STATE_LEFT_CTRL 0x04\r | |
4146 | #define STATE_LEFT_ALT 0x08\r | |
4147 | #define STATE_RIGHT_ALT 0x10\r | |
4148 | \r | |
4149 | #define KEY_ESCAPE 0x1B // keycode = 0x006e\r | |
4150 | #define KEY_MENUE 0x80 // keycode = 0x0070\r | |
4151 | #define KEY_BACK 0x81 // keycode = 0x0071\r | |
4152 | #define KEY_FORWARD 0x82 // keycode = 0x0072\r | |
4153 | #define KEY_ADDRESS 0x83 // keycode = 0x0073\r | |
4154 | #define KEY_WINDOW 0x84 // keycode = 0x0074\r | |
4155 | #define KEY_1ST_PAGE 0x85 // keycode = 0x0075\r | |
4156 | #define KEY_STOP 0x86 // keycode = 0x0076\r | |
4157 | #define KEY_MAIL 0x87 // keycode = 0x0077\r | |
4158 | #define KEY_FAVORITES 0x88 // keycode = 0x0078\r | |
c6ade1d2 | 4159 | #define KEY_NEW_PAGE 0x89 // keycode = 0x0079\r |
4160 | #define KEY_SETUP 0x8A // keycode = 0x007a\r | |
4161 | #define KEY_FONT 0x8B // keycode = 0x007b\r | |
4162 | #define KEY_PRINT 0x8C // keycode = 0x007c\r | |
4163 | #define KEY_ON_OFF 0x8E // keycode = 0x007c\r | |
4164 | \r | |
4165 | #define KEY_INSERT 0x90 // keycode = 0x004b\r | |
4166 | #define KEY_DELETE 0x91 // keycode = 0x004c\r | |
4167 | #define KEY_LEFT 0x92 // keycode = 0x004f\r | |
4168 | #define KEY_HOME 0x93 // keycode = 0x0050\r | |
4169 | #define KEY_END 0x94 // keycode = 0x0051\r | |
4170 | #define KEY_UP 0x95 // keycode = 0x0053\r | |
4171 | #define KEY_DOWN 0x96 // keycode = 0x0054\r | |
4172 | #define KEY_PAGE_UP 0x97 // keycode = 0x0055\r | |
4173 | #define KEY_PAGE_DOWN 0x98 // keycode = 0x0056\r | |
4174 | #define KEY_RIGHT 0x99 // keycode = 0x0059\r | |
4175 | #define KEY_MOUSE_1 0x9E // keycode = 0x0400\r | |
4176 | #define KEY_MOUSE_2 0x9F // keycode = 0x0800\r | |
d823e852 | 4177 | \r |
4178 | static uint8_t\r | |
4179 | get_fdc_key (uint16_t cmd)\r | |
4180 | {\r | |
4181 | static uint8_t key_table[128] =\r | |
4182 | {\r | |
4183 | // 0 1 2 3 4 5 6 7 8 9 A B C D E F\r | |
4184 | Content-type: text/html ]>