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4225a882 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2 | * irmp.c - infrared multi-protocol decoder, supports several remote control protocols\r | |
3 | *\r | |
7365350c | 4 | * Copyright (c) 2009-2016 Frank Meyer - frank(at)fli4l.de\r |
4225a882 | 5 | *\r |
7365350c | 6 | * $Id: irmp.c,v 1.187 2016/09/09 07:53:29 fm Exp $\r |
cb8474cc | 7 | *\r |
622f5f59 | 8 | * Supported AVR mikrocontrollers:\r |
7644ac04 | 9 | *\r |
21a4e0ee | 10 | * ATtiny87, ATtiny167\r |
476267f4 | 11 | * ATtiny45, ATtiny85\r |
2ac088b2 | 12 | * ATtiny44, ATtiny84\r |
7644ac04 | 13 | * ATmega8, ATmega16, ATmega32\r |
14 | * ATmega162\r | |
e664a9f3 | 15 | * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r |
7644ac04 | 16 | * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r |
17 | *\r | |
4225a882 | 18 | * This program is free software; you can redistribute it and/or modify\r |
19 | * it under the terms of the GNU General Public License as published by\r | |
20 | * the Free Software Foundation; either version 2 of the License, or\r | |
21 | * (at your option) any later version.\r | |
22 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
23 | */\r | |
24 | \r | |
f5ca0147 | 25 | #include "irmp.h"\r |
4225a882 | 26 | \r |
89e8cafb | 27 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
08f2dd9d | 28 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 1\r |
d155e9ab | 29 | #else\r |
08f2dd9d | 30 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 0\r |
d155e9ab | 31 | #endif\r |
32 | \r | |
12948cf3 | 33 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 || IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r |
08f2dd9d | 34 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 1\r |
12948cf3 | 35 | #else\r |
08f2dd9d | 36 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 0\r |
12948cf3 | 37 | #endif\r |
38 | \r | |
deba2a0a | 39 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || \\r |
c2b70f0b | 40 | IRMP_SUPPORT_S100_PROTOCOL == 1 || \\r |
deba2a0a | 41 | IRMP_SUPPORT_RC6_PROTOCOL == 1 || \\r |
42 | IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1 || \\r | |
43 | IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 || \\r | |
2fb27bfe | 44 | IRMP_SUPPORT_IR60_PROTOCOL == 1 || \\r |
b85cb27d | 45 | IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1 || \\r |
0715cf5e | 46 | IRMP_SUPPORT_MERLIN_PROTOCOL == 1 || \\r |
b85cb27d | 47 | IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
08f2dd9d | 48 | # define IRMP_SUPPORT_MANCHESTER 1\r |
77f488bb | 49 | #else\r |
08f2dd9d | 50 | # define IRMP_SUPPORT_MANCHESTER 0\r |
77f488bb | 51 | #endif\r |
52 | \r | |
93570cd9 | 53 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
08f2dd9d | 54 | # define IRMP_SUPPORT_SERIAL 1\r |
deba2a0a | 55 | #else\r |
08f2dd9d | 56 | # define IRMP_SUPPORT_SERIAL 0\r |
deba2a0a | 57 | #endif\r |
58 | \r | |
0834784c | 59 | #define IRMP_KEY_REPETITION_LEN (uint_fast16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec\r |
4225a882 | 60 | \r |
fef942f6 | 61 | #define MIN_TOLERANCE_00 1.0 // -0%\r |
62 | #define MAX_TOLERANCE_00 1.0 // +0%\r | |
63 | \r | |
95b27043 | 64 | #define MIN_TOLERANCE_02 0.98 // -2%\r |
65 | #define MAX_TOLERANCE_02 1.02 // +2%\r | |
66 | \r | |
67 | #define MIN_TOLERANCE_03 0.97 // -3%\r | |
68 | #define MAX_TOLERANCE_03 1.03 // +3%\r | |
69 | \r | |
fef942f6 | 70 | #define MIN_TOLERANCE_05 0.95 // -5%\r |
71 | #define MAX_TOLERANCE_05 1.05 // +5%\r | |
72 | \r | |
4225a882 | 73 | #define MIN_TOLERANCE_10 0.9 // -10%\r |
74 | #define MAX_TOLERANCE_10 1.1 // +10%\r | |
75 | \r | |
fef942f6 | 76 | #define MIN_TOLERANCE_15 0.85 // -15%\r |
77 | #define MAX_TOLERANCE_15 1.15 // +15%\r | |
78 | \r | |
4225a882 | 79 | #define MIN_TOLERANCE_20 0.8 // -20%\r |
80 | #define MAX_TOLERANCE_20 1.2 // +20%\r | |
81 | \r | |
82 | #define MIN_TOLERANCE_30 0.7 // -30%\r | |
83 | #define MAX_TOLERANCE_30 1.3 // +30%\r | |
84 | \r | |
85 | #define MIN_TOLERANCE_40 0.6 // -40%\r | |
86 | #define MAX_TOLERANCE_40 1.4 // +40%\r | |
87 | \r | |
88 | #define MIN_TOLERANCE_50 0.5 // -50%\r | |
89 | #define MAX_TOLERANCE_50 1.5 // +50%\r | |
90 | \r | |
91 | #define MIN_TOLERANCE_60 0.4 // -60%\r | |
92 | #define MAX_TOLERANCE_60 1.6 // +60%\r | |
93 | \r | |
9405f84a | 94 | #define MIN_TOLERANCE_70 0.3 // -70%\r |
95 | #define MAX_TOLERANCE_70 1.7 // +70%\r | |
96 | \r | |
0834784c | 97 | #define SIRCS_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
98 | #define SIRCS_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
99 | #define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
deba2a0a | 100 | #if IRMP_SUPPORT_NETBOX_PROTOCOL // only 5% to avoid conflict with NETBOX:\r |
0834784c | 101 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r |
deba2a0a | 102 | #else // only 5% + 1 to avoid conflict with RC6:\r |
0834784c | 103 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r |
deba2a0a | 104 | #endif\r |
0834784c | 105 | #define SIRCS_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
106 | #define SIRCS_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
107 | #define SIRCS_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
108 | #define SIRCS_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
109 | #define SIRCS_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
110 | #define SIRCS_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
111 | \r | |
112 | #define NEC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
113 | #define NEC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
114 | #define NEC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
115 | #define NEC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
116 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
117 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
118 | #define NEC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
119 | #define NEC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
120 | #define NEC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
121 | #define NEC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
122 | #define NEC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
123 | #define NEC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
6db2522c | 124 | // autodetect nec repetition frame within 50 msec:\r |
125 | // NEC seems to send the first repetition frame after 40ms, further repetition frames after 100 ms\r | |
126 | #if 0\r | |
0834784c | 127 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
6db2522c | 128 | #else\r |
0834784c | 129 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r |
6db2522c | 130 | #endif\r |
fef942f6 | 131 | \r |
0834784c | 132 | #define SAMSUNG_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
133 | #define SAMSUNG_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
134 | #define SAMSUNG_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
135 | #define SAMSUNG_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
136 | #define SAMSUNG_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
137 | #define SAMSUNG_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
138 | #define SAMSUNG_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
139 | #define SAMSUNG_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
140 | #define SAMSUNG_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
141 | #define SAMSUNG_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
142 | \r | |
143 | #define MATSUSHITA_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
144 | #define MATSUSHITA_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
145 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
146 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
147 | #define MATSUSHITA_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
148 | #define MATSUSHITA_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
149 | #define MATSUSHITA_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
150 | #define MATSUSHITA_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
151 | #define MATSUSHITA_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
152 | #define MATSUSHITA_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
153 | \r | |
154 | #define KASEIKYO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
155 | #define KASEIKYO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
156 | #define KASEIKYO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
157 | #define KASEIKYO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
95b27043 | 158 | #define KASEIKYO_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
159 | #define KASEIKYO_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
160 | #define KASEIKYO_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
161 | #define KASEIKYO_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
162 | #define KASEIKYO_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
163 | #define KASEIKYO_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
164 | \r | |
7365350c | 165 | #define MITSU_HEAVY_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
166 | #define MITSU_HEAVY_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
167 | #define MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
168 | #define MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
169 | #define MITSU_HEAVY_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
170 | #define MITSU_HEAVY_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
171 | #define MITSU_HEAVY_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
172 | #define MITSU_HEAVY_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
173 | #define MITSU_HEAVY_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
174 | #define MITSU_HEAVY_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MITSU_HEAVY_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
175 | \r | |
95b27043 | 176 | #define PANASONIC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
177 | #define PANASONIC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
178 | #define PANASONIC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
179 | #define PANASONIC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
180 | #define PANASONIC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
181 | #define PANASONIC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
182 | #define PANASONIC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
183 | #define PANASONIC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
184 | #define PANASONIC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
185 | #define PANASONIC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PANASONIC_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
0834784c | 186 | \r |
187 | #define RECS80_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
188 | #define RECS80_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
189 | #define RECS80_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
190 | #define RECS80_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
191 | #define RECS80_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
192 | #define RECS80_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
193 | #define RECS80_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
194 | #define RECS80_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
195 | #define RECS80_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
196 | #define RECS80_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
fef942f6 | 197 | \r |
3a7e26e1 | 198 | \r |
199 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1 // BOSE conflicts with RC5, so keep tolerance for RC5 minimal here:\r | |
0834784c | 200 | #define RC5_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r |
201 | #define RC5_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
3a7e26e1 | 202 | #else\r |
0834784c | 203 | #define RC5_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
204 | #define RC5_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
3a7e26e1 | 205 | #endif\r |
31c1f035 | 206 | \r |
0834784c | 207 | #define RC5_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
208 | #define RC5_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
fef942f6 | 209 | \r |
c2b70f0b | 210 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1 // BOSE conflicts with S100, so keep tolerance for S100 minimal here:\r |
211 | #define S100_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
212 | #define S100_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
213 | #else\r | |
214 | #define S100_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
215 | #define S100_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
216 | #endif\r | |
217 | \r | |
218 | #define S100_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
219 | #define S100_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * S100_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
220 | \r | |
0834784c | 221 | #define DENON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
222 | #define DENON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
223 | #define DENON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
224 | #define DENON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
08f2dd9d | 225 | // RUWIDO (see t-home-mediareceiver-15kHz.txt) conflicts here with DENON\r |
0834784c | 226 | #define DENON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
227 | #define DENON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
228 | #define DENON_AUTO_REPETITION_PAUSE_LEN ((uint_fast16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
229 | \r | |
230 | #define THOMSON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
231 | #define THOMSON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
232 | #define THOMSON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
233 | #define THOMSON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
234 | #define THOMSON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
235 | #define THOMSON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
236 | \r | |
237 | #define RC6_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
238 | #define RC6_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
239 | #define RC6_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
240 | #define RC6_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
241 | #define RC6_TOGGLE_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
242 | #define RC6_TOGGLE_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
243 | #define RC6_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
244 | #define RC6_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_60 + 0.5) + 1) // pulses: 300 - 800\r | |
245 | #define RC6_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
246 | #define RC6_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1) // pauses: 300 - 600\r | |
247 | \r | |
248 | #define RECS80EXT_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
249 | #define RECS80EXT_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
250 | #define RECS80EXT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
251 | #define RECS80EXT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
252 | #define RECS80EXT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
253 | #define RECS80EXT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
254 | #define RECS80EXT_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
255 | #define RECS80EXT_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
256 | #define RECS80EXT_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
257 | #define RECS80EXT_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
258 | \r | |
259 | #define NUBERT_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
260 | #define NUBERT_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
261 | #define NUBERT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
262 | #define NUBERT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
263 | #define NUBERT_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
264 | #define NUBERT_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
265 | #define NUBERT_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
266 | #define NUBERT_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
267 | #define NUBERT_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
268 | #define NUBERT_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
269 | #define NUBERT_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
270 | #define NUBERT_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
271 | \r | |
0715cf5e | 272 | #define FAN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
273 | #define FAN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
274 | #define FAN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
275 | #define FAN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
276 | #define FAN_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
277 | #define FAN_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
278 | #define FAN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
279 | #define FAN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
280 | #define FAN_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
281 | #define FAN_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
282 | #define FAN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
283 | #define FAN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FAN_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
284 | \r | |
0834784c | 285 | #define SPEAKER_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
286 | #define SPEAKER_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
287 | #define SPEAKER_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
288 | #define SPEAKER_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
289 | #define SPEAKER_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
290 | #define SPEAKER_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
291 | #define SPEAKER_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
292 | #define SPEAKER_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
293 | #define SPEAKER_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
294 | #define SPEAKER_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
295 | #define SPEAKER_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
296 | #define SPEAKER_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SPEAKER_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
297 | \r | |
298 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
299 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
300 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
301 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
302 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
303 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
304 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
305 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
306 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
307 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
308 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
2eab5ec9 | 309 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX ((PAUSE_LEN)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // value must be below IRMP_TIMEOUT\r |
0834784c | 310 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
311 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
312 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
313 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
314 | #define BANG_OLUFSEN_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
315 | #define BANG_OLUFSEN_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
316 | #define BANG_OLUFSEN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
317 | #define BANG_OLUFSEN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
318 | #define BANG_OLUFSEN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
319 | #define BANG_OLUFSEN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
320 | #define BANG_OLUFSEN_R_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
321 | #define BANG_OLUFSEN_R_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
322 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
323 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
324 | \r | |
325 | #define IR60_TIMEOUT_LEN ((uint_fast8_t)(F_INTERRUPTS * IR60_TIMEOUT_TIME * 0.5))\r | |
326 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
327 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
328 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
329 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
330 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) + 1)\r | |
331 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
332 | \r | |
333 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
334 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
335 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
336 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
337 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
338 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
339 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
340 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
341 | \r | |
342 | #define FDC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1) // 5%: avoid conflict with NETBOX\r | |
343 | #define FDC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
344 | #define FDC_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
345 | #define FDC_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
346 | #define FDC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
347 | #define FDC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
348 | #define FDC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
349 | #define FDC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
6f750020 | 350 | #if 0\r |
0834784c | 351 | #define FDC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1) // could be negative: 255\r |
6f750020 | 352 | #else\r |
353 | #define FDC_0_PAUSE_LEN_MIN (1) // simply use 1\r | |
354 | #endif\r | |
0834784c | 355 | #define FDC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r |
356 | \r | |
357 | #define RCCAR_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
358 | #define RCCAR_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
359 | #define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
360 | #define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
361 | #define RCCAR_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
362 | #define RCCAR_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
363 | #define RCCAR_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
364 | #define RCCAR_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
365 | #define RCCAR_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
366 | #define RCCAR_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
367 | \r | |
368 | #define JVC_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
369 | #define JVC_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
370 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MIN_TOLERANCE_40 + 0.5) - 1) // HACK!\r | |
371 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MAX_TOLERANCE_70 + 0.5) - 1) // HACK!\r | |
372 | #define JVC_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
373 | #define JVC_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
374 | #define JVC_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
375 | #define JVC_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
376 | #define JVC_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
377 | #define JVC_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
770a1a9d | 378 | // autodetect JVC repetition frame within 50 msec:\r |
0834784c | 379 | #define JVC_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
380 | \r | |
381 | #define NIKON_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
382 | #define NIKON_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
383 | #define NIKON_START_BIT_PAUSE_LEN_MIN ((uint_fast16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
384 | #define NIKON_START_BIT_PAUSE_LEN_MAX ((uint_fast16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
385 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
386 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
387 | #define NIKON_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
388 | #define NIKON_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
389 | #define NIKON_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
390 | #define NIKON_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
391 | #define NIKON_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
392 | #define NIKON_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
393 | #define NIKON_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
394 | \r | |
395 | #define KATHREIN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
396 | #define KATHREIN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
397 | #define KATHREIN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
398 | #define KATHREIN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
399 | #define KATHREIN_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
400 | #define KATHREIN_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
401 | #define KATHREIN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
402 | #define KATHREIN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
403 | #define KATHREIN_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
404 | #define KATHREIN_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
405 | #define KATHREIN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
406 | #define KATHREIN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
407 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
408 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
409 | \r | |
410 | #define NETBOX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
411 | #define NETBOX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
412 | #define NETBOX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
413 | #define NETBOX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
414 | #define NETBOX_PULSE_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME))\r | |
415 | #define NETBOX_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME))\r | |
416 | #define NETBOX_PULSE_REST_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME / 4))\r | |
417 | #define NETBOX_PAUSE_REST_LEN ((uint_fast8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME / 4))\r | |
418 | \r | |
419 | #define LEGO_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
420 | #define LEGO_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
421 | #define LEGO_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
422 | #define LEGO_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
423 | #define LEGO_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
424 | #define LEGO_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
425 | #define LEGO_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
426 | #define LEGO_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
427 | #define LEGO_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
428 | #define LEGO_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
429 | \r | |
430 | #define BOSE_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
431 | #define BOSE_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
432 | #define BOSE_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
433 | #define BOSE_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
434 | #define BOSE_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
435 | #define BOSE_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
436 | #define BOSE_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
437 | #define BOSE_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
438 | #define BOSE_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
439 | #define BOSE_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
440 | #define BOSE_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r | |
441 | \r | |
442 | #define A1TVBOX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
443 | #define A1TVBOX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
444 | #define A1TVBOX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
445 | #define A1TVBOX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
446 | #define A1TVBOX_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
447 | #define A1TVBOX_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
448 | #define A1TVBOX_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
449 | #define A1TVBOX_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
450 | \r | |
0715cf5e | 451 | #define MERLIN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
452 | #define MERLIN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
453 | #define MERLIN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
454 | #define MERLIN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
455 | #define MERLIN_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
456 | #define MERLIN_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
457 | #define MERLIN_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
458 | #define MERLIN_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * MERLIN_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
459 | \r | |
0834784c | 460 | #define ORTEK_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
461 | #define ORTEK_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
462 | #define ORTEK_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
463 | #define ORTEK_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
464 | #define ORTEK_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
465 | #define ORTEK_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
466 | #define ORTEK_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
467 | #define ORTEK_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
468 | \r | |
469 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
470 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
471 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
472 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MAX_TOLERANCE_10 + 0.5) - 1)\r | |
473 | #define TELEFUNKEN_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
474 | #define TELEFUNKEN_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
475 | #define TELEFUNKEN_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
476 | #define TELEFUNKEN_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
477 | #define TELEFUNKEN_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
478 | #define TELEFUNKEN_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
b85cb27d | 479 | // autodetect TELEFUNKEN repetition frame within 50 msec:\r |
0834784c | 480 | // #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN_MAX (uint_fast16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r |
481 | \r | |
482 | #define ROOMBA_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
483 | #define ROOMBA_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
484 | #define ROOMBA_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
485 | #define ROOMBA_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
486 | #define ROOMBA_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME + 0.5))\r | |
487 | #define ROOMBA_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
488 | #define ROOMBA_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
489 | #define ROOMBA_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
490 | #define ROOMBA_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
491 | #define ROOMBA_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME))\r | |
492 | #define ROOMBA_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
493 | #define ROOMBA_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
494 | #define ROOMBA_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
495 | #define ROOMBA_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
496 | \r | |
497 | #define RCMM32_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
498 | #define RCMM32_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
499 | #define RCMM32_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
500 | #define RCMM32_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
501 | #define RCMM32_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
502 | #define RCMM32_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_PULSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
503 | #define RCMM32_BIT_00_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
504 | #define RCMM32_BIT_00_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_00_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
505 | #define RCMM32_BIT_01_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
506 | #define RCMM32_BIT_01_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_01_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
507 | #define RCMM32_BIT_10_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
508 | #define RCMM32_BIT_10_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_10_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
509 | #define RCMM32_BIT_11_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
510 | #define RCMM32_BIT_11_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RCMM32_11_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
511 | \r | |
003c1008 | 512 | #define PENTAX_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
513 | #define PENTAX_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
514 | #define PENTAX_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
515 | #define PENTAX_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
516 | #define PENTAX_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME + 0.5))\r | |
517 | #define PENTAX_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
518 | #define PENTAX_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
519 | #define PENTAX_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
520 | #define PENTAX_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
521 | #define PENTAX_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME))\r | |
522 | #define PENTAX_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
523 | #define PENTAX_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
524 | #define PENTAX_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
525 | #define PENTAX_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * PENTAX_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
526 | \r | |
43c535be | 527 | #define ACP24_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r |
528 | #define ACP24_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PULSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
529 | #define ACP24_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
530 | #define ACP24_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_START_BIT_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
531 | #define ACP24_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_PULSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
532 | #define ACP24_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_PULSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
533 | #define ACP24_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
534 | #define ACP24_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_1_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
535 | #define ACP24_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME * MIN_TOLERANCE_15 + 0.5) - 1)\r | |
536 | #define ACP24_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * ACP24_0_PAUSE_TIME * MAX_TOLERANCE_15 + 0.5) + 1)\r | |
537 | \r | |
0834784c | 538 | #define RADIO1_START_BIT_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
539 | #define RADIO1_START_BIT_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
540 | #define RADIO1_START_BIT_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
541 | #define RADIO1_START_BIT_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
542 | #define RADIO1_1_PAUSE_LEN_EXACT ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME + 0.5))\r | |
543 | #define RADIO1_1_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
544 | #define RADIO1_1_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
545 | #define RADIO1_1_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
546 | #define RADIO1_1_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
547 | #define RADIO1_0_PAUSE_LEN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME))\r | |
548 | #define RADIO1_0_PULSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
549 | #define RADIO1_0_PULSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
550 | #define RADIO1_0_PAUSE_LEN_MIN ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
551 | #define RADIO1_0_PAUSE_LEN_MAX ((uint_fast8_t)(F_INTERRUPTS * RADIO1_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
552 | \r | |
553 | #define AUTO_FRAME_REPETITION_LEN (uint_fast16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint_fast16_t!\r | |
4225a882 | 554 | \r |
48664931 | 555 | #ifdef ANALYZE\r |
08f2dd9d | 556 | # define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }\r |
557 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r | |
558 | # define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r | |
775fabfa | 559 | # define ANALYZE_ONLY_NORMAL_PRINTF(...) { if (! silent && !verbose) { printf (__VA_ARGS__); } }\r |
08f2dd9d | 560 | # define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }\r |
7644ac04 | 561 | static int silent;\r |
562 | static int time_counter;\r | |
563 | static int verbose;\r | |
645fbc69 | 564 | \r |
565 | /******************************* not every PIC compiler knows variadic macros :-(\r | |
4225a882 | 566 | #else\r |
08f2dd9d | 567 | # define ANALYZE_PUTCHAR(a)\r |
568 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a)\r | |
4b9953bf | 569 | # define ANALYZE_PRINTF(...)\r |
570 | # define ANALYZE_ONLY_NORMAL_PRINTF(...)\r | |
4a7dc859 | 571 | # endif\r |
08f2dd9d | 572 | # define ANALYZE_NEWLINE()\r |
645fbc69 | 573 | *********************************/\r |
4225a882 | 574 | #endif\r |
575 | \r | |
7644ac04 | 576 | #if IRMP_USE_CALLBACK == 1\r |
0834784c | 577 | static void (*irmp_callback_ptr) (uint_fast8_t);\r |
7644ac04 | 578 | #endif // IRMP_USE_CALLBACK == 1\r |
579 | \r | |
40ca4604 | 580 | #define PARITY_CHECK_OK 1\r |
581 | #define PARITY_CHECK_FAILED 0\r | |
582 | \r | |
1f54e86c | 583 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
584 | * Protocol names\r | |
585 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
586 | */\r | |
775fabfa | 587 | #if defined(UNIX_OR_WINDOWS) || IRMP_PROTOCOL_NAMES == 1\r |
622f5f59 | 588 | static const char proto_unknown[] PROGMEM = "UNKNOWN";\r |
589 | static const char proto_sircs[] PROGMEM = "SIRCS";\r | |
590 | static const char proto_nec[] PROGMEM = "NEC";\r | |
591 | static const char proto_samsung[] PROGMEM = "SAMSUNG";\r | |
592 | static const char proto_matsushita[] PROGMEM = "MATSUSH";\r | |
593 | static const char proto_kaseikyo[] PROGMEM = "KASEIKYO";\r | |
594 | static const char proto_recs80[] PROGMEM = "RECS80";\r | |
595 | static const char proto_rc5[] PROGMEM = "RC5";\r | |
596 | static const char proto_denon[] PROGMEM = "DENON";\r | |
597 | static const char proto_rc6[] PROGMEM = "RC6";\r | |
598 | static const char proto_samsung32[] PROGMEM = "SAMSG32";\r | |
599 | static const char proto_apple[] PROGMEM = "APPLE";\r | |
600 | static const char proto_recs80ext[] PROGMEM = "RECS80EX";\r | |
601 | static const char proto_nubert[] PROGMEM = "NUBERT";\r | |
602 | static const char proto_bang_olufsen[] PROGMEM = "BANG OLU";\r | |
603 | static const char proto_grundig[] PROGMEM = "GRUNDIG";\r | |
604 | static const char proto_nokia[] PROGMEM = "NOKIA";\r | |
605 | static const char proto_siemens[] PROGMEM = "SIEMENS";\r | |
606 | static const char proto_fdc[] PROGMEM = "FDC";\r | |
607 | static const char proto_rccar[] PROGMEM = "RCCAR";\r | |
608 | static const char proto_jvc[] PROGMEM = "JVC";\r | |
609 | static const char proto_rc6a[] PROGMEM = "RC6A";\r | |
610 | static const char proto_nikon[] PROGMEM = "NIKON";\r | |
611 | static const char proto_ruwido[] PROGMEM = "RUWIDO";\r | |
612 | static const char proto_ir60[] PROGMEM = "IR60";\r | |
613 | static const char proto_kathrein[] PROGMEM = "KATHREIN";\r | |
614 | static const char proto_netbox[] PROGMEM = "NETBOX";\r | |
615 | static const char proto_nec16[] PROGMEM = "NEC16";\r | |
616 | static const char proto_nec42[] PROGMEM = "NEC42";\r | |
617 | static const char proto_lego[] PROGMEM = "LEGO";\r | |
618 | static const char proto_thomson[] PROGMEM = "THOMSON";\r | |
619 | static const char proto_bose[] PROGMEM = "BOSE";\r | |
620 | static const char proto_a1tvbox[] PROGMEM = "A1TVBOX";\r | |
621 | static const char proto_ortek[] PROGMEM = "ORTEK";\r | |
622 | static const char proto_telefunken[] PROGMEM = "TELEFUNKEN";\r | |
623 | static const char proto_roomba[] PROGMEM = "ROOMBA";\r | |
624 | static const char proto_rcmm32[] PROGMEM = "RCMM32";\r | |
625 | static const char proto_rcmm24[] PROGMEM = "RCMM24";\r | |
626 | static const char proto_rcmm12[] PROGMEM = "RCMM12";\r | |
627 | static const char proto_speaker[] PROGMEM = "SPEAKER";\r | |
628 | static const char proto_lgair[] PROGMEM = "LGAIR";\r | |
629 | static const char proto_samsung48[] PROGMEM = "SAMSG48";\r | |
003c1008 | 630 | static const char proto_merlin[] PROGMEM = "MERLIN";\r |
631 | static const char proto_pentax[] PROGMEM = "PENTAX";\r | |
0715cf5e | 632 | static const char proto_fan[] PROGMEM = "FAN";\r |
c2b70f0b | 633 | static const char proto_s100[] PROGMEM = "S100";\r |
43c535be | 634 | static const char proto_acp24[] PROGMEM = "ACP24";\r |
3d2da98a | 635 | static const char proto_technics[] PROGMEM = "TECHNICS";\r |
95b27043 | 636 | static const char proto_panasonic[] PROGMEM = "PANASONIC";\r |
7365350c | 637 | static const char proto_mitsu_heavy[] PROGMEM = "MITSU_HEAVY";\r |
8aaafe9d | 638 | \r |
622f5f59 | 639 | static const char proto_radio1[] PROGMEM = "RADIO1";\r |
640 | \r | |
641 | const char * const\r | |
642 | irmp_protocol_names[IRMP_N_PROTOCOLS + 1] PROGMEM =\r | |
1f54e86c | 643 | {\r |
622f5f59 | 644 | proto_unknown,\r |
645 | proto_sircs,\r | |
646 | proto_nec,\r | |
647 | proto_samsung,\r | |
648 | proto_matsushita,\r | |
649 | proto_kaseikyo,\r | |
650 | proto_recs80,\r | |
651 | proto_rc5,\r | |
652 | proto_denon,\r | |
653 | proto_rc6,\r | |
654 | proto_samsung32,\r | |
655 | proto_apple,\r | |
656 | proto_recs80ext,\r | |
657 | proto_nubert,\r | |
658 | proto_bang_olufsen,\r | |
659 | proto_grundig,\r | |
660 | proto_nokia,\r | |
661 | proto_siemens,\r | |
662 | proto_fdc,\r | |
663 | proto_rccar,\r | |
664 | proto_jvc,\r | |
665 | proto_rc6a,\r | |
666 | proto_nikon,\r | |
667 | proto_ruwido,\r | |
668 | proto_ir60,\r | |
669 | proto_kathrein,\r | |
670 | proto_netbox,\r | |
671 | proto_nec16,\r | |
672 | proto_nec42,\r | |
673 | proto_lego,\r | |
674 | proto_thomson,\r | |
675 | proto_bose,\r | |
676 | proto_a1tvbox,\r | |
677 | proto_ortek,\r | |
678 | proto_telefunken,\r | |
679 | proto_roomba,\r | |
680 | proto_rcmm32,\r | |
681 | proto_rcmm24,\r | |
682 | proto_rcmm12,\r | |
683 | proto_speaker,\r | |
684 | proto_lgair,\r | |
685 | proto_samsung48,\r | |
003c1008 | 686 | proto_merlin,\r |
687 | proto_pentax,\r | |
0715cf5e | 688 | proto_fan,\r |
c2b70f0b | 689 | proto_s100,\r |
43c535be | 690 | proto_acp24,\r |
3d2da98a | 691 | proto_technics,\r |
95b27043 | 692 | proto_panasonic,\r |
7365350c | 693 | proto_mitsu_heavy,\r |
622f5f59 | 694 | proto_radio1\r |
1f54e86c | 695 | };\r |
40ca4604 | 696 | \r |
1f54e86c | 697 | #endif\r |
698 | \r | |
699 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
700 | * Logging\r | |
701 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
702 | */\r | |
9045767c | 703 | #if IRMP_LOGGING == 1 // logging via UART\r |
6c3c57e6 | 704 | \r |
6f153888 | 705 | #if defined(ARM_STM32F4XX)\r |
9045767c | 706 | # define STM32_GPIO_CLOCK RCC_AHB1Periph_GPIOA // UART2 on PA2\r |
6f153888 | 707 | # define STM32_UART_CLOCK RCC_APB1Periph_USART2\r |
708 | # define STM32_GPIO_PORT GPIOA\r | |
709 | # define STM32_GPIO_PIN GPIO_Pin_2\r | |
710 | # define STM32_GPIO_SOURCE GPIO_PinSource2\r | |
711 | # define STM32_UART_AF GPIO_AF_USART2\r | |
712 | # define STM32_UART_COM USART2\r | |
9045767c | 713 | # define STM32_UART_BAUD 115200 // 115200 Baud\r |
6f153888 | 714 | # include "stm32f4xx_usart.h"\r |
9045767c | 715 | #elif defined(ARM_STM32F10X)\r |
716 | # define STM32_UART_COM USART3 // UART3 on PB10\r | |
df24bb50 | 717 | #elif defined(ARDUINO) // Arduino Serial implementation\r |
95b27043 | 718 | # if defined(USB_SERIAL)\r |
719 | # include "usb_serial.h"\r | |
720 | # else\r | |
721 | # error USB_SERIAL not defined in ARDUINO Environment\r | |
722 | # endif\r | |
6f153888 | 723 | #else\r |
9045767c | 724 | # if IRMP_EXT_LOGGING == 1 // use external logging\r |
6f153888 | 725 | # include "irmpextlog.h"\r |
9045767c | 726 | # else // normal UART log (IRMP_EXT_LOGGING == 0)\r |
6f153888 | 727 | # define BAUD 9600L\r |
728 | # ifndef UNIX_OR_WINDOWS\r | |
729 | # include <util/setbaud.h>\r | |
730 | # endif\r | |
879b06c2 | 731 | \r |
732 | #ifdef UBRR0H\r | |
733 | \r | |
734 | #define UART0_UBRRH UBRR0H\r | |
735 | #define UART0_UBRRL UBRR0L\r | |
736 | #define UART0_UCSRA UCSR0A\r | |
737 | #define UART0_UCSRB UCSR0B\r | |
738 | #define UART0_UCSRC UCSR0C\r | |
739 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)\r | |
740 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)\r | |
741 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)\r | |
742 | #ifdef URSEL0\r | |
743 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)\r | |
744 | #else\r | |
745 | #define UART0_URSEL_BIT_VALUE (0)\r | |
746 | #endif\r | |
747 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r | |
e92413eb | 748 | #define UART0_UDR UDR0\r |
c7a47e89 | 749 | #define UART0_U2X U2X0\r |
0834784c | 750 | \r |
879b06c2 | 751 | #else\r |
4225a882 | 752 | \r |
879b06c2 | 753 | #define UART0_UBRRH UBRRH\r |
754 | #define UART0_UBRRL UBRRL\r | |
755 | #define UART0_UCSRA UCSRA\r | |
756 | #define UART0_UCSRB UCSRB\r | |
757 | #define UART0_UCSRC UCSRC\r | |
758 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)\r | |
759 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)\r | |
760 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)\r | |
761 | #ifdef URSEL\r | |
762 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)\r | |
763 | #else\r | |
764 | #define UART0_URSEL_BIT_VALUE (0)\r | |
765 | #endif\r | |
766 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)\r | |
e92413eb | 767 | #define UART0_UDR UDR\r |
c7a47e89 | 768 | #define UART0_U2X U2X\r |
4225a882 | 769 | \r |
6c3c57e6 | 770 | #endif //UBRR0H\r |
771 | #endif //IRMP_EXT_LOGGING\r | |
6f153888 | 772 | #endif //ARM_STM32F4XX\r |
4225a882 | 773 | \r |
4225a882 | 774 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
775 | * Initialize UART\r | |
776 | * @details Initializes UART\r | |
777 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
778 | */\r | |
779 | void\r | |
780 | irmp_uart_init (void)\r | |
781 | {\r | |
775fabfa | 782 | #ifndef UNIX_OR_WINDOWS\r |
6f153888 | 783 | #if defined(ARM_STM32F4XX)\r |
784 | GPIO_InitTypeDef GPIO_InitStructure;\r | |
785 | USART_InitTypeDef USART_InitStructure;\r | |
786 | \r | |
787 | // Clock enable vom TX Pin\r | |
788 | RCC_AHB1PeriphClockCmd(STM32_GPIO_CLOCK, ENABLE);\r | |
789 | \r | |
790 | // Clock enable der UART\r | |
791 | RCC_APB1PeriphClockCmd(STM32_UART_CLOCK, ENABLE);\r | |
792 | \r | |
793 | // UART Alternative-Funktion mit dem IO-Pin verbinden\r | |
794 | GPIO_PinAFConfig(STM32_GPIO_PORT,STM32_GPIO_SOURCE,STM32_UART_AF);\r | |
795 | \r | |
796 | // UART als Alternative-Funktion mit PushPull\r | |
797 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;\r | |
798 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;\r | |
799 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r | |
800 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;\r | |
801 | \r | |
802 | // TX-Pin\r | |
803 | GPIO_InitStructure.GPIO_Pin = STM32_GPIO_PIN;\r | |
804 | GPIO_Init(STM32_GPIO_PORT, &GPIO_InitStructure);\r | |
805 | \r | |
806 | // Oversampling\r | |
807 | USART_OverSampling8Cmd(STM32_UART_COM, ENABLE);\r | |
808 | \r | |
ea29682a | 809 | // init baud rate, 8 data bits, 1 stop bit, no parity, no RTS+CTS\r |
6f153888 | 810 | USART_InitStructure.USART_BaudRate = STM32_UART_BAUD;\r |
811 | USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r | |
812 | USART_InitStructure.USART_StopBits = USART_StopBits_1;\r | |
813 | USART_InitStructure.USART_Parity = USART_Parity_No;\r | |
814 | USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r | |
815 | USART_InitStructure.USART_Mode = USART_Mode_Tx;\r | |
816 | USART_Init(STM32_UART_COM, &USART_InitStructure);\r | |
817 | \r | |
818 | // UART enable\r | |
819 | USART_Cmd(STM32_UART_COM, ENABLE);\r | |
820 | \r | |
9045767c | 821 | #elif defined(ARM_STM32F10X)\r |
822 | GPIO_InitTypeDef GPIO_InitStructure;\r | |
823 | USART_InitTypeDef USART_InitStructure;\r | |
824 | \r | |
825 | // Clock enable vom TX Pin\r | |
826 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); // UART3 an PB10\r | |
827 | \r | |
828 | // Clock enable der UART\r | |
829 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);\r | |
830 | \r | |
831 | // UART als Alternative-Funktion mit PushPull\r | |
832 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;\r | |
833 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;\r | |
834 | \r | |
835 | // TX-Pin\r | |
836 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;\r | |
837 | GPIO_Init(GPIOB, &GPIO_InitStructure);\r | |
838 | \r | |
839 | // Oversampling\r | |
840 | USART_OverSampling8Cmd(STM32_UART_COM, ENABLE);\r | |
841 | \r | |
ea29682a | 842 | // init baud rate, 8 data bits, 1 stop bit, no parity, no RTS+CTS\r |
9045767c | 843 | USART_InitStructure.USART_BaudRate = 115200;\r |
844 | USART_InitStructure.USART_WordLength = USART_WordLength_8b;\r | |
845 | USART_InitStructure.USART_StopBits = USART_StopBits_1;\r | |
846 | USART_InitStructure.USART_Parity = USART_Parity_No;\r | |
847 | USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;\r | |
848 | USART_InitStructure.USART_Mode = USART_Mode_Tx;\r | |
849 | USART_Init(STM32_UART_COM, &USART_InitStructure);\r | |
850 | \r | |
851 | // UART enable\r | |
327b855b | 852 | USART_Cmd(STM32_UART_COM, ENABLE);\r |
df24bb50 | 853 | \r |
95b27043 | 854 | #elif defined(ARDUINO)\r |
855 | // we use the Arduino Serial Imlementation\r | |
856 | // you have to call Serial.begin(SER_BAUD); in Arduino setup() function\r | |
857 | \r | |
458a6d64 | 858 | #elif defined (__AVR_XMEGA__)\r |
859 | \r | |
95b27043 | 860 | PMIC.CTRL |= PMIC_HILVLEN_bm;\r |
861 | \r | |
862 | USARTC1.BAUDCTRLB = 0;\r | |
863 | USARTC1.BAUDCTRLA = F_CPU / 153600 - 1;\r | |
ea29682a | 864 | USARTC1.CTRLA = USART_RXCINTLVL_HI_gc; // high INT level (receive)\r |
865 | USARTC1.CTRLB = USART_TXEN_bm | USART_RXEN_bm; // activated RX and TX\r | |
866 | USARTC1.CTRLC = USART_CHSIZE_8BIT_gc; // 8 Bit\r | |
867 | PORTC.DIR |= (1<<7); // TXD is output\r | |
95b27043 | 868 | PORTC.DIR &= ~(1<<6);\r |
458a6d64 | 869 | \r |
327b855b | 870 | #else\r |
9045767c | 871 | \r |
6c3c57e6 | 872 | #if (IRMP_EXT_LOGGING == 0) // use UART\r |
879b06c2 | 873 | UART0_UBRRH = UBRRH_VALUE; // set baud rate\r |
874 | UART0_UBRRL = UBRRL_VALUE;\r | |
875 | \r | |
876 | #if USE_2X\r | |
c7a47e89 | 877 | UART0_UCSRA |= (1<<UART0_U2X);\r |
879b06c2 | 878 | #else\r |
c7a47e89 | 879 | UART0_UCSRA &= ~(1<<UART0_U2X);\r |
879b06c2 | 880 | #endif\r |
881 | \r | |
882 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;\r | |
883 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX\r | |
6c3c57e6 | 884 | #else // other log method\r |
0834784c | 885 | initextlog();\r |
6c3c57e6 | 886 | #endif //IRMP_EXT_LOGGING\r |
6f153888 | 887 | #endif //ARM_STM32F4XX\r |
775fabfa | 888 | #endif // UNIX_OR_WINDOWS\r |
4225a882 | 889 | }\r |
890 | \r | |
891 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
892 | * Send character\r | |
893 | * @details Sends character\r | |
894 | * @param ch character to be transmitted\r | |
895 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
896 | */\r | |
897 | void\r | |
898 | irmp_uart_putc (unsigned char ch)\r | |
899 | {\r | |
775fabfa | 900 | #ifndef UNIX_OR_WINDOWS\r |
9045767c | 901 | #if defined(ARM_STM32F4XX) || defined(ARM_STM32F10X)\r |
6f153888 | 902 | // warten bis altes Byte gesendet wurde\r |
903 | while (USART_GetFlagStatus(STM32_UART_COM, USART_FLAG_TXE) == RESET)\r | |
904 | {\r | |
df24bb50 | 905 | ;\r |
6f153888 | 906 | }\r |
907 | \r | |
908 | USART_SendData(STM32_UART_COM, ch);\r | |
909 | \r | |
910 | if (ch == '\n')\r | |
911 | {\r | |
df24bb50 | 912 | while (USART_GetFlagStatus(STM32_UART_COM, USART_FLAG_TXE) == RESET);\r |
913 | USART_SendData(STM32_UART_COM, '\r');\r | |
6f153888 | 914 | }\r |
915 | \r | |
95b27043 | 916 | #elif defined(ARDUINO)\r |
917 | // we use the Arduino Serial Imlementation\r | |
918 | usb_serial_putchar(ch);\r | |
919 | \r | |
6f153888 | 920 | #else\r |
6c3c57e6 | 921 | #if (IRMP_EXT_LOGGING == 0)\r |
df24bb50 | 922 | \r |
923 | # if defined (__AVR_XMEGA__)\r | |
924 | while (!(USARTC1.STATUS & USART_DREIF_bm));\r | |
925 | USARTC1.DATA = ch;\r | |
926 | \r | |
927 | # else //AVR_MEGA\r | |
879b06c2 | 928 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))\r |
4225a882 | 929 | {\r |
df24bb50 | 930 | ;\r |
4225a882 | 931 | }\r |
932 | \r | |
879b06c2 | 933 | UART0_UDR = ch;\r |
df24bb50 | 934 | #endif //__AVR_XMEGA__\r |
6c3c57e6 | 935 | #else\r |
6f153888 | 936 | \r |
937 | sendextlog(ch); // use external log\r | |
938 | \r | |
939 | #endif //IRMP_EXT_LOGGING\r | |
940 | #endif //ARM_STM32F4XX\r | |
775fabfa | 941 | #else\r |
942 | fputc (ch, stderr);\r | |
943 | #endif // UNIX_OR_WINDOWS\r | |
4225a882 | 944 | }\r |
945 | \r | |
946 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
947 | * Log IR signal\r | |
948 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
949 | */\r | |
d155e9ab | 950 | \r |
951 | #define STARTCYCLES 2 // min count of zeros before start of logging\r | |
952 | #define ENDBITS 1000 // number of sequenced highbits to detect end\r | |
953 | #define DATALEN 700 // log buffer size\r | |
4225a882 | 954 | \r |
775fabfa | 955 | static void\r |
0834784c | 956 | irmp_log (uint_fast8_t val)\r |
775fabfa | 957 | {\r |
0834784c | 958 | static uint8_t buf[DATALEN]; // logging buffer\r |
959 | static uint_fast16_t buf_idx; // index\r | |
960 | static uint_fast8_t startcycles; // current number of start-zeros\r | |
961 | static uint_fast16_t cnt; // counts sequenced highbits - to detect end\r | |
962 | static uint_fast8_t last_val = 1;\r | |
775fabfa | 963 | \r |
964 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r | |
965 | {\r | |
df24bb50 | 966 | startcycles++;\r |
775fabfa | 967 | }\r |
968 | else\r | |
969 | {\r | |
df24bb50 | 970 | startcycles = 0;\r |
971 | \r | |
972 | if (! val || buf_idx != 0) // start or continue logging on "0", "1" cannot init logging\r | |
973 | {\r | |
974 | if (last_val == val)\r | |
975 | {\r | |
976 | cnt++;\r | |
977 | \r | |
978 | if (val && cnt > ENDBITS) // if high received then look at log-stop condition\r | |
979 | { // if stop condition is true, output on uart\r | |
980 | uint_fast8_t i8;\r | |
981 | uint_fast16_t i;\r | |
982 | uint_fast16_t j;\r | |
983 | uint_fast8_t v = '1';\r | |
984 | uint_fast16_t d;\r | |
985 | \r | |
986 | for (i8 = 0; i8 < STARTCYCLES; i8++)\r | |
987 | {\r | |
988 | irmp_uart_putc ('0'); // the ignored starting zeros\r | |
989 | }\r | |
990 | \r | |
991 | for (i = 0; i < buf_idx; i++)\r | |
992 | {\r | |
993 | d = buf[i];\r | |
994 | \r | |
995 | if (d == 0xff)\r | |
996 | {\r | |
997 | i++;\r | |
998 | d = buf[i];\r | |
999 | i++;\r | |
1000 | d |= ((uint_fast16_t) buf[i] << 8);\r | |
1001 | }\r | |
1002 | \r | |
1003 | for (j = 0; j < d; j++)\r | |
1004 | {\r | |
1005 | irmp_uart_putc (v);\r | |
1006 | }\r | |
1007 | \r | |
1008 | v = (v == '1') ? '0' : '1';\r | |
1009 | }\r | |
1010 | \r | |
1011 | for (i8 = 0; i8 < 20; i8++)\r | |
1012 | {\r | |
1013 | irmp_uart_putc ('1');\r | |
1014 | }\r | |
1015 | \r | |
1016 | irmp_uart_putc ('\n');\r | |
1017 | buf_idx = 0;\r | |
1018 | last_val = 1;\r | |
1019 | cnt = 0;\r | |
1020 | }\r | |
1021 | }\r | |
1022 | else if (buf_idx < DATALEN - 3)\r | |
1023 | {\r | |
1024 | if (cnt >= 0xff)\r | |
1025 | {\r | |
1026 | buf[buf_idx++] = 0xff;\r | |
1027 | buf[buf_idx++] = (cnt & 0xff);\r | |
1028 | buf[buf_idx] = (cnt >> 8);\r | |
1029 | }\r | |
1030 | else\r | |
1031 | {\r | |
1032 | buf[buf_idx] = cnt;\r | |
1033 | }\r | |
1034 | \r | |
1035 | buf_idx++;\r | |
1036 | cnt = 1;\r | |
1037 | last_val = val;\r | |
1038 | }\r | |
1039 | }\r | |
775fabfa | 1040 | }\r |
1041 | }\r | |
1042 | \r | |
4225a882 | 1043 | #else\r |
d155e9ab | 1044 | #define irmp_log(val)\r |
6c3c57e6 | 1045 | #endif //IRMP_LOGGING\r |
4225a882 | 1046 | \r |
1047 | typedef struct\r | |
1048 | {\r | |
0834784c | 1049 | uint_fast8_t protocol; // ir protocol\r |
1050 | uint_fast8_t pulse_1_len_min; // minimum length of pulse with bit value 1\r | |
1051 | uint_fast8_t pulse_1_len_max; // maximum length of pulse with bit value 1\r | |
1052 | uint_fast8_t pause_1_len_min; // minimum length of pause with bit value 1\r | |
1053 | uint_fast8_t pause_1_len_max; // maximum length of pause with bit value 1\r | |
1054 | uint_fast8_t pulse_0_len_min; // minimum length of pulse with bit value 0\r | |
1055 | uint_fast8_t pulse_0_len_max; // maximum length of pulse with bit value 0\r | |
1056 | uint_fast8_t pause_0_len_min; // minimum length of pause with bit value 0\r | |
1057 | uint_fast8_t pause_0_len_max; // maximum length of pause with bit value 0\r | |
1058 | uint_fast8_t address_offset; // address offset\r | |
1059 | uint_fast8_t address_end; // end of address\r | |
1060 | uint_fast8_t command_offset; // command offset\r | |
1061 | uint_fast8_t command_end; // end of command\r | |
1062 | uint_fast8_t complete_len; // complete length of frame\r | |
1063 | uint_fast8_t stop_bit; // flag: frame has stop bit\r | |
1064 | uint_fast8_t lsb_first; // flag: LSB first\r | |
1065 | uint_fast8_t flags; // some flags\r | |
4225a882 | 1066 | } IRMP_PARAMETER;\r |
1067 | \r | |
1068 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
1069 | \r | |
63b94f48 | 1070 | static const PROGMEM IRMP_PARAMETER sircs_param =\r |
4225a882 | 1071 | {\r |
d155e9ab | 1072 | IRMP_SIRCS_PROTOCOL, // protocol: ir protocol\r |
1073 | SIRCS_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1074 | SIRCS_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1075 | SIRCS_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1076 | SIRCS_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1077 | SIRCS_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1078 | SIRCS_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1079 | SIRCS_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1080 | SIRCS_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1081 | SIRCS_ADDRESS_OFFSET, // address_offset: address offset\r | |
1082 | SIRCS_ADDRESS_OFFSET + SIRCS_ADDRESS_LEN, // address_end: end of address\r | |
1083 | SIRCS_COMMAND_OFFSET, // command_offset: command offset\r | |
1084 | SIRCS_COMMAND_OFFSET + SIRCS_COMMAND_LEN, // command_end: end of command\r | |
1085 | SIRCS_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1086 | SIRCS_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1087 | SIRCS_LSB, // lsb_first: flag: LSB first\r |
1088 | SIRCS_FLAGS // flags: some flags\r | |
4225a882 | 1089 | };\r |
1090 | \r | |
1091 | #endif\r | |
1092 | \r | |
1093 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
1094 | \r | |
63b94f48 | 1095 | static const PROGMEM IRMP_PARAMETER nec_param =\r |
4225a882 | 1096 | {\r |
d155e9ab | 1097 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
1098 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1099 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1100 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1101 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1102 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1103 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1104 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1105 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1106 | NEC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1107 | NEC_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address\r | |
1108 | NEC_COMMAND_OFFSET, // command_offset: command offset\r | |
1109 | NEC_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command\r | |
1110 | NEC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1111 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1112 | NEC_LSB, // lsb_first: flag: LSB first\r |
1113 | NEC_FLAGS // flags: some flags\r | |
4225a882 | 1114 | };\r |
1115 | \r | |
63b94f48 | 1116 | static const PROGMEM IRMP_PARAMETER nec_rep_param =\r |
46dd89b7 | 1117 | {\r |
d155e9ab | 1118 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
1119 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1120 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1121 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1122 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1123 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1124 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1125 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1126 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1127 | 0, // address_offset: address offset\r | |
1128 | 0, // address_end: end of address\r | |
1129 | 0, // command_offset: command offset\r | |
1130 | 0, // command_end: end of command\r | |
1131 | 0, // complete_len: complete length of frame\r | |
1132 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1133 | NEC_LSB, // lsb_first: flag: LSB first\r |
1134 | NEC_FLAGS // flags: some flags\r | |
46dd89b7 | 1135 | };\r |
1136 | \r | |
4225a882 | 1137 | #endif\r |
1138 | \r | |
35213800 | 1139 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
fc80d688 | 1140 | \r |
63b94f48 | 1141 | static const PROGMEM IRMP_PARAMETER nec42_param =\r |
fc80d688 | 1142 | {\r |
35213800 | 1143 | IRMP_NEC42_PROTOCOL, // protocol: ir protocol\r |
fc80d688 | 1144 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r |
1145 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1146 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1147 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1148 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1149 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1150 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1151 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
35213800 | 1152 | NEC42_ADDRESS_OFFSET, // address_offset: address offset\r |
7644ac04 | 1153 | NEC42_ADDRESS_OFFSET + NEC42_ADDRESS_LEN, // address_end: end of address\r |
35213800 | 1154 | NEC42_COMMAND_OFFSET, // command_offset: command offset\r |
7644ac04 | 1155 | NEC42_COMMAND_OFFSET + NEC42_COMMAND_LEN, // command_end: end of command\r |
35213800 | 1156 | NEC42_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r |
1157 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1158 | NEC_LSB, // lsb_first: flag: LSB first\r | |
1159 | NEC_FLAGS // flags: some flags\r | |
fc80d688 | 1160 | };\r |
1161 | \r | |
1162 | #endif\r | |
1163 | \r | |
69da6090 | 1164 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
1165 | \r | |
1166 | static const PROGMEM IRMP_PARAMETER lgair_param =\r | |
1167 | {\r | |
1168 | IRMP_LGAIR_PROTOCOL, // protocol: ir protocol\r | |
1169 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1170 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1171 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1172 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1173 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1174 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1175 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1176 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1177 | LGAIR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1178 | LGAIR_ADDRESS_OFFSET + LGAIR_ADDRESS_LEN, // address_end: end of address\r | |
1179 | LGAIR_COMMAND_OFFSET, // command_offset: command offset\r | |
1180 | LGAIR_COMMAND_OFFSET + LGAIR_COMMAND_LEN, // command_end: end of command\r | |
1181 | LGAIR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1182 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1183 | NEC_LSB, // lsb_first: flag: LSB first\r | |
1184 | NEC_FLAGS // flags: some flags\r | |
1185 | };\r | |
1186 | \r | |
1187 | #endif\r | |
1188 | \r | |
4225a882 | 1189 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
1190 | \r | |
63b94f48 | 1191 | static const PROGMEM IRMP_PARAMETER samsung_param =\r |
4225a882 | 1192 | {\r |
d155e9ab | 1193 | IRMP_SAMSUNG_PROTOCOL, // protocol: ir protocol\r |
1194 | SAMSUNG_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1195 | SAMSUNG_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1196 | SAMSUNG_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1197 | SAMSUNG_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1198 | SAMSUNG_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1199 | SAMSUNG_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1200 | SAMSUNG_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1201 | SAMSUNG_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1202 | SAMSUNG_ADDRESS_OFFSET, // address_offset: address offset\r | |
1203 | SAMSUNG_ADDRESS_OFFSET + SAMSUNG_ADDRESS_LEN, // address_end: end of address\r | |
1204 | SAMSUNG_COMMAND_OFFSET, // command_offset: command offset\r | |
1205 | SAMSUNG_COMMAND_OFFSET + SAMSUNG_COMMAND_LEN, // command_end: end of command\r | |
1206 | SAMSUNG_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1207 | SAMSUNG_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1208 | SAMSUNG_LSB, // lsb_first: flag: LSB first\r |
1209 | SAMSUNG_FLAGS // flags: some flags\r | |
4225a882 | 1210 | };\r |
1211 | \r | |
1212 | #endif\r | |
1213 | \r | |
b85cb27d | 1214 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
1215 | \r | |
1216 | static const PROGMEM IRMP_PARAMETER telefunken_param =\r | |
1217 | {\r | |
1218 | IRMP_TELEFUNKEN_PROTOCOL, // protocol: ir protocol\r | |
1219 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1220 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1221 | TELEFUNKEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1222 | TELEFUNKEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1223 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1224 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1225 | TELEFUNKEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1226 | TELEFUNKEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1227 | TELEFUNKEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1228 | TELEFUNKEN_ADDRESS_OFFSET + TELEFUNKEN_ADDRESS_LEN, // address_end: end of address\r | |
1229 | TELEFUNKEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1230 | TELEFUNKEN_COMMAND_OFFSET + TELEFUNKEN_COMMAND_LEN, // command_end: end of command\r | |
1231 | TELEFUNKEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1232 | TELEFUNKEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1233 | TELEFUNKEN_LSB, // lsb_first: flag: LSB first\r | |
1234 | TELEFUNKEN_FLAGS // flags: some flags\r | |
1235 | };\r | |
1236 | \r | |
1237 | #endif\r | |
1238 | \r | |
4225a882 | 1239 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
1240 | \r | |
63b94f48 | 1241 | static const PROGMEM IRMP_PARAMETER matsushita_param =\r |
4225a882 | 1242 | {\r |
d155e9ab | 1243 | IRMP_MATSUSHITA_PROTOCOL, // protocol: ir protocol\r |
1244 | MATSUSHITA_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1245 | MATSUSHITA_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1246 | MATSUSHITA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1247 | MATSUSHITA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1248 | MATSUSHITA_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1249 | MATSUSHITA_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1250 | MATSUSHITA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1251 | MATSUSHITA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1252 | MATSUSHITA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1253 | MATSUSHITA_ADDRESS_OFFSET + MATSUSHITA_ADDRESS_LEN, // address_end: end of address\r | |
1254 | MATSUSHITA_COMMAND_OFFSET, // command_offset: command offset\r | |
1255 | MATSUSHITA_COMMAND_OFFSET + MATSUSHITA_COMMAND_LEN, // command_end: end of command\r | |
1256 | MATSUSHITA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1257 | MATSUSHITA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1258 | MATSUSHITA_LSB, // lsb_first: flag: LSB first\r |
1259 | MATSUSHITA_FLAGS // flags: some flags\r | |
4225a882 | 1260 | };\r |
1261 | \r | |
1262 | #endif\r | |
1263 | \r | |
1264 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1265 | \r | |
63b94f48 | 1266 | static const PROGMEM IRMP_PARAMETER kaseikyo_param =\r |
4225a882 | 1267 | {\r |
d155e9ab | 1268 | IRMP_KASEIKYO_PROTOCOL, // protocol: ir protocol\r |
1269 | KASEIKYO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1270 | KASEIKYO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1271 | KASEIKYO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1272 | KASEIKYO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1273 | KASEIKYO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1274 | KASEIKYO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1275 | KASEIKYO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1276 | KASEIKYO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1277 | KASEIKYO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1278 | KASEIKYO_ADDRESS_OFFSET + KASEIKYO_ADDRESS_LEN, // address_end: end of address\r | |
1279 | KASEIKYO_COMMAND_OFFSET, // command_offset: command offset\r | |
1280 | KASEIKYO_COMMAND_OFFSET + KASEIKYO_COMMAND_LEN, // command_end: end of command\r | |
1281 | KASEIKYO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1282 | KASEIKYO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1283 | KASEIKYO_LSB, // lsb_first: flag: LSB first\r |
1284 | KASEIKYO_FLAGS // flags: some flags\r | |
4225a882 | 1285 | };\r |
1286 | \r | |
1287 | #endif\r | |
1288 | \r | |
95b27043 | 1289 | #if IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
1290 | \r | |
1291 | static const PROGMEM IRMP_PARAMETER panasonic_param =\r | |
1292 | {\r | |
1293 | IRMP_PANASONIC_PROTOCOL, // protocol: ir protocol\r | |
1294 | PANASONIC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1295 | PANASONIC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1296 | PANASONIC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1297 | PANASONIC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1298 | PANASONIC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1299 | PANASONIC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1300 | PANASONIC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1301 | PANASONIC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1302 | PANASONIC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1303 | PANASONIC_ADDRESS_OFFSET + PANASONIC_ADDRESS_LEN, // address_end: end of address\r | |
1304 | PANASONIC_COMMAND_OFFSET, // command_offset: command offset\r | |
1305 | PANASONIC_COMMAND_OFFSET + PANASONIC_COMMAND_LEN, // command_end: end of command\r | |
1306 | PANASONIC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1307 | PANASONIC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1308 | PANASONIC_LSB, // lsb_first: flag: LSB first\r | |
1309 | PANASONIC_FLAGS // flags: some flags\r | |
1310 | };\r | |
1311 | \r | |
1312 | #endif\r | |
1313 | \r | |
7365350c | 1314 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
1315 | \r | |
1316 | static const PROGMEM IRMP_PARAMETER mitsu_heavy_param =\r | |
1317 | {\r | |
1318 | IRMP_MITSU_HEAVY_PROTOCOL, // protocol: ir protocol\r | |
1319 | MITSU_HEAVY_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1320 | MITSU_HEAVY_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1321 | MITSU_HEAVY_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1322 | MITSU_HEAVY_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1323 | MITSU_HEAVY_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1324 | MITSU_HEAVY_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1325 | MITSU_HEAVY_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1326 | MITSU_HEAVY_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1327 | MITSU_HEAVY_ADDRESS_OFFSET, // address_offset: address offset\r | |
1328 | MITSU_HEAVY_ADDRESS_OFFSET + MITSU_HEAVY_ADDRESS_LEN, // address_end: end of address\r | |
1329 | MITSU_HEAVY_COMMAND_OFFSET, // command_offset: command offset\r | |
1330 | MITSU_HEAVY_COMMAND_OFFSET + MITSU_HEAVY_COMMAND_LEN, // command_end: end of command\r | |
1331 | MITSU_HEAVY_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1332 | MITSU_HEAVY_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1333 | MITSU_HEAVY_LSB, // lsb_first: flag: LSB first\r | |
1334 | MITSU_HEAVY_FLAGS // flags: some flags\r | |
1335 | };\r | |
1336 | \r | |
1337 | #endif\r | |
1338 | \r | |
4225a882 | 1339 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
1340 | \r | |
63b94f48 | 1341 | static const PROGMEM IRMP_PARAMETER recs80_param =\r |
4225a882 | 1342 | {\r |
d155e9ab | 1343 | IRMP_RECS80_PROTOCOL, // protocol: ir protocol\r |
1344 | RECS80_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1345 | RECS80_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1346 | RECS80_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1347 | RECS80_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1348 | RECS80_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1349 | RECS80_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1350 | RECS80_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1351 | RECS80_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1352 | RECS80_ADDRESS_OFFSET, // address_offset: address offset\r | |
1353 | RECS80_ADDRESS_OFFSET + RECS80_ADDRESS_LEN, // address_end: end of address\r | |
1354 | RECS80_COMMAND_OFFSET, // command_offset: command offset\r | |
1355 | RECS80_COMMAND_OFFSET + RECS80_COMMAND_LEN, // command_end: end of command\r | |
1356 | RECS80_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1357 | RECS80_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1358 | RECS80_LSB, // lsb_first: flag: LSB first\r |
1359 | RECS80_FLAGS // flags: some flags\r | |
4225a882 | 1360 | };\r |
1361 | \r | |
1362 | #endif\r | |
1363 | \r | |
1364 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1365 | \r | |
63b94f48 | 1366 | static const PROGMEM IRMP_PARAMETER rc5_param =\r |
4225a882 | 1367 | {\r |
d155e9ab | 1368 | IRMP_RC5_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1369 | RC5_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1370 | RC5_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1371 | RC5_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1372 | RC5_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1373 | 0, // pulse_0_len_min: here: not used\r |
1374 | 0, // pulse_0_len_max: here: not used\r | |
1375 | 0, // pause_0_len_min: here: not used\r | |
1376 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1377 | RC5_ADDRESS_OFFSET, // address_offset: address offset\r |
1378 | RC5_ADDRESS_OFFSET + RC5_ADDRESS_LEN, // address_end: end of address\r | |
1379 | RC5_COMMAND_OFFSET, // command_offset: command offset\r | |
1380 | RC5_COMMAND_OFFSET + RC5_COMMAND_LEN, // command_end: end of command\r | |
1381 | RC5_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1382 | RC5_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1383 | RC5_LSB, // lsb_first: flag: LSB first\r |
1384 | RC5_FLAGS // flags: some flags\r | |
4225a882 | 1385 | };\r |
1386 | \r | |
1387 | #endif\r | |
1388 | \r | |
c2b70f0b | 1389 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
1390 | \r | |
1391 | static const PROGMEM IRMP_PARAMETER s100_param =\r | |
1392 | {\r | |
1393 | IRMP_S100_PROTOCOL, // protocol: ir protocol\r | |
1394 | S100_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1395 | S100_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1396 | S100_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1397 | S100_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1398 | 0, // pulse_0_len_min: here: not used\r | |
1399 | 0, // pulse_0_len_max: here: not used\r | |
1400 | 0, // pause_0_len_min: here: not used\r | |
1401 | 0, // pause_0_len_max: here: not used\r | |
1402 | S100_ADDRESS_OFFSET, // address_offset: address offset\r | |
1403 | S100_ADDRESS_OFFSET + S100_ADDRESS_LEN, // address_end: end of address\r | |
1404 | S100_COMMAND_OFFSET, // command_offset: command offset\r | |
1405 | S100_COMMAND_OFFSET + S100_COMMAND_LEN, // command_end: end of command\r | |
1406 | S100_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1407 | S100_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1408 | S100_LSB, // lsb_first: flag: LSB first\r | |
1409 | S100_FLAGS // flags: some flags\r | |
1410 | };\r | |
1411 | \r | |
1412 | #endif\r | |
1413 | \r | |
4225a882 | 1414 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
1415 | \r | |
63b94f48 | 1416 | static const PROGMEM IRMP_PARAMETER denon_param =\r |
4225a882 | 1417 | {\r |
d155e9ab | 1418 | IRMP_DENON_PROTOCOL, // protocol: ir protocol\r |
1419 | DENON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1420 | DENON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1421 | DENON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1422 | DENON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1423 | DENON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1424 | DENON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1425 | DENON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1426 | DENON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1427 | DENON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1428 | DENON_ADDRESS_OFFSET + DENON_ADDRESS_LEN, // address_end: end of address\r | |
1429 | DENON_COMMAND_OFFSET, // command_offset: command offset\r | |
1430 | DENON_COMMAND_OFFSET + DENON_COMMAND_LEN, // command_end: end of command\r | |
1431 | DENON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1432 | DENON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1433 | DENON_LSB, // lsb_first: flag: LSB first\r |
1434 | DENON_FLAGS // flags: some flags\r | |
4225a882 | 1435 | };\r |
1436 | \r | |
1437 | #endif\r | |
1438 | \r | |
1439 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
1440 | \r | |
63b94f48 | 1441 | static const PROGMEM IRMP_PARAMETER rc6_param =\r |
4225a882 | 1442 | {\r |
d155e9ab | 1443 | IRMP_RC6_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1444 | \r |
1445 | RC6_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1446 | RC6_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1447 | RC6_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1448 | RC6_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1449 | 0, // pulse_0_len_min: here: not used\r |
1450 | 0, // pulse_0_len_max: here: not used\r | |
1451 | 0, // pause_0_len_min: here: not used\r | |
1452 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1453 | RC6_ADDRESS_OFFSET, // address_offset: address offset\r |
1454 | RC6_ADDRESS_OFFSET + RC6_ADDRESS_LEN, // address_end: end of address\r | |
1455 | RC6_COMMAND_OFFSET, // command_offset: command offset\r | |
1456 | RC6_COMMAND_OFFSET + RC6_COMMAND_LEN, // command_end: end of command\r | |
1457 | RC6_COMPLETE_DATA_LEN_SHORT, // complete_len: complete length of frame\r | |
1458 | RC6_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1459 | RC6_LSB, // lsb_first: flag: LSB first\r |
1460 | RC6_FLAGS // flags: some flags\r | |
4225a882 | 1461 | };\r |
1462 | \r | |
1463 | #endif\r | |
1464 | \r | |
1465 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
1466 | \r | |
63b94f48 | 1467 | static const PROGMEM IRMP_PARAMETER recs80ext_param =\r |
4225a882 | 1468 | {\r |
d155e9ab | 1469 | IRMP_RECS80EXT_PROTOCOL, // protocol: ir protocol\r |
1470 | RECS80EXT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1471 | RECS80EXT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1472 | RECS80EXT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1473 | RECS80EXT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1474 | RECS80EXT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1475 | RECS80EXT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1476 | RECS80EXT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1477 | RECS80EXT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1478 | RECS80EXT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1479 | RECS80EXT_ADDRESS_OFFSET + RECS80EXT_ADDRESS_LEN, // address_end: end of address\r | |
1480 | RECS80EXT_COMMAND_OFFSET, // command_offset: command offset\r | |
1481 | RECS80EXT_COMMAND_OFFSET + RECS80EXT_COMMAND_LEN, // command_end: end of command\r | |
1482 | RECS80EXT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1483 | RECS80EXT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1484 | RECS80EXT_LSB, // lsb_first: flag: LSB first\r |
1485 | RECS80EXT_FLAGS // flags: some flags\r | |
4225a882 | 1486 | };\r |
1487 | \r | |
1488 | #endif\r | |
1489 | \r | |
504d9df9 | 1490 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r |
4225a882 | 1491 | \r |
63b94f48 | 1492 | static const PROGMEM IRMP_PARAMETER nubert_param =\r |
4225a882 | 1493 | {\r |
d155e9ab | 1494 | IRMP_NUBERT_PROTOCOL, // protocol: ir protocol\r |
1495 | NUBERT_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1496 | NUBERT_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1497 | NUBERT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1498 | NUBERT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1499 | NUBERT_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1500 | NUBERT_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1501 | NUBERT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1502 | NUBERT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1503 | NUBERT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1504 | NUBERT_ADDRESS_OFFSET + NUBERT_ADDRESS_LEN, // address_end: end of address\r | |
1505 | NUBERT_COMMAND_OFFSET, // command_offset: command offset\r | |
1506 | NUBERT_COMMAND_OFFSET + NUBERT_COMMAND_LEN, // command_end: end of command\r | |
1507 | NUBERT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1508 | NUBERT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1509 | NUBERT_LSB, // lsb_first: flag: LSB first\r |
1510 | NUBERT_FLAGS // flags: some flags\r | |
4225a882 | 1511 | };\r |
1512 | \r | |
1513 | #endif\r | |
1514 | \r | |
0715cf5e | 1515 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
1516 | \r | |
1517 | static const PROGMEM IRMP_PARAMETER fan_param =\r | |
1518 | {\r | |
1519 | IRMP_FAN_PROTOCOL, // protocol: ir protocol\r | |
1520 | FAN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1521 | FAN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1522 | FAN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1523 | FAN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1524 | FAN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1525 | FAN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1526 | FAN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1527 | FAN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1528 | FAN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1529 | FAN_ADDRESS_OFFSET + FAN_ADDRESS_LEN, // address_end: end of address\r | |
1530 | FAN_COMMAND_OFFSET, // command_offset: command offset\r | |
1531 | FAN_COMMAND_OFFSET + FAN_COMMAND_LEN, // command_end: end of command\r | |
1532 | FAN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1533 | FAN_STOP_BIT, // stop_bit: flag: frame has NO stop bit\r | |
1534 | FAN_LSB, // lsb_first: flag: LSB first\r | |
1535 | FAN_FLAGS // flags: some flags\r | |
1536 | };\r | |
1537 | \r | |
1538 | #endif\r | |
1539 | \r | |
0a2f634b | 1540 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
1541 | \r | |
1542 | static const PROGMEM IRMP_PARAMETER speaker_param =\r | |
1543 | {\r | |
1544 | IRMP_SPEAKER_PROTOCOL, // protocol: ir protocol\r | |
1545 | SPEAKER_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1546 | SPEAKER_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1547 | SPEAKER_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1548 | SPEAKER_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1549 | SPEAKER_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1550 | SPEAKER_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1551 | SPEAKER_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1552 | SPEAKER_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1553 | SPEAKER_ADDRESS_OFFSET, // address_offset: address offset\r | |
1554 | SPEAKER_ADDRESS_OFFSET + SPEAKER_ADDRESS_LEN, // address_end: end of address\r | |
1555 | SPEAKER_COMMAND_OFFSET, // command_offset: command offset\r | |
1556 | SPEAKER_COMMAND_OFFSET + SPEAKER_COMMAND_LEN, // command_end: end of command\r | |
1557 | SPEAKER_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1558 | SPEAKER_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1559 | SPEAKER_LSB, // lsb_first: flag: LSB first\r | |
1560 | SPEAKER_FLAGS // flags: some flags\r | |
1561 | };\r | |
1562 | \r | |
1563 | #endif\r | |
1564 | \r | |
504d9df9 | 1565 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
1566 | \r | |
63b94f48 | 1567 | static const PROGMEM IRMP_PARAMETER bang_olufsen_param =\r |
504d9df9 | 1568 | {\r |
d155e9ab | 1569 | IRMP_BANG_OLUFSEN_PROTOCOL, // protocol: ir protocol\r |
1570 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1571 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1572 | BANG_OLUFSEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1573 | BANG_OLUFSEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1574 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1575 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1576 | BANG_OLUFSEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1577 | BANG_OLUFSEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1578 | BANG_OLUFSEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1579 | BANG_OLUFSEN_ADDRESS_OFFSET + BANG_OLUFSEN_ADDRESS_LEN, // address_end: end of address\r | |
1580 | BANG_OLUFSEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1581 | BANG_OLUFSEN_COMMAND_OFFSET + BANG_OLUFSEN_COMMAND_LEN, // command_end: end of command\r | |
1582 | BANG_OLUFSEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1583 | BANG_OLUFSEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1584 | BANG_OLUFSEN_LSB, // lsb_first: flag: LSB first\r |
1585 | BANG_OLUFSEN_FLAGS // flags: some flags\r | |
504d9df9 | 1586 | };\r |
1587 | \r | |
1588 | #endif\r | |
1589 | \r | |
89e8cafb | 1590 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
1591 | \r | |
0834784c | 1592 | static uint_fast8_t first_bit;\r |
592411d1 | 1593 | \r |
63b94f48 | 1594 | static const PROGMEM IRMP_PARAMETER grundig_param =\r |
592411d1 | 1595 | {\r |
d155e9ab | 1596 | IRMP_GRUNDIG_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1597 | \r |
89e8cafb | 1598 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1599 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1600 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1601 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1602 | 0, // pulse_0_len_min: here: not used\r |
1603 | 0, // pulse_0_len_max: here: not used\r | |
1604 | 0, // pause_0_len_min: here: not used\r | |
1605 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1606 | GRUNDIG_ADDRESS_OFFSET, // address_offset: address offset\r |
1607 | GRUNDIG_ADDRESS_OFFSET + GRUNDIG_ADDRESS_LEN, // address_end: end of address\r | |
1608 | GRUNDIG_COMMAND_OFFSET, // command_offset: command offset\r | |
1609 | GRUNDIG_COMMAND_OFFSET + GRUNDIG_COMMAND_LEN + 1, // command_end: end of command (USE 1 bit MORE to STORE NOKIA DATA!)\r | |
1610 | NOKIA_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: NOKIA instead of GRUNDIG!\r | |
89e8cafb | 1611 | GRUNDIG_NOKIA_IR60_STOP_BIT, // stop_bit: flag: frame has stop bit\r |
1612 | GRUNDIG_NOKIA_IR60_LSB, // lsb_first: flag: LSB first\r | |
1613 | GRUNDIG_NOKIA_IR60_FLAGS // flags: some flags\r | |
592411d1 | 1614 | };\r |
1615 | \r | |
1616 | #endif\r | |
1617 | \r | |
12948cf3 | 1618 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
a7054daf | 1619 | \r |
63b94f48 | 1620 | static const PROGMEM IRMP_PARAMETER ruwido_param =\r |
a7054daf | 1621 | {\r |
12948cf3 | 1622 | IRMP_RUWIDO_PROTOCOL, // protocol: ir protocol\r |
1623 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1624 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1625 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1626 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1627 | 0, // pulse_0_len_min: here: not used\r |
1628 | 0, // pulse_0_len_max: here: not used\r | |
1629 | 0, // pause_0_len_min: here: not used\r | |
1630 | 0, // pause_0_len_max: here: not used\r | |
12948cf3 | 1631 | RUWIDO_ADDRESS_OFFSET, // address_offset: address offset\r |
1632 | RUWIDO_ADDRESS_OFFSET + RUWIDO_ADDRESS_LEN, // address_end: end of address\r | |
1633 | RUWIDO_COMMAND_OFFSET, // command_offset: command offset\r | |
1634 | RUWIDO_COMMAND_OFFSET + RUWIDO_COMMAND_LEN, // command_end: end of command\r | |
1635 | SIEMENS_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: SIEMENS instead of RUWIDO!\r | |
1636 | SIEMENS_OR_RUWIDO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1637 | SIEMENS_OR_RUWIDO_LSB, // lsb_first: flag: LSB first\r | |
1638 | SIEMENS_OR_RUWIDO_FLAGS // flags: some flags\r | |
a7054daf | 1639 | };\r |
1640 | \r | |
1641 | #endif\r | |
1642 | \r | |
48664931 | 1643 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
b5ea7869 | 1644 | \r |
63b94f48 | 1645 | static const PROGMEM IRMP_PARAMETER fdc_param =\r |
b5ea7869 | 1646 | {\r |
48664931 | 1647 | IRMP_FDC_PROTOCOL, // protocol: ir protocol\r |
1648 | FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1649 | FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1650 | FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1651 | FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1652 | FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1653 | FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1654 | FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1655 | FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1656 | FDC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1657 | FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address\r | |
1658 | FDC_COMMAND_OFFSET, // command_offset: command offset\r | |
1659 | FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command\r | |
1660 | FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1661 | FDC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1662 | FDC_LSB, // lsb_first: flag: LSB first\r | |
1663 | FDC_FLAGS // flags: some flags\r | |
b5ea7869 | 1664 | };\r |
1665 | \r | |
1666 | #endif\r | |
1667 | \r | |
9e16d699 | 1668 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
1669 | \r | |
63b94f48 | 1670 | static const PROGMEM IRMP_PARAMETER rccar_param =\r |
9e16d699 | 1671 | {\r |
1672 | IRMP_RCCAR_PROTOCOL, // protocol: ir protocol\r | |
1673 | RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1674 | RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1675 | RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1676 | RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1677 | RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1678 | RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1679 | RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1680 | RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1681 | RCCAR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1682 | RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address\r | |
1683 | RCCAR_COMMAND_OFFSET, // command_offset: command offset\r | |
1684 | RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command\r | |
1685 | RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1686 | RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1687 | RCCAR_LSB, // lsb_first: flag: LSB first\r | |
1688 | RCCAR_FLAGS // flags: some flags\r | |
1689 | };\r | |
1690 | \r | |
1691 | #endif\r | |
1692 | \r | |
9405f84a | 1693 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
1694 | \r | |
63b94f48 | 1695 | static const PROGMEM IRMP_PARAMETER nikon_param =\r |
9405f84a | 1696 | {\r |
1697 | IRMP_NIKON_PROTOCOL, // protocol: ir protocol\r | |
1698 | NIKON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1699 | NIKON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1700 | NIKON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1701 | NIKON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1702 | NIKON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1703 | NIKON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1704 | NIKON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1705 | NIKON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1706 | NIKON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1707 | NIKON_ADDRESS_OFFSET + NIKON_ADDRESS_LEN, // address_end: end of address\r | |
1708 | NIKON_COMMAND_OFFSET, // command_offset: command offset\r | |
1709 | NIKON_COMMAND_OFFSET + NIKON_COMMAND_LEN, // command_end: end of command\r | |
1710 | NIKON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1711 | NIKON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1712 | NIKON_LSB, // lsb_first: flag: LSB first\r | |
1713 | NIKON_FLAGS // flags: some flags\r | |
1714 | };\r | |
1715 | \r | |
1716 | #endif\r | |
1717 | \r | |
111d6191 | 1718 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
1719 | \r | |
63b94f48 | 1720 | static const PROGMEM IRMP_PARAMETER kathrein_param =\r |
111d6191 | 1721 | {\r |
1722 | IRMP_KATHREIN_PROTOCOL, // protocol: ir protocol\r | |
1723 | KATHREIN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1724 | KATHREIN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1725 | KATHREIN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1726 | KATHREIN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1727 | KATHREIN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1728 | KATHREIN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1729 | KATHREIN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1730 | KATHREIN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1731 | KATHREIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1732 | KATHREIN_ADDRESS_OFFSET + KATHREIN_ADDRESS_LEN, // address_end: end of address\r | |
1733 | KATHREIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1734 | KATHREIN_COMMAND_OFFSET + KATHREIN_COMMAND_LEN, // command_end: end of command\r | |
1735 | KATHREIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1736 | KATHREIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1737 | KATHREIN_LSB, // lsb_first: flag: LSB first\r | |
1738 | KATHREIN_FLAGS // flags: some flags\r | |
1739 | };\r | |
1740 | \r | |
1741 | #endif\r | |
1742 | \r | |
deba2a0a | 1743 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
1744 | \r | |
63b94f48 | 1745 | static const PROGMEM IRMP_PARAMETER netbox_param =\r |
deba2a0a | 1746 | {\r |
1747 | IRMP_NETBOX_PROTOCOL, // protocol: ir protocol\r | |
a42d1ee6 | 1748 | NETBOX_PULSE_LEN, // pulse_1_len_min: minimum length of pulse with bit value 1, here: exact value\r |
1749 | NETBOX_PULSE_REST_LEN, // pulse_1_len_max: maximum length of pulse with bit value 1, here: rest value\r | |
1750 | NETBOX_PAUSE_LEN, // pause_1_len_min: minimum length of pause with bit value 1, here: exact value\r | |
1751 | NETBOX_PAUSE_REST_LEN, // pause_1_len_max: maximum length of pause with bit value 1, here: rest value\r | |
1752 | NETBOX_PULSE_LEN, // pulse_0_len_min: minimum length of pulse with bit value 0, here: exact value\r | |
1753 | NETBOX_PULSE_REST_LEN, // pulse_0_len_max: maximum length of pulse with bit value 0, here: rest value\r | |
1754 | NETBOX_PAUSE_LEN, // pause_0_len_min: minimum length of pause with bit value 0, here: exact value\r | |
1755 | NETBOX_PAUSE_REST_LEN, // pause_0_len_max: maximum length of pause with bit value 0, here: rest value\r | |
deba2a0a | 1756 | NETBOX_ADDRESS_OFFSET, // address_offset: address offset\r |
1757 | NETBOX_ADDRESS_OFFSET + NETBOX_ADDRESS_LEN, // address_end: end of address\r | |
1758 | NETBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1759 | NETBOX_COMMAND_OFFSET + NETBOX_COMMAND_LEN, // command_end: end of command\r | |
1760 | NETBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1761 | NETBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1762 | NETBOX_LSB, // lsb_first: flag: LSB first\r | |
1763 | NETBOX_FLAGS // flags: some flags\r | |
1764 | };\r | |
1765 | \r | |
1766 | #endif\r | |
1767 | \r | |
f50e01e7 | 1768 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
1769 | \r | |
63b94f48 | 1770 | static const PROGMEM IRMP_PARAMETER lego_param =\r |
f50e01e7 | 1771 | {\r |
1772 | IRMP_LEGO_PROTOCOL, // protocol: ir protocol\r | |
1773 | LEGO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1774 | LEGO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1775 | LEGO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1776 | LEGO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1777 | LEGO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1778 | LEGO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1779 | LEGO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1780 | LEGO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1781 | LEGO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1782 | LEGO_ADDRESS_OFFSET + LEGO_ADDRESS_LEN, // address_end: end of address\r | |
1783 | LEGO_COMMAND_OFFSET, // command_offset: command offset\r | |
1784 | LEGO_COMMAND_OFFSET + LEGO_COMMAND_LEN, // command_end: end of command\r | |
1785 | LEGO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1786 | LEGO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1787 | LEGO_LSB, // lsb_first: flag: LSB first\r | |
1788 | LEGO_FLAGS // flags: some flags\r | |
1789 | };\r | |
1790 | \r | |
1791 | #endif\r | |
1792 | \r | |
beda975f | 1793 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
1794 | \r | |
63b94f48 | 1795 | static const PROGMEM IRMP_PARAMETER thomson_param =\r |
beda975f | 1796 | {\r |
1797 | IRMP_THOMSON_PROTOCOL, // protocol: ir protocol\r | |
1798 | THOMSON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1799 | THOMSON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1800 | THOMSON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1801 | THOMSON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1802 | THOMSON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1803 | THOMSON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1804 | THOMSON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1805 | THOMSON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1806 | THOMSON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1807 | THOMSON_ADDRESS_OFFSET + THOMSON_ADDRESS_LEN, // address_end: end of address\r | |
1808 | THOMSON_COMMAND_OFFSET, // command_offset: command offset\r | |
1809 | THOMSON_COMMAND_OFFSET + THOMSON_COMMAND_LEN, // command_end: end of command\r | |
1810 | THOMSON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1811 | THOMSON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1812 | THOMSON_LSB, // lsb_first: flag: LSB first\r | |
1813 | THOMSON_FLAGS // flags: some flags\r | |
1814 | };\r | |
1815 | \r | |
1816 | #endif\r | |
1817 | \r | |
3a7e26e1 | 1818 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
1819 | \r | |
1820 | static const PROGMEM IRMP_PARAMETER bose_param =\r | |
1821 | {\r | |
1822 | IRMP_BOSE_PROTOCOL, // protocol: ir protocol\r | |
1823 | BOSE_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1824 | BOSE_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1825 | BOSE_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1826 | BOSE_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1827 | BOSE_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1828 | BOSE_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1829 | BOSE_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1830 | BOSE_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1831 | BOSE_ADDRESS_OFFSET, // address_offset: address offset\r | |
1832 | BOSE_ADDRESS_OFFSET + BOSE_ADDRESS_LEN, // address_end: end of address\r | |
1833 | BOSE_COMMAND_OFFSET, // command_offset: command offset\r | |
1834 | BOSE_COMMAND_OFFSET + BOSE_COMMAND_LEN, // command_end: end of command\r | |
1835 | BOSE_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1836 | BOSE_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1837 | BOSE_LSB, // lsb_first: flag: LSB first\r | |
1838 | BOSE_FLAGS // flags: some flags\r | |
1839 | };\r | |
1840 | \r | |
1841 | #endif\r | |
1842 | \r | |
2fb27bfe | 1843 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
1844 | \r | |
1845 | static const PROGMEM IRMP_PARAMETER a1tvbox_param =\r | |
1846 | {\r | |
1847 | IRMP_A1TVBOX_PROTOCOL, // protocol: ir protocol\r | |
1848 | \r | |
1849 | A1TVBOX_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1850 | A1TVBOX_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1851 | A1TVBOX_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1852 | A1TVBOX_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1853 | 0, // pulse_0_len_min: here: not used\r | |
1854 | 0, // pulse_0_len_max: here: not used\r | |
1855 | 0, // pause_0_len_min: here: not used\r | |
1856 | 0, // pause_0_len_max: here: not used\r | |
1857 | A1TVBOX_ADDRESS_OFFSET, // address_offset: address offset\r | |
1858 | A1TVBOX_ADDRESS_OFFSET + A1TVBOX_ADDRESS_LEN, // address_end: end of address\r | |
1859 | A1TVBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1860 | A1TVBOX_COMMAND_OFFSET + A1TVBOX_COMMAND_LEN, // command_end: end of command\r | |
1861 | A1TVBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1862 | A1TVBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1863 | A1TVBOX_LSB, // lsb_first: flag: LSB first\r | |
1864 | A1TVBOX_FLAGS // flags: some flags\r | |
1865 | };\r | |
1866 | \r | |
1867 | #endif\r | |
1868 | \r | |
0715cf5e | 1869 | #if IRMP_SUPPORT_MERLIN_PROTOCOL == 1\r |
1870 | \r | |
1871 | static const PROGMEM IRMP_PARAMETER merlin_param =\r | |
1872 | {\r | |
1873 | IRMP_MERLIN_PROTOCOL, // protocol: ir protocol\r | |
1874 | \r | |
1875 | MERLIN_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1876 | MERLIN_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1877 | MERLIN_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1878 | MERLIN_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1879 | 0, // pulse_0_len_min: here: not used\r | |
1880 | 0, // pulse_0_len_max: here: not used\r | |
1881 | 0, // pause_0_len_min: here: not used\r | |
1882 | 0, // pause_0_len_max: here: not used\r | |
1883 | MERLIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1884 | MERLIN_ADDRESS_OFFSET + MERLIN_ADDRESS_LEN, // address_end: end of address\r | |
1885 | MERLIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1886 | MERLIN_COMMAND_OFFSET + MERLIN_COMMAND_LEN, // command_end: end of command\r | |
1887 | MERLIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1888 | MERLIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1889 | MERLIN_LSB, // lsb_first: flag: LSB first\r | |
1890 | MERLIN_FLAGS // flags: some flags\r | |
1891 | };\r | |
1892 | \r | |
1893 | #endif\r | |
1894 | \r | |
b85cb27d | 1895 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1896 | \r | |
1897 | static const PROGMEM IRMP_PARAMETER ortek_param =\r | |
1898 | {\r | |
1899 | IRMP_ORTEK_PROTOCOL, // protocol: ir protocol\r | |
1900 | \r | |
1901 | ORTEK_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1902 | ORTEK_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1903 | ORTEK_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1904 | ORTEK_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1905 | 0, // pulse_0_len_min: here: not used\r | |
1906 | 0, // pulse_0_len_max: here: not used\r | |
1907 | 0, // pause_0_len_min: here: not used\r | |
1908 | 0, // pause_0_len_max: here: not used\r | |
1909 | ORTEK_ADDRESS_OFFSET, // address_offset: address offset\r | |
1910 | ORTEK_ADDRESS_OFFSET + ORTEK_ADDRESS_LEN, // address_end: end of address\r | |
1911 | ORTEK_COMMAND_OFFSET, // command_offset: command offset\r | |
1912 | ORTEK_COMMAND_OFFSET + ORTEK_COMMAND_LEN, // command_end: end of command\r | |
1913 | ORTEK_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1914 | ORTEK_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1915 | ORTEK_LSB, // lsb_first: flag: LSB first\r | |
1916 | ORTEK_FLAGS // flags: some flags\r | |
1917 | };\r | |
1918 | \r | |
1919 | #endif\r | |
1920 | \r | |
40ca4604 | 1921 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
1922 | \r | |
1923 | static const PROGMEM IRMP_PARAMETER roomba_param =\r | |
1924 | {\r | |
1925 | IRMP_ROOMBA_PROTOCOL, // protocol: ir protocol\r | |
1926 | ROOMBA_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1927 | ROOMBA_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1928 | ROOMBA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1929 | ROOMBA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1930 | ROOMBA_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1931 | ROOMBA_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1932 | ROOMBA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1933 | ROOMBA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1934 | ROOMBA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1935 | ROOMBA_ADDRESS_OFFSET + ROOMBA_ADDRESS_LEN, // address_end: end of address\r | |
1936 | ROOMBA_COMMAND_OFFSET, // command_offset: command offset\r | |
1937 | ROOMBA_COMMAND_OFFSET + ROOMBA_COMMAND_LEN, // command_end: end of command\r | |
1938 | ROOMBA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1939 | ROOMBA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1940 | ROOMBA_LSB, // lsb_first: flag: LSB first\r | |
1941 | ROOMBA_FLAGS // flags: some flags\r | |
1942 | };\r | |
1943 | \r | |
1944 | #endif\r | |
1945 | \r | |
cb93f9e9 | 1946 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
1947 | \r | |
1948 | static const PROGMEM IRMP_PARAMETER rcmm_param =\r | |
1949 | {\r | |
faf6479d | 1950 | IRMP_RCMM32_PROTOCOL, // protocol: ir protocol\r |
0834784c | 1951 | \r |
faf6479d | 1952 | RCMM32_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1953 | RCMM32_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
cb93f9e9 | 1954 | 0, // pause_1_len_min: here: minimum length of short pause\r |
1955 | 0, // pause_1_len_max: here: maximum length of short pause\r | |
faf6479d | 1956 | RCMM32_BIT_PULSE_LEN_MIN, // pulse_0_len_min: here: not used\r |
1957 | RCMM32_BIT_PULSE_LEN_MAX, // pulse_0_len_max: here: not used\r | |
cb93f9e9 | 1958 | 0, // pause_0_len_min: here: not used\r |
1959 | 0, // pause_0_len_max: here: not used\r | |
faf6479d | 1960 | RCMM32_ADDRESS_OFFSET, // address_offset: address offset\r |
1961 | RCMM32_ADDRESS_OFFSET + RCMM32_ADDRESS_LEN, // address_end: end of address\r | |
1962 | RCMM32_COMMAND_OFFSET, // command_offset: command offset\r | |
1963 | RCMM32_COMMAND_OFFSET + RCMM32_COMMAND_LEN, // command_end: end of command\r | |
1964 | RCMM32_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1965 | RCMM32_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1966 | RCMM32_LSB, // lsb_first: flag: LSB first\r | |
1967 | RCMM32_FLAGS // flags: some flags\r | |
1968 | };\r | |
1969 | \r | |
1970 | #endif\r | |
1971 | \r | |
003c1008 | 1972 | #if IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
1973 | \r | |
1974 | static const PROGMEM IRMP_PARAMETER pentax_param =\r | |
1975 | {\r | |
1976 | IRMP_PENTAX_PROTOCOL, // protocol: ir protocol\r | |
1977 | PENTAX_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1978 | PENTAX_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1979 | PENTAX_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1980 | PENTAX_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1981 | PENTAX_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1982 | PENTAX_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1983 | PENTAX_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1984 | PENTAX_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1985 | PENTAX_ADDRESS_OFFSET, // address_offset: address offset\r | |
1986 | PENTAX_ADDRESS_OFFSET + PENTAX_ADDRESS_LEN, // address_end: end of address\r | |
1987 | PENTAX_COMMAND_OFFSET, // command_offset: command offset\r | |
1988 | PENTAX_COMMAND_OFFSET + PENTAX_COMMAND_LEN, // command_end: end of command\r | |
1989 | PENTAX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1990 | PENTAX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1991 | PENTAX_LSB, // lsb_first: flag: LSB first\r | |
1992 | PENTAX_FLAGS // flags: some flags\r | |
1993 | };\r | |
1994 | \r | |
1995 | #endif\r | |
1996 | \r | |
43c535be | 1997 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
1998 | \r | |
1999 | static const PROGMEM IRMP_PARAMETER acp24_param =\r | |
2000 | {\r | |
2001 | IRMP_ACP24_PROTOCOL, // protocol: ir protocol\r | |
2002 | ACP24_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
2003 | ACP24_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2004 | ACP24_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2005 | ACP24_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2006 | ACP24_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2007 | ACP24_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2008 | ACP24_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2009 | ACP24_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2010 | ACP24_ADDRESS_OFFSET, // address_offset: address offset\r | |
2011 | ACP24_ADDRESS_OFFSET + ACP24_ADDRESS_LEN, // address_end: end of address\r | |
2012 | ACP24_COMMAND_OFFSET, // command_offset: command offset\r | |
2013 | ACP24_COMMAND_OFFSET + ACP24_COMMAND_LEN, // command_end: end of command\r | |
2014 | ACP24_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2015 | ACP24_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2016 | ACP24_LSB, // lsb_first: flag: LSB first\r | |
2017 | ACP24_FLAGS // flags: some flags\r | |
2018 | };\r | |
2019 | \r | |
2020 | #endif\r | |
2021 | \r | |
faf6479d | 2022 | #if IRMP_SUPPORT_RADIO1_PROTOCOL == 1\r |
2023 | \r | |
2024 | static const PROGMEM IRMP_PARAMETER radio1_param =\r | |
2025 | {\r | |
2026 | IRMP_RADIO1_PROTOCOL, // protocol: ir protocol\r | |
0834784c | 2027 | \r |
faf6479d | 2028 | RADIO1_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r |
2029 | RADIO1_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
2030 | RADIO1_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
2031 | RADIO1_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
2032 | RADIO1_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
2033 | RADIO1_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
2034 | RADIO1_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
2035 | RADIO1_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
2036 | RADIO1_ADDRESS_OFFSET, // address_offset: address offset\r | |
2037 | RADIO1_ADDRESS_OFFSET + RADIO1_ADDRESS_LEN, // address_end: end of address\r | |
2038 | RADIO1_COMMAND_OFFSET, // command_offset: command offset\r | |
2039 | RADIO1_COMMAND_OFFSET + RADIO1_COMMAND_LEN, // command_end: end of command\r | |
2040 | RADIO1_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
2041 | RADIO1_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
2042 | RADIO1_LSB, // lsb_first: flag: LSB first\r | |
2043 | RADIO1_FLAGS // flags: some flags\r | |
cb93f9e9 | 2044 | };\r |
2045 | \r | |
2046 | #endif\r | |
2047 | \r | |
c2b70f0b | 2048 | static uint_fast8_t irmp_bit; // current bit position\r |
2049 | static IRMP_PARAMETER irmp_param;\r | |
4225a882 | 2050 | \r |
6f750020 | 2051 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
c2b70f0b | 2052 | static IRMP_PARAMETER irmp_param2;\r |
6f750020 | 2053 | #endif\r |
2054 | \r | |
ea29682a | 2055 | static volatile uint_fast8_t irmp_ir_detected = FALSE;\r |
2056 | static volatile uint_fast8_t irmp_protocol;\r | |
2057 | static volatile uint_fast16_t irmp_address;\r | |
2058 | static volatile uint_fast16_t irmp_command;\r | |
2059 | static volatile uint_fast16_t irmp_id; // only used for SAMSUNG protocol\r | |
2060 | static volatile uint_fast8_t irmp_flags;\r | |
2061 | // static volatile uint_fast8_t irmp_busy_flag;\r | |
2062 | \r | |
2063 | #if defined(__MBED__)\r | |
2064 | // DigitalIn inputPin(IRMP_PIN, PullUp); // this requires mbed.h and source to be compiled as cpp\r | |
2065 | gpio_t gpioIRin; // use low level c function instead\r | |
2066 | #endif\r | |
2067 | \r | |
4225a882 | 2068 | \r |
48664931 | 2069 | #ifdef ANALYZE\r |
ea29682a | 2070 | #define input(x) (x)\r |
2071 | static uint_fast8_t IRMP_PIN;\r | |
2072 | static uint_fast8_t radio;\r | |
4225a882 | 2073 | #endif\r |
2074 | \r | |
2075 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2076 | * Initialize IRMP decoder\r | |
2077 | * @details Configures IRMP input pin\r | |
2078 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2079 | */\r | |
48664931 | 2080 | #ifndef ANALYZE\r |
4225a882 | 2081 | void\r |
2082 | irmp_init (void)\r | |
2083 | {\r | |
08f2dd9d | 2084 | #if defined(PIC_CCS) || defined(PIC_C18) // PIC: do nothing\r |
2085 | #elif defined (ARM_STM32) // STM32\r | |
95b27043 | 2086 | GPIO_InitTypeDef GPIO_InitStructure;\r |
2087 | \r | |
2088 | /* GPIOx clock enable */\r | |
2089 | # if defined (ARM_STM32L1XX)\r | |
2090 | RCC_AHBPeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2091 | # elif defined (ARM_STM32F10X)\r | |
2092 | RCC_APB2PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2093 | # elif defined (ARM_STM32F4XX)\r | |
2094 | RCC_AHB1PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
2095 | # endif\r | |
2096 | \r | |
2097 | /* GPIO Configuration */\r | |
2098 | GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r | |
2099 | # if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r | |
2100 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;\r | |
2101 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r | |
2102 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r | |
2103 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r | |
2104 | # elif defined (ARM_STM32F10X)\r | |
2105 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r | |
2106 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r | |
2107 | # endif\r | |
2108 | GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r | |
2109 | \r | |
afd1e690 | 2110 | #elif defined(STELLARIS_ARM_CORTEX_M4)\r |
95b27043 | 2111 | // Enable the GPIO port\r |
2112 | ROM_SysCtlPeripheralEnable(IRMP_PORT_PERIPH);\r | |
2113 | \r | |
2114 | // Set as an input\r | |
2115 | ROM_GPIODirModeSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_DIR_MODE_IN);\r | |
2116 | ROM_GPIOPadConfigSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);\r | |
2117 | \r | |
aa276d72 | 2118 | #elif defined(__SDCC_stm8) // STM8\r |
aa276d72 | 2119 | IRMP_GPIO_STRUCT->DDR &= ~(1<<IRMP_BIT); // pin is input\r |
95b27043 | 2120 | IRMP_GPIO_STRUCT->CR1 |= (1<<IRMP_BIT); // activate pullup\r |
2121 | \r | |
df24bb50 | 2122 | #elif defined (TEENSY_ARM_CORTEX_M4) // TEENSY\r |
95b27043 | 2123 | pinMode(IRMP_PIN, INPUT);\r |
2124 | \r | |
ea29682a | 2125 | #elif defined(__xtensa__) // ESP8266\r |
2126 | // select pin function\r | |
2127 | # if (IRMP_BIT_NUMBER == 12)\r | |
2128 | PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, FUNC_GPIO12);\r | |
2129 | // doesn't work for me:\r | |
2130 | // # elif (IRMP_BIT_NUMBER == 13)\r | |
2131 | // PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U , FUNC_GPIO13);\r | |
2132 | # else\r | |
2133 | # warning Please add PIN_FUNC_SELECT when necessary.\r | |
2134 | # endif\r | |
2135 | GPIO_DIS_OUTPUT(IRMP_BIT_NUMBER);\r | |
2136 | \r | |
2137 | #elif defined(__MBED__)\r | |
2138 | gpio_init_in_ex(&gpioIRin, IRMP_PIN, IRMP_PINMODE); // initialize input for IR diode\r | |
2139 | \r | |
08f2dd9d | 2140 | #else // AVR\r |
d155e9ab | 2141 | IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup\r |
2142 | IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input\r | |
93ba2e01 | 2143 | #endif\r |
4225a882 | 2144 | \r |
2145 | #if IRMP_LOGGING == 1\r | |
2146 | irmp_uart_init ();\r | |
2147 | #endif\r | |
2148 | }\r | |
2149 | #endif\r | |
2150 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2151 | * Get IRMP data\r | |
2152 | * @details gets decoded IRMP data\r | |
2153 | * @param pointer in order to store IRMP data\r | |
2154 | * @return TRUE: successful, FALSE: failed\r | |
2155 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2156 | */\r | |
716f8772 | 2157 | uint_fast8_t\r |
4225a882 | 2158 | irmp_get_data (IRMP_DATA * irmp_data_p)\r |
2159 | {\r | |
0834784c | 2160 | uint_fast8_t rtc = FALSE;\r |
4225a882 | 2161 | \r |
2162 | if (irmp_ir_detected)\r | |
2163 | {\r | |
df24bb50 | 2164 | switch (irmp_protocol)\r |
2165 | {\r | |
4225a882 | 2166 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 2167 | case IRMP_SAMSUNG_PROTOCOL:\r |
2168 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2169 | {\r | |
2170 | irmp_command &= 0xff;\r | |
2171 | irmp_command |= irmp_id << 8;\r | |
2172 | rtc = TRUE;\r | |
2173 | }\r | |
2174 | break;\r | |
956ea3ea | 2175 | \r |
2176 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r | |
df24bb50 | 2177 | case IRMP_SAMSUNG48_PROTOCOL:\r |
2178 | irmp_command = (irmp_command & 0x00FF) | ((irmp_id & 0x00FF) << 8);\r | |
2179 | rtc = TRUE;\r | |
2180 | break;\r | |
956ea3ea | 2181 | #endif\r |
4225a882 | 2182 | #endif\r |
956ea3ea | 2183 | \r |
4225a882 | 2184 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 2185 | case IRMP_NEC_PROTOCOL:\r |
2186 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2187 | {\r | |
2188 | irmp_command &= 0xff;\r | |
2189 | rtc = TRUE;\r | |
2190 | }\r | |
2191 | else if (irmp_address == 0x87EE)\r | |
2192 | {\r | |
2193 | #ifdef ANALYZE\r | |
2194 | ANALYZE_PRINTF ("Switching to APPLE protocol\n");\r | |
2195 | #endif // ANALYZE\r | |
2196 | irmp_protocol = IRMP_APPLE_PROTOCOL;\r | |
2197 | irmp_address = (irmp_command & 0xFF00) >> 8;\r | |
2198 | irmp_command &= 0x00FF;\r | |
2199 | rtc = TRUE;\r | |
2200 | }\r | |
2201 | break;\r | |
48664931 | 2202 | #endif\r |
3a7e26e1 | 2203 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
df24bb50 | 2204 | case IRMP_BOSE_PROTOCOL:\r |
2205 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
2206 | {\r | |
2207 | irmp_command &= 0xff;\r | |
2208 | rtc = TRUE;\r | |
2209 | }\r | |
2210 | break;\r | |
3a7e26e1 | 2211 | #endif\r |
12948cf3 | 2212 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 2213 | case IRMP_SIEMENS_PROTOCOL:\r |
2214 | case IRMP_RUWIDO_PROTOCOL:\r | |
2215 | if (((irmp_command >> 1) & 0x0001) == (~irmp_command & 0x0001))\r | |
2216 | {\r | |
2217 | irmp_command >>= 1;\r | |
2218 | rtc = TRUE;\r | |
2219 | }\r | |
2220 | break;\r | |
9405f84a | 2221 | #endif\r |
111d6191 | 2222 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
df24bb50 | 2223 | case IRMP_KATHREIN_PROTOCOL:\r |
2224 | if (irmp_command != 0x0000)\r | |
2225 | {\r | |
2226 | rtc = TRUE;\r | |
2227 | }\r | |
2228 | break;\r | |
111d6191 | 2229 | #endif\r |
03780b34 | 2230 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
df24bb50 | 2231 | case IRMP_RC5_PROTOCOL:\r |
2232 | irmp_address &= ~0x20; // clear toggle bit\r | |
2233 | rtc = TRUE;\r | |
2234 | break;\r | |
03780b34 | 2235 | #endif\r |
c2b70f0b | 2236 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 2237 | case IRMP_S100_PROTOCOL:\r |
2238 | irmp_address &= ~0x20; // clear toggle bit\r | |
2239 | rtc = TRUE;\r | |
2240 | break;\r | |
c2b70f0b | 2241 | #endif\r |
89e8cafb | 2242 | #if IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
df24bb50 | 2243 | case IRMP_IR60_PROTOCOL:\r |
2244 | if (irmp_command != 0x007d) // 0x007d (== 62<<1 + 1) is start instruction frame\r | |
2245 | {\r | |
2246 | rtc = TRUE;\r | |
2247 | }\r | |
2248 | else\r | |
2249 | {\r | |
2250 | #ifdef ANALYZE\r | |
2251 | ANALYZE_PRINTF("Info IR60: got start instruction frame\n");\r | |
2252 | #endif // ANALYZE\r | |
2253 | }\r | |
2254 | break;\r | |
89e8cafb | 2255 | #endif\r |
48664931 | 2256 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 2257 | case IRMP_RCCAR_PROTOCOL:\r |
2258 | // frame in irmp_data:\r | |
2259 | // Bit 12 11 10 9 8 7 6 5 4 3 2 1 0\r | |
2260 | // V D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 C1 C0 // 10 9 8 7 6 5 4 3 2 1 0\r | |
2261 | irmp_address = (irmp_command & 0x000C) >> 2; // addr: 0 0 0 0 0 0 0 0 0 A1 A0\r | |
2262 | irmp_command = ((irmp_command & 0x1000) >> 2) | // V-Bit: V 0 0 0 0 0 0 0 0 0 0\r | |
2263 | ((irmp_command & 0x0003) << 8) | // C-Bits: 0 C1 C0 0 0 0 0 0 0 0 0\r | |
2264 | ((irmp_command & 0x0FF0) >> 4); // D-Bits: D7 D6 D5 D4 D3 D2 D1 D0\r | |
2265 | rtc = TRUE; // Summe: V C1 C0 D7 D6 D5 D4 D3 D2 D1 D0\r | |
2266 | break;\r | |
4225a882 | 2267 | #endif\r |
beda975f | 2268 | \r |
2269 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1 // squeeze code to 8 bit, upper bit indicates release-key\r | |
df24bb50 | 2270 | case IRMP_NETBOX_PROTOCOL:\r |
2271 | if (irmp_command & 0x1000) // last bit set?\r | |
2272 | {\r | |
2273 | if ((irmp_command & 0x1f) == 0x15) // key pressed: 101 01 (LSB)\r | |
2274 | {\r | |
2275 | irmp_command >>= 5;\r | |
2276 | irmp_command &= 0x7F;\r | |
2277 | rtc = TRUE;\r | |
2278 | }\r | |
2279 | else if ((irmp_command & 0x1f) == 0x10) // key released: 000 01 (LSB)\r | |
2280 | {\r | |
2281 | irmp_command >>= 5;\r | |
2282 | irmp_command |= 0x80;\r | |
2283 | rtc = TRUE;\r | |
2284 | }\r | |
2285 | else\r | |
2286 | {\r | |
2287 | #ifdef ANALYZE\r | |
2288 | ANALYZE_PRINTF("error NETBOX: bit6/7 must be 0/1\n");\r | |
2289 | #endif // ANALYZE\r | |
2290 | }\r | |
2291 | }\r | |
2292 | else\r | |
2293 | {\r | |
2294 | #ifdef ANALYZE\r | |
2295 | ANALYZE_PRINTF("error NETBOX: last bit not set\n");\r | |
2296 | #endif // ANALYZE\r | |
2297 | }\r | |
2298 | break;\r | |
deba2a0a | 2299 | #endif\r |
f50e01e7 | 2300 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
df24bb50 | 2301 | case IRMP_LEGO_PROTOCOL:\r |
2302 | {\r | |
2303 | uint_fast8_t crc = 0x0F ^ ((irmp_command & 0xF000) >> 12) ^ ((irmp_command & 0x0F00) >> 8) ^ ((irmp_command & 0x00F0) >> 4);\r | |
2304 | \r | |
2305 | if ((irmp_command & 0x000F) == crc)\r | |
2306 | {\r | |
2307 | irmp_command >>= 4;\r | |
2308 | rtc = TRUE;\r | |
2309 | }\r | |
2310 | else\r | |
2311 | {\r | |
2312 | #ifdef ANALYZE\r | |
2313 | ANALYZE_PRINTF ("CRC error in LEGO protocol\n");\r | |
2314 | #endif // ANALYZE\r | |
2315 | // rtc = TRUE; // don't accept codes with CRC errors\r | |
2316 | }\r | |
2317 | break;\r | |
2318 | }\r | |
f50e01e7 | 2319 | #endif\r |
cb93f9e9 | 2320 | \r |
df24bb50 | 2321 | default:\r |
2322 | {\r | |
2323 | rtc = TRUE;\r | |
2324 | break;\r | |
2325 | }\r | |
2326 | }\r | |
2327 | \r | |
2328 | if (rtc)\r | |
2329 | {\r | |
2330 | irmp_data_p->protocol = irmp_protocol;\r | |
2331 | irmp_data_p->address = irmp_address;\r | |
2332 | irmp_data_p->command = irmp_command;\r | |
2333 | irmp_data_p->flags = irmp_flags;\r | |
2334 | irmp_command = 0;\r | |
2335 | irmp_address = 0;\r | |
2336 | irmp_flags = 0;\r | |
2337 | }\r | |
2338 | \r | |
2339 | irmp_ir_detected = FALSE;\r | |
4225a882 | 2340 | }\r |
2341 | \r | |
2342 | return rtc;\r | |
2343 | }\r | |
2344 | \r | |
7644ac04 | 2345 | #if IRMP_USE_CALLBACK == 1\r |
2346 | void\r | |
0834784c | 2347 | irmp_set_callback_ptr (void (*cb)(uint_fast8_t))\r |
7644ac04 | 2348 | {\r |
2349 | irmp_callback_ptr = cb;\r | |
2350 | }\r | |
2351 | #endif // IRMP_USE_CALLBACK == 1\r | |
2352 | \r | |
4225a882 | 2353 | // these statics must not be volatile, because they are only used by irmp_store_bit(), which is called by irmp_ISR()\r |
0834784c | 2354 | static uint_fast16_t irmp_tmp_address; // ir address\r |
2355 | static uint_fast16_t irmp_tmp_command; // ir command\r | |
6f750020 | 2356 | \r |
956ea3ea | 2357 | #if (IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
0834784c | 2358 | static uint_fast16_t irmp_tmp_address2; // ir address\r |
2359 | static uint_fast16_t irmp_tmp_command2; // ir command\r | |
6f750020 | 2360 | #endif\r |
2361 | \r | |
69da6090 | 2362 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
0834784c | 2363 | static uint_fast16_t irmp_lgair_address; // ir address\r |
2364 | static uint_fast16_t irmp_lgair_command; // ir command\r | |
69da6090 | 2365 | #endif\r |
2366 | \r | |
4225a882 | 2367 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
0834784c | 2368 | static uint_fast16_t irmp_tmp_id; // ir id (only SAMSUNG)\r |
770a1a9d | 2369 | #endif\r |
2370 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
0834784c | 2371 | static uint8_t xor_check[6]; // check kaseikyo "parity" bits\r |
2372 | static uint_fast8_t genre2; // save genre2 bits here, later copied to MSB in flags\r | |
4225a882 | 2373 | #endif\r |
2374 | \r | |
40ca4604 | 2375 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
0834784c | 2376 | static uint_fast8_t parity; // number of '1' of the first 14 bits, check if even.\r |
40ca4604 | 2377 | #endif\r |
2378 | \r | |
7365350c | 2379 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
2380 | static uint_fast8_t check; // number of '1' of the first 14 bits, check if even.\r | |
2381 | static uint_fast8_t mitsu_parity; // number of '1' of the first 14 bits, check if even.\r | |
2382 | #endif\r | |
2383 | \r | |
4225a882 | 2384 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2385 | * store bit\r | |
2386 | * @details store bit in temp address or temp command\r | |
2387 | * @param value to store: 0 or 1\r | |
2388 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2389 | */\r | |
d823e852 | 2390 | // verhindert, dass irmp_store_bit() inline compiliert wird:\r |
0834784c | 2391 | // static void irmp_store_bit (uint_fast8_t) __attribute__ ((noinline));\r |
d823e852 | 2392 | \r |
4225a882 | 2393 | static void\r |
0834784c | 2394 | irmp_store_bit (uint_fast8_t value)\r |
4225a882 | 2395 | {\r |
43c535be | 2396 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
2397 | if (irmp_param.protocol == IRMP_ACP24_PROTOCOL) // squeeze 64 bits into 16 bits:\r | |
2398 | {\r | |
df24bb50 | 2399 | if (value)\r |
2400 | {\r | |
2401 | // ACP24-Frame:\r | |
2402 | // 1 2 3 4 5 6\r | |
2403 | // 0123456789012345678901234567890123456789012345678901234567890123456789\r | |
2404 | // N VVMMM ? ??? t vmA x y TTTT\r | |
2405 | //\r | |
2406 | // irmp_data_p->command:\r | |
2407 | //\r | |
2408 | // 5432109876543210\r | |
2409 | // NAVVvMMMmtxyTTTT\r | |
2410 | \r | |
2411 | switch (irmp_bit)\r | |
2412 | {\r | |
2413 | case 0: irmp_tmp_command |= (1<<15); break; // N\r | |
2414 | case 2: irmp_tmp_command |= (1<<13); break; // V\r | |
2415 | case 3: irmp_tmp_command |= (1<<12); break; // V\r | |
2416 | case 4: irmp_tmp_command |= (1<<10); break; // M\r | |
2417 | case 5: irmp_tmp_command |= (1<< 9); break; // M\r | |
2418 | case 6: irmp_tmp_command |= (1<< 8); break; // M\r | |
2419 | case 20: irmp_tmp_command |= (1<< 6); break; // t\r | |
2420 | case 22: irmp_tmp_command |= (1<<11); break; // v\r | |
2421 | case 23: irmp_tmp_command |= (1<< 7); break; // m\r | |
2422 | case 24: irmp_tmp_command |= (1<<14); break; // A\r | |
2423 | case 26: irmp_tmp_command |= (1<< 5); break; // x\r | |
2424 | case 44: irmp_tmp_command |= (1<< 4); break; // y\r | |
2425 | case 66: irmp_tmp_command |= (1<< 3); break; // T\r | |
2426 | case 67: irmp_tmp_command |= (1<< 2); break; // T\r | |
2427 | case 68: irmp_tmp_command |= (1<< 1); break; // T\r | |
2428 | case 69: irmp_tmp_command |= (1<< 0); break; // T\r | |
2429 | }\r | |
2430 | }\r | |
43c535be | 2431 | }\r |
2432 | else\r | |
2433 | #endif // IRMP_SUPPORT_ACP24_PROTOCOL\r | |
2434 | \r | |
40ca4604 | 2435 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
2436 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r | |
2437 | {\r | |
df24bb50 | 2438 | if (irmp_bit < 14)\r |
2439 | {\r | |
2440 | if (value)\r | |
2441 | {\r | |
2442 | parity++;\r | |
2443 | }\r | |
2444 | }\r | |
2445 | else if (irmp_bit == 14)\r | |
2446 | {\r | |
2447 | if (value) // value == 1: even parity\r | |
2448 | {\r | |
2449 | if (parity & 0x01)\r | |
2450 | {\r | |
2451 | parity = PARITY_CHECK_FAILED;\r | |
2452 | }\r | |
2453 | else\r | |
2454 | {\r | |
2455 | parity = PARITY_CHECK_OK;\r | |
2456 | }\r | |
2457 | }\r | |
2458 | else\r | |
2459 | {\r | |
2460 | if (parity & 0x01) // value == 0: odd parity\r | |
2461 | {\r | |
2462 | parity = PARITY_CHECK_OK;\r | |
2463 | }\r | |
2464 | else\r | |
2465 | {\r | |
2466 | parity = PARITY_CHECK_FAILED;\r | |
2467 | }\r | |
2468 | }\r | |
2469 | }\r | |
40ca4604 | 2470 | }\r |
43c535be | 2471 | else\r |
40ca4604 | 2472 | #endif\r |
43c535be | 2473 | {\r |
df24bb50 | 2474 | ;\r |
43c535be | 2475 | }\r |
40ca4604 | 2476 | \r |
89e8cafb | 2477 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
2478 | if (irmp_bit == 0 && irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL)\r | |
2479 | {\r | |
df24bb50 | 2480 | first_bit = value;\r |
89e8cafb | 2481 | }\r |
2482 | else\r | |
2483 | #endif\r | |
770a1a9d | 2484 | \r |
4225a882 | 2485 | if (irmp_bit >= irmp_param.address_offset && irmp_bit < irmp_param.address_end)\r |
2486 | {\r | |
df24bb50 | 2487 | if (irmp_param.lsb_first)\r |
2488 | {\r | |
2489 | irmp_tmp_address |= (((uint_fast16_t) (value)) << (irmp_bit - irmp_param.address_offset)); // CV wants cast\r | |
2490 | }\r | |
2491 | else\r | |
2492 | {\r | |
2493 | irmp_tmp_address <<= 1;\r | |
2494 | irmp_tmp_address |= value;\r | |
2495 | }\r | |
4225a882 | 2496 | }\r |
2497 | else if (irmp_bit >= irmp_param.command_offset && irmp_bit < irmp_param.command_end)\r | |
2498 | {\r | |
df24bb50 | 2499 | if (irmp_param.lsb_first)\r |
2500 | {\r | |
956ea3ea | 2501 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r |
df24bb50 | 2502 | if (irmp_param.protocol == IRMP_SAMSUNG48_PROTOCOL && irmp_bit >= 32)\r |
2503 | {\r | |
2504 | irmp_tmp_id |= (((uint_fast16_t) (value)) << (irmp_bit - 32)); // CV wants cast\r | |
2505 | }\r | |
2506 | else\r | |
956ea3ea | 2507 | #endif\r |
df24bb50 | 2508 | {\r |
2509 | irmp_tmp_command |= (((uint_fast16_t) (value)) << (irmp_bit - irmp_param.command_offset)); // CV wants cast\r | |
2510 | }\r | |
2511 | }\r | |
2512 | else\r | |
2513 | {\r | |
2514 | irmp_tmp_command <<= 1;\r | |
2515 | irmp_tmp_command |= value;\r | |
2516 | }\r | |
4225a882 | 2517 | }\r |
770a1a9d | 2518 | \r |
69da6090 | 2519 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
2520 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL || irmp_param.protocol == IRMP_NEC42_PROTOCOL)\r | |
2521 | {\r | |
df24bb50 | 2522 | if (irmp_bit < 8)\r |
2523 | {\r | |
2524 | irmp_lgair_address <<= 1; // LGAIR uses MSB\r | |
2525 | irmp_lgair_address |= value;\r | |
2526 | }\r | |
2527 | else if (irmp_bit < 24)\r | |
2528 | {\r | |
2529 | irmp_lgair_command <<= 1; // LGAIR uses MSB\r | |
2530 | irmp_lgair_command |= value;\r | |
2531 | }\r | |
69da6090 | 2532 | }\r |
2533 | // NO else!\r | |
2534 | #endif\r | |
2535 | \r | |
35213800 | 2536 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
f60c4644 | 2537 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit >= 13 && irmp_bit < 26)\r |
35213800 | 2538 | {\r |
df24bb50 | 2539 | irmp_tmp_address2 |= (((uint_fast16_t) (value)) << (irmp_bit - 13)); // CV wants cast\r |
35213800 | 2540 | }\r |
f60c4644 | 2541 | else\r |
35213800 | 2542 | #endif\r |
2543 | \r | |
4225a882 | 2544 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
f60c4644 | 2545 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit >= SAMSUNG_ID_OFFSET && irmp_bit < SAMSUNG_ID_OFFSET + SAMSUNG_ID_LEN)\r |
4225a882 | 2546 | {\r |
df24bb50 | 2547 | irmp_tmp_id |= (((uint_fast16_t) (value)) << (irmp_bit - SAMSUNG_ID_OFFSET)); // store with LSB first\r |
4225a882 | 2548 | }\r |
f60c4644 | 2549 | else\r |
4225a882 | 2550 | #endif\r |
770a1a9d | 2551 | \r |
2552 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
f60c4644 | 2553 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r |
770a1a9d | 2554 | {\r |
df24bb50 | 2555 | if (irmp_bit >= 20 && irmp_bit < 24)\r |
2556 | {\r | |
7365350c | 2557 | irmp_tmp_command |= (((uint_fast16_t) (value)) << (irmp_bit - 8)); // store 4 system bits (genre 1) in upper nibble with LSB first\r |
df24bb50 | 2558 | }\r |
2559 | else if (irmp_bit >= 24 && irmp_bit < 28)\r | |
2560 | {\r | |
7365350c | 2561 | genre2 |= (((uint_fast8_t) (value)) << (irmp_bit - 20)); // store 4 system bits (genre 2) in upper nibble with LSB first\r |
df24bb50 | 2562 | }\r |
2563 | \r | |
2564 | if (irmp_bit < KASEIKYO_COMPLETE_DATA_LEN)\r | |
2565 | {\r | |
2566 | if (value)\r | |
2567 | {\r | |
2568 | xor_check[irmp_bit / 8] |= 1 << (irmp_bit % 8);\r | |
2569 | }\r | |
2570 | else\r | |
2571 | {\r | |
2572 | xor_check[irmp_bit / 8] &= ~(1 << (irmp_bit % 8));\r | |
2573 | }\r | |
2574 | }\r | |
0f700c8e | 2575 | }\r |
26b6c304 | 2576 | else\r |
770a1a9d | 2577 | #endif\r |
7365350c | 2578 | \r |
2579 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r | |
2580 | if (irmp_param.protocol == IRMP_MITSU_HEAVY_PROTOCOL) // squeeze 64 bits into 16 bits:\r | |
2581 | {\r | |
2582 | if (irmp_bit == 72 )\r | |
2583 | { // irmp_tmp_address, irmp_tmp_command received: check parity & compress\r | |
2584 | mitsu_parity = PARITY_CHECK_OK;\r | |
2585 | \r | |
2586 | check = irmp_tmp_address >> 8; // inverted upper byte == lower byte?\r | |
2587 | check = ~ check;\r | |
2588 | \r | |
2589 | if (check == (irmp_tmp_address & 0xFF))\r | |
2590 | { // ok:\r | |
2591 | irmp_tmp_address <<= 8; // throw away upper byte\r | |
2592 | }\r | |
2593 | else\r | |
2594 | {\r | |
2595 | mitsu_parity = PARITY_CHECK_FAILED;\r | |
2596 | }\r | |
2597 | \r | |
2598 | check = irmp_tmp_command >> 8; // inverted upper byte == lower byte?\r | |
2599 | check = ~ check;\r | |
2600 | if (check == (irmp_tmp_command & 0xFF))\r | |
2601 | { // ok: pack together\r | |
2602 | irmp_tmp_address |= irmp_tmp_command & 0xFF; // byte 1, byte2 in irmp_tmp_address, irmp_tmp_command can be used for byte 3\r | |
2603 | }\r | |
2604 | else\r | |
2605 | {\r | |
2606 | mitsu_parity = PARITY_CHECK_FAILED;\r | |
2607 | }\r | |
2608 | irmp_tmp_command = 0;\r | |
2609 | }\r | |
2610 | \r | |
2611 | if (irmp_bit >= 72 )\r | |
2612 | { // receive 3. word in irmp_tmp_command\r | |
2613 | irmp_tmp_command <<= 1;\r | |
2614 | irmp_tmp_command |= value;\r | |
2615 | }\r | |
2616 | }\r | |
2617 | else\r | |
2618 | #endif // IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL\r | |
26b6c304 | 2619 | {\r |
df24bb50 | 2620 | ;\r |
26b6c304 | 2621 | }\r |
770a1a9d | 2622 | \r |
4225a882 | 2623 | irmp_bit++;\r |
2624 | }\r | |
2625 | \r | |
6f750020 | 2626 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2627 | * store bit\r | |
2628 | * @details store bit in temp address or temp command\r | |
2629 | * @param value to store: 0 or 1\r | |
2630 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2631 | */\r | |
2632 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2633 | static void\r | |
0834784c | 2634 | irmp_store_bit2 (uint_fast8_t value)\r |
6f750020 | 2635 | {\r |
0834784c | 2636 | uint_fast8_t irmp_bit2;\r |
6f750020 | 2637 | \r |
2638 | if (irmp_param.protocol)\r | |
2639 | {\r | |
df24bb50 | 2640 | irmp_bit2 = irmp_bit - 2;\r |
6f750020 | 2641 | }\r |
2642 | else\r | |
2643 | {\r | |
df24bb50 | 2644 | irmp_bit2 = irmp_bit - 1;\r |
6f750020 | 2645 | }\r |
2646 | \r | |
2647 | if (irmp_bit2 >= irmp_param2.address_offset && irmp_bit2 < irmp_param2.address_end)\r | |
2648 | {\r | |
df24bb50 | 2649 | irmp_tmp_address2 |= (((uint_fast16_t) (value)) << (irmp_bit2 - irmp_param2.address_offset)); // CV wants cast\r |
6f750020 | 2650 | }\r |
2651 | else if (irmp_bit2 >= irmp_param2.command_offset && irmp_bit2 < irmp_param2.command_end)\r | |
2652 | {\r | |
df24bb50 | 2653 | irmp_tmp_command2 |= (((uint_fast16_t) (value)) << (irmp_bit2 - irmp_param2.command_offset)); // CV wants cast\r |
6f750020 | 2654 | }\r |
2655 | }\r | |
2656 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
2657 | \r | |
4225a882 | 2658 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2659 | * ISR routine\r | |
2660 | * @details ISR routine, called 10000 times per second\r | |
2661 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2662 | */\r | |
716f8772 | 2663 | uint_fast8_t\r |
4225a882 | 2664 | irmp_ISR (void)\r |
2665 | {\r | |
0834784c | 2666 | static uint_fast8_t irmp_start_bit_detected; // flag: start bit detected\r |
2667 | static uint_fast8_t wait_for_space; // flag: wait for data bit space\r | |
2668 | static uint_fast8_t wait_for_start_space; // flag: wait for start bit space\r | |
2669 | static uint_fast8_t irmp_pulse_time; // count bit time for pulse\r | |
2670 | static PAUSE_LEN irmp_pause_time; // count bit time for pause\r | |
2671 | static uint_fast16_t last_irmp_address = 0xFFFF; // save last irmp address to recognize key repetition\r | |
2672 | static uint_fast16_t last_irmp_command = 0xFFFF; // save last irmp command to recognize key repetition\r | |
2673 | static uint_fast16_t key_repetition_len; // SIRCS repeats frame 2-5 times with 45 ms pause\r | |
2674 | static uint_fast8_t repetition_frame_number;\r | |
4225a882 | 2675 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
0834784c | 2676 | static uint_fast16_t last_irmp_denon_command; // save last irmp command to recognize DENON frame repetition\r |
2677 | static uint_fast16_t denon_repetition_len = 0xFFFF; // denon repetition len of 2nd auto generated frame\r | |
4225a882 | 2678 | #endif\r |
c2b70f0b | 2679 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_S100_PROTOCOL == 1\r |
0834784c | 2680 | static uint_fast8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit\r |
4225a882 | 2681 | #endif\r |
77f488bb | 2682 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
0834784c | 2683 | static PAUSE_LEN last_pause; // last pause value\r |
504d9df9 | 2684 | #endif\r |
77f488bb | 2685 | #if IRMP_SUPPORT_MANCHESTER == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
0834784c | 2686 | static uint_fast8_t last_value; // last bit value\r |
4225a882 | 2687 | #endif\r |
0834784c | 2688 | uint_fast8_t irmp_input; // input value\r |
4225a882 | 2689 | \r |
48664931 | 2690 | #ifdef ANALYZE\r |
592411d1 | 2691 | time_counter++;\r |
1082ecf2 | 2692 | #endif // ANALYZE\r |
592411d1 | 2693 | \r |
aa276d72 | 2694 | #if defined(__SDCC_stm8)\r |
2695 | irmp_input = input(IRMP_GPIO_STRUCT->IDR)\r | |
ea29682a | 2696 | #elif defined(__MBED__)\r |
2697 | //irmp_input = inputPin;\r | |
2698 | irmp_input = gpio_read (&gpioIRin);\r | |
aa276d72 | 2699 | #else\r |
4225a882 | 2700 | irmp_input = input(IRMP_PIN);\r |
aa276d72 | 2701 | #endif\r |
4225a882 | 2702 | \r |
7644ac04 | 2703 | #if IRMP_USE_CALLBACK == 1\r |
2704 | if (irmp_callback_ptr)\r | |
2705 | {\r | |
df24bb50 | 2706 | static uint_fast8_t last_inverted_input;\r |
7644ac04 | 2707 | \r |
df24bb50 | 2708 | if (last_inverted_input != !irmp_input)\r |
2709 | {\r | |
2710 | (*irmp_callback_ptr) (! irmp_input);\r | |
2711 | last_inverted_input = !irmp_input;\r | |
2712 | }\r | |
7644ac04 | 2713 | }\r |
2714 | #endif // IRMP_USE_CALLBACK == 1\r | |
2715 | \r | |
d155e9ab | 2716 | irmp_log(irmp_input); // log ir signal, if IRMP_LOGGING defined\r |
4225a882 | 2717 | \r |
2718 | if (! irmp_ir_detected) // ir code already detected?\r | |
2719 | { // no...\r | |
df24bb50 | 2720 | if (! irmp_start_bit_detected) // start bit detected?\r |
2721 | { // no...\r | |
2722 | if (! irmp_input) // receiving burst?\r | |
2723 | { // yes...\r | |
1f54e86c | 2724 | // irmp_busy_flag = TRUE;\r |
48664931 | 2725 | #ifdef ANALYZE\r |
df24bb50 | 2726 | if (! irmp_pulse_time)\r |
2727 | {\r | |
2728 | ANALYZE_PRINTF("%8.3fms [starting pulse]\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
2729 | }\r | |
2730 | #endif // ANALYZE\r | |
2731 | irmp_pulse_time++; // increment counter\r | |
2732 | }\r | |
2733 | else\r | |
2734 | { // no...\r | |
2735 | if (irmp_pulse_time) // it's dark....\r | |
2736 | { // set flags for counting the time of darkness...\r | |
2737 | irmp_start_bit_detected = 1;\r | |
2738 | wait_for_start_space = 1;\r | |
2739 | wait_for_space = 0;\r | |
2740 | irmp_tmp_command = 0;\r | |
2741 | irmp_tmp_address = 0;\r | |
0f700c8e | 2742 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
df24bb50 | 2743 | genre2 = 0;\r |
0f700c8e | 2744 | #endif\r |
80b3a55d | 2745 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 2746 | irmp_tmp_id = 0;\r |
80b3a55d | 2747 | #endif\r |
6f750020 | 2748 | \r |
35213800 | 2749 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
df24bb50 | 2750 | irmp_tmp_command2 = 0;\r |
2751 | irmp_tmp_address2 = 0;\r | |
6f750020 | 2752 | #endif\r |
69da6090 | 2753 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
df24bb50 | 2754 | irmp_lgair_command = 0;\r |
2755 | irmp_lgair_address = 0;\r | |
69da6090 | 2756 | #endif\r |
df24bb50 | 2757 | irmp_bit = 0xff;\r |
2758 | irmp_pause_time = 1; // 1st pause: set to 1, not to 0!\r | |
c2b70f0b | 2759 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 2760 | rc5_cmd_bit6 = 0; // fm 2010-03-07: bugfix: reset it after incomplete RC5 frame!\r |
4225a882 | 2761 | #endif\r |
df24bb50 | 2762 | }\r |
2763 | else\r | |
2764 | {\r | |
2765 | if (key_repetition_len < 0xFFFF) // avoid overflow of counter\r | |
2766 | {\r | |
2767 | key_repetition_len++;\r | |
08f2dd9d | 2768 | \r |
2769 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
df24bb50 | 2770 | if (denon_repetition_len < 0xFFFF) // avoid overflow of counter\r |
2771 | {\r | |
2772 | denon_repetition_len++;\r | |
775fabfa | 2773 | \r |
df24bb50 | 2774 | if (denon_repetition_len >= DENON_AUTO_REPETITION_PAUSE_LEN && last_irmp_denon_command != 0)\r |
2775 | {\r | |
645fbc69 | 2776 | #ifdef ANALYZE\r |
df24bb50 | 2777 | ANALYZE_PRINTF ("%8.3fms warning: did not receive inverted command repetition\n",\r |
2778 | (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
66f8fd93 | 2779 | #endif // ANALYZE\r |
df24bb50 | 2780 | last_irmp_denon_command = 0;\r |
2781 | denon_repetition_len = 0xFFFF;\r | |
2782 | }\r | |
2783 | }\r | |
08f2dd9d | 2784 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
df24bb50 | 2785 | }\r |
2786 | }\r | |
2787 | }\r | |
2788 | }\r | |
2789 | else\r | |
2790 | {\r | |
2791 | if (wait_for_start_space) // we have received start bit...\r | |
2792 | { // ...and are counting the time of darkness\r | |
2793 | if (irmp_input) // still dark?\r | |
2794 | { // yes\r | |
2795 | irmp_pause_time++; // increment counter\r | |
4225a882 | 2796 | \r |
9405f84a | 2797 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
df24bb50 | 2798 | if (((irmp_pulse_time < NIKON_START_BIT_PULSE_LEN_MIN || irmp_pulse_time > NIKON_START_BIT_PULSE_LEN_MAX) && irmp_pause_time > IRMP_TIMEOUT_LEN) ||\r |
2799 | irmp_pause_time > IRMP_TIMEOUT_NIKON_LEN)\r | |
9405f84a | 2800 | #else\r |
df24bb50 | 2801 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
9405f84a | 2802 | #endif\r |
df24bb50 | 2803 | { // yes...\r |
c7a47e89 | 2804 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2805 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // don't show eror if JVC protocol, irmp_pulse_time has been set below!\r |
2806 | {\r | |
2807 | ;\r | |
2808 | }\r | |
2809 | else\r | |
c7a47e89 | 2810 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2811 | {\r |
645fbc69 | 2812 | #ifdef ANALYZE\r |
df24bb50 | 2813 | ANALYZE_PRINTF ("%8.3fms error 1: pause after start bit pulse %d too long: %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
2814 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1082ecf2 | 2815 | #endif // ANALYZE\r |
df24bb50 | 2816 | }\r |
1082ecf2 | 2817 | \r |
df24bb50 | 2818 | irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit\r |
2819 | irmp_pulse_time = 0;\r | |
2820 | irmp_pause_time = 0;\r | |
2821 | }\r | |
2822 | }\r | |
2823 | else\r | |
2824 | { // receiving first data pulse!\r | |
2825 | IRMP_PARAMETER * irmp_param_p;\r | |
2826 | irmp_param_p = (IRMP_PARAMETER *) 0;\r | |
46dd89b7 | 2827 | \r |
6f750020 | 2828 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 2829 | irmp_param2.protocol = 0;\r |
6f750020 | 2830 | #endif\r |
2831 | \r | |
645fbc69 | 2832 | #ifdef ANALYZE\r |
df24bb50 | 2833 | ANALYZE_PRINTF ("%8.3fms [start-bit: pulse = %2d, pause = %2d]\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 2834 | #endif // ANALYZE\r |
4225a882 | 2835 | \r |
2836 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
df24bb50 | 2837 | if (irmp_pulse_time >= SIRCS_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIRCS_START_BIT_PULSE_LEN_MAX &&\r |
2838 | irmp_pause_time >= SIRCS_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIRCS_START_BIT_PAUSE_LEN_MAX)\r | |
2839 | { // it's SIRCS\r | |
645fbc69 | 2840 | #ifdef ANALYZE\r |
df24bb50 | 2841 | ANALYZE_PRINTF ("protocol = SIRCS, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2842 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX,\r | |
2843 | SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2844 | #endif // ANALYZE\r |
df24bb50 | 2845 | irmp_param_p = (IRMP_PARAMETER *) &sircs_param;\r |
2846 | }\r | |
2847 | else\r | |
4225a882 | 2848 | #endif // IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r |
2849 | \r | |
770a1a9d | 2850 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2851 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r |
2852 | irmp_pulse_time >= JVC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= JVC_START_BIT_PULSE_LEN_MAX &&\r | |
2853 | irmp_pause_time >= JVC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= JVC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2854 | {\r | |
2855 | #ifdef ANALYZE\r | |
2856 | ANALYZE_PRINTF ("protocol = NEC or JVC (type 1) repeat frame, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2857 | JVC_START_BIT_PULSE_LEN_MIN, JVC_START_BIT_PULSE_LEN_MAX,\r | |
2858 | JVC_REPEAT_START_BIT_PAUSE_LEN_MIN, JVC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
2859 | #endif // ANALYZE\r | |
2860 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
2861 | }\r | |
2862 | else\r | |
770a1a9d | 2863 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2864 | \r | |
4225a882 | 2865 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 2866 | if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r |
2867 | irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r | |
2868 | {\r | |
35213800 | 2869 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
645fbc69 | 2870 | #ifdef ANALYZE\r |
df24bb50 | 2871 | ANALYZE_PRINTF ("protocol = NEC42, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2872 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2873 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2874 | #endif // ANALYZE\r |
df24bb50 | 2875 | irmp_param_p = (IRMP_PARAMETER *) &nec42_param;\r |
35213800 | 2876 | #else\r |
645fbc69 | 2877 | #ifdef ANALYZE\r |
df24bb50 | 2878 | ANALYZE_PRINTF ("protocol = NEC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2879 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2880 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2881 | #endif // ANALYZE\r |
df24bb50 | 2882 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r |
35213800 | 2883 | #endif\r |
df24bb50 | 2884 | }\r |
2885 | else if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2886 | irmp_pause_time >= NEC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2887 | { // it's NEC\r | |
93ba2e01 | 2888 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2889 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // last protocol was JVC, awaiting repeat frame\r |
2890 | { // some jvc remote controls use nec repetition frame for jvc repetition frame\r | |
645fbc69 | 2891 | #ifdef ANALYZE\r |
df24bb50 | 2892 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 2, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2893 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2894 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2895 | #endif // ANALYZE\r |
df24bb50 | 2896 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r |
2897 | }\r | |
2898 | else\r | |
93ba2e01 | 2899 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 2900 | {\r |
645fbc69 | 2901 | #ifdef ANALYZE\r |
df24bb50 | 2902 | ANALYZE_PRINTF ("protocol = NEC (repetition frame), start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2903 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2904 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2905 | #endif // ANALYZE\r |
46dd89b7 | 2906 | \r |
df24bb50 | 2907 | irmp_param_p = (IRMP_PARAMETER *) &nec_rep_param;\r |
2908 | }\r | |
2909 | }\r | |
2910 | else\r | |
93ba2e01 | 2911 | \r |
2912 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
df24bb50 | 2913 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r |
2914 | irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2915 | irmp_pause_time >= NEC_0_PAUSE_LEN_MIN && irmp_pause_time <= NEC_0_PAUSE_LEN_MAX)\r | |
2916 | { // it's JVC repetition type 3\r | |
2917 | #ifdef ANALYZE\r | |
2918 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 3, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2919 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2920 | NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX);\r | |
2921 | #endif // ANALYZE\r | |
2922 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
2923 | }\r | |
2924 | else\r | |
93ba2e01 | 2925 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2926 | \r | |
4225a882 | 2927 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
2928 | \r | |
b85cb27d | 2929 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
df24bb50 | 2930 | if (irmp_pulse_time >= TELEFUNKEN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= TELEFUNKEN_START_BIT_PULSE_LEN_MAX &&\r |
2931 | irmp_pause_time >= TELEFUNKEN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= TELEFUNKEN_START_BIT_PAUSE_LEN_MAX)\r | |
2932 | {\r | |
645fbc69 | 2933 | #ifdef ANALYZE\r |
df24bb50 | 2934 | ANALYZE_PRINTF ("protocol = TELEFUNKEN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2935 | TELEFUNKEN_START_BIT_PULSE_LEN_MIN, TELEFUNKEN_START_BIT_PULSE_LEN_MAX,\r | |
2936 | TELEFUNKEN_START_BIT_PAUSE_LEN_MIN, TELEFUNKEN_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2937 | #endif // ANALYZE\r |
df24bb50 | 2938 | irmp_param_p = (IRMP_PARAMETER *) &telefunken_param;\r |
2939 | }\r | |
2940 | else\r | |
b85cb27d | 2941 | #endif // IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
2942 | \r | |
40ca4604 | 2943 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
df24bb50 | 2944 | if (irmp_pulse_time >= ROOMBA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_START_BIT_PULSE_LEN_MAX &&\r |
2945 | irmp_pause_time >= ROOMBA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ROOMBA_START_BIT_PAUSE_LEN_MAX)\r | |
2946 | {\r | |
645fbc69 | 2947 | #ifdef ANALYZE\r |
df24bb50 | 2948 | ANALYZE_PRINTF ("protocol = ROOMBA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2949 | ROOMBA_START_BIT_PULSE_LEN_MIN, ROOMBA_START_BIT_PULSE_LEN_MAX,\r | |
2950 | ROOMBA_START_BIT_PAUSE_LEN_MIN, ROOMBA_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2951 | #endif // ANALYZE\r |
df24bb50 | 2952 | irmp_param_p = (IRMP_PARAMETER *) &roomba_param;\r |
2953 | }\r | |
2954 | else\r | |
40ca4604 | 2955 | #endif // IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
2956 | \r | |
43c535be | 2957 | #if IRMP_SUPPORT_ACP24_PROTOCOL == 1\r |
df24bb50 | 2958 | if (irmp_pulse_time >= ACP24_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ACP24_START_BIT_PULSE_LEN_MAX &&\r |
2959 | irmp_pause_time >= ACP24_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ACP24_START_BIT_PAUSE_LEN_MAX)\r | |
2960 | {\r | |
43c535be | 2961 | #ifdef ANALYZE\r |
df24bb50 | 2962 | ANALYZE_PRINTF ("protocol = ACP24, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2963 | ACP24_START_BIT_PULSE_LEN_MIN, ACP24_START_BIT_PULSE_LEN_MAX,\r | |
2964 | ACP24_START_BIT_PAUSE_LEN_MIN, ACP24_START_BIT_PAUSE_LEN_MAX);\r | |
43c535be | 2965 | #endif // ANALYZE\r |
df24bb50 | 2966 | irmp_param_p = (IRMP_PARAMETER *) &acp24_param;\r |
2967 | }\r | |
2968 | else\r | |
43c535be | 2969 | #endif // IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
2970 | \r | |
003c1008 | 2971 | #if IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
df24bb50 | 2972 | if (irmp_pulse_time >= PENTAX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= PENTAX_START_BIT_PULSE_LEN_MAX &&\r |
2973 | irmp_pause_time >= PENTAX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= PENTAX_START_BIT_PAUSE_LEN_MAX)\r | |
2974 | {\r | |
003c1008 | 2975 | #ifdef ANALYZE\r |
df24bb50 | 2976 | ANALYZE_PRINTF ("protocol = PENTAX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2977 | PENTAX_START_BIT_PULSE_LEN_MIN, PENTAX_START_BIT_PULSE_LEN_MAX,\r | |
2978 | PENTAX_START_BIT_PAUSE_LEN_MIN, PENTAX_START_BIT_PAUSE_LEN_MAX);\r | |
003c1008 | 2979 | #endif // ANALYZE\r |
df24bb50 | 2980 | irmp_param_p = (IRMP_PARAMETER *) &pentax_param;\r |
2981 | }\r | |
2982 | else\r | |
003c1008 | 2983 | #endif // IRMP_SUPPORT_PENTAX_PROTOCOL == 1\r |
2984 | \r | |
9405f84a | 2985 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
df24bb50 | 2986 | if (irmp_pulse_time >= NIKON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NIKON_START_BIT_PULSE_LEN_MAX &&\r |
2987 | irmp_pause_time >= NIKON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NIKON_START_BIT_PAUSE_LEN_MAX)\r | |
2988 | {\r | |
645fbc69 | 2989 | #ifdef ANALYZE\r |
df24bb50 | 2990 | ANALYZE_PRINTF ("protocol = NIKON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2991 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX,\r | |
2992 | NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 2993 | #endif // ANALYZE\r |
df24bb50 | 2994 | irmp_param_p = (IRMP_PARAMETER *) &nikon_param;\r |
2995 | }\r | |
2996 | else\r | |
9405f84a | 2997 | #endif // IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
2998 | \r | |
4225a882 | 2999 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 3000 | if (irmp_pulse_time >= SAMSUNG_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_START_BIT_PULSE_LEN_MAX &&\r |
3001 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
3002 | { // it's SAMSUNG\r | |
645fbc69 | 3003 | #ifdef ANALYZE\r |
df24bb50 | 3004 | ANALYZE_PRINTF ("protocol = SAMSUNG, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3005 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX,\r | |
3006 | SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3007 | #endif // ANALYZE\r |
df24bb50 | 3008 | irmp_param_p = (IRMP_PARAMETER *) &samsung_param;\r |
3009 | }\r | |
3010 | else\r | |
4225a882 | 3011 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
3012 | \r | |
3013 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
df24bb50 | 3014 | if (irmp_pulse_time >= MATSUSHITA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MATSUSHITA_START_BIT_PULSE_LEN_MAX &&\r |
3015 | irmp_pause_time >= MATSUSHITA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MATSUSHITA_START_BIT_PAUSE_LEN_MAX)\r | |
3016 | { // it's MATSUSHITA\r | |
645fbc69 | 3017 | #ifdef ANALYZE\r |
df24bb50 | 3018 | ANALYZE_PRINTF ("protocol = MATSUSHITA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3019 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX,\r | |
3020 | MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3021 | #endif // ANALYZE\r |
df24bb50 | 3022 | irmp_param_p = (IRMP_PARAMETER *) &matsushita_param;\r |
3023 | }\r | |
3024 | else\r | |
4225a882 | 3025 | #endif // IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
3026 | \r | |
3027 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
df24bb50 | 3028 | if (irmp_pulse_time >= KASEIKYO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KASEIKYO_START_BIT_PULSE_LEN_MAX &&\r |
3029 | irmp_pause_time >= KASEIKYO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KASEIKYO_START_BIT_PAUSE_LEN_MAX)\r | |
3030 | { // it's KASEIKYO\r | |
645fbc69 | 3031 | #ifdef ANALYZE\r |
df24bb50 | 3032 | ANALYZE_PRINTF ("protocol = KASEIKYO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3033 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX,\r | |
3034 | KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3035 | #endif // ANALYZE\r |
df24bb50 | 3036 | irmp_param_p = (IRMP_PARAMETER *) &kaseikyo_param;\r |
3037 | }\r | |
3038 | else\r | |
4225a882 | 3039 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
3040 | \r | |
95b27043 | 3041 | #if IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
df24bb50 | 3042 | if (irmp_pulse_time >= PANASONIC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= PANASONIC_START_BIT_PULSE_LEN_MAX &&\r |
3043 | irmp_pause_time >= PANASONIC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= PANASONIC_START_BIT_PAUSE_LEN_MAX)\r | |
3044 | { // it's PANASONIC\r | |
95b27043 | 3045 | #ifdef ANALYZE\r |
df24bb50 | 3046 | ANALYZE_PRINTF ("protocol = PANASONIC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3047 | PANASONIC_START_BIT_PULSE_LEN_MIN, PANASONIC_START_BIT_PULSE_LEN_MAX,\r | |
3048 | PANASONIC_START_BIT_PAUSE_LEN_MIN, PANASONIC_START_BIT_PAUSE_LEN_MAX);\r | |
95b27043 | 3049 | #endif // ANALYZE\r |
df24bb50 | 3050 | irmp_param_p = (IRMP_PARAMETER *) &panasonic_param;\r |
3051 | }\r | |
3052 | else\r | |
95b27043 | 3053 | #endif // IRMP_SUPPORT_PANASONIC_PROTOCOL == 1\r |
3054 | \r | |
7365350c | 3055 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
3056 | if (irmp_pulse_time >= MITSU_HEAVY_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MITSU_HEAVY_START_BIT_PULSE_LEN_MAX &&\r | |
3057 | irmp_pause_time >= MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX)\r | |
3058 | { // it's MITSU_HEAVY\r | |
3059 | #ifdef ANALYZE\r | |
3060 | ANALYZE_PRINTF ("protocol = MITSU_HEAVY, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3061 | MITSU_HEAVY_START_BIT_PULSE_LEN_MIN, MITSU_HEAVY_START_BIT_PULSE_LEN_MAX,\r | |
3062 | MITSU_HEAVY_START_BIT_PAUSE_LEN_MIN, MITSU_HEAVY_START_BIT_PAUSE_LEN_MAX);\r | |
3063 | #endif // ANALYZE\r | |
3064 | irmp_param_p = (IRMP_PARAMETER *) &mitsu_heavy_param;\r | |
3065 | }\r | |
3066 | else\r | |
3067 | #endif // IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r | |
3068 | \r | |
faf6479d | 3069 | #if IRMP_SUPPORT_RADIO1_PROTOCOL == 1\r |
df24bb50 | 3070 | if (irmp_pulse_time >= RADIO1_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RADIO1_START_BIT_PULSE_LEN_MAX &&\r |
3071 | irmp_pause_time >= RADIO1_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RADIO1_START_BIT_PAUSE_LEN_MAX)\r | |
3072 | {\r | |
645fbc69 | 3073 | #ifdef ANALYZE\r |
df24bb50 | 3074 | ANALYZE_PRINTF ("protocol = RADIO1, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3075 | RADIO1_START_BIT_PULSE_LEN_MIN, RADIO1_START_BIT_PULSE_LEN_MAX,\r | |
3076 | RADIO1_START_BIT_PAUSE_LEN_MIN, RADIO1_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3077 | #endif // ANALYZE\r |
df24bb50 | 3078 | irmp_param_p = (IRMP_PARAMETER *) &radio1_param;\r |
3079 | }\r | |
3080 | else\r | |
faf6479d | 3081 | #endif // IRMP_SUPPORT_RRADIO1_PROTOCOL == 1\r |
3082 | \r | |
4225a882 | 3083 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
df24bb50 | 3084 | if (irmp_pulse_time >= RECS80_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80_START_BIT_PULSE_LEN_MAX &&\r |
3085 | irmp_pause_time >= RECS80_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80_START_BIT_PAUSE_LEN_MAX)\r | |
3086 | { // it's RECS80\r | |
645fbc69 | 3087 | #ifdef ANALYZE\r |
df24bb50 | 3088 | ANALYZE_PRINTF ("protocol = RECS80, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3089 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX,\r | |
3090 | RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3091 | #endif // ANALYZE\r |
df24bb50 | 3092 | irmp_param_p = (IRMP_PARAMETER *) &recs80_param;\r |
3093 | }\r | |
3094 | else\r | |
4225a882 | 3095 | #endif // IRMP_SUPPORT_RECS80_PROTOCOL == 1\r |
3096 | \r | |
c2b70f0b | 3097 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r |
df24bb50 | 3098 | if (((irmp_pulse_time >= S100_START_BIT_LEN_MIN && irmp_pulse_time <= S100_START_BIT_LEN_MAX) ||\r |
3099 | (irmp_pulse_time >= 2 * S100_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * S100_START_BIT_LEN_MAX)) &&\r | |
3100 | ((irmp_pause_time >= S100_START_BIT_LEN_MIN && irmp_pause_time <= S100_START_BIT_LEN_MAX) ||\r | |
3101 | (irmp_pause_time >= 2 * S100_START_BIT_LEN_MIN && irmp_pause_time <= 2 * S100_START_BIT_LEN_MAX)))\r | |
3102 | { // it's S100\r | |
3103 | #ifdef ANALYZE\r | |
3104 | ANALYZE_PRINTF ("protocol = S100, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3105 | S100_START_BIT_LEN_MIN, S100_START_BIT_LEN_MAX,\r | |
3106 | 2 * S100_START_BIT_LEN_MIN, 2 * S100_START_BIT_LEN_MAX,\r | |
3107 | S100_START_BIT_LEN_MIN, S100_START_BIT_LEN_MAX,\r | |
3108 | 2 * S100_START_BIT_LEN_MIN, 2 * S100_START_BIT_LEN_MAX);\r | |
3109 | #endif // ANALYZE\r | |
3110 | \r | |
3111 | irmp_param_p = (IRMP_PARAMETER *) &s100_param;\r | |
3112 | last_pause = irmp_pause_time;\r | |
3113 | \r | |
3114 | if ((irmp_pulse_time > S100_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * S100_START_BIT_LEN_MAX) ||\r | |
3115 | (irmp_pause_time > S100_START_BIT_LEN_MAX && irmp_pause_time <= 2 * S100_START_BIT_LEN_MAX))\r | |
3116 | {\r | |
3117 | last_value = 0;\r | |
3118 | rc5_cmd_bit6 = 1<<6;\r | |
3119 | }\r | |
3120 | else\r | |
3121 | {\r | |
3122 | last_value = 1;\r | |
3123 | }\r | |
3124 | }\r | |
3125 | else\r | |
c2b70f0b | 3126 | #endif // IRMP_SUPPORT_S100_PROTOCOL == 1\r |
3127 | \r | |
4225a882 | 3128 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
df24bb50 | 3129 | if (((irmp_pulse_time >= RC5_START_BIT_LEN_MIN && irmp_pulse_time <= RC5_START_BIT_LEN_MAX) ||\r |
3130 | (irmp_pulse_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX)) &&\r | |
3131 | ((irmp_pause_time >= RC5_START_BIT_LEN_MIN && irmp_pause_time <= RC5_START_BIT_LEN_MAX) ||\r | |
3132 | (irmp_pause_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX)))\r | |
3133 | { // it's RC5\r | |
6f750020 | 3134 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
df24bb50 | 3135 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r |
3136 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
3137 | {\r | |
3138 | #ifdef ANALYZE\r | |
3139 | ANALYZE_PRINTF ("protocol = RC5 or FDC\n");\r | |
3140 | ANALYZE_PRINTF ("FDC start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3141 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
3142 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
3143 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3144 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3145 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
3146 | #endif // ANALYZE\r | |
3147 | memcpy_P (&irmp_param2, &fdc_param, sizeof (IRMP_PARAMETER));\r | |
3148 | }\r | |
3149 | else\r | |
6f750020 | 3150 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
12948cf3 | 3151 | \r |
6f750020 | 3152 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3153 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r |
3154 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
3155 | {\r | |
3156 | #ifdef ANALYZE\r | |
3157 | ANALYZE_PRINTF ("protocol = RC5 or RCCAR\n");\r | |
3158 | ANALYZE_PRINTF ("RCCAR start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3159 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
3160 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
3161 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3162 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3163 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
3164 | #endif // ANALYZE\r | |
3165 | memcpy_P (&irmp_param2, &rccar_param, sizeof (IRMP_PARAMETER));\r | |
3166 | }\r | |
3167 | else\r | |
6f750020 | 3168 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3169 | {\r |
3170 | #ifdef ANALYZE\r | |
3171 | ANALYZE_PRINTF ("protocol = RC5, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3172 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3173 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX,\r | |
3174 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3175 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX);\r | |
3176 | #endif // ANALYZE\r | |
3177 | }\r | |
3178 | \r | |
3179 | irmp_param_p = (IRMP_PARAMETER *) &rc5_param;\r | |
3180 | last_pause = irmp_pause_time;\r | |
3181 | \r | |
3182 | if ((irmp_pulse_time > RC5_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX) ||\r | |
3183 | (irmp_pause_time > RC5_START_BIT_LEN_MAX && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX))\r | |
3184 | {\r | |
3185 | last_value = 0;\r | |
3186 | rc5_cmd_bit6 = 1<<6;\r | |
3187 | }\r | |
3188 | else\r | |
3189 | {\r | |
3190 | last_value = 1;\r | |
3191 | }\r | |
3192 | }\r | |
3193 | else\r | |
4225a882 | 3194 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
3195 | \r | |
3196 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
df24bb50 | 3197 | if ( (irmp_pulse_time >= DENON_PULSE_LEN_MIN && irmp_pulse_time <= DENON_PULSE_LEN_MAX) &&\r |
3198 | ((irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX) ||\r | |
3199 | (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)))\r | |
3200 | { // it's DENON\r | |
3201 | #ifdef ANALYZE\r | |
3202 | ANALYZE_PRINTF ("protocol = DENON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3203 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r | |
3204 | DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX,\r | |
3205 | DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX);\r | |
3206 | #endif // ANALYZE\r | |
3207 | irmp_param_p = (IRMP_PARAMETER *) &denon_param;\r | |
3208 | }\r | |
3209 | else\r | |
4225a882 | 3210 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
3211 | \r | |
beda975f | 3212 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3213 | if ( (irmp_pulse_time >= THOMSON_PULSE_LEN_MIN && irmp_pulse_time <= THOMSON_PULSE_LEN_MAX) &&\r |
3214 | ((irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX) ||\r | |
3215 | (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)))\r | |
3216 | { // it's THOMSON\r | |
3217 | #ifdef ANALYZE\r | |
3218 | ANALYZE_PRINTF ("protocol = THOMSON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3219 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX,\r | |
3220 | THOMSON_1_PAUSE_LEN_MIN, THOMSON_1_PAUSE_LEN_MAX,\r | |
3221 | THOMSON_0_PAUSE_LEN_MIN, THOMSON_0_PAUSE_LEN_MAX);\r | |
3222 | #endif // ANALYZE\r | |
3223 | irmp_param_p = (IRMP_PARAMETER *) &thomson_param;\r | |
3224 | }\r | |
3225 | else\r | |
beda975f | 3226 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
3227 | \r | |
3a7e26e1 | 3228 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
df24bb50 | 3229 | if (irmp_pulse_time >= BOSE_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= BOSE_START_BIT_PULSE_LEN_MAX &&\r |
3230 | irmp_pause_time >= BOSE_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BOSE_START_BIT_PAUSE_LEN_MAX)\r | |
3231 | {\r | |
645fbc69 | 3232 | #ifdef ANALYZE\r |
df24bb50 | 3233 | ANALYZE_PRINTF ("protocol = BOSE, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3234 | BOSE_START_BIT_PULSE_LEN_MIN, BOSE_START_BIT_PULSE_LEN_MAX,\r | |
3235 | BOSE_START_BIT_PAUSE_LEN_MIN, BOSE_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3236 | #endif // ANALYZE\r |
df24bb50 | 3237 | irmp_param_p = (IRMP_PARAMETER *) &bose_param;\r |
3238 | }\r | |
3239 | else\r | |
3a7e26e1 | 3240 | #endif // IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
3241 | \r | |
4225a882 | 3242 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 3243 | if (irmp_pulse_time >= RC6_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RC6_START_BIT_PULSE_LEN_MAX &&\r |
3244 | irmp_pause_time >= RC6_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RC6_START_BIT_PAUSE_LEN_MAX)\r | |
3245 | { // it's RC6\r | |
3246 | #ifdef ANALYZE\r | |
3247 | ANALYZE_PRINTF ("protocol = RC6, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3248 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX,\r | |
3249 | RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX);\r | |
3250 | #endif // ANALYZE\r | |
3251 | irmp_param_p = (IRMP_PARAMETER *) &rc6_param;\r | |
3252 | last_pause = 0;\r | |
3253 | last_value = 1;\r | |
3254 | }\r | |
3255 | else\r | |
4225a882 | 3256 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
3257 | \r | |
3258 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
df24bb50 | 3259 | if (irmp_pulse_time >= RECS80EXT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80EXT_START_BIT_PULSE_LEN_MAX &&\r |
3260 | irmp_pause_time >= RECS80EXT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80EXT_START_BIT_PAUSE_LEN_MAX)\r | |
3261 | { // it's RECS80EXT\r | |
645fbc69 | 3262 | #ifdef ANALYZE\r |
df24bb50 | 3263 | ANALYZE_PRINTF ("protocol = RECS80EXT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3264 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX,\r | |
3265 | RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3266 | #endif // ANALYZE\r |
df24bb50 | 3267 | irmp_param_p = (IRMP_PARAMETER *) &recs80ext_param;\r |
3268 | }\r | |
3269 | else\r | |
4225a882 | 3270 | #endif // IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r |
3271 | \r | |
3272 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
df24bb50 | 3273 | if (irmp_pulse_time >= NUBERT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NUBERT_START_BIT_PULSE_LEN_MAX &&\r |
3274 | irmp_pause_time >= NUBERT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NUBERT_START_BIT_PAUSE_LEN_MAX)\r | |
3275 | { // it's NUBERT\r | |
645fbc69 | 3276 | #ifdef ANALYZE\r |
df24bb50 | 3277 | ANALYZE_PRINTF ("protocol = NUBERT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3278 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX,\r | |
3279 | NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3280 | #endif // ANALYZE\r |
df24bb50 | 3281 | irmp_param_p = (IRMP_PARAMETER *) &nubert_param;\r |
3282 | }\r | |
3283 | else\r | |
4225a882 | 3284 | #endif // IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r |
3285 | \r | |
0715cf5e | 3286 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
df24bb50 | 3287 | if (irmp_pulse_time >= FAN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FAN_START_BIT_PULSE_LEN_MAX &&\r |
3288 | irmp_pause_time >= FAN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FAN_START_BIT_PAUSE_LEN_MAX)\r | |
3289 | { // it's FAN\r | |
0715cf5e | 3290 | #ifdef ANALYZE\r |
df24bb50 | 3291 | ANALYZE_PRINTF ("protocol = FAN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3292 | FAN_START_BIT_PULSE_LEN_MIN, FAN_START_BIT_PULSE_LEN_MAX,\r | |
3293 | FAN_START_BIT_PAUSE_LEN_MIN, FAN_START_BIT_PAUSE_LEN_MAX);\r | |
0715cf5e | 3294 | #endif // ANALYZE\r |
df24bb50 | 3295 | irmp_param_p = (IRMP_PARAMETER *) &fan_param;\r |
3296 | }\r | |
3297 | else\r | |
0715cf5e | 3298 | #endif // IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
3299 | \r | |
0a2f634b | 3300 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
df24bb50 | 3301 | if (irmp_pulse_time >= SPEAKER_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SPEAKER_START_BIT_PULSE_LEN_MAX &&\r |
3302 | irmp_pause_time >= SPEAKER_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SPEAKER_START_BIT_PAUSE_LEN_MAX)\r | |
3303 | { // it's SPEAKER\r | |
645fbc69 | 3304 | #ifdef ANALYZE\r |
df24bb50 | 3305 | ANALYZE_PRINTF ("protocol = SPEAKER, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3306 | SPEAKER_START_BIT_PULSE_LEN_MIN, SPEAKER_START_BIT_PULSE_LEN_MAX,\r | |
3307 | SPEAKER_START_BIT_PAUSE_LEN_MIN, SPEAKER_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3308 | #endif // ANALYZE\r |
df24bb50 | 3309 | irmp_param_p = (IRMP_PARAMETER *) &speaker_param;\r |
3310 | }\r | |
3311 | else\r | |
0a2f634b | 3312 | #endif // IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
3313 | \r | |
504d9df9 | 3314 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
df24bb50 | 3315 | if (irmp_pulse_time >= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX &&\r |
3316 | irmp_pause_time >= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX)\r | |
3317 | { // it's BANG_OLUFSEN\r | |
3318 | #ifdef ANALYZE\r | |
3319 | ANALYZE_PRINTF ("protocol = BANG_OLUFSEN\n");\r | |
3320 | ANALYZE_PRINTF ("start bit 1 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3321 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r | |
3322 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
3323 | ANALYZE_PRINTF ("start bit 2 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3324 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r | |
3325 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
3326 | ANALYZE_PRINTF ("start bit 3 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3327 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r | |
3328 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
3329 | ANALYZE_PRINTF ("start bit 4 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3330 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r | |
3331 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
3332 | #endif // ANALYZE\r | |
3333 | irmp_param_p = (IRMP_PARAMETER *) &bang_olufsen_param;\r | |
3334 | last_value = 0;\r | |
3335 | }\r | |
3336 | else\r | |
504d9df9 | 3337 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
3338 | \r | |
89e8cafb | 3339 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
df24bb50 | 3340 | if (irmp_pulse_time >= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN && irmp_pulse_time <= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX &&\r |
3341 | irmp_pause_time >= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN && irmp_pause_time <= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX)\r | |
3342 | { // it's GRUNDIG\r | |
3343 | #ifdef ANALYZE\r | |
3344 | ANALYZE_PRINTF ("protocol = GRUNDIG, pre bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3345 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r | |
3346 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX);\r | |
3347 | #endif // ANALYZE\r | |
3348 | irmp_param_p = (IRMP_PARAMETER *) &grundig_param;\r | |
3349 | last_pause = irmp_pause_time;\r | |
3350 | last_value = 1;\r | |
3351 | }\r | |
3352 | else\r | |
89e8cafb | 3353 | #endif // IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
592411d1 | 3354 | \r |
0715cf5e | 3355 | #if IRMP_SUPPORT_MERLIN_PROTOCOL == 1 // check MERLIN before RUWIDO!\r |
df24bb50 | 3356 | if (irmp_pulse_time >= MERLIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MERLIN_START_BIT_PULSE_LEN_MAX &&\r |
3357 | irmp_pause_time >= MERLIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MERLIN_START_BIT_PAUSE_LEN_MAX)\r | |
3358 | { // it's MERLIN\r | |
3359 | #ifdef ANALYZE\r | |
3360 | ANALYZE_PRINTF ("protocol = MERLIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3361 | MERLIN_START_BIT_PULSE_LEN_MIN, MERLIN_START_BIT_PULSE_LEN_MAX,\r | |
3362 | MERLIN_START_BIT_PAUSE_LEN_MIN, MERLIN_START_BIT_PAUSE_LEN_MAX);\r | |
3363 | #endif // ANALYZE\r | |
3364 | irmp_param_p = (IRMP_PARAMETER *) &merlin_param;\r | |
3365 | last_pause = 0;\r | |
3366 | last_value = 1;\r | |
3367 | }\r | |
3368 | else\r | |
0715cf5e | 3369 | #endif // IRMP_SUPPORT_MERLIN_PROTOCOL == 1\r |
3370 | \r | |
12948cf3 | 3371 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 3372 | if (((irmp_pulse_time >= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX) ||\r |
3373 | (irmp_pulse_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX)) &&\r | |
3374 | ((irmp_pause_time >= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX) ||\r | |
3375 | (irmp_pause_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX)))\r | |
3376 | { // it's RUWIDO or SIEMENS\r | |
3377 | #ifdef ANALYZE\r | |
3378 | ANALYZE_PRINTF ("protocol = RUWIDO, start bit timings: pulse: %3d - %3d or %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
3379 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
3380 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
3381 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r | |
3382 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX);\r | |
3383 | #endif // ANALYZE\r | |
3384 | irmp_param_p = (IRMP_PARAMETER *) &ruwido_param;\r | |
3385 | last_pause = irmp_pause_time;\r | |
3386 | last_value = 1;\r | |
3387 | }\r | |
3388 | else\r | |
12948cf3 | 3389 | #endif // IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
3390 | \r | |
48664931 | 3391 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
df24bb50 | 3392 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r |
3393 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
3394 | {\r | |
645fbc69 | 3395 | #ifdef ANALYZE\r |
df24bb50 | 3396 | ANALYZE_PRINTF ("protocol = FDC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3397 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
3398 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3399 | #endif // ANALYZE\r |
df24bb50 | 3400 | irmp_param_p = (IRMP_PARAMETER *) &fdc_param;\r |
3401 | }\r | |
3402 | else\r | |
48664931 | 3403 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
12948cf3 | 3404 | \r |
9e16d699 | 3405 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 3406 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r |
3407 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
3408 | {\r | |
645fbc69 | 3409 | #ifdef ANALYZE\r |
df24bb50 | 3410 | ANALYZE_PRINTF ("protocol = RCCAR, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3411 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
3412 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3413 | #endif // ANALYZE\r |
df24bb50 | 3414 | irmp_param_p = (IRMP_PARAMETER *) &rccar_param;\r |
3415 | }\r | |
3416 | else\r | |
9e16d699 | 3417 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
89e8cafb | 3418 | \r |
111d6191 | 3419 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
df24bb50 | 3420 | if (irmp_pulse_time >= KATHREIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_START_BIT_PULSE_LEN_MAX &&\r |
3421 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)\r | |
3422 | { // it's KATHREIN\r | |
645fbc69 | 3423 | #ifdef ANALYZE\r |
df24bb50 | 3424 | ANALYZE_PRINTF ("protocol = KATHREIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3425 | KATHREIN_START_BIT_PULSE_LEN_MIN, KATHREIN_START_BIT_PULSE_LEN_MAX,\r | |
3426 | KATHREIN_START_BIT_PAUSE_LEN_MIN, KATHREIN_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3427 | #endif // ANALYZE\r |
df24bb50 | 3428 | irmp_param_p = (IRMP_PARAMETER *) &kathrein_param;\r |
3429 | }\r | |
3430 | else\r | |
111d6191 | 3431 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
3432 | \r | |
deba2a0a | 3433 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
df24bb50 | 3434 | if (irmp_pulse_time >= NETBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NETBOX_START_BIT_PULSE_LEN_MAX &&\r |
3435 | irmp_pause_time >= NETBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NETBOX_START_BIT_PAUSE_LEN_MAX)\r | |
3436 | { // it's NETBOX\r | |
645fbc69 | 3437 | #ifdef ANALYZE\r |
df24bb50 | 3438 | ANALYZE_PRINTF ("protocol = NETBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3439 | NETBOX_START_BIT_PULSE_LEN_MIN, NETBOX_START_BIT_PULSE_LEN_MAX,\r | |
3440 | NETBOX_START_BIT_PAUSE_LEN_MIN, NETBOX_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3441 | #endif // ANALYZE\r |
df24bb50 | 3442 | irmp_param_p = (IRMP_PARAMETER *) &netbox_param;\r |
3443 | }\r | |
3444 | else\r | |
deba2a0a | 3445 | #endif // IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
3446 | \r | |
f50e01e7 | 3447 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
df24bb50 | 3448 | if (irmp_pulse_time >= LEGO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= LEGO_START_BIT_PULSE_LEN_MAX &&\r |
3449 | irmp_pause_time >= LEGO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= LEGO_START_BIT_PAUSE_LEN_MAX)\r | |
3450 | {\r | |
645fbc69 | 3451 | #ifdef ANALYZE\r |
df24bb50 | 3452 | ANALYZE_PRINTF ("protocol = LEGO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3453 | LEGO_START_BIT_PULSE_LEN_MIN, LEGO_START_BIT_PULSE_LEN_MAX,\r | |
3454 | LEGO_START_BIT_PAUSE_LEN_MIN, LEGO_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3455 | #endif // ANALYZE\r |
df24bb50 | 3456 | irmp_param_p = (IRMP_PARAMETER *) &lego_param;\r |
3457 | }\r | |
3458 | else\r | |
93ba2e01 | 3459 | #endif // IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
f50e01e7 | 3460 | \r |
2fb27bfe | 3461 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
df24bb50 | 3462 | if (irmp_pulse_time >= A1TVBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= A1TVBOX_START_BIT_PULSE_LEN_MAX &&\r |
3463 | irmp_pause_time >= A1TVBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= A1TVBOX_START_BIT_PAUSE_LEN_MAX)\r | |
3464 | { // it's A1TVBOX\r | |
3465 | #ifdef ANALYZE\r | |
3466 | ANALYZE_PRINTF ("protocol = A1TVBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3467 | A1TVBOX_START_BIT_PULSE_LEN_MIN, A1TVBOX_START_BIT_PULSE_LEN_MAX,\r | |
3468 | A1TVBOX_START_BIT_PAUSE_LEN_MIN, A1TVBOX_START_BIT_PAUSE_LEN_MAX);\r | |
3469 | #endif // ANALYZE\r | |
3470 | irmp_param_p = (IRMP_PARAMETER *) &a1tvbox_param;\r | |
3471 | last_pause = 0;\r | |
3472 | last_value = 1;\r | |
3473 | }\r | |
3474 | else\r | |
b85cb27d | 3475 | #endif // IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
3476 | \r | |
3477 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
df24bb50 | 3478 | if (irmp_pulse_time >= ORTEK_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ORTEK_START_BIT_PULSE_LEN_MAX &&\r |
3479 | irmp_pause_time >= ORTEK_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ORTEK_START_BIT_PAUSE_LEN_MAX)\r | |
3480 | { // it's ORTEK (Hama)\r | |
3481 | #ifdef ANALYZE\r | |
3482 | ANALYZE_PRINTF ("protocol = ORTEK, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
3483 | ORTEK_START_BIT_PULSE_LEN_MIN, ORTEK_START_BIT_PULSE_LEN_MAX,\r | |
3484 | ORTEK_START_BIT_PAUSE_LEN_MIN, ORTEK_START_BIT_PAUSE_LEN_MAX);\r | |
3485 | #endif // ANALYZE\r | |
3486 | irmp_param_p = (IRMP_PARAMETER *) &ortek_param;\r | |
3487 | last_pause = 0;\r | |
3488 | last_value = 1;\r | |
3489 | parity = 0;\r | |
3490 | }\r | |
3491 | else\r | |
cb93f9e9 | 3492 | #endif // IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
2fb27bfe | 3493 | \r |
cb93f9e9 | 3494 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 3495 | if (irmp_pulse_time >= RCMM32_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCMM32_START_BIT_PULSE_LEN_MAX &&\r |
3496 | irmp_pause_time >= RCMM32_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_START_BIT_PAUSE_LEN_MAX)\r | |
3497 | { // it's RCMM\r | |
645fbc69 | 3498 | #ifdef ANALYZE\r |
df24bb50 | 3499 | ANALYZE_PRINTF ("protocol = RCMM, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
3500 | RCMM32_START_BIT_PULSE_LEN_MIN, RCMM32_START_BIT_PULSE_LEN_MAX,\r | |
3501 | RCMM32_START_BIT_PAUSE_LEN_MIN, RCMM32_START_BIT_PAUSE_LEN_MAX);\r | |
1082ecf2 | 3502 | #endif // ANALYZE\r |
df24bb50 | 3503 | irmp_param_p = (IRMP_PARAMETER *) &rcmm_param;\r |
3504 | }\r | |
3505 | else\r | |
cb93f9e9 | 3506 | #endif // IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 3507 | {\r |
645fbc69 | 3508 | #ifdef ANALYZE\r |
df24bb50 | 3509 | ANALYZE_PRINTF ("protocol = UNKNOWN\n");\r |
1082ecf2 | 3510 | #endif // ANALYZE\r |
df24bb50 | 3511 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
3512 | }\r | |
4225a882 | 3513 | \r |
df24bb50 | 3514 | if (irmp_start_bit_detected)\r |
3515 | {\r | |
3516 | memcpy_P (&irmp_param, irmp_param_p, sizeof (IRMP_PARAMETER));\r | |
46dd89b7 | 3517 | \r |
df24bb50 | 3518 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
3519 | {\r | |
645fbc69 | 3520 | #ifdef ANALYZE\r |
df24bb50 | 3521 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max);\r |
3522 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max);\r | |
1082ecf2 | 3523 | #endif // ANALYZE\r |
df24bb50 | 3524 | }\r |
3525 | else\r | |
3526 | {\r | |
645fbc69 | 3527 | #ifdef ANALYZE\r |
df24bb50 | 3528 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max,\r |
3529 | 2 * irmp_param.pulse_1_len_min, 2 * irmp_param.pulse_1_len_max);\r | |
3530 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max,\r | |
3531 | 2 * irmp_param.pause_1_len_min, 2 * irmp_param.pause_1_len_max);\r | |
1082ecf2 | 3532 | #endif // ANALYZE\r |
df24bb50 | 3533 | }\r |
46dd89b7 | 3534 | \r |
6f750020 | 3535 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 3536 | if (irmp_param2.protocol)\r |
3537 | {\r | |
645fbc69 | 3538 | #ifdef ANALYZE\r |
df24bb50 | 3539 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param2.pulse_0_len_min, irmp_param2.pulse_0_len_max);\r |
3540 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param2.pause_0_len_min, irmp_param2.pause_0_len_max);\r | |
3541 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param2.pulse_1_len_min, irmp_param2.pulse_1_len_max);\r | |
3542 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param2.pause_1_len_min, irmp_param2.pause_1_len_max);\r | |
1082ecf2 | 3543 | #endif // ANALYZE\r |
df24bb50 | 3544 | }\r |
6f750020 | 3545 | #endif\r |
3546 | \r | |
d823e852 | 3547 | \r |
504d9df9 | 3548 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 3549 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL)\r |
3550 | {\r | |
645fbc69 | 3551 | #ifdef ANALYZE\r |
df24bb50 | 3552 | ANALYZE_PRINTF ("pulse_toggle: %3d - %3d\n", RC6_TOGGLE_BIT_LEN_MIN, RC6_TOGGLE_BIT_LEN_MAX);\r |
1082ecf2 | 3553 | #endif // ANALYZE\r |
df24bb50 | 3554 | }\r |
504d9df9 | 3555 | #endif\r |
77f488bb | 3556 | \r |
df24bb50 | 3557 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
3558 | {\r | |
645fbc69 | 3559 | #ifdef ANALYZE\r |
df24bb50 | 3560 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r |
3561 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max);\r | |
1082ecf2 | 3562 | #endif // ANALYZE\r |
df24bb50 | 3563 | }\r |
3564 | else\r | |
3565 | {\r | |
645fbc69 | 3566 | #ifdef ANALYZE\r |
df24bb50 | 3567 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max,\r |
3568 | 2 * irmp_param.pulse_0_len_min, 2 * irmp_param.pulse_0_len_max);\r | |
3569 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max,\r | |
3570 | 2 * irmp_param.pause_0_len_min, 2 * irmp_param.pause_0_len_max);\r | |
1082ecf2 | 3571 | #endif // ANALYZE\r |
df24bb50 | 3572 | }\r |
46dd89b7 | 3573 | \r |
1082ecf2 | 3574 | #ifdef ANALYZE\r |
504d9df9 | 3575 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
df24bb50 | 3576 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r |
3577 | {\r | |
3578 | ANALYZE_PRINTF ("pulse_r: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
3579 | ANALYZE_PRINTF ("pause_r: %3d - %3d\n", BANG_OLUFSEN_R_PAUSE_LEN_MIN, BANG_OLUFSEN_R_PAUSE_LEN_MAX);\r | |
3580 | }\r | |
504d9df9 | 3581 | #endif\r |
3582 | \r | |
df24bb50 | 3583 | ANALYZE_PRINTF ("command_offset: %2d\n", irmp_param.command_offset);\r |
3584 | ANALYZE_PRINTF ("command_len: %3d\n", irmp_param.command_end - irmp_param.command_offset);\r | |
3585 | ANALYZE_PRINTF ("complete_len: %3d\n", irmp_param.complete_len);\r | |
3586 | ANALYZE_PRINTF ("stop_bit: %3d\n", irmp_param.stop_bit);\r | |
48664931 | 3587 | #endif // ANALYZE\r |
df24bb50 | 3588 | }\r |
4225a882 | 3589 | \r |
df24bb50 | 3590 | irmp_bit = 0;\r |
4225a882 | 3591 | \r |
77f488bb | 3592 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3593 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r |
3594 | irmp_param.protocol != IRMP_RUWIDO_PROTOCOL && // Manchester, but not RUWIDO\r | |
3595 | irmp_param.protocol != IRMP_RC6_PROTOCOL) // Manchester, but not RC6\r | |
3596 | {\r | |
3597 | if (irmp_pause_time > irmp_param.pulse_1_len_max && irmp_pause_time <= 2 * irmp_param.pulse_1_len_max)\r | |
3598 | {\r | |
3599 | #ifdef ANALYZE\r | |
3600 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
3601 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r | |
3602 | ANALYZE_NEWLINE ();\r | |
3603 | #endif // ANALYZE\r | |
3604 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1);\r | |
3605 | }\r | |
3606 | else if (! last_value) // && irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
3607 | {\r | |
3608 | #ifdef ANALYZE\r | |
3609 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
3610 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r | |
3611 | ANALYZE_NEWLINE ();\r | |
3612 | #endif // ANALYZE\r | |
3613 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0);\r | |
3614 | }\r | |
3615 | }\r | |
3616 | else\r | |
77f488bb | 3617 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
a7054daf | 3618 | \r |
deba2a0a | 3619 | #if IRMP_SUPPORT_SERIAL == 1\r |
df24bb50 | 3620 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r |
3621 | {\r | |
3622 | ; // do nothing\r | |
3623 | }\r | |
3624 | else\r | |
deba2a0a | 3625 | #endif // IRMP_SUPPORT_SERIAL == 1\r |
3626 | \r | |
3627 | \r | |
4225a882 | 3628 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
df24bb50 | 3629 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r |
3630 | {\r | |
645fbc69 | 3631 | #ifdef ANALYZE\r |
df24bb50 | 3632 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 3633 | #endif // ANALYZE\r |
4225a882 | 3634 | \r |
df24bb50 | 3635 | if (irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX)\r |
3636 | { // pause timings correct for "1"?\r | |
645fbc69 | 3637 | #ifdef ANALYZE\r |
df24bb50 | 3638 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r |
3639 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3640 | #endif // ANALYZE\r |
df24bb50 | 3641 | irmp_store_bit (1);\r |
3642 | }\r | |
3643 | else // if (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)\r | |
3644 | { // pause timings correct for "0"?\r | |
645fbc69 | 3645 | #ifdef ANALYZE\r |
df24bb50 | 3646 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r |
3647 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3648 | #endif // ANALYZE\r |
df24bb50 | 3649 | irmp_store_bit (0);\r |
3650 | }\r | |
3651 | }\r | |
3652 | else\r | |
4225a882 | 3653 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
beda975f | 3654 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3655 | if (irmp_param.protocol == IRMP_THOMSON_PROTOCOL)\r |
3656 | {\r | |
645fbc69 | 3657 | #ifdef ANALYZE\r |
df24bb50 | 3658 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 3659 | #endif // ANALYZE\r |
beda975f | 3660 | \r |
df24bb50 | 3661 | if (irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX)\r |
3662 | { // pause timings correct for "1"?\r | |
645fbc69 | 3663 | #ifdef ANALYZE\r |
df24bb50 | 3664 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r |
3665 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3666 | #endif // ANALYZE\r |
df24bb50 | 3667 | irmp_store_bit (1);\r |
3668 | }\r | |
3669 | else // if (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)\r | |
3670 | { // pause timings correct for "0"?\r | |
645fbc69 | 3671 | #ifdef ANALYZE\r |
df24bb50 | 3672 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r |
3673 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 3674 | #endif // ANALYZE\r |
df24bb50 | 3675 | irmp_store_bit (0);\r |
3676 | }\r | |
3677 | }\r | |
3678 | else\r | |
beda975f | 3679 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
df24bb50 | 3680 | {\r |
3681 | ; // else do nothing\r | |
3682 | }\r | |
3683 | \r | |
3684 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
3685 | irmp_pause_time = 0;\r | |
3686 | wait_for_start_space = 0;\r | |
3687 | }\r | |
3688 | }\r | |
3689 | else if (wait_for_space) // the data section....\r | |
3690 | { // counting the time of darkness....\r | |
3691 | uint_fast8_t got_light = FALSE;\r | |
3692 | \r | |
3693 | if (irmp_input) // still dark?\r | |
3694 | { // yes...\r | |
3695 | if (irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 1)\r | |
3696 | {\r | |
3697 | if (\r | |
a42d1ee6 | 3698 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3699 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) ||\r |
a42d1ee6 | 3700 | #endif\r |
3701 | #if IRMP_SUPPORT_SERIAL == 1\r | |
df24bb50 | 3702 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) ||\r |
a42d1ee6 | 3703 | #endif\r |
df24bb50 | 3704 | (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max))\r |
3705 | {\r | |
3706 | #ifdef ANALYZE\r | |
3707 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r | |
3708 | {\r | |
3709 | ANALYZE_PRINTF ("stop bit detected\n");\r | |
3710 | }\r | |
3711 | #endif // ANALYZE\r | |
3712 | irmp_param.stop_bit = 0;\r | |
3713 | }\r | |
3714 | else\r | |
3715 | {\r | |
3716 | #ifdef ANALYZE\r | |
3717 | ANALYZE_PRINTF ("error: stop bit timing wrong, irmp_bit = %d, irmp_pulse_time = %d, pulse_0_len_min = %d, pulse_0_len_max = %d\n",\r | |
3718 | irmp_bit, irmp_pulse_time, irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
3719 | #endif // ANALYZE\r | |
3720 | irmp_start_bit_detected = 0; // wait for another start bit...\r | |
3721 | irmp_pulse_time = 0;\r | |
3722 | irmp_pause_time = 0;\r | |
3723 | }\r | |
3724 | }\r | |
3725 | else\r | |
3726 | {\r | |
3727 | irmp_pause_time++; // increment counter\r | |
4225a882 | 3728 | \r |
3729 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
df24bb50 | 3730 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && // Sony has a variable number of bits:\r |
3731 | irmp_pause_time > SIRCS_PAUSE_LEN_MAX && // minimum is 12\r | |
3732 | irmp_bit >= 12 - 1) // pause too long?\r | |
3733 | { // yes, break and close this frame\r | |
3734 | irmp_param.complete_len = irmp_bit + 1; // set new complete length\r | |
3735 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3736 | irmp_tmp_address |= (irmp_bit - SIRCS_MINIMUM_DATA_LEN + 1) << 8; // new: store number of additional bits in upper byte of address!\r | |
3737 | irmp_param.command_end = irmp_param.command_offset + irmp_bit + 1; // correct command length\r | |
3738 | irmp_pause_time = SIRCS_PAUSE_LEN_MAX - 1; // correct pause length\r | |
3739 | }\r | |
3740 | else\r | |
4225a882 | 3741 | #endif\r |
0715cf5e | 3742 | #if IRMP_SUPPORT_FAN_PROTOCOL == 1\r |
df24bb50 | 3743 | if (irmp_param.protocol == IRMP_FAN_PROTOCOL && // FAN has no stop bit.\r |
3744 | irmp_bit >= FAN_COMPLETE_DATA_LEN - 1) // last bit in frame\r | |
3745 | { // yes, break and close this frame\r | |
3746 | if (irmp_pulse_time <= FAN_0_PULSE_LEN_MAX && irmp_pause_time >= FAN_0_PAUSE_LEN_MIN)\r | |
3747 | {\r | |
458a6d64 | 3748 | #ifdef ANALYZE\r |
df24bb50 | 3749 | ANALYZE_PRINTF ("Generating virtual stop bit\n");\r |
458a6d64 | 3750 | #endif // ANALYZE\r |
df24bb50 | 3751 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r |
3752 | }\r | |
3753 | else if (irmp_pulse_time >= FAN_1_PULSE_LEN_MIN && irmp_pause_time >= FAN_1_PAUSE_LEN_MIN)\r | |
3754 | {\r | |
458a6d64 | 3755 | #ifdef ANALYZE\r |
df24bb50 | 3756 | ANALYZE_PRINTF ("Generating virtual stop bit\n");\r |
458a6d64 | 3757 | #endif // ANALYZE\r |
df24bb50 | 3758 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r |
3759 | }\r | |
3760 | }\r | |
3761 | else\r | |
0715cf5e | 3762 | #endif\r |
deba2a0a | 3763 | #if IRMP_SUPPORT_SERIAL == 1\r |
df24bb50 | 3764 | // NETBOX generates no stop bit, here is the timeout condition:\r |
3765 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) && irmp_param.protocol == IRMP_NETBOX_PROTOCOL &&\r | |
3766 | irmp_pause_time >= NETBOX_PULSE_LEN * (NETBOX_COMPLETE_DATA_LEN - irmp_bit))\r | |
3767 | {\r | |
3768 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3769 | }\r | |
3770 | else\r | |
deba2a0a | 3771 | #endif\r |
89e8cafb | 3772 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
df24bb50 | 3773 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && !irmp_param.stop_bit)\r |
3774 | {\r | |
3775 | if (irmp_pause_time > IR60_TIMEOUT_LEN && (irmp_bit == 5 || irmp_bit == 6))\r | |
3776 | {\r | |
3777 | #ifdef ANALYZE\r | |
3778 | ANALYZE_PRINTF ("Switching to IR60 protocol\n");\r | |
3779 | #endif // ANALYZE\r | |
3780 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3781 | irmp_param.stop_bit = TRUE; // set flag\r | |
3782 | \r | |
3783 | irmp_param.protocol = IRMP_IR60_PROTOCOL; // change protocol\r | |
3784 | irmp_param.complete_len = IR60_COMPLETE_DATA_LEN; // correct complete len\r | |
3785 | irmp_param.address_offset = IR60_ADDRESS_OFFSET;\r | |
3786 | irmp_param.address_end = IR60_ADDRESS_OFFSET + IR60_ADDRESS_LEN;\r | |
3787 | irmp_param.command_offset = IR60_COMMAND_OFFSET;\r | |
3788 | irmp_param.command_end = IR60_COMMAND_OFFSET + IR60_COMMAND_LEN;\r | |
3789 | \r | |
3790 | irmp_tmp_command <<= 1;\r | |
3791 | irmp_tmp_command |= first_bit;\r | |
3792 | }\r | |
3793 | else if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN - 2)\r | |
3794 | { // special manchester decoder\r | |
3795 | irmp_param.complete_len = GRUNDIG_COMPLETE_DATA_LEN; // correct complete len\r | |
3796 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3797 | irmp_param.stop_bit = TRUE; // set flag\r | |
3798 | }\r | |
3799 | else if (irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN)\r | |
3800 | {\r | |
3801 | #ifdef ANALYZE\r | |
3802 | ANALYZE_PRINTF ("Switching to NOKIA protocol, irmp_bit = %d\n", irmp_bit);\r | |
3803 | #endif // ANALYZE\r | |
3804 | irmp_param.protocol = IRMP_NOKIA_PROTOCOL; // change protocol\r | |
3805 | irmp_param.address_offset = NOKIA_ADDRESS_OFFSET;\r | |
3806 | irmp_param.address_end = NOKIA_ADDRESS_OFFSET + NOKIA_ADDRESS_LEN;\r | |
3807 | irmp_param.command_offset = NOKIA_COMMAND_OFFSET;\r | |
3808 | irmp_param.command_end = NOKIA_COMMAND_OFFSET + NOKIA_COMMAND_LEN;\r | |
3809 | \r | |
3810 | if (irmp_tmp_command & 0x300)\r | |
3811 | {\r | |
3812 | irmp_tmp_address = (irmp_tmp_command >> 8);\r | |
3813 | irmp_tmp_command &= 0xFF;\r | |
3814 | }\r | |
3815 | }\r | |
3816 | }\r | |
3817 | else\r | |
d155e9ab | 3818 | #endif\r |
12948cf3 | 3819 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
df24bb50 | 3820 | if (irmp_param.protocol == IRMP_RUWIDO_PROTOCOL && !irmp_param.stop_bit)\r |
3821 | {\r | |
3822 | if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= RUWIDO_COMPLETE_DATA_LEN - 2)\r | |
3823 | { // special manchester decoder\r | |
3824 | irmp_param.complete_len = RUWIDO_COMPLETE_DATA_LEN; // correct complete len\r | |
3825 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3826 | irmp_param.stop_bit = TRUE; // set flag\r | |
3827 | }\r | |
3828 | else if (irmp_bit >= RUWIDO_COMPLETE_DATA_LEN)\r | |
3829 | {\r | |
3830 | #ifdef ANALYZE\r | |
3831 | ANALYZE_PRINTF ("Switching to SIEMENS protocol\n");\r | |
3832 | #endif // ANALYZE\r | |
3833 | irmp_param.protocol = IRMP_SIEMENS_PROTOCOL; // change protocol\r | |
3834 | irmp_param.address_offset = SIEMENS_ADDRESS_OFFSET;\r | |
3835 | irmp_param.address_end = SIEMENS_ADDRESS_OFFSET + SIEMENS_ADDRESS_LEN;\r | |
3836 | irmp_param.command_offset = SIEMENS_COMMAND_OFFSET;\r | |
3837 | irmp_param.command_end = SIEMENS_COMMAND_OFFSET + SIEMENS_COMMAND_LEN;\r | |
3838 | \r | |
3839 | // 76543210\r | |
3840 | // RUWIDO: AAAAAAAAACCCCCCCp\r | |
3841 | // SIEMENS: AAAAAAAAAAACCCCCCCCCCp\r | |
3842 | irmp_tmp_address <<= 2;\r | |
3843 | irmp_tmp_address |= (irmp_tmp_command >> 6);\r | |
3844 | irmp_tmp_command &= 0x003F;\r | |
cb93f9e9 | 3845 | // irmp_tmp_command <<= 4;\r |
df24bb50 | 3846 | irmp_tmp_command |= last_value;\r |
3847 | }\r | |
3848 | }\r | |
3849 | else\r | |
12948cf3 | 3850 | #endif\r |
40ca4604 | 3851 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
df24bb50 | 3852 | if (irmp_param.protocol == IRMP_ROOMBA_PROTOCOL && // Roomba has no stop bit\r |
3853 | irmp_bit >= ROOMBA_COMPLETE_DATA_LEN - 1) // it's the last data bit...\r | |
3854 | { // break and close this frame\r | |
3855 | if (irmp_pulse_time >= ROOMBA_1_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_1_PULSE_LEN_MAX)\r | |
3856 | {\r | |
3857 | irmp_pause_time = ROOMBA_1_PAUSE_LEN_EXACT;\r | |
3858 | }\r | |
3859 | else if (irmp_pulse_time >= ROOMBA_0_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_0_PULSE_LEN_MAX)\r | |
3860 | {\r | |
3861 | irmp_pause_time = ROOMBA_0_PAUSE_LEN;\r | |
3862 | }\r | |
3863 | \r | |
3864 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
3865 | }\r | |
3866 | else\r | |
40ca4604 | 3867 | #endif\r |
77f488bb | 3868 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3869 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r |
3870 | irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= irmp_param.complete_len - 2 && !irmp_param.stop_bit)\r | |
3871 | { // special manchester decoder\r | |
3872 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
3873 | irmp_param.stop_bit = TRUE; // set flag\r | |
3874 | }\r | |
3875 | else\r | |
77f488bb | 3876 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 3877 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
3878 | { // yes...\r | |
3879 | if (irmp_bit == irmp_param.complete_len - 1 && irmp_param.stop_bit == 0)\r | |
3880 | {\r | |
3881 | irmp_bit++;\r | |
3882 | }\r | |
770a1a9d | 3883 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 3884 | else if (irmp_param.protocol == IRMP_NEC_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r |
3885 | {\r | |
3886 | #ifdef ANALYZE\r | |
3887 | ANALYZE_PRINTF ("Switching to JVC protocol, irmp_bit = %d\n", irmp_bit);\r | |
3888 | #endif // ANALYZE\r | |
3889 | irmp_param.stop_bit = TRUE; // set flag\r | |
3890 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
3891 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
3892 | irmp_tmp_command = (irmp_tmp_address >> 4); // set command: upper 12 bits are command bits\r | |
3893 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
3894 | irmp_start_bit_detected = 1; // tricky: don't wait for another start bit...\r | |
3895 | }\r | |
770a1a9d | 3896 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
69da6090 | 3897 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
df24bb50 | 3898 | else if (irmp_param.protocol == IRMP_NEC_PROTOCOL && (irmp_bit == 28 || irmp_bit == 29)) // it was a LGAIR stop bit\r |
3899 | {\r | |
3900 | #ifdef ANALYZE\r | |
3901 | ANALYZE_PRINTF ("Switching to LGAIR protocol, irmp_bit = %d\n", irmp_bit);\r | |
3902 | #endif // ANALYZE\r | |
3903 | irmp_param.stop_bit = TRUE; // set flag\r | |
3904 | irmp_param.protocol = IRMP_LGAIR_PROTOCOL; // switch protocol\r | |
3905 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
3906 | irmp_tmp_command = irmp_lgair_command; // set command: upper 8 bits are command bits\r | |
3907 | irmp_tmp_address = irmp_lgair_address; // lower 4 bits are address bits\r | |
3908 | irmp_start_bit_detected = 1; // tricky: don't wait for another start bit...\r | |
3909 | }\r | |
69da6090 | 3910 | #endif // IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
35213800 | 3911 | \r |
3912 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
3913 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
df24bb50 | 3914 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit == 32) // it was a NEC stop bit\r |
3915 | {\r | |
645fbc69 | 3916 | #ifdef ANALYZE\r |
df24bb50 | 3917 | ANALYZE_PRINTF ("Switching to NEC protocol\n");\r |
1082ecf2 | 3918 | #endif // ANALYZE\r |
df24bb50 | 3919 | irmp_param.stop_bit = TRUE; // set flag\r |
3920 | irmp_param.protocol = IRMP_NEC_PROTOCOL; // switch protocol\r | |
3921 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
35213800 | 3922 | \r |
df24bb50 | 3923 | // 0123456789ABC0123456789ABC0123456701234567\r |
3924 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
3925 | // NEC: AAAAAAAAaaaaaaaaCCCCCCCCcccccccc\r | |
3926 | irmp_tmp_address |= (irmp_tmp_address2 & 0x0007) << 13; // fm 2012-02-13: 12 -> 13\r | |
3927 | irmp_tmp_command = (irmp_tmp_address2 >> 3) | (irmp_tmp_command << 10);\r | |
3928 | }\r | |
35213800 | 3929 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
69da6090 | 3930 | #if IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
df24bb50 | 3931 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit == 28) // it was a NEC stop bit\r |
3932 | {\r | |
645fbc69 | 3933 | #ifdef ANALYZE\r |
df24bb50 | 3934 | ANALYZE_PRINTF ("Switching to LGAIR protocol\n");\r |
1082ecf2 | 3935 | #endif // ANALYZE\r |
df24bb50 | 3936 | irmp_param.stop_bit = TRUE; // set flag\r |
3937 | irmp_param.protocol = IRMP_LGAIR_PROTOCOL; // switch protocol\r | |
3938 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
3939 | irmp_tmp_address = irmp_lgair_address;\r | |
3940 | irmp_tmp_command = irmp_lgair_command;\r | |
3941 | }\r | |
69da6090 | 3942 | #endif // IRMP_SUPPORT_LGAIR_PROTOCOL == 1\r |
35213800 | 3943 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 3944 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r |
3945 | {\r | |
645fbc69 | 3946 | #ifdef ANALYZE\r |
df24bb50 | 3947 | ANALYZE_PRINTF ("Switching to JVC protocol, irmp_bit = %d\n", irmp_bit);\r |
1082ecf2 | 3948 | #endif // ANALYZE\r |
df24bb50 | 3949 | irmp_param.stop_bit = TRUE; // set flag\r |
3950 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
3951 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
35213800 | 3952 | \r |
df24bb50 | 3953 | // 0123456789ABC0123456789ABC0123456701234567\r |
3954 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
3955 | // JVC: AAAACCCCCCCCCCCC\r | |
3956 | irmp_tmp_command = (irmp_tmp_address >> 4) | (irmp_tmp_address2 << 9); // set command: upper 12 bits are command bits\r | |
3957 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
3958 | }\r | |
35213800 | 3959 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
3960 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
956ea3ea | 3961 | \r |
3962 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r | |
df24bb50 | 3963 | else if (irmp_param.protocol == IRMP_SAMSUNG48_PROTOCOL && irmp_bit == 32) // it was a SAMSUNG32 stop bit\r |
3964 | {\r | |
956ea3ea | 3965 | #ifdef ANALYZE\r |
df24bb50 | 3966 | ANALYZE_PRINTF ("Switching to SAMSUNG32 protocol\n");\r |
956ea3ea | 3967 | #endif // ANALYZE\r |
df24bb50 | 3968 | irmp_param.protocol = IRMP_SAMSUNG32_PROTOCOL;\r |
3969 | irmp_param.command_offset = SAMSUNG32_COMMAND_OFFSET;\r | |
3970 | irmp_param.command_end = SAMSUNG32_COMMAND_OFFSET + SAMSUNG32_COMMAND_LEN;\r | |
3971 | irmp_param.complete_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
3972 | }\r | |
956ea3ea | 3973 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
3974 | \r | |
cb93f9e9 | 3975 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 3976 | else if (irmp_param.protocol == IRMP_RCMM32_PROTOCOL && (irmp_bit == 12 || irmp_bit == 24)) // it was a RCMM stop bit\r |
3977 | {\r | |
3978 | if (irmp_bit == 12)\r | |
3979 | {\r | |
3980 | irmp_tmp_command = (irmp_tmp_address & 0xFF); // set command: lower 8 bits are command bits\r | |
3981 | irmp_tmp_address >>= 8; // upper 4 bits are address bits\r | |
cb93f9e9 | 3982 | \r |
645fbc69 | 3983 | #ifdef ANALYZE\r |
df24bb50 | 3984 | ANALYZE_PRINTF ("Switching to RCMM12 protocol, irmp_bit = %d\n", irmp_bit);\r |
1082ecf2 | 3985 | #endif // ANALYZE\r |
df24bb50 | 3986 | irmp_param.protocol = IRMP_RCMM12_PROTOCOL; // switch protocol\r |
3987 | }\r | |
3988 | else // if ((irmp_bit == 24)\r | |
3989 | {\r | |
645fbc69 | 3990 | #ifdef ANALYZE\r |
df24bb50 | 3991 | ANALYZE_PRINTF ("Switching to RCMM24 protocol, irmp_bit = %d\n", irmp_bit);\r |
1082ecf2 | 3992 | #endif // ANALYZE\r |
df24bb50 | 3993 | irmp_param.protocol = IRMP_RCMM24_PROTOCOL; // switch protocol\r |
3994 | }\r | |
3995 | irmp_param.stop_bit = TRUE; // set flag\r | |
3996 | irmp_param.complete_len = irmp_bit; // patch length\r | |
3997 | }\r | |
cb93f9e9 | 3998 | #endif // IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
3d2da98a | 3999 | \r |
4000 | #if IRMP_SUPPORT_TECHNICS_PROTOCOL == 1\r | |
df24bb50 | 4001 | else if (irmp_param.protocol == IRMP_MATSUSHITA_PROTOCOL && irmp_bit == 22) // it was a TECHNICS stop bit\r |
4002 | {\r | |
4003 | #ifdef ANALYZE\r | |
4004 | ANALYZE_PRINTF ("Switching to TECHNICS protocol, irmp_bit = %d\n", irmp_bit);\r | |
4005 | #endif // ANALYZE\r | |
4006 | // Situation:\r | |
4007 | // The first 12 bits have been stored in irmp_tmp_command (LSB first)\r | |
4008 | // The following 10 bits have been stored in irmp_tmp_address (LSB first)\r | |
4009 | // The code of TECHNICS is:\r | |
4010 | // cccccccccccCCCCCCCCCCC (11 times c and 11 times C)\r | |
4011 | // ccccccccccccaaaaaaaaaa\r | |
4012 | // where C is inverted value of c\r | |
4013 | \r | |
4014 | irmp_tmp_address <<= 1;\r | |
4015 | if (irmp_tmp_command & (1<<11))\r | |
4016 | {\r | |
4017 | irmp_tmp_address |= 1;\r | |
4018 | irmp_tmp_command &= ~(1<<11);\r | |
4019 | }\r | |
4020 | \r | |
4021 | if (irmp_tmp_command == ((~irmp_tmp_address) & 0x07FF))\r | |
4022 | {\r | |
4023 | irmp_tmp_address = 0;\r | |
4024 | \r | |
4025 | irmp_param.protocol = IRMP_TECHNICS_PROTOCOL; // switch protocol\r | |
4026 | irmp_param.complete_len = irmp_bit; // patch length\r | |
4027 | }\r | |
4028 | else\r | |
4029 | {\r | |
4030 | #ifdef ANALYZE\r | |
4031 | ANALYZE_PRINTF ("error 8: TECHNICS frame error\n");\r | |
4032 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4033 | #endif // ANALYZE\r | |
4034 | irmp_start_bit_detected = 0; // wait for another start bit...\r | |
4035 | irmp_pulse_time = 0;\r | |
4036 | irmp_pause_time = 0;\r | |
4037 | }\r | |
4038 | }\r | |
3d2da98a | 4039 | #endif // IRMP_SUPPORT_TECHNICS_PROTOCOL == 1\r |
df24bb50 | 4040 | else\r |
4041 | {\r | |
645fbc69 | 4042 | #ifdef ANALYZE\r |
df24bb50 | 4043 | ANALYZE_PRINTF ("error 2: pause %d after data bit %d too long\n", irmp_pause_time, irmp_bit);\r |
4044 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1082ecf2 | 4045 | #endif // ANALYZE\r |
df24bb50 | 4046 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
4047 | irmp_pulse_time = 0;\r | |
4048 | irmp_pause_time = 0;\r | |
4049 | }\r | |
4050 | }\r | |
4051 | }\r | |
4052 | }\r | |
4053 | else\r | |
4054 | { // got light now!\r | |
4055 | got_light = TRUE;\r | |
4056 | }\r | |
4225a882 | 4057 | \r |
df24bb50 | 4058 | if (got_light)\r |
4059 | {\r | |
645fbc69 | 4060 | #ifdef ANALYZE\r |
df24bb50 | 4061 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
1082ecf2 | 4062 | #endif // ANALYZE\r |
4225a882 | 4063 | \r |
77f488bb | 4064 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
df24bb50 | 4065 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER)) // Manchester\r |
4066 | {\r | |
31c1f035 | 4067 | #if 1\r |
df24bb50 | 4068 | if (irmp_pulse_time > irmp_param.pulse_1_len_max /* && irmp_pulse_time <= 2 * irmp_param.pulse_1_len_max */)\r |
31c1f035 | 4069 | #else // better, but some IR-RCs use asymmetric timings :-/\r |
df24bb50 | 4070 | if (irmp_pulse_time > irmp_param.pulse_1_len_max && irmp_pulse_time <= 2 * irmp_param.pulse_1_len_max &&\r |
4071 | irmp_pause_time <= 2 * irmp_param.pause_1_len_max)\r | |
fc80d688 | 4072 | #endif\r |
df24bb50 | 4073 | {\r |
c7a47e89 | 4074 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4075 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r |
4076 | {\r | |
4077 | #ifdef ANALYZE\r | |
4078 | ANALYZE_PUTCHAR ('T');\r | |
4079 | #endif // ANALYZE\r | |
4080 | if (irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode 6A\r | |
4081 | {\r | |
4082 | irmp_store_bit (1);\r | |
4083 | last_value = 1;\r | |
4084 | }\r | |
4085 | else // RC6 mode 0\r | |
4086 | {\r | |
4087 | irmp_store_bit (0);\r | |
4088 | last_value = 0;\r | |
4089 | }\r | |
4090 | #ifdef ANALYZE\r | |
4091 | ANALYZE_NEWLINE ();\r | |
4092 | #endif // ANALYZE\r | |
4093 | }\r | |
4094 | else\r | |
c7a47e89 | 4095 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4096 | {\r |
645fbc69 | 4097 | #ifdef ANALYZE\r |
df24bb50 | 4098 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r |
1082ecf2 | 4099 | #endif // ANALYZE\r |
df24bb50 | 4100 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1 );\r |
4225a882 | 4101 | \r |
c7a47e89 | 4102 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4103 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r |
4104 | {\r | |
645fbc69 | 4105 | #ifdef ANALYZE\r |
df24bb50 | 4106 | ANALYZE_PUTCHAR ('T');\r |
1082ecf2 | 4107 | #endif // ANALYZE\r |
df24bb50 | 4108 | irmp_store_bit (1);\r |
c7a47e89 | 4109 | \r |
df24bb50 | 4110 | if (irmp_pause_time > 2 * irmp_param.pause_1_len_max)\r |
4111 | {\r | |
4112 | last_value = 0;\r | |
4113 | }\r | |
4114 | else\r | |
4115 | {\r | |
4116 | last_value = 1;\r | |
4117 | }\r | |
645fbc69 | 4118 | #ifdef ANALYZE\r |
df24bb50 | 4119 | ANALYZE_NEWLINE ();\r |
1082ecf2 | 4120 | #endif // ANALYZE\r |
df24bb50 | 4121 | }\r |
4122 | else\r | |
77f488bb | 4123 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4124 | {\r |
645fbc69 | 4125 | #ifdef ANALYZE\r |
df24bb50 | 4126 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r |
1082ecf2 | 4127 | #endif // ANALYZE\r |
df24bb50 | 4128 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0 );\r |
6f750020 | 4129 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 4130 | if (! irmp_param2.protocol)\r |
6f750020 | 4131 | #endif\r |
df24bb50 | 4132 | {\r |
645fbc69 | 4133 | #ifdef ANALYZE\r |
df24bb50 | 4134 | ANALYZE_NEWLINE ();\r |
1082ecf2 | 4135 | #endif // ANALYZE\r |
df24bb50 | 4136 | }\r |
4137 | last_value = (irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0;\r | |
4138 | }\r | |
4139 | }\r | |
4140 | }\r | |
4141 | else if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max\r | |
4142 | /* && irmp_pause_time <= 2 * irmp_param.pause_1_len_max */)\r | |
4143 | {\r | |
4144 | uint_fast8_t manchester_value;\r | |
592411d1 | 4145 | \r |
df24bb50 | 4146 | if (last_pause > irmp_param.pause_1_len_max && last_pause <= 2 * irmp_param.pause_1_len_max)\r |
4147 | {\r | |
4148 | manchester_value = last_value ? 0 : 1;\r | |
4149 | last_value = manchester_value;\r | |
4150 | }\r | |
4151 | else\r | |
4152 | {\r | |
4153 | manchester_value = last_value;\r | |
4154 | }\r | |
592411d1 | 4155 | \r |
645fbc69 | 4156 | #ifdef ANALYZE\r |
df24bb50 | 4157 | ANALYZE_PUTCHAR (manchester_value + '0');\r |
1082ecf2 | 4158 | #endif // ANALYZE\r |
c7a47e89 | 4159 | \r |
6f750020 | 4160 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
df24bb50 | 4161 | if (! irmp_param2.protocol)\r |
6f750020 | 4162 | #endif\r |
df24bb50 | 4163 | {\r |
645fbc69 | 4164 | #ifdef ANALYZE\r |
df24bb50 | 4165 | ANALYZE_NEWLINE ();\r |
1082ecf2 | 4166 | #endif // ANALYZE\r |
df24bb50 | 4167 | }\r |
c7a47e89 | 4168 | \r |
4169 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
df24bb50 | 4170 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 1 && manchester_value == 1) // RC6 mode != 0 ???\r |
4171 | {\r | |
4172 | #ifdef ANALYZE\r | |
4173 | ANALYZE_PRINTF ("Switching to RC6A protocol\n");\r | |
4174 | #endif // ANALYZE\r | |
4175 | irmp_param.complete_len = RC6_COMPLETE_DATA_LEN_LONG;\r | |
4176 | irmp_param.address_offset = 5;\r | |
4177 | irmp_param.address_end = irmp_param.address_offset + 15;\r | |
4178 | irmp_param.command_offset = irmp_param.address_end + 1; // skip 1 system bit, changes like a toggle bit\r | |
4179 | irmp_param.command_end = irmp_param.command_offset + 16 - 1;\r | |
4180 | irmp_tmp_address = 0;\r | |
4181 | }\r | |
c7a47e89 | 4182 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
4183 | \r | |
df24bb50 | 4184 | irmp_store_bit (manchester_value);\r |
4185 | }\r | |
4186 | else\r | |
4187 | {\r | |
6f750020 | 4188 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
df24bb50 | 4189 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL &&\r |
4190 | irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX &&\r | |
4191 | ((irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX) ||\r | |
4192 | (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)))\r | |
4193 | {\r | |
645fbc69 | 4194 | #ifdef ANALYZE\r |
df24bb50 | 4195 | ANALYZE_PUTCHAR ('?');\r |
1082ecf2 | 4196 | #endif // ANALYZE\r |
df24bb50 | 4197 | irmp_param.protocol = 0; // switch to FDC, see below\r |
4198 | }\r | |
4199 | else\r | |
6f750020 | 4200 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
4201 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
df24bb50 | 4202 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL &&\r |
4203 | irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX &&\r | |
4204 | ((irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX) ||\r | |
4205 | (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)))\r | |
4206 | {\r | |
645fbc69 | 4207 | #ifdef ANALYZE\r |
df24bb50 | 4208 | ANALYZE_PUTCHAR ('?');\r |
1082ecf2 | 4209 | #endif // ANALYZE\r |
df24bb50 | 4210 | irmp_param.protocol = 0; // switch to RCCAR, see below\r |
4211 | }\r | |
4212 | else\r | |
6f750020 | 4213 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
df24bb50 | 4214 | {\r |
645fbc69 | 4215 | #ifdef ANALYZE\r |
df24bb50 | 4216 | ANALYZE_PUTCHAR ('?');\r |
4217 | ANALYZE_NEWLINE ();\r | |
4218 | ANALYZE_PRINTF ("error 3 manchester: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4219 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1082ecf2 | 4220 | #endif // ANALYZE\r |
df24bb50 | 4221 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
4222 | irmp_pause_time = 0;\r | |
4223 | }\r | |
4224 | }\r | |
6f750020 | 4225 | \r |
4226 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
df24bb50 | 4227 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL && irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX)\r |
4228 | {\r | |
4229 | if (irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX)\r | |
4230 | {\r | |
645fbc69 | 4231 | #ifdef ANALYZE\r |
df24bb50 | 4232 | ANALYZE_PRINTF (" 1 (FDC)\n");\r |
1082ecf2 | 4233 | #endif // ANALYZE\r |
df24bb50 | 4234 | irmp_store_bit2 (1);\r |
4235 | }\r | |
4236 | else if (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)\r | |
4237 | {\r | |
645fbc69 | 4238 | #ifdef ANALYZE\r |
df24bb50 | 4239 | ANALYZE_PRINTF (" 0 (FDC)\n");\r |
1082ecf2 | 4240 | #endif // ANALYZE\r |
df24bb50 | 4241 | irmp_store_bit2 (0);\r |
4242 | }\r | |
6f750020 | 4243 | \r |
df24bb50 | 4244 | if (! irmp_param.protocol)\r |
4245 | {\r | |
645fbc69 | 4246 | #ifdef ANALYZE\r |
df24bb50 | 4247 | ANALYZE_PRINTF ("Switching to FDC protocol\n");\r |
1082ecf2 | 4248 | #endif // ANALYZE\r |
df24bb50 | 4249 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r |
4250 | irmp_param2.protocol = 0;\r | |
4251 | irmp_tmp_address = irmp_tmp_address2;\r | |
4252 | irmp_tmp_command = irmp_tmp_command2;\r | |
4253 | }\r | |
4254 | }\r | |
6f750020 | 4255 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
4256 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
df24bb50 | 4257 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL && irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX)\r |
4258 | {\r | |
4259 | if (irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX)\r | |
4260 | {\r | |
645fbc69 | 4261 | #ifdef ANALYZE\r |
df24bb50 | 4262 | ANALYZE_PRINTF (" 1 (RCCAR)\n");\r |
1082ecf2 | 4263 | #endif // ANALYZE\r |
df24bb50 | 4264 | irmp_store_bit2 (1);\r |
4265 | }\r | |
4266 | else if (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)\r | |
4267 | {\r | |
645fbc69 | 4268 | #ifdef ANALYZE\r |
df24bb50 | 4269 | ANALYZE_PRINTF (" 0 (RCCAR)\n");\r |
1082ecf2 | 4270 | #endif // ANALYZE\r |
df24bb50 | 4271 | irmp_store_bit2 (0);\r |
4272 | }\r | |
6f750020 | 4273 | \r |
df24bb50 | 4274 | if (! irmp_param.protocol)\r |
4275 | {\r | |
645fbc69 | 4276 | #ifdef ANALYZE\r |
df24bb50 | 4277 | ANALYZE_PRINTF ("Switching to RCCAR protocol\n");\r |
1082ecf2 | 4278 | #endif // ANALYZE\r |
df24bb50 | 4279 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r |
4280 | irmp_param2.protocol = 0;\r | |
4281 | irmp_tmp_address = irmp_tmp_address2;\r | |
4282 | irmp_tmp_command = irmp_tmp_command2;\r | |
4283 | }\r | |
4284 | }\r | |
6f750020 | 4285 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
a7054daf | 4286 | \r |
df24bb50 | 4287 | last_pause = irmp_pause_time;\r |
4288 | wait_for_space = 0;\r | |
4289 | }\r | |
4290 | else\r | |
77f488bb | 4291 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
4292 | \r | |
deba2a0a | 4293 | #if IRMP_SUPPORT_SERIAL == 1\r |
df24bb50 | 4294 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r |
4295 | {\r | |
4296 | while (irmp_bit < irmp_param.complete_len && irmp_pulse_time > irmp_param.pulse_1_len_max)\r | |
4297 | {\r | |
4298 | #ifdef ANALYZE\r | |
4299 | ANALYZE_PUTCHAR ('1');\r | |
4300 | #endif // ANALYZE\r | |
4301 | irmp_store_bit (1);\r | |
4302 | \r | |
4303 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min)\r | |
4304 | {\r | |
4305 | irmp_pulse_time -= irmp_param.pulse_1_len_min;\r | |
4306 | }\r | |
4307 | else\r | |
4308 | {\r | |
4309 | irmp_pulse_time = 0;\r | |
4310 | }\r | |
4311 | }\r | |
4312 | \r | |
4313 | while (irmp_bit < irmp_param.complete_len && irmp_pause_time > irmp_param.pause_1_len_max)\r | |
4314 | {\r | |
4315 | #ifdef ANALYZE\r | |
4316 | ANALYZE_PUTCHAR ('0');\r | |
4317 | #endif // ANALYZE\r | |
4318 | irmp_store_bit (0);\r | |
4319 | \r | |
4320 | if (irmp_pause_time >= irmp_param.pause_1_len_min)\r | |
4321 | {\r | |
4322 | irmp_pause_time -= irmp_param.pause_1_len_min;\r | |
4323 | }\r | |
4324 | else\r | |
4325 | {\r | |
4326 | irmp_pause_time = 0;\r | |
4327 | }\r | |
4328 | }\r | |
4329 | #ifdef ANALYZE\r | |
4330 | ANALYZE_NEWLINE ();\r | |
4331 | #endif // ANALYZE\r | |
4332 | wait_for_space = 0;\r | |
4333 | }\r | |
4334 | else\r | |
deba2a0a | 4335 | #endif // IRMP_SUPPORT_SERIAL == 1\r |
a7054daf | 4336 | \r |
4225a882 | 4337 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
df24bb50 | 4338 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit == 16) // Samsung: 16th bit\r |
4339 | {\r | |
4340 | if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX &&\r | |
4341 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
4342 | {\r | |
4343 | #ifdef ANALYZE\r | |
4344 | ANALYZE_PRINTF ("SYNC\n");\r | |
4345 | #endif // ANALYZE\r | |
4346 | wait_for_space = 0;\r | |
4347 | irmp_bit++;\r | |
4348 | }\r | |
4349 | else if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX)\r | |
4350 | {\r | |
956ea3ea | 4351 | #if IRMP_SUPPORT_SAMSUNG48_PROTOCOL == 1\r |
4352 | #ifdef ANALYZE\r | |
df24bb50 | 4353 | ANALYZE_PRINTF ("Switching to SAMSUNG48 protocol ");\r |
956ea3ea | 4354 | #endif // ANALYZE\r |
df24bb50 | 4355 | irmp_param.protocol = IRMP_SAMSUNG48_PROTOCOL;\r |
4356 | irmp_param.command_offset = SAMSUNG48_COMMAND_OFFSET;\r | |
4357 | irmp_param.command_end = SAMSUNG48_COMMAND_OFFSET + SAMSUNG48_COMMAND_LEN;\r | |
4358 | irmp_param.complete_len = SAMSUNG48_COMPLETE_DATA_LEN;\r | |
956ea3ea | 4359 | #else\r |
4360 | #ifdef ANALYZE\r | |
df24bb50 | 4361 | ANALYZE_PRINTF ("Switching to SAMSUNG32 protocol ");\r |
956ea3ea | 4362 | #endif // ANALYZE\r |
df24bb50 | 4363 | irmp_param.protocol = IRMP_SAMSUNG32_PROTOCOL;\r |
4364 | irmp_param.command_offset = SAMSUNG32_COMMAND_OFFSET;\r | |
4365 | irmp_param.command_end = SAMSUNG32_COMMAND_OFFSET + SAMSUNG32_COMMAND_LEN;\r | |
4366 | irmp_param.complete_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
956ea3ea | 4367 | #endif\r |
df24bb50 | 4368 | if (irmp_pause_time >= SAMSUNG_1_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_1_PAUSE_LEN_MAX)\r |
4369 | {\r | |
4370 | #ifdef ANALYZE\r | |
4371 | ANALYZE_PUTCHAR ('1');\r | |
4372 | ANALYZE_NEWLINE ();\r | |
4373 | #endif // ANALYZE\r | |
4374 | irmp_store_bit (1);\r | |
4375 | wait_for_space = 0;\r | |
4376 | }\r | |
4377 | else\r | |
4378 | {\r | |
4379 | #ifdef ANALYZE\r | |
4380 | ANALYZE_PUTCHAR ('0');\r | |
4381 | ANALYZE_NEWLINE ();\r | |
4382 | #endif // ANALYZE\r | |
4383 | irmp_store_bit (0);\r | |
4384 | wait_for_space = 0;\r | |
4385 | }\r | |
4386 | }\r | |
4387 | else\r | |
4388 | { // timing incorrect!\r | |
4389 | #ifdef ANALYZE\r | |
4390 | ANALYZE_PRINTF ("error 3 Samsung: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4391 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4392 | #endif // ANALYZE\r | |
4393 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4394 | irmp_pause_time = 0;\r | |
4395 | }\r | |
4396 | }\r | |
4397 | else\r | |
4225a882 | 4398 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL\r |
4399 | \r | |
fc80d688 | 4400 | #if IRMP_SUPPORT_NEC16_PROTOCOL\r |
35213800 | 4401 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
df24bb50 | 4402 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL &&\r |
35213800 | 4403 | #else // IRMP_SUPPORT_NEC_PROTOCOL instead\r |
df24bb50 | 4404 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL &&\r |
35213800 | 4405 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
df24bb50 | 4406 | irmp_bit == 8 && irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r |
4407 | {\r | |
4408 | #ifdef ANALYZE\r | |
4409 | ANALYZE_PRINTF ("Switching to NEC16 protocol\n");\r | |
4410 | #endif // ANALYZE\r | |
4411 | irmp_param.protocol = IRMP_NEC16_PROTOCOL;\r | |
4412 | irmp_param.address_offset = NEC16_ADDRESS_OFFSET;\r | |
4413 | irmp_param.address_end = NEC16_ADDRESS_OFFSET + NEC16_ADDRESS_LEN;\r | |
4414 | irmp_param.command_offset = NEC16_COMMAND_OFFSET;\r | |
4415 | irmp_param.command_end = NEC16_COMMAND_OFFSET + NEC16_COMMAND_LEN;\r | |
4416 | irmp_param.complete_len = NEC16_COMPLETE_DATA_LEN;\r | |
4417 | wait_for_space = 0;\r | |
4418 | }\r | |
4419 | else\r | |
fc80d688 | 4420 | #endif // IRMP_SUPPORT_NEC16_PROTOCOL\r |
4421 | \r | |
504d9df9 | 4422 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
df24bb50 | 4423 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r |
4424 | {\r | |
4425 | if (irmp_pulse_time >= BANG_OLUFSEN_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_PULSE_LEN_MAX)\r | |
4426 | {\r | |
4427 | if (irmp_bit == 1) // Bang & Olufsen: 3rd bit\r | |
4428 | {\r | |
4429 | if (irmp_pause_time >= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX)\r | |
4430 | {\r | |
4431 | #ifdef ANALYZE\r | |
4432 | ANALYZE_PRINTF ("3rd start bit\n");\r | |
4433 | #endif // ANALYZE\r | |
4434 | wait_for_space = 0;\r | |
4435 | irmp_bit++;\r | |
4436 | }\r | |
4437 | else\r | |
4438 | { // timing incorrect!\r | |
4439 | #ifdef ANALYZE\r | |
4440 | ANALYZE_PRINTF ("error 3a B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4441 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4442 | #endif // ANALYZE\r | |
4443 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4444 | irmp_pause_time = 0;\r | |
4445 | }\r | |
4446 | }\r | |
4447 | else if (irmp_bit == 19) // Bang & Olufsen: trailer bit\r | |
4448 | {\r | |
4449 | if (irmp_pause_time >= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX)\r | |
4450 | {\r | |
4451 | #ifdef ANALYZE\r | |
4452 | ANALYZE_PRINTF ("trailer bit\n");\r | |
4453 | #endif // ANALYZE\r | |
4454 | wait_for_space = 0;\r | |
4455 | irmp_bit++;\r | |
4456 | }\r | |
4457 | else\r | |
4458 | { // timing incorrect!\r | |
4459 | #ifdef ANALYZE\r | |
4460 | ANALYZE_PRINTF ("error 3b B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4461 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4462 | #endif // ANALYZE\r | |
4463 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4464 | irmp_pause_time = 0;\r | |
4465 | }\r | |
4466 | }\r | |
4467 | else\r | |
4468 | {\r | |
4469 | if (irmp_pause_time >= BANG_OLUFSEN_1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_1_PAUSE_LEN_MAX)\r | |
4470 | { // pulse & pause timings correct for "1"?\r | |
4471 | #ifdef ANALYZE\r | |
4472 | ANALYZE_PUTCHAR ('1');\r | |
4473 | ANALYZE_NEWLINE ();\r | |
4474 | #endif // ANALYZE\r | |
4475 | irmp_store_bit (1);\r | |
4476 | last_value = 1;\r | |
4477 | wait_for_space = 0;\r | |
4478 | }\r | |
4479 | else if (irmp_pause_time >= BANG_OLUFSEN_0_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_0_PAUSE_LEN_MAX)\r | |
4480 | { // pulse & pause timings correct for "0"?\r | |
4481 | #ifdef ANALYZE\r | |
4482 | ANALYZE_PUTCHAR ('0');\r | |
4483 | ANALYZE_NEWLINE ();\r | |
4484 | #endif // ANALYZE\r | |
4485 | irmp_store_bit (0);\r | |
4486 | last_value = 0;\r | |
4487 | wait_for_space = 0;\r | |
4488 | }\r | |
4489 | else if (irmp_pause_time >= BANG_OLUFSEN_R_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_R_PAUSE_LEN_MAX)\r | |
4490 | {\r | |
4491 | #ifdef ANALYZE\r | |
4492 | ANALYZE_PUTCHAR (last_value + '0');\r | |
4493 | ANALYZE_NEWLINE ();\r | |
4494 | #endif // ANALYZE\r | |
4495 | irmp_store_bit (last_value);\r | |
4496 | wait_for_space = 0;\r | |
4497 | }\r | |
4498 | else\r | |
4499 | { // timing incorrect!\r | |
4500 | #ifdef ANALYZE\r | |
4501 | ANALYZE_PRINTF ("error 3c B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4502 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4503 | #endif // ANALYZE\r | |
4504 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4505 | irmp_pause_time = 0;\r | |
4506 | }\r | |
4507 | }\r | |
4508 | }\r | |
4509 | else\r | |
4510 | { // timing incorrect!\r | |
4511 | #ifdef ANALYZE\r | |
4512 | ANALYZE_PRINTF ("error 3d B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4513 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4514 | #endif // ANALYZE\r | |
4515 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4516 | irmp_pause_time = 0;\r | |
4517 | }\r | |
4518 | }\r | |
4519 | else\r | |
504d9df9 | 4520 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL\r |
4521 | \r | |
cb93f9e9 | 4522 | #if IRMP_SUPPORT_RCMM_PROTOCOL == 1\r |
df24bb50 | 4523 | if (irmp_param.protocol == IRMP_RCMM32_PROTOCOL)\r |
4524 | {\r | |
4525 | if (irmp_pause_time >= RCMM32_BIT_00_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_00_PAUSE_LEN_MAX)\r | |
4526 | {\r | |
4527 | #ifdef ANALYZE\r | |
4528 | ANALYZE_PUTCHAR ('0');\r | |
4529 | ANALYZE_PUTCHAR ('0');\r | |
4530 | #endif // ANALYZE\r | |
4531 | irmp_store_bit (0);\r | |
4532 | irmp_store_bit (0);\r | |
4533 | }\r | |
4534 | else if (irmp_pause_time >= RCMM32_BIT_01_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_01_PAUSE_LEN_MAX)\r | |
4535 | {\r | |
4536 | #ifdef ANALYZE\r | |
4537 | ANALYZE_PUTCHAR ('0');\r | |
4538 | ANALYZE_PUTCHAR ('1');\r | |
4539 | #endif // ANALYZE\r | |
4540 | irmp_store_bit (0);\r | |
4541 | irmp_store_bit (1);\r | |
4542 | }\r | |
4543 | else if (irmp_pause_time >= RCMM32_BIT_10_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_10_PAUSE_LEN_MAX)\r | |
4544 | {\r | |
4545 | #ifdef ANALYZE\r | |
4546 | ANALYZE_PUTCHAR ('1');\r | |
4547 | ANALYZE_PUTCHAR ('0');\r | |
4548 | #endif // ANALYZE\r | |
4549 | irmp_store_bit (1);\r | |
4550 | irmp_store_bit (0);\r | |
4551 | }\r | |
4552 | else if (irmp_pause_time >= RCMM32_BIT_11_PAUSE_LEN_MIN && irmp_pause_time <= RCMM32_BIT_11_PAUSE_LEN_MAX)\r | |
4553 | {\r | |
4554 | #ifdef ANALYZE\r | |
4555 | ANALYZE_PUTCHAR ('1');\r | |
4556 | ANALYZE_PUTCHAR ('1');\r | |
4557 | #endif // ANALYZE\r | |
4558 | irmp_store_bit (1);\r | |
4559 | irmp_store_bit (1);\r | |
4560 | }\r | |
4561 | #ifdef ANALYZE\r | |
4562 | ANALYZE_PRINTF ("\n");\r | |
4563 | #endif // ANALYZE\r | |
4564 | wait_for_space = 0;\r | |
4565 | }\r | |
4566 | else\r | |
cb93f9e9 | 4567 | #endif\r |
0834784c | 4568 | \r |
df24bb50 | 4569 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max &&\r |
4570 | irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
4571 | { // pulse & pause timings correct for "1"?\r | |
645fbc69 | 4572 | #ifdef ANALYZE\r |
df24bb50 | 4573 | ANALYZE_PUTCHAR ('1');\r |
4574 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 4575 | #endif // ANALYZE\r |
df24bb50 | 4576 | irmp_store_bit (1);\r |
4577 | wait_for_space = 0;\r | |
4578 | }\r | |
4579 | else if (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max &&\r | |
4580 | irmp_pause_time >= irmp_param.pause_0_len_min && irmp_pause_time <= irmp_param.pause_0_len_max)\r | |
4581 | { // pulse & pause timings correct for "0"?\r | |
645fbc69 | 4582 | #ifdef ANALYZE\r |
df24bb50 | 4583 | ANALYZE_PUTCHAR ('0');\r |
4584 | ANALYZE_NEWLINE ();\r | |
1082ecf2 | 4585 | #endif // ANALYZE\r |
df24bb50 | 4586 | irmp_store_bit (0);\r |
4587 | wait_for_space = 0;\r | |
4588 | }\r | |
4589 | else\r | |
111d6191 | 4590 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL\r |
4591 | \r | |
df24bb50 | 4592 | if (irmp_param.protocol == IRMP_KATHREIN_PROTOCOL &&\r |
4593 | irmp_pulse_time >= KATHREIN_1_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_1_PULSE_LEN_MAX &&\r | |
4594 | (((irmp_bit == 8 || irmp_bit == 6) &&\r | |
4595 | irmp_pause_time >= KATHREIN_SYNC_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_SYNC_BIT_PAUSE_LEN_MAX) ||\r | |
4596 | (irmp_bit == 12 &&\r | |
4597 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)))\r | |
4598 | \r | |
4599 | {\r | |
4600 | if (irmp_bit == 8)\r | |
4601 | {\r | |
4602 | irmp_bit++;\r | |
4603 | #ifdef ANALYZE\r | |
4604 | ANALYZE_PUTCHAR ('S');\r | |
4605 | ANALYZE_NEWLINE ();\r | |
4606 | #endif // ANALYZE\r | |
4607 | irmp_tmp_command <<= 1;\r | |
4608 | }\r | |
4609 | else\r | |
4610 | {\r | |
4611 | #ifdef ANALYZE\r | |
4612 | ANALYZE_PUTCHAR ('S');\r | |
4613 | ANALYZE_NEWLINE ();\r | |
4614 | #endif // ANALYZE\r | |
4615 | irmp_store_bit (1);\r | |
4616 | }\r | |
4617 | wait_for_space = 0;\r | |
4618 | }\r | |
4619 | else\r | |
111d6191 | 4620 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL\r |
df24bb50 | 4621 | { // timing incorrect!\r |
4622 | #ifdef ANALYZE\r | |
4623 | ANALYZE_PRINTF ("error 3: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r | |
4624 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4625 | #endif // ANALYZE\r | |
4626 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r | |
4627 | irmp_pause_time = 0;\r | |
4628 | }\r | |
4629 | \r | |
4630 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
4631 | }\r | |
4632 | }\r | |
4633 | else\r | |
4634 | { // counting the pulse length ...\r | |
4635 | if (! irmp_input) // still light?\r | |
4636 | { // yes...\r | |
4637 | irmp_pulse_time++; // increment counter\r | |
4638 | }\r | |
4639 | else\r | |
4640 | { // now it's dark!\r | |
4641 | wait_for_space = 1; // let's count the time (see above)\r | |
4642 | irmp_pause_time = 1; // set pause counter to 1, not 0\r | |
4643 | }\r | |
4644 | }\r | |
4645 | \r | |
4646 | if (irmp_start_bit_detected && irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 0) // enough bits received?\r | |
4647 | {\r | |
4648 | if (last_irmp_command == irmp_tmp_command && key_repetition_len < AUTO_FRAME_REPETITION_LEN)\r | |
4649 | {\r | |
4650 | repetition_frame_number++;\r | |
4651 | }\r | |
4652 | else\r | |
4653 | {\r | |
4654 | repetition_frame_number = 0;\r | |
4655 | }\r | |
592411d1 | 4656 | \r |
4657 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
df24bb50 | 4658 | // if SIRCS protocol and the code will be repeated within 50 ms, we will ignore 2nd and 3rd repetition frame\r |
4659 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && (repetition_frame_number == 1 || repetition_frame_number == 2))\r | |
4660 | {\r | |
645fbc69 | 4661 | #ifdef ANALYZE\r |
df24bb50 | 4662 | ANALYZE_PRINTF ("code skipped: SIRCS auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4663 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4664 | #endif // ANALYZE\r |
df24bb50 | 4665 | key_repetition_len = 0;\r |
4666 | }\r | |
4667 | else\r | |
592411d1 | 4668 | #endif\r |
4669 | \r | |
40ca4604 | 4670 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
df24bb50 | 4671 | // if ORTEK protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r |
4672 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL && repetition_frame_number == 1)\r | |
4673 | {\r | |
645fbc69 | 4674 | #ifdef ANALYZE\r |
df24bb50 | 4675 | ANALYZE_PRINTF ("code skipped: ORTEK auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4676 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4677 | #endif // ANALYZE\r |
df24bb50 | 4678 | key_repetition_len = 0;\r |
4679 | }\r | |
4680 | else\r | |
40ca4604 | 4681 | #endif\r |
4682 | \r | |
173b00a6 | 4683 | #if 0 && IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1 // fm 2015-12-02: don't ignore every 2nd frame\r |
df24bb50 | 4684 | // if KASEIKYO protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r |
4685 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && repetition_frame_number == 1)\r | |
4686 | {\r | |
645fbc69 | 4687 | #ifdef ANALYZE\r |
df24bb50 | 4688 | ANALYZE_PRINTF ("code skipped: KASEIKYO auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4689 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4690 | #endif // ANALYZE\r |
df24bb50 | 4691 | key_repetition_len = 0;\r |
4692 | }\r | |
4693 | else\r | |
770a1a9d | 4694 | #endif\r |
4695 | \r | |
173b00a6 | 4696 | #if 0 && IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1 // fm 2015-12-02: don't ignore every 2nd frame\r |
df24bb50 | 4697 | // if SAMSUNG32 or SAMSUNG48 protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r |
4698 | if ((irmp_param.protocol == IRMP_SAMSUNG32_PROTOCOL || irmp_param.protocol == IRMP_SAMSUNG48_PROTOCOL) && (repetition_frame_number & 0x01))\r | |
4699 | {\r | |
645fbc69 | 4700 | #ifdef ANALYZE\r |
df24bb50 | 4701 | ANALYZE_PRINTF ("code skipped: SAMSUNG32/SAMSUNG48 auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4702 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4703 | #endif // ANALYZE\r |
df24bb50 | 4704 | key_repetition_len = 0;\r |
4705 | }\r | |
4706 | else\r | |
592411d1 | 4707 | #endif\r |
4708 | \r | |
4709 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
df24bb50 | 4710 | // if NUBERT protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r |
4711 | if (irmp_param.protocol == IRMP_NUBERT_PROTOCOL && (repetition_frame_number & 0x01))\r | |
4712 | {\r | |
645fbc69 | 4713 | #ifdef ANALYZE\r |
df24bb50 | 4714 | ANALYZE_PRINTF ("code skipped: NUBERT auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4715 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4716 | #endif // ANALYZE\r |
df24bb50 | 4717 | key_repetition_len = 0;\r |
4718 | }\r | |
4719 | else\r | |
592411d1 | 4720 | #endif\r |
4721 | \r | |
0a2f634b | 4722 | #if IRMP_SUPPORT_SPEAKER_PROTOCOL == 1\r |
df24bb50 | 4723 | // if SPEAKER protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r |
4724 | if (irmp_param.protocol == IRMP_SPEAKER_PROTOCOL && (repetition_frame_number & 0x01))\r | |
4725 | {\r | |
645fbc69 | 4726 | #ifdef ANALYZE\r |
df24bb50 | 4727 | ANALYZE_PRINTF ("code skipped: SPEAKER auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
4728 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
1082ecf2 | 4729 | #endif // ANALYZE\r |
df24bb50 | 4730 | key_repetition_len = 0;\r |
4731 | }\r | |
4732 | else\r | |
0a2f634b | 4733 | #endif\r |
4734 | \r | |
df24bb50 | 4735 | {\r |
645fbc69 | 4736 | #ifdef ANALYZE\r |
df24bb50 | 4737 | ANALYZE_PRINTF ("%8.3fms code detected, length = %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit);\r |
1082ecf2 | 4738 | #endif // ANALYZE\r |
df24bb50 | 4739 | irmp_ir_detected = TRUE;\r |
4225a882 | 4740 | \r |
4741 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
df24bb50 | 4742 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r |
4743 | { // check for repetition frame\r | |
4744 | if ((~irmp_tmp_command & 0x3FF) == last_irmp_denon_command) // command bits must be inverted\r | |
4745 | {\r | |
4746 | irmp_tmp_command = last_irmp_denon_command; // use command received before!\r | |
4747 | last_irmp_denon_command = 0;\r | |
4748 | \r | |
4749 | irmp_protocol = irmp_param.protocol; // store protocol\r | |
4750 | irmp_address = irmp_tmp_address; // store address\r | |
4751 | irmp_command = irmp_tmp_command; // store command\r | |
4752 | }\r | |
4753 | else\r | |
4754 | {\r | |
4755 | if ((irmp_tmp_command & 0x01) == 0x00)\r | |
4756 | {\r | |
4757 | #ifdef ANALYZE\r | |
4758 | ANALYZE_PRINTF ("%8.3fms info Denon: waiting for inverted command repetition\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
4759 | #endif // ANALYZE\r | |
4760 | last_irmp_denon_command = irmp_tmp_command;\r | |
4761 | denon_repetition_len = 0;\r | |
4762 | irmp_ir_detected = FALSE;\r | |
4763 | }\r | |
4764 | else\r | |
4765 | {\r | |
4766 | #ifdef ANALYZE\r | |
4767 | ANALYZE_PRINTF ("%8.3fms warning Denon: got unexpected inverted command, ignoring it\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r | |
4768 | #endif // ANALYZE\r | |
4769 | last_irmp_denon_command = 0;\r | |
4770 | irmp_ir_detected = FALSE;\r | |
4771 | }\r | |
4772 | }\r | |
4773 | }\r | |
4774 | else\r | |
4225a882 | 4775 | #endif // IRMP_SUPPORT_DENON_PROTOCOL\r |
592411d1 | 4776 | \r |
4777 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
df24bb50 | 4778 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && irmp_tmp_command == 0x01ff)\r |
4779 | { // Grundig start frame?\r | |
645fbc69 | 4780 | #ifdef ANALYZE\r |
df24bb50 | 4781 | ANALYZE_PRINTF ("Detected GRUNDIG start frame, ignoring it\n");\r |
1082ecf2 | 4782 | #endif // ANALYZE\r |
df24bb50 | 4783 | irmp_ir_detected = FALSE;\r |
4784 | }\r | |
4785 | else\r | |
d155e9ab | 4786 | #endif // IRMP_SUPPORT_GRUNDIG_PROTOCOL\r |
4787 | \r | |
4788 | #if IRMP_SUPPORT_NOKIA_PROTOCOL == 1\r | |
df24bb50 | 4789 | if (irmp_param.protocol == IRMP_NOKIA_PROTOCOL && irmp_tmp_address == 0x00ff && irmp_tmp_command == 0x00fe)\r |
4790 | { // Nokia start frame?\r | |
645fbc69 | 4791 | #ifdef ANALYZE\r |
df24bb50 | 4792 | ANALYZE_PRINTF ("Detected NOKIA start frame, ignoring it\n");\r |
1082ecf2 | 4793 | #endif // ANALYZE\r |
df24bb50 | 4794 | irmp_ir_detected = FALSE;\r |
4795 | }\r | |
4796 | else\r | |
d155e9ab | 4797 | #endif // IRMP_SUPPORT_NOKIA_PROTOCOL\r |
df24bb50 | 4798 | {\r |
cb8474cc | 4799 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 4800 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL && irmp_bit == 0) // repetition frame\r |
4801 | {\r | |
4802 | if (key_repetition_len < NEC_FRAME_REPEAT_PAUSE_LEN_MAX)\r | |
4803 | {\r | |
4804 | #ifdef ANALYZE\r | |
4805 | ANALYZE_PRINTF ("Detected NEC repetition frame, key_repetition_len = %d\n", key_repetition_len);\r | |
4806 | ANALYZE_ONLY_NORMAL_PRINTF("REPETETION FRAME ");\r | |
4807 | #endif // ANALYZE\r | |
4808 | irmp_tmp_address = last_irmp_address; // address is last address\r | |
4809 | irmp_tmp_command = last_irmp_command; // command is last command\r | |
4810 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
4811 | key_repetition_len = 0;\r | |
4812 | }\r | |
4813 | else\r | |
4814 | {\r | |
4815 | #ifdef ANALYZE\r | |
4816 | ANALYZE_PRINTF ("Detected NEC repetition frame, ignoring it: timeout occured, key_repetition_len = %d > %d\n",\r | |
4817 | key_repetition_len, NEC_FRAME_REPEAT_PAUSE_LEN_MAX);\r | |
4818 | #endif // ANALYZE\r | |
4819 | irmp_ir_detected = FALSE;\r | |
4820 | }\r | |
4821 | }\r | |
4225a882 | 4822 | #endif // IRMP_SUPPORT_NEC_PROTOCOL\r |
770a1a9d | 4823 | \r |
4824 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
df24bb50 | 4825 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r |
4826 | {\r | |
4827 | uint_fast8_t xor_value;\r | |
770a1a9d | 4828 | \r |
df24bb50 | 4829 | xor_value = (xor_check[0] & 0x0F) ^ ((xor_check[0] & 0xF0) >> 4) ^ (xor_check[1] & 0x0F) ^ ((xor_check[1] & 0xF0) >> 4);\r |
770a1a9d | 4830 | \r |
df24bb50 | 4831 | if (xor_value != (xor_check[2] & 0x0F))\r |
4832 | {\r | |
645fbc69 | 4833 | #ifdef ANALYZE\r |
df24bb50 | 4834 | ANALYZE_PRINTF ("error 4: wrong XOR check for customer id: 0x%1x 0x%1x\n", xor_value, xor_check[2] & 0x0F);\r |
1082ecf2 | 4835 | #endif // ANALYZE\r |
df24bb50 | 4836 | irmp_ir_detected = FALSE;\r |
4837 | }\r | |
770a1a9d | 4838 | \r |
df24bb50 | 4839 | xor_value = xor_check[2] ^ xor_check[3] ^ xor_check[4];\r |
770a1a9d | 4840 | \r |
df24bb50 | 4841 | if (xor_value != xor_check[5])\r |
4842 | {\r | |
645fbc69 | 4843 | #ifdef ANALYZE\r |
df24bb50 | 4844 | ANALYZE_PRINTF ("error 5: wrong XOR check for data bits: 0x%02x 0x%02x\n", xor_value, xor_check[5]);\r |
1082ecf2 | 4845 | #endif // ANALYZE\r |
df24bb50 | 4846 | irmp_ir_detected = FALSE;\r |
4847 | }\r | |
0f700c8e | 4848 | \r |
df24bb50 | 4849 | irmp_flags |= genre2; // write the genre2 bits into MSB of the flag byte\r |
4850 | }\r | |
770a1a9d | 4851 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
4852 | \r | |
40ca4604 | 4853 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
df24bb50 | 4854 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r |
4855 | {\r | |
4856 | if (parity == PARITY_CHECK_FAILED)\r | |
4857 | {\r | |
645fbc69 | 4858 | #ifdef ANALYZE\r |
df24bb50 | 4859 | ANALYZE_PRINTF ("error 6: parity check failed\n");\r |
1082ecf2 | 4860 | #endif // ANALYZE\r |
df24bb50 | 4861 | irmp_ir_detected = FALSE;\r |
4862 | }\r | |
40ca4604 | 4863 | \r |
df24bb50 | 4864 | if ((irmp_tmp_address & 0x03) == 0x02)\r |
4865 | {\r | |
645fbc69 | 4866 | #ifdef ANALYZE\r |
df24bb50 | 4867 | ANALYZE_PRINTF ("code skipped: ORTEK end of transmission frame (key release)\n");\r |
1082ecf2 | 4868 | #endif // ANALYZE\r |
df24bb50 | 4869 | irmp_ir_detected = FALSE;\r |
4870 | }\r | |
4871 | irmp_tmp_address >>= 2;\r | |
4872 | }\r | |
40ca4604 | 4873 | #endif // IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
4874 | \r | |
7365350c | 4875 | #if IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL == 1\r |
4876 | if (irmp_param.protocol == IRMP_MITSU_HEAVY_PROTOCOL)\r | |
4877 | {\r | |
4878 | check = irmp_tmp_command >> 8; // inverted upper byte == lower byte?\r | |
4879 | check = ~ check;\r | |
4880 | if (check == (irmp_tmp_command & 0xFF)) { //ok:\r | |
4881 | irmp_tmp_command &= 0xFF;\r | |
4882 | }\r | |
4883 | else mitsu_parity = PARITY_CHECK_FAILED;\r | |
4884 | if (mitsu_parity == PARITY_CHECK_FAILED)\r | |
4885 | {\r | |
4886 | #ifdef ANALYZE\r | |
4887 | ANALYZE_PRINTF ("error 7: parity check failed\n");\r | |
4888 | #endif // ANALYZE\r | |
4889 | irmp_ir_detected = FALSE;\r | |
4890 | }\r | |
4891 | }\r | |
4892 | #endif // IRMP_SUPPORT_MITSU_HEAVY_PROTOCOL\r | |
4893 | \r | |
c7a47e89 | 4894 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4895 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode = 6?\r |
4896 | {\r | |
4897 | irmp_protocol = IRMP_RC6A_PROTOCOL;\r | |
4898 | }\r | |
4899 | else\r | |
c7a47e89 | 4900 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
df24bb50 | 4901 | {\r |
4902 | irmp_protocol = irmp_param.protocol;\r | |
4903 | }\r | |
d823e852 | 4904 | \r |
4905 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
df24bb50 | 4906 | if (irmp_param.protocol == IRMP_FDC_PROTOCOL)\r |
4907 | {\r | |
4908 | if (irmp_tmp_command & 0x000F) // released key?\r | |
4909 | {\r | |
4910 | irmp_tmp_command = (irmp_tmp_command >> 4) | 0x80; // yes, set bit 7\r | |
4911 | }\r | |
4912 | else\r | |
4913 | {\r | |
4914 | irmp_tmp_command >>= 4; // no, it's a pressed key\r | |
4915 | }\r | |
4916 | irmp_tmp_command |= (irmp_tmp_address << 2) & 0x0F00; // 000000CCCCAAAAAA -> 0000CCCC00000000\r | |
4917 | irmp_tmp_address &= 0x003F;\r | |
4918 | }\r | |
d823e852 | 4919 | #endif\r |
4920 | \r | |
df24bb50 | 4921 | irmp_address = irmp_tmp_address; // store address\r |
4225a882 | 4922 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
df24bb50 | 4923 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL)\r |
4924 | {\r | |
4925 | last_irmp_address = irmp_tmp_address; // store as last address, too\r | |
4926 | }\r | |
4225a882 | 4927 | #endif\r |
4928 | \r | |
4929 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
df24bb50 | 4930 | if (irmp_param.protocol == IRMP_RC5_PROTOCOL)\r |
4931 | {\r | |
4932 | irmp_tmp_command |= rc5_cmd_bit6; // store bit 6\r | |
4933 | }\r | |
c2b70f0b | 4934 | #endif\r |
4935 | #if IRMP_SUPPORT_S100_PROTOCOL == 1\r | |
df24bb50 | 4936 | if (irmp_param.protocol == IRMP_S100_PROTOCOL)\r |
4937 | {\r | |
4938 | irmp_tmp_command |= rc5_cmd_bit6; // store bit 6\r | |
4939 | }\r | |
4225a882 | 4940 | #endif\r |
df24bb50 | 4941 | irmp_command = irmp_tmp_command; // store command\r |
4225a882 | 4942 | \r |
4943 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
df24bb50 | 4944 | irmp_id = irmp_tmp_id;\r |
4225a882 | 4945 | #endif\r |
df24bb50 | 4946 | }\r |
4947 | }\r | |
4225a882 | 4948 | \r |
df24bb50 | 4949 | if (irmp_ir_detected)\r |
4950 | {\r | |
4951 | if (last_irmp_command == irmp_tmp_command &&\r | |
4952 | last_irmp_address == irmp_tmp_address &&\r | |
4953 | key_repetition_len < IRMP_KEY_REPETITION_LEN)\r | |
4954 | {\r | |
4955 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
4956 | }\r | |
4225a882 | 4957 | \r |
df24bb50 | 4958 | last_irmp_address = irmp_tmp_address; // store as last address, too\r |
4959 | last_irmp_command = irmp_tmp_command; // store as last command, too\r | |
4225a882 | 4960 | \r |
df24bb50 | 4961 | key_repetition_len = 0;\r |
4962 | }\r | |
4963 | else\r | |
4964 | {\r | |
645fbc69 | 4965 | #ifdef ANALYZE\r |
df24bb50 | 4966 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r |
1082ecf2 | 4967 | #endif // ANALYZE\r |
df24bb50 | 4968 | }\r |
4225a882 | 4969 | \r |
df24bb50 | 4970 | irmp_start_bit_detected = 0; // and wait for next start bit\r |
4971 | irmp_tmp_command = 0;\r | |
4972 | irmp_pulse_time = 0;\r | |
4973 | irmp_pause_time = 0;\r | |
770a1a9d | 4974 | \r |
4975 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
df24bb50 | 4976 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // the stop bit of JVC frame is also start bit of next frame\r |
4977 | { // set pulse time here!\r | |
4978 | irmp_pulse_time = ((uint_fast8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME));\r | |
4979 | }\r | |
770a1a9d | 4980 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
df24bb50 | 4981 | }\r |
4982 | }\r | |
4225a882 | 4983 | }\r |
afd1e690 | 4984 | \r |
4985 | #if defined(STELLARIS_ARM_CORTEX_M4)\r | |
4986 | // Clear the timer interrupt\r | |
4987 | TimerIntClear(TIMER1_BASE, TIMER_TIMA_TIMEOUT);\r | |
4988 | #endif\r | |
4989 | \r | |
879b06c2 | 4990 | return (irmp_ir_detected);\r |
4225a882 | 4991 | }\r |
4992 | \r | |
48664931 | 4993 | #ifdef ANALYZE\r |
4225a882 | 4994 | \r |
2eab5ec9 | 4995 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
4996 | * main functions - for Unix/Linux + Windows only!\r | |
4997 | *\r | |
4998 | * AVR: see main.c!\r | |
4999 | *\r | |
5000 | * Compile it under linux with:\r | |
5001 | * cc irmp.c -o irmp\r | |
5002 | *\r | |
95b27043 | 5003 | * usage: ./irmp [-v|-s|-a|-l] < file\r |
2eab5ec9 | 5004 | *\r |
5005 | * options:\r | |
5006 | * -v verbose\r | |
5007 | * -s silent\r | |
5008 | * -a analyze\r | |
5009 | * -l list pulse/pauses\r | |
2eab5ec9 | 5010 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
5011 | */\r | |
4225a882 | 5012 | \r |
77f488bb | 5013 | void\r |
48664931 | 5014 | print_spectrum (char * text, int * buf, int is_pulse)\r |
77f488bb | 5015 | {\r |
5016 | int i;\r | |
5017 | int j;\r | |
48664931 | 5018 | int min;\r |
5019 | int max;\r | |
5020 | int max_value = 0;\r | |
77f488bb | 5021 | int value;\r |
5022 | int sum = 0;\r | |
5023 | int counter = 0;\r | |
5024 | double average = 0;\r | |
48664931 | 5025 | double tolerance;\r |
77f488bb | 5026 | \r |
43c535be | 5027 | puts ("-----------------------------------------------------------------------------");\r |
77f488bb | 5028 | printf ("%s:\n", text);\r |
5029 | \r | |
5030 | for (i = 0; i < 256; i++)\r | |
5031 | {\r | |
df24bb50 | 5032 | if (buf[i] > max_value)\r |
5033 | {\r | |
5034 | max_value = buf[i];\r | |
5035 | }\r | |
77f488bb | 5036 | }\r |
5037 | \r | |
faf6479d | 5038 | for (i = 1; i < 200; i++)\r |
77f488bb | 5039 | {\r |
df24bb50 | 5040 | if (buf[i] > 0)\r |
5041 | {\r | |
5042 | printf ("%3d ", i);\r | |
5043 | value = (buf[i] * 60) / max_value;\r | |
5044 | \r | |
5045 | for (j = 0; j < value; j++)\r | |
5046 | {\r | |
5047 | putchar ('o');\r | |
5048 | }\r | |
5049 | printf (" %d\n", buf[i]);\r | |
5050 | \r | |
5051 | sum += i * buf[i];\r | |
5052 | counter += buf[i];\r | |
5053 | }\r | |
5054 | else\r | |
5055 | {\r | |
5056 | max = i - 1;\r | |
5057 | \r | |
5058 | if (counter > 0)\r | |
5059 | {\r | |
5060 | average = (float) sum / (float) counter;\r | |
5061 | \r | |
5062 | if (is_pulse)\r | |
5063 | {\r | |
5064 | printf ("pulse ");\r | |
5065 | }\r | |
5066 | else\r | |
5067 | {\r | |
5068 | printf ("pause ");\r | |
5069 | }\r | |
5070 | \r | |
5071 | printf ("avg: %4.1f=%6.1f us, ", average, (1000000. * average) / (float) F_INTERRUPTS);\r | |
5072 | printf ("min: %2d=%6.1f us, ", min, (1000000. * min) / (float) F_INTERRUPTS);\r | |
5073 | printf ("max: %2d=%6.1f us, ", max, (1000000. * max) / (float) F_INTERRUPTS);\r | |
5074 | \r | |
5075 | tolerance = (max - average);\r | |
5076 | \r | |
5077 | if (average - min > tolerance)\r | |
5078 | {\r | |
5079 | tolerance = average - min;\r | |
5080 | }\r | |
5081 | \r | |
5082 | tolerance = tolerance * 100 / average;\r | |
5083 | printf ("tol: %4.1f%%\n", tolerance);\r | |
5084 | }\r | |
5085 | \r | |
5086 | counter = 0;\r | |
5087 | sum = 0;\r | |
5088 | min = i + 1;\r | |
5089 | }\r | |
77f488bb | 5090 | }\r |
5091 | }\r | |
5092 | \r | |
d823e852 | 5093 | #define STATE_LEFT_SHIFT 0x01\r |
5094 | #define STATE_RIGHT_SHIFT 0x02\r | |
5095 | #define STATE_LEFT_CTRL 0x04\r | |
5096 | #define STATE_LEFT_ALT 0x08\r | |
5097 | #define STATE_RIGHT_ALT 0x10\r | |
5098 | \r | |
5099 | #define KEY_ESCAPE 0x1B // keycode = 0x006e\r | |
5100 | #define KEY_MENUE 0x80 // keycode = 0x0070\r | |
5101 | #define KEY_BACK 0x81 // keycode = 0x0071\r | |
5102 | #define KEY_FORWARD 0x82 // keycode = 0x0072\r | |
5103 | #define KEY_ADDRESS 0x83 // keycode = 0x0073\r | |
5104 | #define KEY_WINDOW 0x84 // keycode = 0x0074\r | |
5105 | #define KEY_1ST_PAGE 0x85 // keycode = 0x0075\r | |
5106 | #define KEY_STOP 0x86 // keycode = 0x0076\r | |
5107 | #define KEY_MAIL 0x87 // keycode = 0x0077\r | |
5108 | #define KEY_FAVORITES 0x88 // keycode = 0x0078\r | |
c6ade1d2 | 5109 | #define KEY_NEW_PAGE 0x89 // keycode = 0x0079\r |
5110 | #define KEY_SETUP 0x8A // keycode = 0x007a\r | |
5111 | #define KEY_FONT 0x8B // keycode = 0x007b\r | |
5112 | #define KEY_PRINT 0x8C // keycode = 0x007c\r | |
5113 | #define KEY_ON_OFF 0x8E // keycode = 0x007c\r | |
5114 | \r | |
5115 | #define KEY_INSERT 0x90 // keycode = 0x004b\r | |
5116 | #define KEY_DELETE 0x91 // keycode = 0x004c\r | |
5117 | #define KEY_LEFT 0x92 // keycode = 0x004f\r | |
5118 | #define KEY_HOME 0x93 // keycode = 0x0050\r | |
5119 | #define KEY_END 0x94 // keycode = 0x0051\r | |
5120 | #define KEY_UP 0x95 // keycode = 0x0053\r | |
5121 | #define KEY_DOWN 0x96 // keycode = 0x0054\r | |
5122 | #define KEY_PAGE_UP 0x97 // keycode = 0x0055\r | |
5123 | #define KEY_PAGE_DOWN 0x98 // keycode = 0x0056\r | |
5124 | #define KEY_RIGHT 0x99 // keycode = 0x0059\r | |
5125 | #define KEY_MOUSE_1 0x9E // keycode = 0x0400\r | |
5126 | #define KEY_MOUSE_2 0x9F // keycode = 0x0800\r | |
d823e852 | 5127 | \r |
0834784c | 5128 | static uint_fast8_t\r |
5129 | get_fdc_key (uint_fast16_t cmd)\r | |
d823e852 | 5130 | {\r |
5131 | static uint8_t key_table[128] =\r | |
5132 | {\r | |
7365350c | 5133 | // 0 1 2 3 4 5 6 7 8 9 A B C D E F\r |
5134 | Content-type: text/html ]>