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1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 2 | * irmp.h\r |
| 3 | *\r |
| 4 | * Copyright (c) 2009-2010 Frank Meyer - frank(at)fli4l.de\r |
| 5 | *\r |
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6 | * $Id: irmp.h,v 1.31 2010/06/12 20:29:44 fm Exp $\r |
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7 | *\r |
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8 | * ATMEGA88 @ 8 MHz\r |
| 9 | *\r |
| 10 | * This program is free software; you can redistribute it and/or modify\r |
| 11 | * it under the terms of the GNU General Public License as published by\r |
| 12 | * the Free Software Foundation; either version 2 of the License, or\r |
| 13 | * (at your option) any later version.\r |
| 14 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 15 | */\r |
| 16 | \r |
| 17 | #ifndef _WC_IRMP_H_\r |
| 18 | #define _WC_IRMP_H_\r |
| 19 | \r |
| 20 | #ifdef __cplusplus\r |
| 21 | extern "C"\r |
| 22 | {\r |
| 23 | #endif\r |
| 24 | \r |
| 25 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
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26 | * IR protocols\r |
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27 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| 28 | */\r |
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29 | #define IRMP_SIRCS_PROTOCOL 1 // Sony\r |
| 30 | #define IRMP_NEC_PROTOCOL 2 // NEC, Pioneer, JVC, Toshiba, NoName etc.\r |
| 31 | #define IRMP_SAMSUNG_PROTOCOL 3 // Samsung\r |
| 32 | #define IRMP_MATSUSHITA_PROTOCOL 4 // Matsushita\r |
| 33 | #define IRMP_KASEIKYO_PROTOCOL 5 // Kaseikyo (Panasonic etc)\r |
| 34 | #define IRMP_RECS80_PROTOCOL 6 // Philips, Thomson, Nordmende, Telefunken, Saba\r |
| 35 | #define IRMP_RC5_PROTOCOL 7 // Philips etc\r |
| 36 | #define IRMP_DENON_PROTOCOL 8 // Denon\r |
| 37 | #define IRMP_RC6_PROTOCOL 9 // Philips etc\r |
| 38 | #define IRMP_SAMSUNG32_PROTOCOL 10 // Samsung32: no sync pulse at bit 16, length 32 instead of 37\r |
| 39 | #define IRMP_APPLE_PROTOCOL 11 // Apple, very similar to NEC\r |
| 40 | #define IRMP_RECS80EXT_PROTOCOL 12 // Philips, Technisat, Thomson, Nordmende, Telefunken, Saba\r |
| 41 | #define IRMP_NUBERT_PROTOCOL 13 // Nubert\r |
| 42 | #define IRMP_BANG_OLUFSEN_PROTOCOL 14 // Bang & Olufsen\r |
| 43 | #define IRMP_GRUNDIG_PROTOCOL 15 // Grundig\r |
| 44 | #define IRMP_NOKIA_PROTOCOL 16 // Nokia\r |
| 45 | #define IRMP_SIEMENS_PROTOCOL 17 // Siemens, e.g. Gigaset\r |
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46 | #define IRMP_FDC1_PROTOCOL 18 // FDC keyboard - protocol 1\r |
| 47 | #define IRMP_FDC2_PROTOCOL 19 // FDC keyboard - protocol 2\r |
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48 | #define IRMP_RCCAR_PROTOCOL 20 // RC Car\r |
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49 | \r |
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50 | // some flags of struct IRMP_PARAMETER:\r |
| 51 | #define IRMP_PARAM_FLAG_IS_MANCHESTER 0x01\r |
| 52 | #define IRMP_PARAM_FLAG_1ST_PULSE_IS_1 0x02\r |
| 53 | \r |
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54 | #define SIRCS_START_BIT_PULSE_TIME 2400.0e-6 // 2400 usec pulse\r |
| 55 | #define SIRCS_START_BIT_PAUSE_TIME 600.0e-6 // 600 usec pause\r |
| 56 | #define SIRCS_1_PULSE_TIME 1200.0e-6 // 1200 usec pulse\r |
| 57 | #define SIRCS_0_PULSE_TIME 600.0e-6 // 600 usec pulse\r |
| 58 | #define SIRCS_PAUSE_TIME 600.0e-6 // 600 usec pause\r |
| 59 | #define SIRCS_FRAMES 3 // SIRCS sends each frame 3 times\r |
| 60 | #define SIRCS_AUTO_REPETITION_PAUSE_TIME 25.0e-3 // auto repetition after 25ms\r |
| 61 | #define SIRCS_FRAME_REPEAT_PAUSE_TIME 25.0e-3 // frame repeat after 25ms\r |
| 62 | #define SIRCS_ADDRESS_OFFSET 15 // skip 15 bits\r |
| 63 | #define SIRCS_ADDRESS_LEN 5 // read up to 5 address bits\r |
| 64 | #define SIRCS_COMMAND_OFFSET 0 // skip 0 bits\r |
| 65 | #define SIRCS_COMMAND_LEN 15 // read 12-15 command bits\r |
| 66 | #define SIRCS_MINIMUM_DATA_LEN 12 // minimum data length\r |
| 67 | #define SIRCS_COMPLETE_DATA_LEN 20 // complete length - may be up to 20\r |
| 68 | #define SIRCS_STOP_BIT 0 // has no stop bit\r |
| 69 | #define SIRCS_LSB 1 // LSB...MSB\r |
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70 | #define SIRCS_FLAGS 0 // flags\r |
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71 | \r |
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72 | #define NEC_START_BIT_PULSE_TIME 9000.0e-6 // 9000 usec pulse\r |
| 73 | #define NEC_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r |
| 74 | #define NEC_REPEAT_START_BIT_PAUSE_TIME 2250.0e-6 // 2250 usec pause\r |
| 75 | #define NEC_PULSE_TIME 560.0e-6 // 560 usec pulse\r |
| 76 | #define NEC_1_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r |
| 77 | #define NEC_0_PAUSE_TIME 560.0e-6 // 560 usec pause\r |
| 78 | #define NEC_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r |
| 79 | #define NEC_ADDRESS_OFFSET 0 // skip 0 bits\r |
| 80 | #define NEC_ADDRESS_LEN 16 // read 16 address bits\r |
| 81 | #define NEC_COMMAND_OFFSET 16 // skip 16 bits (8 address + 8 /address)\r |
| 82 | #define NEC_COMMAND_LEN 16 // read 16 bits (8 command + 8 /command)\r |
| 83 | #define NEC_COMPLETE_DATA_LEN 32 // complete length\r |
| 84 | #define NEC_STOP_BIT 1 // has stop bit\r |
| 85 | #define NEC_LSB 1 // LSB...MSB\r |
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86 | #define NEC_FLAGS 0 // flags\r |
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87 | \r |
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88 | #define SAMSUNG_START_BIT_PULSE_TIME 4500.0e-6 // 4500 usec pulse\r |
| 89 | #define SAMSUNG_START_BIT_PAUSE_TIME 4500.0e-6 // 4500 usec pause\r |
| 90 | #define SAMSUNG_PULSE_TIME 550.0e-6 // 550 usec pulse\r |
| 91 | #define SAMSUNG_1_PAUSE_TIME 1450.0e-6 // 1450 usec pause\r |
| 92 | #define SAMSUNG_0_PAUSE_TIME 450.0e-6 // 450 usec pause\r |
| 93 | #define SAMSUNG_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 94 | #define SAMSUNG_ADDRESS_OFFSET 0 // skip 0 bits\r |
| 95 | #define SAMSUNG_ADDRESS_LEN 16 // read 16 address bits\r |
| 96 | #define SAMSUNG_ID_OFFSET 17 // skip 16 + 1 sync bit\r |
| 97 | #define SAMSUNG_ID_LEN 4 // read 4 id bits\r |
| 98 | #define SAMSUNG_COMMAND_OFFSET 21 // skip 16 + 1 sync + 4 data bits\r |
| 99 | #define SAMSUNG_COMMAND_LEN 16 // read 16 command bits\r |
| 100 | #define SAMSUNG_COMPLETE_DATA_LEN 37 // complete length\r |
| 101 | #define SAMSUNG_STOP_BIT 1 // has stop bit\r |
| 102 | #define SAMSUNG_LSB 1 // LSB...MSB?\r |
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103 | #define SAMSUNG_FLAGS 0 // flags\r |
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104 | \r |
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105 | #define SAMSUNG32_COMMAND_OFFSET 16 // skip 16 bits\r |
| 106 | #define SAMSUNG32_COMMAND_LEN 16 // read 16 command bits\r |
| 107 | #define SAMSUNG32_COMPLETE_DATA_LEN 32 // complete length\r |
| 108 | #define SAMSUNG32_FRAMES 2 // SAMSUNG32 sends each frame 2 times\r |
| 109 | #define SAMSUNG32_AUTO_REPETITION_PAUSE_TIME 47.0e-3 // repetition after 47 ms\r |
| 110 | #define SAMSUNG32_FRAME_REPEAT_PAUSE_TIME 47.0e-3 // frame repeat after 40ms\r |
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111 | \r |
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112 | #define MATSUSHITA_START_BIT_PULSE_TIME 3488.0e-6 // 3488 usec pulse\r |
| 113 | #define MATSUSHITA_START_BIT_PAUSE_TIME 3488.0e-6 // 3488 usec pause\r |
| 114 | #define MATSUSHITA_PULSE_TIME 872.0e-6 // 872 usec pulse\r |
| 115 | #define MATSUSHITA_1_PAUSE_TIME 2616.0e-6 // 2616 usec pause\r |
| 116 | #define MATSUSHITA_0_PAUSE_TIME 872.0e-6 // 872 usec pause\r |
| 117 | #define MATSUSHITA_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 118 | #define MATSUSHITA_ADDRESS_OFFSET 12 // skip 12 bits\r |
| 119 | #define MATSUSHITA_ADDRESS_LEN 12 // read 12 address bits\r |
| 120 | #define MATSUSHITA_COMMAND_OFFSET 0 // skip 0 bits\r |
| 121 | #define MATSUSHITA_COMMAND_LEN 12 // read 12 bits (6 custom + 6 command)\r |
| 122 | #define MATSUSHITA_COMPLETE_DATA_LEN 24 // complete length\r |
| 123 | #define MATSUSHITA_STOP_BIT 1 // has stop bit\r |
| 124 | #define MATSUSHITA_LSB 1 // LSB...MSB?\r |
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125 | #define MATSUSHITA_FLAGS 0 // flags\r |
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126 | \r |
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127 | #define KASEIKYO_START_BIT_PULSE_TIME 3380.0e-6 // 3380 usec pulse\r |
| 128 | #define KASEIKYO_START_BIT_PAUSE_TIME 1690.0e-6 // 1690 usec pause\r |
| 129 | #define KASEIKYO_PULSE_TIME 423.0e-6 // 525 usec pulse\r |
| 130 | #define KASEIKYO_1_PAUSE_TIME 1269.0e-6 // 525 usec pause\r |
| 131 | #define KASEIKYO_0_PAUSE_TIME 423.0e-6 // 1690 usec pause\r |
| 132 | #define KASEIKYO_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 133 | #define KASEIKYO_ADDRESS_OFFSET 0 // skip 0 bits\r |
| 134 | #define KASEIKYO_ADDRESS_LEN 16 // read 16 address bits\r |
| 135 | #define KASEIKYO_COMMAND_OFFSET 28 // skip 28 bits (16 manufacturer & 4 parity & 8 genre)\r |
| 136 | #define KASEIKYO_COMMAND_LEN 12 // read 12 command bits (10 real command & 2 id)\r |
| 137 | #define KASEIKYO_COMPLETE_DATA_LEN 48 // complete length\r |
| 138 | #define KASEIKYO_STOP_BIT 1 // has stop bit\r |
| 139 | #define KASEIKYO_LSB 1 // LSB...MSB?\r |
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140 | #define KASEIKYO_FLAGS 0 // flags\r |
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141 | \r |
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142 | #define RECS80_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r |
| 143 | #define RECS80_START_BIT_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r |
| 144 | #define RECS80_PULSE_TIME 158.0e-6 // 158 usec pulse\r |
| 145 | #define RECS80_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r |
| 146 | #define RECS80_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause\r |
| 147 | #define RECS80_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 148 | #define RECS80_ADDRESS_OFFSET 2 // skip 2 bits (2nd start + 1 toggle)\r |
| 149 | #define RECS80_ADDRESS_LEN 3 // read 3 address bits\r |
| 150 | #define RECS80_COMMAND_OFFSET 5 // skip 5 bits (2nd start + 1 toggle + 3 address)\r |
| 151 | #define RECS80_COMMAND_LEN 6 // read 6 command bits\r |
| 152 | #define RECS80_COMPLETE_DATA_LEN 11 // complete length\r |
| 153 | #define RECS80_STOP_BIT 1 // has stop bit\r |
| 154 | #define RECS80_LSB 0 // MSB...LSB\r |
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155 | #define RECS80_FLAGS 0 // flags\r |
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156 | \r |
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157 | #define RC5_BIT_TIME 889.0e-6 // 889 usec pulse/pause\r |
| 158 | #define RC5_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 159 | #define RC5_ADDRESS_OFFSET 2 // skip 2 bits (2nd start + 1 toggle)\r |
| 160 | #define RC5_ADDRESS_LEN 5 // read 5 address bits\r |
| 161 | #define RC5_COMMAND_OFFSET 7 // skip 5 bits (2nd start + 1 toggle + 5 address)\r |
| 162 | #define RC5_COMMAND_LEN 6 // read 6 command bits\r |
| 163 | #define RC5_COMPLETE_DATA_LEN 13 // complete length\r |
| 164 | #define RC5_STOP_BIT 0 // has no stop bit\r |
| 165 | #define RC5_LSB 0 // MSB...LSB\r |
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166 | #define RC5_FLAGS IRMP_PARAM_FLAG_IS_MANCHESTER // flags\r |
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167 | \r |
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168 | #define DENON_PULSE_TIME 275.0e-6 // 275 usec pulse\r |
| 169 | #define DENON_1_PAUSE_TIME 1900.0e-6 // 1900 usec pause\r |
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170 | #define DENON_0_PAUSE_TIME 775.0e-6 // 775 usec pause\r |
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171 | #define DENON_FRAMES 2 // DENON sends each frame 2 times\r |
| 172 | #define DENON_AUTO_REPETITION_PAUSE_TIME 65.0e-3 // inverted repetition after 65ms\r |
| 173 | #define DENON_FRAME_REPEAT_PAUSE_TIME 65.0e-3 // frame repeat after 65ms\r |
| 174 | #define DENON_ADDRESS_OFFSET 0 // skip 0 bits\r |
| 175 | #define DENON_ADDRESS_LEN 5 // read 5 address bits\r |
| 176 | #define DENON_COMMAND_OFFSET 5 // skip 5\r |
| 177 | #define DENON_COMMAND_LEN 10 // read 10 command bits\r |
| 178 | #define DENON_COMPLETE_DATA_LEN 15 // complete length\r |
| 179 | #define DENON_STOP_BIT 1 // has stop bit\r |
| 180 | #define DENON_LSB 0 // MSB...LSB\r |
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181 | #define DENON_FLAGS 0 // flags\r |
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182 | \r |
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183 | #define RC6_START_BIT_PULSE_TIME 2666.0e-6 // 2.666 msec pulse\r |
| 184 | #define RC6_START_BIT_PAUSE_TIME 889.0e-6 // 889 usec pause\r |
| 185 | #define RC6_TOGGLE_BIT_TIME 889.0e-6 // 889 msec pulse/pause\r |
| 186 | #define RC6_BIT_TIME 444.0e-6 // 889 usec pulse/pause\r |
| 187 | #define RC6_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 188 | #define RC6_ADDRESS_OFFSET 5 // skip "1" + 3 mode bits + 1 toggle bit\r |
| 189 | #define RC6_ADDRESS_LEN 8 // read 8 address bits\r |
| 190 | #define RC6_COMMAND_OFFSET 13 // skip 12 bits ("1" + 3 mode + 1 toggle + 8 address)\r |
| 191 | #define RC6_COMMAND_LEN 8 // read 8 command bits\r |
| 192 | #define RC6_COMPLETE_DATA_LEN_SHORT 21 // complete length\r |
| 193 | #define RC6_COMPLETE_DATA_LEN_LONG 36 // complete length\r |
| 194 | #define RC6_STOP_BIT 0 // has no stop bit\r |
| 195 | #define RC6_LSB 0 // MSB...LSB\r |
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196 | #define RC6_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r |
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197 | \r |
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198 | #define RECS80EXT_START_BIT_PULSE_TIME 158.0e-6 // 158 usec pulse\r |
| 199 | #define RECS80EXT_START_BIT_PAUSE_TIME 3637.0e-6 // 3637 usec pause\r |
| 200 | #define RECS80EXT_PULSE_TIME 158.0e-6 // 158 usec pulse\r |
| 201 | #define RECS80EXT_1_PAUSE_TIME 7432.0e-6 // 7432 usec pause\r |
| 202 | #define RECS80EXT_0_PAUSE_TIME 4902.0e-6 // 4902 usec pause\r |
| 203 | #define RECS80EXT_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 204 | #define RECS80EXT_ADDRESS_OFFSET 2 // skip 2 bits (2nd start + 1 toggle)\r |
| 205 | #define RECS80EXT_ADDRESS_LEN 4 // read 3 address bits\r |
| 206 | #define RECS80EXT_COMMAND_OFFSET 6 // skip 6 bits (2nd start + 1 toggle + 4 address)\r |
| 207 | #define RECS80EXT_COMMAND_LEN 6 // read 6 command bits\r |
| 208 | #define RECS80EXT_COMPLETE_DATA_LEN 12 // complete length\r |
| 209 | #define RECS80EXT_STOP_BIT 1 // has stop bit\r |
| 210 | #define RECS80EXT_LSB 0 // MSB...LSB\r |
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211 | #define RECS80EXT_FLAGS 0 // flags\r |
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212 | \r |
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213 | #define NUBERT_START_BIT_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r |
| 214 | #define NUBERT_START_BIT_PAUSE_TIME 340.0e-6 // 340 usec pause\r |
| 215 | #define NUBERT_1_PULSE_TIME 1340.0e-6 // 1340 usec pulse\r |
| 216 | #define NUBERT_1_PAUSE_TIME 340.0e-6 // 340 usec pause\r |
| 217 | #define NUBERT_0_PULSE_TIME 500.0e-6 // 500 usec pulse\r |
| 218 | #define NUBERT_0_PAUSE_TIME 1300.0e-6 // 1300 usec pause\r |
| 219 | #define NUBERT_FRAMES 2 // Nubert sends 2 frames\r |
| 220 | #define NUBERT_AUTO_REPETITION_PAUSE_TIME 35.0e-3 // auto repetition after 35ms\r |
| 221 | #define NUBERT_FRAME_REPEAT_PAUSE_TIME 35.0e-3 // frame repeat after 45ms\r |
| 222 | #define NUBERT_ADDRESS_OFFSET 0 // skip 0 bits\r |
| 223 | #define NUBERT_ADDRESS_LEN 0 // read 0 address bits\r |
| 224 | #define NUBERT_COMMAND_OFFSET 0 // skip 0 bits\r |
| 225 | #define NUBERT_COMMAND_LEN 10 // read 10 bits\r |
| 226 | #define NUBERT_COMPLETE_DATA_LEN 10 // complete length\r |
| 227 | #define NUBERT_STOP_BIT 1 // has stop bit\r |
| 228 | #define NUBERT_LSB 0 // MSB?\r |
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229 | #define NUBERT_FLAGS 0 // flags\r |
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230 | \r |
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231 | #define BANG_OLUFSEN_START_BIT1_PULSE_TIME 200.0e-6 // 200 usec pulse\r |
| 232 | #define BANG_OLUFSEN_START_BIT1_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r |
| 233 | #define BANG_OLUFSEN_START_BIT2_PULSE_TIME 200.0e-6 // 200 usec pulse\r |
| 234 | #define BANG_OLUFSEN_START_BIT2_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r |
| 235 | #define BANG_OLUFSEN_START_BIT3_PULSE_TIME 200.0e-6 // 200 usec pulse\r |
| 236 | #define BANG_OLUFSEN_START_BIT3_PAUSE_TIME 15625.0e-6 // 15625 usec pause\r |
| 237 | #define BANG_OLUFSEN_START_BIT4_PULSE_TIME 200.0e-6 // 200 usec pulse\r |
| 238 | #define BANG_OLUFSEN_START_BIT4_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r |
| 239 | #define BANG_OLUFSEN_PULSE_TIME 200.0e-6 // 200 usec pulse\r |
| 240 | #define BANG_OLUFSEN_1_PAUSE_TIME 9375.0e-6 // 9375 usec pause\r |
| 241 | #define BANG_OLUFSEN_0_PAUSE_TIME 3125.0e-6 // 3125 usec pause\r |
| 242 | #define BANG_OLUFSEN_R_PAUSE_TIME 6250.0e-6 // 6250 usec pause (repeat last bit)\r |
| 243 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME 12500.0e-6 // 12500 usec pause (trailer bit)\r |
| 244 | #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 245 | #define BANG_OLUFSEN_ADDRESS_OFFSET 0 // no address bits\r |
| 246 | #define BANG_OLUFSEN_ADDRESS_LEN 0 // no address bits\r |
| 247 | #define BANG_OLUFSEN_COMMAND_OFFSET 3 // skip startbits 2, 3, 4\r |
| 248 | #define BANG_OLUFSEN_COMMAND_LEN 16 // read 16 command bits\r |
| 249 | #define BANG_OLUFSEN_COMPLETE_DATA_LEN 20 // complete length: startbits 2, 3, 4 + 16 data bits + trailer bit\r |
| 250 | #define BANG_OLUFSEN_STOP_BIT 1 // has stop bit\r |
| 251 | #define BANG_OLUFSEN_LSB 0 // MSB...LSB\r |
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252 | #define BANG_OLUFSEN_FLAGS 0 // flags\r |
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253 | \r |
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254 | #define GRUNDIG_OR_NOKIA_BIT_TIME 528.0e-6 // 528 usec pulse/pause\r |
| 255 | #define GRUNDIG_OR_NOKIA_PRE_PAUSE_TIME 2639.0e-6 // 2639 usec pause after pre bit\r |
| 256 | #define GRUNDIG_OR_NOKIA_FRAME_REPEAT_PAUSE_TIME 117.76e-3 // info frame repeat after 117.76 ms\r |
| 257 | #define GRUNDIG_OR_NOKIA_STOP_BIT 0 // has no stop bit\r |
| 258 | #define GRUNDIG_OR_NOKIA_LSB 1 // MSB...LSB\r |
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259 | #define GRUNDIG_OR_NOKIA_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r |
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260 | \r |
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261 | #define GRUNDIG_FRAMES 2 // GRUNDIG sends each frame 1+1 times\r |
| 262 | #define GRUNDIG_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r |
| 263 | #define GRUNDIG_ADDRESS_OFFSET 0 // no address\r |
| 264 | #define GRUNDIG_ADDRESS_LEN 0 // no address\r |
| 265 | #define GRUNDIG_COMMAND_OFFSET 1 // skip 1 start bit\r |
| 266 | #define GRUNDIG_COMMAND_LEN 9 // read 9 command bits\r |
| 267 | #define GRUNDIG_COMPLETE_DATA_LEN 10 // complete length: 1 start bit + 9 data bits\r |
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268 | \r |
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269 | #define NOKIA_FRAMES 3 // NOKIA sends each frame 1 + 1 + 1 times\r |
| 270 | #define NOKIA_AUTO_REPETITION_PAUSE_TIME 20.0e-3 // repetition after 20ms\r |
| 271 | #define NOKIA_ADDRESS_OFFSET 9 // skip 9 bits (1 start bit + 8 data bits)\r |
| 272 | #define NOKIA_ADDRESS_LEN 8 // 7 address bits\r |
| 273 | #define NOKIA_COMMAND_OFFSET 1 // skip 1 bit (1 start bit)\r |
| 274 | #define NOKIA_COMMAND_LEN 8 // read 8 command bits\r |
| 275 | #define NOKIA_COMPLETE_DATA_LEN 17 // complete length: 1 start bit + 8 address bits + 8 command bits\r |
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276 | \r |
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277 | #define SIEMENS_BIT_TIME 250.0e-6 // 250 usec pulse/pause\r |
| 278 | #define SIEMENS_FRAME_REPEAT_PAUSE_TIME 45.0e-3 // frame repeat after 45ms\r |
| 279 | #define SIEMENS_ADDRESS_OFFSET 2 // skip 2 start bits\r |
| 280 | #define SIEMENS_ADDRESS_LEN 12 // read 12 address bits\r |
| 281 | #define SIEMENS_COMMAND_OFFSET 15 // skip 15 bits (2 start bits + 12 address bits + 1 inverted bit)\r |
| 282 | #define SIEMENS_COMMAND_LEN 7 // read 7 command bits\r |
| 283 | #define SIEMENS_COMPLETE_DATA_LEN 23 // complete length\r |
| 284 | #define SIEMENS_STOP_BIT 0 // has no stop bit\r |
| 285 | #define SIEMENS_LSB 0 // MSB...LSB\r |
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286 | #define SIEMENS_FLAGS (IRMP_PARAM_FLAG_IS_MANCHESTER | IRMP_PARAM_FLAG_1ST_PULSE_IS_1) // flags\r |
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287 | \r |
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288 | #define FDC1_START_BIT_PULSE_TIME 1390.0e-6 // 1390 usec pulse\r |
| 289 | #define FDC1_START_BIT_PAUSE_TIME 640.0e-6 // 640 usec pause\r |
| 290 | #define FDC1_PULSE_TIME 200.0e-6 // 200 usec pulse\r |
| 291 | #define FDC1_1_PAUSE_TIME 475.0e-6 // 475 usec pause\r |
| 292 | #define FDC1_0_PAUSE_TIME 145.0e-6 // 145 usec pause\r |
| 293 | #define FDC1_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r |
| 294 | #define FDC1_ADDRESS_OFFSET 0 // skip 0 bits\r |
| 295 | #define FDC1_ADDRESS_LEN 8 // read 8 address bits\r |
| 296 | #define FDC1_COMMAND_OFFSET 24 // skip 24 bits (8 address bits + 12 status bits + 4 repeat bits)\r |
| 297 | #define FDC1_COMMAND_LEN 8 // read 8 bits\r |
| 298 | #define FDC1_COMPLETE_DATA_LEN 40 // complete length\r |
| 299 | #define FDC1_STOP_BIT 1 // has stop bit\r |
| 300 | #define FDC1_LSB 1 // LSB...MSB\r |
| 301 | #define FDC1_FLAGS 0 // flags\r |
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302 | \r |
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303 | #define FDC2_START_BIT_PULSE_TIME 2120.0e-6 // 2120 usec pulse\r |
| 304 | #define FDC2_START_BIT_PAUSE_TIME 900.0e-6 // 900 usec pause\r |
| 305 | #define FDC2_PULSE_TIME 360.0e-6 // 360 usec pulse\r |
| 306 | #define FDC2_1_PAUSE_TIME 650.0e-6 // 650 usec pause\r |
| 307 | #define FDC2_0_PAUSE_TIME 180.0e-6 // 180 usec pause\r |
| 308 | #define FDC2_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r |
| 309 | #define FDC2_ADDRESS_OFFSET 0 // skip 0 bits\r |
| 310 | #define FDC2_ADDRESS_LEN 8 // read 8 address bits\r |
| 311 | #define FDC2_COMMAND_OFFSET 24 // skip 24 bits (8 address bits + 12 status bits + 4 repeat bits)\r |
| 312 | #define FDC2_COMMAND_LEN 8 // read 8 bits\r |
| 313 | #define FDC2_COMPLETE_DATA_LEN 40 // complete length\r |
| 314 | #define FDC2_STOP_BIT 1 // has stop bit\r |
| 315 | #define FDC2_LSB 1 // LSB...MSB\r |
| 316 | #define FDC2_FLAGS 0 // flags\r |
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317 | \r |
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318 | #define RCCAR_START_BIT_PULSE_TIME 2000.0e-6 // 2000 usec pulse\r |
| 319 | #define RCCAR_START_BIT_PAUSE_TIME 2000.0e-6 // 2000 usec pause\r |
| 320 | #define RCCAR_PULSE_TIME 600.0e-6 // 360 usec pulse\r |
| 321 | #define RCCAR_1_PAUSE_TIME 450.0e-6 // 650 usec pause\r |
| 322 | #define RCCAR_0_PAUSE_TIME 900.0e-6 // 180 usec pause\r |
| 323 | #define RCCAR_FRAME_REPEAT_PAUSE_TIME 40.0e-3 // frame repeat after 40ms\r |
| 324 | #define RCCAR_ADDRESS_OFFSET 0 // skip 0 bits\r |
| 325 | #define RCCAR_ADDRESS_LEN 0 // read 8 address bits\r |
| 326 | #define RCCAR_COMMAND_OFFSET 0 // skip 24 bits (8 address bits + 12 status bits + 4 repeat bits)\r |
| 327 | #define RCCAR_COMMAND_LEN 13 // read 8 bits\r |
| 328 | #define RCCAR_COMPLETE_DATA_LEN 13 // complete length\r |
| 329 | #define RCCAR_STOP_BIT 1 // has stop bit\r |
| 330 | #define RCCAR_LSB 0 // LSB...MSB\r |
| 331 | #define RCCAR_FLAGS 0 // flags\r |
| 332 | \r |
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333 | #define AUTO_FRAME_REPETITION_TIME 50.0e-3 // SIRCS/SAMSUNG32/NUBERT: automatic repetition after 25-50ms\r |
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334 | \r |
| 335 | #define TRUE 1\r |
| 336 | #define FALSE 0\r |
| 337 | \r |
| 338 | #define IRMP_FLAG_REPETITION 0x01\r |
| 339 | \r |
| 340 | typedef struct\r |
| 341 | {\r |
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342 | uint8_t protocol; // protocol, i.e. NEC_PROTOCOL\r |
| 343 | uint16_t address; // address\r |
| 344 | uint16_t command; // command\r |
| 345 | uint8_t flags; // flags, e.g. repetition\r |
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346 | } IRMP_DATA;\r |
| 347 | \r |
| 348 | \r |
| 349 | /**\r |
| 350 | * Initialize IRMP decoder\r |
| 351 | * @details Configures IRMP input pin\r |
| 352 | */\r |
| 353 | extern void irmp_init (void);\r |
| 354 | \r |
| 355 | /**\r |
| 356 | * Get IRMP data\r |
| 357 | * @details gets decoded IRMP data\r |
| 358 | * @param pointer in order to store IRMP data\r |
| 359 | * @return TRUE: successful, FALSE: failed\r |
| 360 | */\r |
| 361 | extern uint8_t irmp_get_data (IRMP_DATA *);\r |
| 362 | \r |
| 363 | /**\r |
| 364 | * ISR routine\r |
| 365 | * @details ISR routine, called 10000 times per second\r |
| 366 | */\r |
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367 | extern uint8_t irmp_ISR (void);\r |
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368 | \r |
| 369 | #ifdef __cplusplus\r |
| 370 | }\r |
| 371 | #endif\r |
| 372 | \r |
| 373 | #endif /* _WC_IRMP_H_ */\r |
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